1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Copyright (C) 2018 Cadence Design Systems Inc.
   4 *
   5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
   6 */
   7
   8#include <linux/atomic.h>
   9#include <linux/bug.h>
  10#include <linux/device.h>
  11#include <linux/err.h>
  12#include <linux/export.h>
  13#include <linux/kernel.h>
  14#include <linux/list.h>
  15#include <linux/of.h>
 
  16#include <linux/slab.h>
  17#include <linux/spinlock.h>
  18#include <linux/workqueue.h>
  19
  20#include "internals.h"
  21
  22static DEFINE_IDR(i3c_bus_idr);
  23static DEFINE_MUTEX(i3c_core_lock);
 
 
  24
  25/**
  26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
  27 * @bus: I3C bus to take the lock on
  28 *
  29 * This function takes the bus lock so that no other operations can occur on
  30 * the bus. This is needed for all kind of bus maintenance operation, like
  31 * - enabling/disabling slave events
  32 * - re-triggering DAA
  33 * - changing the dynamic address of a device
  34 * - relinquishing mastership
  35 * - ...
  36 *
  37 * The reason for this kind of locking is that we don't want drivers and core
  38 * logic to rely on I3C device information that could be changed behind their
  39 * back.
  40 */
  41static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
  42{
  43	down_write(&bus->lock);
  44}
  45
  46/**
  47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
  48 *			      operation
  49 * @bus: I3C bus to release the lock on
  50 *
  51 * Should be called when the bus maintenance operation is done. See
  52 * i3c_bus_maintenance_lock() for more details on what these maintenance
  53 * operations are.
  54 */
  55static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
  56{
  57	up_write(&bus->lock);
  58}
  59
  60/**
  61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
  62 * @bus: I3C bus to take the lock on
  63 *
  64 * This function takes the bus lock for any operation that is not a maintenance
  65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
  66 * maintenance operations). Basically all communications with I3C devices are
  67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
  68 * state or I3C dynamic address).
  69 *
  70 * Note that this lock is not guaranteeing serialization of normal operations.
  71 * In other words, transfer requests passed to the I3C master can be submitted
  72 * in parallel and I3C master drivers have to use their own locking to make
  73 * sure two different communications are not inter-mixed, or access to the
  74 * output/input queue is not done while the engine is busy.
  75 */
  76void i3c_bus_normaluse_lock(struct i3c_bus *bus)
  77{
  78	down_read(&bus->lock);
  79}
  80
  81/**
  82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
  83 * @bus: I3C bus to release the lock on
  84 *
  85 * Should be called when a normal operation is done. See
  86 * i3c_bus_normaluse_lock() for more details on what these normal operations
  87 * are.
  88 */
  89void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
  90{
  91	up_read(&bus->lock);
  92}
  93
  94static struct i3c_master_controller *
  95i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
  96{
  97	return container_of(i3cbus, struct i3c_master_controller, bus);
  98}
  99
 100static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
 101{
 102	return container_of(dev, struct i3c_master_controller, dev);
 103}
 104
 105static const struct device_type i3c_device_type;
 106
 107static struct i3c_bus *dev_to_i3cbus(struct device *dev)
 108{
 109	struct i3c_master_controller *master;
 110
 111	if (dev->type == &i3c_device_type)
 112		return dev_to_i3cdev(dev)->bus;
 113
 114	master = dev_to_i3cmaster(dev);
 115
 116	return &master->bus;
 117}
 118
 119static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
 120{
 121	struct i3c_master_controller *master;
 122
 123	if (dev->type == &i3c_device_type)
 124		return dev_to_i3cdev(dev)->desc;
 125
 126	master = dev_to_i3cmaster(dev);
 127
 128	return master->this;
 129}
 130
 131static ssize_t bcr_show(struct device *dev,
 132			struct device_attribute *da,
 133			char *buf)
 134{
 135	struct i3c_bus *bus = dev_to_i3cbus(dev);
 136	struct i3c_dev_desc *desc;
 137	ssize_t ret;
 138
 139	i3c_bus_normaluse_lock(bus);
 140	desc = dev_to_i3cdesc(dev);
 141	ret = sprintf(buf, "%x\n", desc->info.bcr);
 142	i3c_bus_normaluse_unlock(bus);
 143
 144	return ret;
 145}
 146static DEVICE_ATTR_RO(bcr);
 147
 148static ssize_t dcr_show(struct device *dev,
 149			struct device_attribute *da,
 150			char *buf)
 151{
 152	struct i3c_bus *bus = dev_to_i3cbus(dev);
 153	struct i3c_dev_desc *desc;
 154	ssize_t ret;
 155
 156	i3c_bus_normaluse_lock(bus);
 157	desc = dev_to_i3cdesc(dev);
 158	ret = sprintf(buf, "%x\n", desc->info.dcr);
 159	i3c_bus_normaluse_unlock(bus);
 160
 161	return ret;
 162}
 163static DEVICE_ATTR_RO(dcr);
 164
 165static ssize_t pid_show(struct device *dev,
 166			struct device_attribute *da,
 167			char *buf)
 168{
 169	struct i3c_bus *bus = dev_to_i3cbus(dev);
 170	struct i3c_dev_desc *desc;
 171	ssize_t ret;
 172
 173	i3c_bus_normaluse_lock(bus);
 174	desc = dev_to_i3cdesc(dev);
 175	ret = sprintf(buf, "%llx\n", desc->info.pid);
 176	i3c_bus_normaluse_unlock(bus);
 177
 178	return ret;
 179}
 180static DEVICE_ATTR_RO(pid);
 181
 182static ssize_t dynamic_address_show(struct device *dev,
 183				    struct device_attribute *da,
 184				    char *buf)
 185{
 186	struct i3c_bus *bus = dev_to_i3cbus(dev);
 187	struct i3c_dev_desc *desc;
 188	ssize_t ret;
 189
 190	i3c_bus_normaluse_lock(bus);
 191	desc = dev_to_i3cdesc(dev);
 192	ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
 193	i3c_bus_normaluse_unlock(bus);
 194
 195	return ret;
 196}
 197static DEVICE_ATTR_RO(dynamic_address);
 198
 199static const char * const hdrcap_strings[] = {
 200	"hdr-ddr", "hdr-tsp", "hdr-tsl",
 201};
 202
 203static ssize_t hdrcap_show(struct device *dev,
 204			   struct device_attribute *da,
 205			   char *buf)
 206{
 207	struct i3c_bus *bus = dev_to_i3cbus(dev);
 208	struct i3c_dev_desc *desc;
 209	ssize_t offset = 0, ret;
 210	unsigned long caps;
 211	int mode;
 212
 213	i3c_bus_normaluse_lock(bus);
 214	desc = dev_to_i3cdesc(dev);
 215	caps = desc->info.hdr_cap;
 216	for_each_set_bit(mode, &caps, 8) {
 217		if (mode >= ARRAY_SIZE(hdrcap_strings))
 218			break;
 219
 220		if (!hdrcap_strings[mode])
 221			continue;
 222
 223		ret = sprintf(buf + offset, offset ? " %s" : "%s",
 224			      hdrcap_strings[mode]);
 225		if (ret < 0)
 226			goto out;
 227
 228		offset += ret;
 229	}
 230
 231	ret = sprintf(buf + offset, "\n");
 232	if (ret < 0)
 233		goto out;
 234
 235	ret = offset + ret;
 236
 237out:
 238	i3c_bus_normaluse_unlock(bus);
 239
 240	return ret;
 241}
 242static DEVICE_ATTR_RO(hdrcap);
 243
 244static ssize_t modalias_show(struct device *dev,
 245			     struct device_attribute *da, char *buf)
 246{
 247	struct i3c_device *i3c = dev_to_i3cdev(dev);
 248	struct i3c_device_info devinfo;
 249	u16 manuf, part, ext;
 250
 251	i3c_device_get_info(i3c, &devinfo);
 252	manuf = I3C_PID_MANUF_ID(devinfo.pid);
 253	part = I3C_PID_PART_ID(devinfo.pid);
 254	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
 255
 256	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
 257		return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
 258			       manuf);
 259
 260	return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
 261		       devinfo.dcr, manuf, part, ext);
 262}
 263static DEVICE_ATTR_RO(modalias);
 264
 265static struct attribute *i3c_device_attrs[] = {
 266	&dev_attr_bcr.attr,
 267	&dev_attr_dcr.attr,
 268	&dev_attr_pid.attr,
 269	&dev_attr_dynamic_address.attr,
 270	&dev_attr_hdrcap.attr,
 271	&dev_attr_modalias.attr,
 272	NULL,
 273};
 274ATTRIBUTE_GROUPS(i3c_device);
 275
 276static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
 277{
 278	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
 279	struct i3c_device_info devinfo;
 280	u16 manuf, part, ext;
 281
 282	i3c_device_get_info(i3cdev, &devinfo);
 
 283	manuf = I3C_PID_MANUF_ID(devinfo.pid);
 284	part = I3C_PID_PART_ID(devinfo.pid);
 285	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
 286
 287	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
 288		return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
 289				      devinfo.dcr, manuf);
 290
 291	return add_uevent_var(env,
 292			      "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
 293			      devinfo.dcr, manuf, part, ext);
 294}
 295
 296static const struct device_type i3c_device_type = {
 297	.groups	= i3c_device_groups,
 298	.uevent = i3c_device_uevent,
 299};
 300
 301static int i3c_device_match(struct device *dev, struct device_driver *drv)
 302{
 303	struct i3c_device *i3cdev;
 304	struct i3c_driver *i3cdrv;
 305
 306	if (dev->type != &i3c_device_type)
 307		return 0;
 308
 309	i3cdev = dev_to_i3cdev(dev);
 310	i3cdrv = drv_to_i3cdrv(drv);
 311	if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
 312		return 1;
 313
 314	return 0;
 315}
 316
 317static int i3c_device_probe(struct device *dev)
 318{
 319	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
 320	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
 321
 322	return driver->probe(i3cdev);
 323}
 324
 325static void i3c_device_remove(struct device *dev)
 326{
 327	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
 328	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
 329
 330	if (driver->remove)
 331		driver->remove(i3cdev);
 332
 333	i3c_device_free_ibi(i3cdev);
 334}
 335
 336struct bus_type i3c_bus_type = {
 337	.name = "i3c",
 338	.match = i3c_device_match,
 339	.probe = i3c_device_probe,
 340	.remove = i3c_device_remove,
 341};
 
 342
 343static enum i3c_addr_slot_status
 344i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
 345{
 346	unsigned long status;
 347	int bitpos = addr * 2;
 348
 349	if (addr > I2C_MAX_ADDR)
 350		return I3C_ADDR_SLOT_RSVD;
 351
 352	status = bus->addrslots[bitpos / BITS_PER_LONG];
 353	status >>= bitpos % BITS_PER_LONG;
 354
 355	return status & I3C_ADDR_SLOT_STATUS_MASK;
 356}
 357
 358static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
 359					 enum i3c_addr_slot_status status)
 
 
 
 
 
 
 360{
 361	int bitpos = addr * 2;
 362	unsigned long *ptr;
 363
 364	if (addr > I2C_MAX_ADDR)
 365		return;
 366
 367	ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
 368	*ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
 369						(bitpos % BITS_PER_LONG));
 370	*ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
 
 
 
 
 
 371}
 372
 373static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
 374{
 375	enum i3c_addr_slot_status status;
 376
 377	status = i3c_bus_get_addr_slot_status(bus, addr);
 378
 379	return status == I3C_ADDR_SLOT_FREE;
 380}
 381
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 382static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
 383{
 384	enum i3c_addr_slot_status status;
 385	u8 addr;
 386
 387	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
 388		status = i3c_bus_get_addr_slot_status(bus, addr);
 
 
 
 
 
 
 
 
 389		if (status == I3C_ADDR_SLOT_FREE)
 390			return addr;
 391	}
 392
 393	return -ENOMEM;
 394}
 395
 396static void i3c_bus_init_addrslots(struct i3c_bus *bus)
 397{
 398	int i;
 399
 400	/* Addresses 0 to 7 are reserved. */
 401	for (i = 0; i < 8; i++)
 402		i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
 403
 404	/*
 405	 * Reserve broadcast address and all addresses that might collide
 406	 * with the broadcast address when facing a single bit error.
 407	 */
 408	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
 409				     I3C_ADDR_SLOT_RSVD);
 410	for (i = 0; i < 7; i++)
 411		i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
 412					     I3C_ADDR_SLOT_RSVD);
 413}
 414
 415static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
 416{
 417	mutex_lock(&i3c_core_lock);
 418	idr_remove(&i3c_bus_idr, i3cbus->id);
 419	mutex_unlock(&i3c_core_lock);
 420}
 421
 422static int i3c_bus_init(struct i3c_bus *i3cbus)
 423{
 424	int ret;
 425
 426	init_rwsem(&i3cbus->lock);
 427	INIT_LIST_HEAD(&i3cbus->devs.i2c);
 428	INIT_LIST_HEAD(&i3cbus->devs.i3c);
 429	i3c_bus_init_addrslots(i3cbus);
 430	i3cbus->mode = I3C_BUS_MODE_PURE;
 431
 
 
 
 432	mutex_lock(&i3c_core_lock);
 433	ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
 
 
 
 
 
 
 
 
 434	mutex_unlock(&i3c_core_lock);
 435
 436	if (ret < 0)
 437		return ret;
 438
 439	i3cbus->id = ret;
 440
 441	return 0;
 442}
 443
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 444static const char * const i3c_bus_mode_strings[] = {
 445	[I3C_BUS_MODE_PURE] = "pure",
 446	[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
 447	[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
 448	[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
 449};
 450
 451static ssize_t mode_show(struct device *dev,
 452			 struct device_attribute *da,
 453			 char *buf)
 454{
 455	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
 456	ssize_t ret;
 457
 458	i3c_bus_normaluse_lock(i3cbus);
 459	if (i3cbus->mode < 0 ||
 460	    i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
 461	    !i3c_bus_mode_strings[i3cbus->mode])
 462		ret = sprintf(buf, "unknown\n");
 463	else
 464		ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
 465	i3c_bus_normaluse_unlock(i3cbus);
 466
 467	return ret;
 468}
 469static DEVICE_ATTR_RO(mode);
 470
 471static ssize_t current_master_show(struct device *dev,
 472				   struct device_attribute *da,
 473				   char *buf)
 474{
 475	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
 476	ssize_t ret;
 477
 478	i3c_bus_normaluse_lock(i3cbus);
 479	ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
 480		      i3cbus->cur_master->info.pid);
 481	i3c_bus_normaluse_unlock(i3cbus);
 482
 483	return ret;
 484}
 485static DEVICE_ATTR_RO(current_master);
 486
 487static ssize_t i3c_scl_frequency_show(struct device *dev,
 488				      struct device_attribute *da,
 489				      char *buf)
 490{
 491	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
 492	ssize_t ret;
 493
 494	i3c_bus_normaluse_lock(i3cbus);
 495	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
 496	i3c_bus_normaluse_unlock(i3cbus);
 497
 498	return ret;
 499}
 500static DEVICE_ATTR_RO(i3c_scl_frequency);
 501
 502static ssize_t i2c_scl_frequency_show(struct device *dev,
 503				      struct device_attribute *da,
 504				      char *buf)
 505{
 506	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
 507	ssize_t ret;
 508
 509	i3c_bus_normaluse_lock(i3cbus);
 510	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
 511	i3c_bus_normaluse_unlock(i3cbus);
 512
 513	return ret;
 514}
 515static DEVICE_ATTR_RO(i2c_scl_frequency);
 516
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 517static struct attribute *i3c_masterdev_attrs[] = {
 518	&dev_attr_mode.attr,
 519	&dev_attr_current_master.attr,
 520	&dev_attr_i3c_scl_frequency.attr,
 521	&dev_attr_i2c_scl_frequency.attr,
 522	&dev_attr_bcr.attr,
 523	&dev_attr_dcr.attr,
 524	&dev_attr_pid.attr,
 525	&dev_attr_dynamic_address.attr,
 526	&dev_attr_hdrcap.attr,
 
 527	NULL,
 528};
 529ATTRIBUTE_GROUPS(i3c_masterdev);
 530
 531static void i3c_masterdev_release(struct device *dev)
 532{
 533	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
 534	struct i3c_bus *bus = dev_to_i3cbus(dev);
 535
 536	if (master->wq)
 537		destroy_workqueue(master->wq);
 538
 539	WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
 540	i3c_bus_cleanup(bus);
 541
 542	of_node_put(dev->of_node);
 543}
 544
 545static const struct device_type i3c_masterdev_type = {
 546	.groups	= i3c_masterdev_groups,
 547};
 548
 549static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
 550			    unsigned long max_i2c_scl_rate)
 551{
 552	struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
 553
 554	i3cbus->mode = mode;
 555
 556	switch (i3cbus->mode) {
 557	case I3C_BUS_MODE_PURE:
 558		if (!i3cbus->scl_rate.i3c)
 559			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
 560		break;
 561	case I3C_BUS_MODE_MIXED_FAST:
 562	case I3C_BUS_MODE_MIXED_LIMITED:
 563		if (!i3cbus->scl_rate.i3c)
 564			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
 565		if (!i3cbus->scl_rate.i2c)
 566			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
 567		break;
 568	case I3C_BUS_MODE_MIXED_SLOW:
 569		if (!i3cbus->scl_rate.i2c)
 570			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
 571		if (!i3cbus->scl_rate.i3c ||
 572		    i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
 573			i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
 574		break;
 575	default:
 576		return -EINVAL;
 577	}
 578
 579	dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
 580		i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
 581
 582	/*
 583	 * I3C/I2C frequency may have been overridden, check that user-provided
 584	 * values are not exceeding max possible frequency.
 585	 */
 586	if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
 587	    i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
 588		return -EINVAL;
 589
 590	return 0;
 591}
 592
 593static struct i3c_master_controller *
 594i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
 595{
 596	return container_of(adap, struct i3c_master_controller, i2c);
 597}
 598
 599static struct i2c_adapter *
 600i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
 601{
 602	return &master->i2c;
 603}
 604
 605static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
 606{
 607	kfree(dev);
 608}
 609
 610static struct i2c_dev_desc *
 611i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
 612			 u16 addr, u8 lvr)
 613{
 614	struct i2c_dev_desc *dev;
 615
 616	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
 617	if (!dev)
 618		return ERR_PTR(-ENOMEM);
 619
 620	dev->common.master = master;
 621	dev->addr = addr;
 622	dev->lvr = lvr;
 623
 624	return dev;
 625}
 626
 627static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
 628				   u16 payloadlen)
 629{
 630	dest->addr = addr;
 631	dest->payload.len = payloadlen;
 632	if (payloadlen)
 633		dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
 634	else
 635		dest->payload.data = NULL;
 636
 637	return dest->payload.data;
 638}
 639
 640static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
 641{
 642	kfree(dest->payload.data);
 643}
 644
 645static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
 646			     struct i3c_ccc_cmd_dest *dests,
 647			     unsigned int ndests)
 648{
 649	cmd->rnw = rnw ? 1 : 0;
 650	cmd->id = id;
 651	cmd->dests = dests;
 652	cmd->ndests = ndests;
 653	cmd->err = I3C_ERROR_UNKNOWN;
 654}
 655
 656static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
 657					  struct i3c_ccc_cmd *cmd)
 658{
 659	int ret;
 660
 661	if (!cmd || !master)
 662		return -EINVAL;
 663
 664	if (WARN_ON(master->init_done &&
 665		    !rwsem_is_locked(&master->bus.lock)))
 666		return -EINVAL;
 667
 668	if (!master->ops->send_ccc_cmd)
 669		return -ENOTSUPP;
 670
 671	if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
 672		return -EINVAL;
 673
 674	if (master->ops->supports_ccc_cmd &&
 675	    !master->ops->supports_ccc_cmd(master, cmd))
 676		return -ENOTSUPP;
 677
 678	ret = master->ops->send_ccc_cmd(master, cmd);
 679	if (ret) {
 680		if (cmd->err != I3C_ERROR_UNKNOWN)
 681			return cmd->err;
 682
 683		return ret;
 684	}
 685
 686	return 0;
 687}
 688
 689static struct i2c_dev_desc *
 690i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
 691				u16 addr)
 692{
 693	struct i2c_dev_desc *dev;
 694
 695	i3c_bus_for_each_i2cdev(&master->bus, dev) {
 696		if (dev->addr == addr)
 697			return dev;
 698	}
 699
 700	return NULL;
 701}
 702
 703/**
 704 * i3c_master_get_free_addr() - get a free address on the bus
 705 * @master: I3C master object
 706 * @start_addr: where to start searching
 707 *
 708 * This function must be called with the bus lock held in write mode.
 709 *
 710 * Return: the first free address starting at @start_addr (included) or -ENOMEM
 711 * if there's no more address available.
 712 */
 713int i3c_master_get_free_addr(struct i3c_master_controller *master,
 714			     u8 start_addr)
 715{
 716	return i3c_bus_get_free_addr(&master->bus, start_addr);
 717}
 718EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
 719
 720static void i3c_device_release(struct device *dev)
 721{
 722	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
 723
 724	WARN_ON(i3cdev->desc);
 725
 726	of_node_put(i3cdev->dev.of_node);
 727	kfree(i3cdev);
 728}
 729
 730static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
 731{
 732	kfree(dev);
 733}
 734
 735static struct i3c_dev_desc *
 736i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
 737			 const struct i3c_device_info *info)
 738{
 739	struct i3c_dev_desc *dev;
 740
 741	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
 742	if (!dev)
 743		return ERR_PTR(-ENOMEM);
 744
 745	dev->common.master = master;
 746	dev->info = *info;
 747	mutex_init(&dev->ibi_lock);
 748
 749	return dev;
 750}
 751
 752static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
 753				    u8 addr)
 754{
 755	enum i3c_addr_slot_status addrstat;
 756	struct i3c_ccc_cmd_dest dest;
 757	struct i3c_ccc_cmd cmd;
 758	int ret;
 759
 760	if (!master)
 761		return -EINVAL;
 762
 763	addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
 764	if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
 765		return -EINVAL;
 766
 767	i3c_ccc_cmd_dest_init(&dest, addr, 0);
 768	i3c_ccc_cmd_init(&cmd, false,
 769			 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
 770			 &dest, 1);
 771	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
 772	i3c_ccc_cmd_dest_cleanup(&dest);
 773
 774	return ret;
 775}
 776
 777/**
 778 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
 779 *				procedure
 780 * @master: master used to send frames on the bus
 781 *
 782 * Send a ENTDAA CCC command to start a DAA procedure.
 783 *
 784 * Note that this function only sends the ENTDAA CCC command, all the logic
 785 * behind dynamic address assignment has to be handled in the I3C master
 786 * driver.
 787 *
 788 * This function must be called with the bus lock held in write mode.
 789 *
 790 * Return: 0 in case of success, a positive I3C error code if the error is
 791 * one of the official Mx error codes, and a negative error code otherwise.
 792 */
 793int i3c_master_entdaa_locked(struct i3c_master_controller *master)
 794{
 795	struct i3c_ccc_cmd_dest dest;
 796	struct i3c_ccc_cmd cmd;
 797	int ret;
 798
 799	i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
 800	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
 801	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
 802	i3c_ccc_cmd_dest_cleanup(&dest);
 803
 804	return ret;
 805}
 806EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
 807
 808static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
 809					u8 addr, bool enable, u8 evts)
 810{
 811	struct i3c_ccc_events *events;
 812	struct i3c_ccc_cmd_dest dest;
 813	struct i3c_ccc_cmd cmd;
 814	int ret;
 815
 816	events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
 817	if (!events)
 818		return -ENOMEM;
 819
 820	events->events = evts;
 821	i3c_ccc_cmd_init(&cmd, false,
 822			 enable ?
 823			 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
 824			 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
 825			 &dest, 1);
 826	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
 827	i3c_ccc_cmd_dest_cleanup(&dest);
 828
 829	return ret;
 830}
 831
 832/**
 833 * i3c_master_disec_locked() - send a DISEC CCC command
 834 * @master: master used to send frames on the bus
 835 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
 836 * @evts: events to disable
 837 *
 838 * Send a DISEC CCC command to disable some or all events coming from a
 839 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
 840 *
 841 * This function must be called with the bus lock held in write mode.
 842 *
 843 * Return: 0 in case of success, a positive I3C error code if the error is
 844 * one of the official Mx error codes, and a negative error code otherwise.
 845 */
 846int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
 847			    u8 evts)
 848{
 849	return i3c_master_enec_disec_locked(master, addr, false, evts);
 850}
 851EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
 852
 853/**
 854 * i3c_master_enec_locked() - send an ENEC CCC command
 855 * @master: master used to send frames on the bus
 856 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
 857 * @evts: events to disable
 858 *
 859 * Sends an ENEC CCC command to enable some or all events coming from a
 860 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
 861 *
 862 * This function must be called with the bus lock held in write mode.
 863 *
 864 * Return: 0 in case of success, a positive I3C error code if the error is
 865 * one of the official Mx error codes, and a negative error code otherwise.
 866 */
 867int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
 868			   u8 evts)
 869{
 870	return i3c_master_enec_disec_locked(master, addr, true, evts);
 871}
 872EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
 873
 874/**
 875 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
 876 * @master: master used to send frames on the bus
 877 *
 878 * Send a DEFSLVS CCC command containing all the devices known to the @master.
 879 * This is useful when you have secondary masters on the bus to propagate
 880 * device information.
 881 *
 882 * This should be called after all I3C devices have been discovered (in other
 883 * words, after the DAA procedure has finished) and instantiated in
 884 * &i3c_master_controller_ops->bus_init().
 885 * It should also be called if a master ACKed an Hot-Join request and assigned
 886 * a dynamic address to the device joining the bus.
 887 *
 888 * This function must be called with the bus lock held in write mode.
 889 *
 890 * Return: 0 in case of success, a positive I3C error code if the error is
 891 * one of the official Mx error codes, and a negative error code otherwise.
 892 */
 893int i3c_master_defslvs_locked(struct i3c_master_controller *master)
 894{
 895	struct i3c_ccc_defslvs *defslvs;
 896	struct i3c_ccc_dev_desc *desc;
 897	struct i3c_ccc_cmd_dest dest;
 898	struct i3c_dev_desc *i3cdev;
 899	struct i2c_dev_desc *i2cdev;
 900	struct i3c_ccc_cmd cmd;
 901	struct i3c_bus *bus;
 902	bool send = false;
 903	int ndevs = 0, ret;
 904
 905	if (!master)
 906		return -EINVAL;
 907
 908	bus = i3c_master_get_bus(master);
 909	i3c_bus_for_each_i3cdev(bus, i3cdev) {
 910		ndevs++;
 911
 912		if (i3cdev == master->this)
 913			continue;
 914
 915		if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
 916		    I3C_BCR_I3C_MASTER)
 917			send = true;
 918	}
 919
 920	/* No other master on the bus, skip DEFSLVS. */
 921	if (!send)
 922		return 0;
 923
 924	i3c_bus_for_each_i2cdev(bus, i2cdev)
 925		ndevs++;
 926
 927	defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
 928					struct_size(defslvs, slaves,
 929						    ndevs - 1));
 930	if (!defslvs)
 931		return -ENOMEM;
 932
 933	defslvs->count = ndevs;
 934	defslvs->master.bcr = master->this->info.bcr;
 935	defslvs->master.dcr = master->this->info.dcr;
 936	defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
 937	defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
 938
 939	desc = defslvs->slaves;
 940	i3c_bus_for_each_i2cdev(bus, i2cdev) {
 941		desc->lvr = i2cdev->lvr;
 942		desc->static_addr = i2cdev->addr << 1;
 943		desc++;
 944	}
 945
 946	i3c_bus_for_each_i3cdev(bus, i3cdev) {
 947		/* Skip the I3C dev representing this master. */
 948		if (i3cdev == master->this)
 949			continue;
 950
 951		desc->bcr = i3cdev->info.bcr;
 952		desc->dcr = i3cdev->info.dcr;
 953		desc->dyn_addr = i3cdev->info.dyn_addr << 1;
 954		desc->static_addr = i3cdev->info.static_addr << 1;
 955		desc++;
 956	}
 957
 958	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
 959	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
 960	i3c_ccc_cmd_dest_cleanup(&dest);
 961
 962	return ret;
 963}
 964EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
 965
 966static int i3c_master_setda_locked(struct i3c_master_controller *master,
 967				   u8 oldaddr, u8 newaddr, bool setdasa)
 968{
 969	struct i3c_ccc_cmd_dest dest;
 970	struct i3c_ccc_setda *setda;
 971	struct i3c_ccc_cmd cmd;
 972	int ret;
 973
 974	if (!oldaddr || !newaddr)
 975		return -EINVAL;
 976
 977	setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
 978	if (!setda)
 979		return -ENOMEM;
 980
 981	setda->addr = newaddr << 1;
 982	i3c_ccc_cmd_init(&cmd, false,
 983			 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
 984			 &dest, 1);
 985	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
 986	i3c_ccc_cmd_dest_cleanup(&dest);
 987
 988	return ret;
 989}
 990
 991static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
 992				     u8 static_addr, u8 dyn_addr)
 993{
 994	return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
 995}
 996
 997static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
 998				      u8 oldaddr, u8 newaddr)
 999{
1000	return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1001}
1002
1003static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1004				    struct i3c_device_info *info)
1005{
1006	struct i3c_ccc_cmd_dest dest;
1007	struct i3c_ccc_mrl *mrl;
1008	struct i3c_ccc_cmd cmd;
1009	int ret;
1010
1011	mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1012	if (!mrl)
1013		return -ENOMEM;
1014
1015	/*
1016	 * When the device does not have IBI payload GETMRL only returns 2
1017	 * bytes of data.
1018	 */
1019	if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1020		dest.payload.len -= 1;
1021
1022	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1023	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1024	if (ret)
1025		goto out;
1026
1027	switch (dest.payload.len) {
1028	case 3:
1029		info->max_ibi_len = mrl->ibi_len;
1030		fallthrough;
1031	case 2:
1032		info->max_read_len = be16_to_cpu(mrl->read_len);
1033		break;
1034	default:
1035		ret = -EIO;
1036		goto out;
1037	}
1038
1039out:
1040	i3c_ccc_cmd_dest_cleanup(&dest);
1041
1042	return ret;
1043}
1044
1045static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1046				    struct i3c_device_info *info)
1047{
1048	struct i3c_ccc_cmd_dest dest;
1049	struct i3c_ccc_mwl *mwl;
1050	struct i3c_ccc_cmd cmd;
1051	int ret;
1052
1053	mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1054	if (!mwl)
1055		return -ENOMEM;
1056
1057	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1058	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1059	if (ret)
1060		goto out;
1061
1062	if (dest.payload.len != sizeof(*mwl)) {
1063		ret = -EIO;
1064		goto out;
1065	}
1066
1067	info->max_write_len = be16_to_cpu(mwl->len);
1068
1069out:
1070	i3c_ccc_cmd_dest_cleanup(&dest);
1071
1072	return ret;
1073}
1074
1075static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1076				     struct i3c_device_info *info)
1077{
1078	struct i3c_ccc_getmxds *getmaxds;
1079	struct i3c_ccc_cmd_dest dest;
1080	struct i3c_ccc_cmd cmd;
1081	int ret;
1082
1083	getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1084					 sizeof(*getmaxds));
1085	if (!getmaxds)
1086		return -ENOMEM;
1087
1088	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1089	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1090	if (ret)
1091		goto out;
 
 
 
 
 
 
 
 
1092
1093	if (dest.payload.len != 2 && dest.payload.len != 5) {
1094		ret = -EIO;
1095		goto out;
1096	}
1097
1098	info->max_read_ds = getmaxds->maxrd;
1099	info->max_write_ds = getmaxds->maxwr;
1100	if (dest.payload.len == 5)
1101		info->max_read_turnaround = getmaxds->maxrdturn[0] |
1102					    ((u32)getmaxds->maxrdturn[1] << 8) |
1103					    ((u32)getmaxds->maxrdturn[2] << 16);
1104
1105out:
1106	i3c_ccc_cmd_dest_cleanup(&dest);
1107
1108	return ret;
1109}
1110
1111static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1112				       struct i3c_device_info *info)
1113{
1114	struct i3c_ccc_gethdrcap *gethdrcap;
1115	struct i3c_ccc_cmd_dest dest;
1116	struct i3c_ccc_cmd cmd;
1117	int ret;
1118
1119	gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1120					  sizeof(*gethdrcap));
1121	if (!gethdrcap)
1122		return -ENOMEM;
1123
1124	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1125	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1126	if (ret)
1127		goto out;
1128
1129	if (dest.payload.len != 1) {
1130		ret = -EIO;
1131		goto out;
1132	}
1133
1134	info->hdr_cap = gethdrcap->modes;
1135
1136out:
1137	i3c_ccc_cmd_dest_cleanup(&dest);
1138
1139	return ret;
1140}
1141
1142static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1143				    struct i3c_device_info *info)
1144{
1145	struct i3c_ccc_getpid *getpid;
1146	struct i3c_ccc_cmd_dest dest;
1147	struct i3c_ccc_cmd cmd;
1148	int ret, i;
1149
1150	getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1151	if (!getpid)
1152		return -ENOMEM;
1153
1154	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1155	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1156	if (ret)
1157		goto out;
1158
1159	info->pid = 0;
1160	for (i = 0; i < sizeof(getpid->pid); i++) {
1161		int sft = (sizeof(getpid->pid) - i - 1) * 8;
1162
1163		info->pid |= (u64)getpid->pid[i] << sft;
1164	}
1165
1166out:
1167	i3c_ccc_cmd_dest_cleanup(&dest);
1168
1169	return ret;
1170}
1171
1172static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1173				    struct i3c_device_info *info)
1174{
1175	struct i3c_ccc_getbcr *getbcr;
1176	struct i3c_ccc_cmd_dest dest;
1177	struct i3c_ccc_cmd cmd;
1178	int ret;
1179
1180	getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1181	if (!getbcr)
1182		return -ENOMEM;
1183
1184	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1185	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1186	if (ret)
1187		goto out;
1188
1189	info->bcr = getbcr->bcr;
1190
1191out:
1192	i3c_ccc_cmd_dest_cleanup(&dest);
1193
1194	return ret;
1195}
1196
1197static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1198				    struct i3c_device_info *info)
1199{
1200	struct i3c_ccc_getdcr *getdcr;
1201	struct i3c_ccc_cmd_dest dest;
1202	struct i3c_ccc_cmd cmd;
1203	int ret;
1204
1205	getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1206	if (!getdcr)
1207		return -ENOMEM;
1208
1209	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1210	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1211	if (ret)
1212		goto out;
1213
1214	info->dcr = getdcr->dcr;
1215
1216out:
1217	i3c_ccc_cmd_dest_cleanup(&dest);
1218
1219	return ret;
1220}
1221
1222static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1223{
1224	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1225	enum i3c_addr_slot_status slot_status;
1226	int ret;
1227
1228	if (!dev->info.dyn_addr)
1229		return -EINVAL;
1230
1231	slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1232						   dev->info.dyn_addr);
1233	if (slot_status == I3C_ADDR_SLOT_RSVD ||
1234	    slot_status == I3C_ADDR_SLOT_I2C_DEV)
1235		return -EINVAL;
1236
1237	ret = i3c_master_getpid_locked(master, &dev->info);
1238	if (ret)
1239		return ret;
1240
1241	ret = i3c_master_getbcr_locked(master, &dev->info);
1242	if (ret)
1243		return ret;
1244
1245	ret = i3c_master_getdcr_locked(master, &dev->info);
1246	if (ret)
1247		return ret;
1248
1249	if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1250		ret = i3c_master_getmxds_locked(master, &dev->info);
1251		if (ret)
1252			return ret;
1253	}
1254
1255	if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1256		dev->info.max_ibi_len = 1;
1257
1258	i3c_master_getmrl_locked(master, &dev->info);
1259	i3c_master_getmwl_locked(master, &dev->info);
1260
1261	if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1262		ret = i3c_master_gethdrcap_locked(master, &dev->info);
1263		if (ret)
1264			return ret;
1265	}
1266
1267	return 0;
1268}
1269
1270static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1271{
1272	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1273
1274	if (dev->info.static_addr)
1275		i3c_bus_set_addr_slot_status(&master->bus,
1276					     dev->info.static_addr,
1277					     I3C_ADDR_SLOT_FREE);
1278
1279	if (dev->info.dyn_addr)
1280		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1281					     I3C_ADDR_SLOT_FREE);
1282
1283	if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1284		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1285					     I3C_ADDR_SLOT_FREE);
1286}
1287
1288static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1289{
1290	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1291	enum i3c_addr_slot_status status;
1292
1293	if (!dev->info.static_addr && !dev->info.dyn_addr)
1294		return 0;
1295
1296	if (dev->info.static_addr) {
1297		status = i3c_bus_get_addr_slot_status(&master->bus,
1298						      dev->info.static_addr);
1299		if (status != I3C_ADDR_SLOT_FREE)
 
 
 
 
1300			return -EBUSY;
1301
1302		i3c_bus_set_addr_slot_status(&master->bus,
1303					     dev->info.static_addr,
1304					     I3C_ADDR_SLOT_I3C_DEV);
1305	}
1306
1307	/*
1308	 * ->init_dyn_addr should have been reserved before that, so, if we're
1309	 * trying to apply a pre-reserved dynamic address, we should not try
1310	 * to reserve the address slot a second time.
1311	 */
1312	if (dev->info.dyn_addr &&
1313	    (!dev->boardinfo ||
1314	     dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1315		status = i3c_bus_get_addr_slot_status(&master->bus,
1316						      dev->info.dyn_addr);
1317		if (status != I3C_ADDR_SLOT_FREE)
1318			goto err_release_static_addr;
1319
1320		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1321					     I3C_ADDR_SLOT_I3C_DEV);
1322	}
1323
1324	return 0;
1325
1326err_release_static_addr:
1327	if (dev->info.static_addr)
1328		i3c_bus_set_addr_slot_status(&master->bus,
1329					     dev->info.static_addr,
1330					     I3C_ADDR_SLOT_FREE);
1331
1332	return -EBUSY;
1333}
1334
1335static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1336				     struct i3c_dev_desc *dev)
1337{
1338	int ret;
1339
1340	/*
1341	 * We don't attach devices to the controller until they are
1342	 * addressable on the bus.
1343	 */
1344	if (!dev->info.static_addr && !dev->info.dyn_addr)
1345		return 0;
1346
1347	ret = i3c_master_get_i3c_addrs(dev);
1348	if (ret)
1349		return ret;
1350
1351	/* Do not attach the master device itself. */
1352	if (master->this != dev && master->ops->attach_i3c_dev) {
1353		ret = master->ops->attach_i3c_dev(dev);
1354		if (ret) {
1355			i3c_master_put_i3c_addrs(dev);
1356			return ret;
1357		}
1358	}
1359
1360	list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1361
1362	return 0;
1363}
1364
1365static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1366				       u8 old_dyn_addr)
1367{
1368	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1369	enum i3c_addr_slot_status status;
1370	int ret;
1371
1372	if (dev->info.dyn_addr != old_dyn_addr &&
1373	    (!dev->boardinfo ||
1374	     dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1375		status = i3c_bus_get_addr_slot_status(&master->bus,
1376						      dev->info.dyn_addr);
1377		if (status != I3C_ADDR_SLOT_FREE)
1378			return -EBUSY;
1379		i3c_bus_set_addr_slot_status(&master->bus,
1380					     dev->info.dyn_addr,
1381					     I3C_ADDR_SLOT_I3C_DEV);
1382		if (old_dyn_addr)
1383			i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1384						     I3C_ADDR_SLOT_FREE);
1385	}
1386
1387	if (master->ops->reattach_i3c_dev) {
1388		ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1389		if (ret) {
1390			i3c_master_put_i3c_addrs(dev);
1391			return ret;
1392		}
1393	}
1394
1395	return 0;
1396}
1397
1398static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1399{
1400	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1401
1402	/* Do not detach the master device itself. */
1403	if (master->this != dev && master->ops->detach_i3c_dev)
1404		master->ops->detach_i3c_dev(dev);
1405
1406	i3c_master_put_i3c_addrs(dev);
1407	list_del(&dev->common.node);
1408}
1409
1410static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1411				     struct i2c_dev_desc *dev)
1412{
1413	int ret;
1414
1415	if (master->ops->attach_i2c_dev) {
1416		ret = master->ops->attach_i2c_dev(dev);
1417		if (ret)
1418			return ret;
1419	}
1420
1421	list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1422
1423	return 0;
1424}
1425
1426static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1427{
1428	struct i3c_master_controller *master = i2c_dev_get_master(dev);
1429
1430	list_del(&dev->common.node);
1431
1432	if (master->ops->detach_i2c_dev)
1433		master->ops->detach_i2c_dev(dev);
1434}
1435
1436static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1437					  struct i3c_dev_boardinfo *boardinfo)
1438{
1439	struct i3c_device_info info = {
1440		.static_addr = boardinfo->static_addr,
 
1441	};
1442	struct i3c_dev_desc *i3cdev;
1443	int ret;
1444
1445	i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1446	if (IS_ERR(i3cdev))
1447		return -ENOMEM;
1448
1449	i3cdev->boardinfo = boardinfo;
1450
1451	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1452	if (ret)
1453		goto err_free_dev;
1454
1455	ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1456					i3cdev->boardinfo->init_dyn_addr);
1457	if (ret)
1458		goto err_detach_dev;
1459
1460	i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1461	ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1462	if (ret)
1463		goto err_rstdaa;
1464
1465	ret = i3c_master_retrieve_dev_info(i3cdev);
1466	if (ret)
1467		goto err_rstdaa;
1468
1469	return 0;
1470
1471err_rstdaa:
1472	i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1473err_detach_dev:
1474	i3c_master_detach_i3c_dev(i3cdev);
1475err_free_dev:
1476	i3c_master_free_i3c_dev(i3cdev);
1477
1478	return ret;
1479}
1480
1481static void
1482i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1483{
1484	struct i3c_dev_desc *desc;
1485	int ret;
1486
1487	if (!master->init_done)
1488		return;
1489
1490	i3c_bus_for_each_i3cdev(&master->bus, desc) {
1491		if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1492			continue;
1493
1494		desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1495		if (!desc->dev)
1496			continue;
1497
1498		desc->dev->bus = &master->bus;
1499		desc->dev->desc = desc;
1500		desc->dev->dev.parent = &master->dev;
1501		desc->dev->dev.type = &i3c_device_type;
1502		desc->dev->dev.bus = &i3c_bus_type;
1503		desc->dev->dev.release = i3c_device_release;
1504		dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1505			     desc->info.pid);
1506
1507		if (desc->boardinfo)
1508			desc->dev->dev.of_node = desc->boardinfo->of_node;
1509
1510		ret = device_register(&desc->dev->dev);
1511		if (ret)
1512			dev_err(&master->dev,
1513				"Failed to add I3C device (err = %d)\n", ret);
 
 
1514	}
1515}
1516
1517/**
1518 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1519 * @master: master doing the DAA
1520 *
1521 * This function is instantiating an I3C device object and adding it to the
1522 * I3C device list. All device information are automatically retrieved using
1523 * standard CCC commands.
1524 *
1525 * The I3C device object is returned in case the master wants to attach
1526 * private data to it using i3c_dev_set_master_data().
1527 *
1528 * This function must be called with the bus lock held in write mode.
1529 *
1530 * Return: a 0 in case of success, an negative error code otherwise.
1531 */
1532int i3c_master_do_daa(struct i3c_master_controller *master)
1533{
1534	int ret;
1535
1536	i3c_bus_maintenance_lock(&master->bus);
1537	ret = master->ops->do_daa(master);
1538	i3c_bus_maintenance_unlock(&master->bus);
1539
1540	if (ret)
1541		return ret;
1542
1543	i3c_bus_normaluse_lock(&master->bus);
1544	i3c_master_register_new_i3c_devs(master);
1545	i3c_bus_normaluse_unlock(&master->bus);
1546
1547	return 0;
1548}
1549EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1550
1551/**
1552 * i3c_master_set_info() - set master device information
1553 * @master: master used to send frames on the bus
1554 * @info: I3C device information
1555 *
1556 * Set master device info. This should be called from
1557 * &i3c_master_controller_ops->bus_init().
1558 *
1559 * Not all &i3c_device_info fields are meaningful for a master device.
1560 * Here is a list of fields that should be properly filled:
1561 *
1562 * - &i3c_device_info->dyn_addr
1563 * - &i3c_device_info->bcr
1564 * - &i3c_device_info->dcr
1565 * - &i3c_device_info->pid
1566 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1567 *   &i3c_device_info->bcr
1568 *
1569 * This function must be called with the bus lock held in maintenance mode.
1570 *
1571 * Return: 0 if @info contains valid information (not every piece of
1572 * information can be checked, but we can at least make sure @info->dyn_addr
1573 * and @info->bcr are correct), -EINVAL otherwise.
1574 */
1575int i3c_master_set_info(struct i3c_master_controller *master,
1576			const struct i3c_device_info *info)
1577{
1578	struct i3c_dev_desc *i3cdev;
1579	int ret;
1580
1581	if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1582		return -EINVAL;
1583
1584	if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1585	    master->secondary)
1586		return -EINVAL;
1587
1588	if (master->this)
1589		return -EINVAL;
1590
1591	i3cdev = i3c_master_alloc_i3c_dev(master, info);
1592	if (IS_ERR(i3cdev))
1593		return PTR_ERR(i3cdev);
1594
1595	master->this = i3cdev;
1596	master->bus.cur_master = master->this;
1597
1598	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1599	if (ret)
1600		goto err_free_dev;
1601
1602	return 0;
1603
1604err_free_dev:
1605	i3c_master_free_i3c_dev(i3cdev);
1606
1607	return ret;
1608}
1609EXPORT_SYMBOL_GPL(i3c_master_set_info);
1610
1611static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1612{
1613	struct i3c_dev_desc *i3cdev, *i3ctmp;
1614	struct i2c_dev_desc *i2cdev, *i2ctmp;
1615
1616	list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1617				 common.node) {
1618		i3c_master_detach_i3c_dev(i3cdev);
1619
1620		if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1621			i3c_bus_set_addr_slot_status(&master->bus,
1622					i3cdev->boardinfo->init_dyn_addr,
1623					I3C_ADDR_SLOT_FREE);
1624
1625		i3c_master_free_i3c_dev(i3cdev);
1626	}
1627
1628	list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1629				 common.node) {
1630		i3c_master_detach_i2c_dev(i2cdev);
1631		i3c_bus_set_addr_slot_status(&master->bus,
1632					     i2cdev->addr,
1633					     I3C_ADDR_SLOT_FREE);
1634		i3c_master_free_i2c_dev(i2cdev);
1635	}
1636}
1637
1638/**
1639 * i3c_master_bus_init() - initialize an I3C bus
1640 * @master: main master initializing the bus
1641 *
1642 * This function is following all initialisation steps described in the I3C
1643 * specification:
1644 *
1645 * 1. Attach I2C devs to the master so that the master can fill its internal
1646 *    device table appropriately
1647 *
1648 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1649 *    the master controller. That's usually where the bus mode is selected
1650 *    (pure bus or mixed fast/slow bus)
1651 *
1652 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1653 *    particularly important when the bus was previously configured by someone
1654 *    else (for example the bootloader)
1655 *
1656 * 4. Disable all slave events.
1657 *
1658 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1659 *    also have static_addr, try to pre-assign dynamic addresses requested by
1660 *    the FW with SETDASA and attach corresponding statically defined I3C
1661 *    devices to the master.
1662 *
1663 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1664 *    remaining I3C devices
1665 *
1666 * Once this is done, all I3C and I2C devices should be usable.
1667 *
1668 * Return: a 0 in case of success, an negative error code otherwise.
1669 */
1670static int i3c_master_bus_init(struct i3c_master_controller *master)
1671{
1672	enum i3c_addr_slot_status status;
1673	struct i2c_dev_boardinfo *i2cboardinfo;
1674	struct i3c_dev_boardinfo *i3cboardinfo;
1675	struct i2c_dev_desc *i2cdev;
1676	int ret;
1677
1678	/*
1679	 * First attach all devices with static definitions provided by the
1680	 * FW.
1681	 */
1682	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1683		status = i3c_bus_get_addr_slot_status(&master->bus,
1684						      i2cboardinfo->base.addr);
1685		if (status != I3C_ADDR_SLOT_FREE) {
1686			ret = -EBUSY;
1687			goto err_detach_devs;
1688		}
1689
1690		i3c_bus_set_addr_slot_status(&master->bus,
1691					     i2cboardinfo->base.addr,
1692					     I3C_ADDR_SLOT_I2C_DEV);
1693
1694		i2cdev = i3c_master_alloc_i2c_dev(master,
1695						  i2cboardinfo->base.addr,
1696						  i2cboardinfo->lvr);
1697		if (IS_ERR(i2cdev)) {
1698			ret = PTR_ERR(i2cdev);
1699			goto err_detach_devs;
1700		}
1701
1702		ret = i3c_master_attach_i2c_dev(master, i2cdev);
1703		if (ret) {
1704			i3c_master_free_i2c_dev(i2cdev);
1705			goto err_detach_devs;
1706		}
1707	}
1708
1709	/*
1710	 * Now execute the controller specific ->bus_init() routine, which
1711	 * might configure its internal logic to match the bus limitations.
1712	 */
1713	ret = master->ops->bus_init(master);
1714	if (ret)
1715		goto err_detach_devs;
1716
1717	/*
1718	 * The master device should have been instantiated in ->bus_init(),
1719	 * complain if this was not the case.
1720	 */
1721	if (!master->this) {
1722		dev_err(&master->dev,
1723			"master_set_info() was not called in ->bus_init()\n");
1724		ret = -EINVAL;
1725		goto err_bus_cleanup;
1726	}
1727
 
 
 
 
 
 
1728	/*
1729	 * Reset all dynamic address that may have been assigned before
1730	 * (assigned by the bootloader for example).
1731	 */
1732	ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1733	if (ret && ret != I3C_ERROR_M2)
1734		goto err_bus_cleanup;
1735
 
 
 
 
 
 
1736	/* Disable all slave events before starting DAA. */
1737	ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1738				      I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1739				      I3C_CCC_EVENT_HJ);
1740	if (ret && ret != I3C_ERROR_M2)
1741		goto err_bus_cleanup;
1742
1743	/*
1744	 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1745	 * address and retrieve device information if needed.
1746	 * In case pre-assign dynamic address fails, setting dynamic address to
1747	 * the requested init_dyn_addr is retried after DAA is done in
1748	 * i3c_master_add_i3c_dev_locked().
1749	 */
1750	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1751
1752		/*
1753		 * We don't reserve a dynamic address for devices that
1754		 * don't explicitly request one.
1755		 */
1756		if (!i3cboardinfo->init_dyn_addr)
1757			continue;
1758
1759		ret = i3c_bus_get_addr_slot_status(&master->bus,
1760						   i3cboardinfo->init_dyn_addr);
1761		if (ret != I3C_ADDR_SLOT_FREE) {
1762			ret = -EBUSY;
1763			goto err_rstdaa;
1764		}
1765
1766		i3c_bus_set_addr_slot_status(&master->bus,
1767					     i3cboardinfo->init_dyn_addr,
1768					     I3C_ADDR_SLOT_I3C_DEV);
 
 
1769
1770		/*
1771		 * Only try to create/attach devices that have a static
1772		 * address. Other devices will be created/attached when
1773		 * DAA happens, and the requested dynamic address will
1774		 * be set using SETNEWDA once those devices become
1775		 * addressable.
1776		 */
1777
1778		if (i3cboardinfo->static_addr)
1779			i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1780	}
1781
1782	ret = i3c_master_do_daa(master);
1783	if (ret)
1784		goto err_rstdaa;
1785
1786	return 0;
1787
1788err_rstdaa:
1789	i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1790
1791err_bus_cleanup:
1792	if (master->ops->bus_cleanup)
1793		master->ops->bus_cleanup(master);
1794
1795err_detach_devs:
1796	i3c_master_detach_free_devs(master);
1797
1798	return ret;
1799}
1800
1801static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1802{
1803	if (master->ops->bus_cleanup)
1804		master->ops->bus_cleanup(master);
1805
1806	i3c_master_detach_free_devs(master);
1807}
1808
1809static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1810{
1811	struct i3c_master_controller *master = i3cdev->common.master;
1812	struct i3c_dev_boardinfo *i3cboardinfo;
1813
1814	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1815		if (i3cdev->info.pid != i3cboardinfo->pid)
1816			continue;
1817
1818		i3cdev->boardinfo = i3cboardinfo;
1819		i3cdev->info.static_addr = i3cboardinfo->static_addr;
1820		return;
1821	}
1822}
1823
1824static struct i3c_dev_desc *
1825i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1826{
1827	struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1828	struct i3c_dev_desc *i3cdev;
1829
1830	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1831		if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1832			return i3cdev;
1833	}
1834
1835	return NULL;
1836}
1837
1838/**
1839 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1840 * @master: master used to send frames on the bus
1841 * @addr: I3C slave dynamic address assigned to the device
1842 *
1843 * This function is instantiating an I3C device object and adding it to the
1844 * I3C device list. All device information are automatically retrieved using
1845 * standard CCC commands.
1846 *
1847 * The I3C device object is returned in case the master wants to attach
1848 * private data to it using i3c_dev_set_master_data().
1849 *
1850 * This function must be called with the bus lock held in write mode.
1851 *
1852 * Return: a 0 in case of success, an negative error code otherwise.
1853 */
1854int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1855				  u8 addr)
1856{
1857	struct i3c_device_info info = { .dyn_addr = addr };
1858	struct i3c_dev_desc *newdev, *olddev;
1859	u8 old_dyn_addr = addr, expected_dyn_addr;
1860	struct i3c_ibi_setup ibireq = { };
1861	bool enable_ibi = false;
1862	int ret;
1863
1864	if (!master)
1865		return -EINVAL;
1866
1867	newdev = i3c_master_alloc_i3c_dev(master, &info);
1868	if (IS_ERR(newdev))
1869		return PTR_ERR(newdev);
1870
1871	ret = i3c_master_attach_i3c_dev(master, newdev);
1872	if (ret)
1873		goto err_free_dev;
1874
1875	ret = i3c_master_retrieve_dev_info(newdev);
1876	if (ret)
1877		goto err_detach_dev;
1878
1879	i3c_master_attach_boardinfo(newdev);
1880
1881	olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1882	if (olddev) {
1883		newdev->dev = olddev->dev;
1884		if (newdev->dev)
1885			newdev->dev->desc = newdev;
1886
1887		/*
1888		 * We need to restore the IBI state too, so let's save the
1889		 * IBI information and try to restore them after olddev has
1890		 * been detached+released and its IBI has been stopped and
1891		 * the associated resources have been freed.
1892		 */
1893		mutex_lock(&olddev->ibi_lock);
1894		if (olddev->ibi) {
1895			ibireq.handler = olddev->ibi->handler;
1896			ibireq.max_payload_len = olddev->ibi->max_payload_len;
1897			ibireq.num_slots = olddev->ibi->num_slots;
1898
1899			if (olddev->ibi->enabled) {
1900				enable_ibi = true;
1901				i3c_dev_disable_ibi_locked(olddev);
1902			}
1903
 
 
 
 
 
1904			i3c_dev_free_ibi_locked(olddev);
1905		}
1906		mutex_unlock(&olddev->ibi_lock);
1907
1908		old_dyn_addr = olddev->info.dyn_addr;
1909
1910		i3c_master_detach_i3c_dev(olddev);
1911		i3c_master_free_i3c_dev(olddev);
1912	}
1913
1914	/*
1915	 * Depending on our previous state, the expected dynamic address might
1916	 * differ:
1917	 * - if the device already had a dynamic address assigned, let's try to
1918	 *   re-apply this one
1919	 * - if the device did not have a dynamic address and the firmware
1920	 *   requested a specific address, pick this one
1921	 * - in any other case, keep the address automatically assigned by the
1922	 *   master
1923	 */
1924	if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1925		expected_dyn_addr = old_dyn_addr;
1926	else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1927		expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1928	else
1929		expected_dyn_addr = newdev->info.dyn_addr;
1930
1931	if (newdev->info.dyn_addr != expected_dyn_addr) {
 
1932		/*
1933		 * Try to apply the expected dynamic address. If it fails, keep
1934		 * the address assigned by the master.
1935		 */
1936		ret = i3c_master_setnewda_locked(master,
1937						 newdev->info.dyn_addr,
1938						 expected_dyn_addr);
1939		if (!ret) {
1940			old_dyn_addr = newdev->info.dyn_addr;
1941			newdev->info.dyn_addr = expected_dyn_addr;
1942			i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1943		} else {
1944			dev_err(&master->dev,
1945				"Failed to assign reserved/old address to device %d%llx",
1946				master->bus.id, newdev->info.pid);
1947		}
1948	}
1949
1950	/*
1951	 * Now is time to try to restore the IBI setup. If we're lucky,
1952	 * everything works as before, otherwise, all we can do is complain.
1953	 * FIXME: maybe we should add callback to inform the driver that it
1954	 * should request the IBI again instead of trying to hide that from
1955	 * him.
1956	 */
1957	if (ibireq.handler) {
1958		mutex_lock(&newdev->ibi_lock);
1959		ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1960		if (ret) {
1961			dev_err(&master->dev,
1962				"Failed to request IBI on device %d-%llx",
1963				master->bus.id, newdev->info.pid);
1964		} else if (enable_ibi) {
1965			ret = i3c_dev_enable_ibi_locked(newdev);
1966			if (ret)
1967				dev_err(&master->dev,
1968					"Failed to re-enable IBI on device %d-%llx",
1969					master->bus.id, newdev->info.pid);
1970		}
1971		mutex_unlock(&newdev->ibi_lock);
1972	}
1973
1974	return 0;
1975
1976err_detach_dev:
1977	if (newdev->dev && newdev->dev->desc)
1978		newdev->dev->desc = NULL;
1979
1980	i3c_master_detach_i3c_dev(newdev);
1981
1982err_free_dev:
1983	i3c_master_free_i3c_dev(newdev);
1984
1985	return ret;
1986}
1987EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1988
1989#define OF_I3C_REG1_IS_I2C_DEV			BIT(31)
1990
1991static int
1992of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1993				struct device_node *node, u32 *reg)
1994{
1995	struct i2c_dev_boardinfo *boardinfo;
1996	struct device *dev = &master->dev;
1997	int ret;
1998
1999	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2000	if (!boardinfo)
2001		return -ENOMEM;
2002
2003	ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2004	if (ret)
2005		return ret;
2006
2007	/*
2008	 * The I3C Specification does not clearly say I2C devices with 10-bit
2009	 * address are supported. These devices can't be passed properly through
2010	 * DEFSLVS command.
2011	 */
2012	if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2013		dev_err(dev, "I2C device with 10 bit address not supported.");
2014		return -ENOTSUPP;
2015	}
2016
2017	/* LVR is encoded in reg[2]. */
2018	boardinfo->lvr = reg[2];
2019
2020	list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2021	of_node_get(node);
2022
2023	return 0;
2024}
2025
2026static int
2027of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2028				struct device_node *node, u32 *reg)
2029{
2030	struct i3c_dev_boardinfo *boardinfo;
2031	struct device *dev = &master->dev;
2032	enum i3c_addr_slot_status addrstatus;
2033	u32 init_dyn_addr = 0;
2034
2035	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2036	if (!boardinfo)
2037		return -ENOMEM;
2038
2039	if (reg[0]) {
2040		if (reg[0] > I3C_MAX_ADDR)
2041			return -EINVAL;
2042
2043		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2044							  reg[0]);
2045		if (addrstatus != I3C_ADDR_SLOT_FREE)
2046			return -EINVAL;
2047	}
2048
2049	boardinfo->static_addr = reg[0];
2050
2051	if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2052		if (init_dyn_addr > I3C_MAX_ADDR)
2053			return -EINVAL;
2054
2055		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2056							  init_dyn_addr);
2057		if (addrstatus != I3C_ADDR_SLOT_FREE)
2058			return -EINVAL;
2059	}
2060
2061	boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2062
2063	if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2064	    I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2065		return -EINVAL;
2066
2067	boardinfo->init_dyn_addr = init_dyn_addr;
2068	boardinfo->of_node = of_node_get(node);
2069	list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2070
2071	return 0;
2072}
2073
2074static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2075				 struct device_node *node)
2076{
2077	u32 reg[3];
2078	int ret;
2079
2080	if (!master || !node)
2081		return -EINVAL;
2082
2083	ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2084	if (ret)
2085		return ret;
2086
2087	/*
2088	 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2089	 * dealing with an I2C device.
2090	 */
2091	if (!reg[1])
2092		ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2093	else
2094		ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2095
2096	return ret;
2097}
2098
2099static int of_populate_i3c_bus(struct i3c_master_controller *master)
2100{
2101	struct device *dev = &master->dev;
2102	struct device_node *i3cbus_np = dev->of_node;
2103	struct device_node *node;
2104	int ret;
2105	u32 val;
2106
2107	if (!i3cbus_np)
2108		return 0;
2109
2110	for_each_available_child_of_node(i3cbus_np, node) {
2111		ret = of_i3c_master_add_dev(master, node);
2112		if (ret) {
2113			of_node_put(node);
2114			return ret;
2115		}
2116	}
2117
2118	/*
2119	 * The user might want to limit I2C and I3C speed in case some devices
2120	 * on the bus are not supporting typical rates, or if the bus topology
2121	 * prevents it from using max possible rate.
2122	 */
2123	if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2124		master->bus.scl_rate.i2c = val;
2125
2126	if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2127		master->bus.scl_rate.i3c = val;
2128
2129	return 0;
2130}
2131
2132static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2133				       struct i2c_msg *xfers, int nxfers)
2134{
2135	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2136	struct i2c_dev_desc *dev;
2137	int i, ret;
2138	u16 addr;
2139
2140	if (!xfers || !master || nxfers <= 0)
2141		return -EINVAL;
2142
2143	if (!master->ops->i2c_xfers)
2144		return -ENOTSUPP;
2145
2146	/* Doing transfers to different devices is not supported. */
2147	addr = xfers[0].addr;
2148	for (i = 1; i < nxfers; i++) {
2149		if (addr != xfers[i].addr)
2150			return -ENOTSUPP;
2151	}
2152
2153	i3c_bus_normaluse_lock(&master->bus);
2154	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2155	if (!dev)
2156		ret = -ENOENT;
2157	else
2158		ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2159	i3c_bus_normaluse_unlock(&master->bus);
2160
2161	return ret ? ret : nxfers;
2162}
2163
2164static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2165{
2166	return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2167}
2168
2169static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2170{
2171	/* Fall back to no spike filters and FM bus mode. */
2172	u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2173
2174	if (client->dev.of_node) {
2175		u32 reg[3];
2176
2177		if (!of_property_read_u32_array(client->dev.of_node, "reg",
2178						reg, ARRAY_SIZE(reg)))
2179			lvr = reg[2];
2180	}
2181
2182	return lvr;
2183}
2184
2185static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2186{
2187	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2188	enum i3c_addr_slot_status status;
2189	struct i2c_dev_desc *i2cdev;
2190	int ret;
2191
2192	/* Already added by board info? */
2193	if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2194		return 0;
2195
2196	status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2197	if (status != I3C_ADDR_SLOT_FREE)
2198		return -EBUSY;
2199
2200	i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2201				     I3C_ADDR_SLOT_I2C_DEV);
2202
2203	i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2204					  i3c_master_i2c_get_lvr(client));
2205	if (IS_ERR(i2cdev)) {
2206		ret = PTR_ERR(i2cdev);
2207		goto out_clear_status;
2208	}
2209
2210	ret = i3c_master_attach_i2c_dev(master, i2cdev);
2211	if (ret)
2212		goto out_free_dev;
2213
2214	return 0;
2215
2216out_free_dev:
2217	i3c_master_free_i2c_dev(i2cdev);
2218out_clear_status:
2219	i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2220				     I3C_ADDR_SLOT_FREE);
2221
2222	return ret;
2223}
2224
2225static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2226{
2227	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2228	struct i2c_dev_desc *dev;
2229
2230	dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2231	if (!dev)
2232		return -ENODEV;
2233
2234	i3c_master_detach_i2c_dev(dev);
2235	i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2236				     I3C_ADDR_SLOT_FREE);
2237	i3c_master_free_i2c_dev(dev);
2238
2239	return 0;
2240}
2241
2242static const struct i2c_algorithm i3c_master_i2c_algo = {
2243	.master_xfer = i3c_master_i2c_adapter_xfer,
2244	.functionality = i3c_master_i2c_funcs,
2245};
2246
2247static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2248				 void *data)
2249{
2250	struct i2c_adapter *adap;
2251	struct i2c_client *client;
2252	struct device *dev = data;
2253	struct i3c_master_controller *master;
2254	int ret;
2255
2256	if (dev->type != &i2c_client_type)
2257		return 0;
2258
2259	client = to_i2c_client(dev);
2260	adap = client->adapter;
2261
2262	if (adap->algo != &i3c_master_i2c_algo)
2263		return 0;
2264
2265	master = i2c_adapter_to_i3c_master(adap);
2266
2267	i3c_bus_maintenance_lock(&master->bus);
2268	switch (action) {
2269	case BUS_NOTIFY_ADD_DEVICE:
2270		ret = i3c_master_i2c_attach(adap, client);
2271		break;
2272	case BUS_NOTIFY_DEL_DEVICE:
2273		ret = i3c_master_i2c_detach(adap, client);
2274		break;
2275	}
2276	i3c_bus_maintenance_unlock(&master->bus);
2277
2278	return ret;
2279}
2280
2281static struct notifier_block i2cdev_notifier = {
2282	.notifier_call = i3c_i2c_notifier_call,
2283};
2284
2285static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2286{
2287	struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2288	struct i2c_dev_desc *i2cdev;
2289	struct i2c_dev_boardinfo *i2cboardinfo;
2290	int ret;
2291
2292	adap->dev.parent = master->dev.parent;
2293	adap->owner = master->dev.parent->driver->owner;
2294	adap->algo = &i3c_master_i2c_algo;
2295	strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2296
2297	/* FIXME: Should we allow i3c masters to override these values? */
2298	adap->timeout = 1000;
2299	adap->retries = 3;
2300
2301	ret = i2c_add_adapter(adap);
2302	if (ret)
2303		return ret;
2304
2305	/*
2306	 * We silently ignore failures here. The bus should keep working
2307	 * correctly even if one or more i2c devices are not registered.
2308	 */
2309	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2310		i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2311							 i2cboardinfo->base.addr);
2312		if (WARN_ON(!i2cdev))
2313			continue;
2314		i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2315	}
2316
2317	return 0;
2318}
2319
2320static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2321{
2322	struct i2c_dev_desc *i2cdev;
2323
2324	i2c_del_adapter(&master->i2c);
2325
2326	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2327		i2cdev->dev = NULL;
2328}
2329
2330static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2331{
2332	struct i3c_dev_desc *i3cdev;
2333
2334	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2335		if (!i3cdev->dev)
2336			continue;
2337
2338		i3cdev->dev->desc = NULL;
2339		if (device_is_registered(&i3cdev->dev->dev))
2340			device_unregister(&i3cdev->dev->dev);
2341		else
2342			put_device(&i3cdev->dev->dev);
2343		i3cdev->dev = NULL;
2344	}
2345}
2346
2347/**
2348 * i3c_master_queue_ibi() - Queue an IBI
2349 * @dev: the device this IBI is coming from
2350 * @slot: the IBI slot used to store the payload
2351 *
2352 * Queue an IBI to the controller workqueue. The IBI handler attached to
2353 * the dev will be called from a workqueue context.
2354 */
2355void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2356{
2357	atomic_inc(&dev->ibi->pending_ibis);
2358	queue_work(dev->common.master->wq, &slot->work);
2359}
2360EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2361
2362static void i3c_master_handle_ibi(struct work_struct *work)
2363{
2364	struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2365						 work);
2366	struct i3c_dev_desc *dev = slot->dev;
2367	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2368	struct i3c_ibi_payload payload;
2369
2370	payload.data = slot->data;
2371	payload.len = slot->len;
2372
2373	if (dev->dev)
2374		dev->ibi->handler(dev->dev, &payload);
2375
2376	master->ops->recycle_ibi_slot(dev, slot);
2377	if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2378		complete(&dev->ibi->all_ibis_handled);
2379}
2380
2381static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2382				     struct i3c_ibi_slot *slot)
2383{
2384	slot->dev = dev;
2385	INIT_WORK(&slot->work, i3c_master_handle_ibi);
2386}
2387
2388struct i3c_generic_ibi_slot {
2389	struct list_head node;
2390	struct i3c_ibi_slot base;
2391};
2392
2393struct i3c_generic_ibi_pool {
2394	spinlock_t lock;
2395	unsigned int num_slots;
2396	struct i3c_generic_ibi_slot *slots;
2397	void *payload_buf;
2398	struct list_head free_slots;
2399	struct list_head pending;
2400};
2401
2402/**
2403 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2404 * @pool: the IBI pool to free
2405 *
2406 * Free all IBI slots allated by a generic IBI pool.
2407 */
2408void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2409{
2410	struct i3c_generic_ibi_slot *slot;
2411	unsigned int nslots = 0;
2412
2413	while (!list_empty(&pool->free_slots)) {
2414		slot = list_first_entry(&pool->free_slots,
2415					struct i3c_generic_ibi_slot, node);
2416		list_del(&slot->node);
2417		nslots++;
2418	}
2419
2420	/*
2421	 * If the number of freed slots is not equal to the number of allocated
2422	 * slots we have a leak somewhere.
2423	 */
2424	WARN_ON(nslots != pool->num_slots);
2425
2426	kfree(pool->payload_buf);
2427	kfree(pool->slots);
2428	kfree(pool);
2429}
2430EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2431
2432/**
2433 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2434 * @dev: the device this pool will be used for
2435 * @req: IBI setup request describing what the device driver expects
2436 *
2437 * Create a generic IBI pool based on the information provided in @req.
2438 *
2439 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2440 */
2441struct i3c_generic_ibi_pool *
2442i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2443			   const struct i3c_ibi_setup *req)
2444{
2445	struct i3c_generic_ibi_pool *pool;
2446	struct i3c_generic_ibi_slot *slot;
2447	unsigned int i;
2448	int ret;
2449
2450	pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2451	if (!pool)
2452		return ERR_PTR(-ENOMEM);
2453
2454	spin_lock_init(&pool->lock);
2455	INIT_LIST_HEAD(&pool->free_slots);
2456	INIT_LIST_HEAD(&pool->pending);
2457
2458	pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2459	if (!pool->slots) {
2460		ret = -ENOMEM;
2461		goto err_free_pool;
2462	}
2463
2464	if (req->max_payload_len) {
2465		pool->payload_buf = kcalloc(req->num_slots,
2466					    req->max_payload_len, GFP_KERNEL);
2467		if (!pool->payload_buf) {
2468			ret = -ENOMEM;
2469			goto err_free_pool;
2470		}
2471	}
2472
2473	for (i = 0; i < req->num_slots; i++) {
2474		slot = &pool->slots[i];
2475		i3c_master_init_ibi_slot(dev, &slot->base);
2476
2477		if (req->max_payload_len)
2478			slot->base.data = pool->payload_buf +
2479					  (i * req->max_payload_len);
2480
2481		list_add_tail(&slot->node, &pool->free_slots);
2482		pool->num_slots++;
2483	}
2484
2485	return pool;
2486
2487err_free_pool:
2488	i3c_generic_ibi_free_pool(pool);
2489	return ERR_PTR(ret);
2490}
2491EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2492
2493/**
2494 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2495 * @pool: the pool to query an IBI slot on
2496 *
2497 * Search for a free slot in a generic IBI pool.
2498 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2499 * when it's no longer needed.
2500 *
2501 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2502 */
2503struct i3c_ibi_slot *
2504i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2505{
2506	struct i3c_generic_ibi_slot *slot;
2507	unsigned long flags;
2508
2509	spin_lock_irqsave(&pool->lock, flags);
2510	slot = list_first_entry_or_null(&pool->free_slots,
2511					struct i3c_generic_ibi_slot, node);
2512	if (slot)
2513		list_del(&slot->node);
2514	spin_unlock_irqrestore(&pool->lock, flags);
2515
2516	return slot ? &slot->base : NULL;
2517}
2518EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2519
2520/**
2521 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2522 * @pool: the pool to return the IBI slot to
2523 * @s: IBI slot to recycle
2524 *
2525 * Add an IBI slot back to its generic IBI pool. Should be called from the
2526 * master driver struct_master_controller_ops->recycle_ibi() method.
2527 */
2528void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2529				  struct i3c_ibi_slot *s)
2530{
2531	struct i3c_generic_ibi_slot *slot;
2532	unsigned long flags;
2533
2534	if (!s)
2535		return;
2536
2537	slot = container_of(s, struct i3c_generic_ibi_slot, base);
2538	spin_lock_irqsave(&pool->lock, flags);
2539	list_add_tail(&slot->node, &pool->free_slots);
2540	spin_unlock_irqrestore(&pool->lock, flags);
2541}
2542EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2543
2544static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2545{
2546	if (!ops || !ops->bus_init || !ops->priv_xfers ||
2547	    !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2548		return -EINVAL;
2549
2550	if (ops->request_ibi &&
2551	    (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2552	     !ops->recycle_ibi_slot))
2553		return -EINVAL;
2554
2555	return 0;
2556}
2557
2558/**
2559 * i3c_master_register() - register an I3C master
2560 * @master: master used to send frames on the bus
2561 * @parent: the parent device (the one that provides this I3C master
2562 *	    controller)
2563 * @ops: the master controller operations
2564 * @secondary: true if you are registering a secondary master. Will return
2565 *	       -ENOTSUPP if set to true since secondary masters are not yet
2566 *	       supported
2567 *
2568 * This function takes care of everything for you:
2569 *
2570 * - creates and initializes the I3C bus
2571 * - populates the bus with static I2C devs if @parent->of_node is not
2572 *   NULL
2573 * - registers all I3C devices added by the controller during bus
2574 *   initialization
2575 * - registers the I2C adapter and all I2C devices
2576 *
2577 * Return: 0 in case of success, a negative error code otherwise.
2578 */
2579int i3c_master_register(struct i3c_master_controller *master,
2580			struct device *parent,
2581			const struct i3c_master_controller_ops *ops,
2582			bool secondary)
2583{
2584	unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2585	struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2586	enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2587	struct i2c_dev_boardinfo *i2cbi;
2588	int ret;
2589
2590	/* We do not support secondary masters yet. */
2591	if (secondary)
2592		return -ENOTSUPP;
2593
2594	ret = i3c_master_check_ops(ops);
2595	if (ret)
2596		return ret;
2597
2598	master->dev.parent = parent;
2599	master->dev.of_node = of_node_get(parent->of_node);
2600	master->dev.bus = &i3c_bus_type;
2601	master->dev.type = &i3c_masterdev_type;
2602	master->dev.release = i3c_masterdev_release;
2603	master->ops = ops;
2604	master->secondary = secondary;
2605	INIT_LIST_HEAD(&master->boardinfo.i2c);
2606	INIT_LIST_HEAD(&master->boardinfo.i3c);
2607
2608	ret = i3c_bus_init(i3cbus);
2609	if (ret)
2610		return ret;
2611
2612	device_initialize(&master->dev);
2613	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2614
 
 
 
 
2615	ret = of_populate_i3c_bus(master);
2616	if (ret)
2617		goto err_put_dev;
2618
2619	list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2620		switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2621		case I3C_LVR_I2C_INDEX(0):
2622			if (mode < I3C_BUS_MODE_MIXED_FAST)
2623				mode = I3C_BUS_MODE_MIXED_FAST;
2624			break;
2625		case I3C_LVR_I2C_INDEX(1):
2626			if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2627				mode = I3C_BUS_MODE_MIXED_LIMITED;
2628			break;
2629		case I3C_LVR_I2C_INDEX(2):
2630			if (mode < I3C_BUS_MODE_MIXED_SLOW)
2631				mode = I3C_BUS_MODE_MIXED_SLOW;
2632			break;
2633		default:
2634			ret = -EINVAL;
2635			goto err_put_dev;
2636		}
2637
2638		if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2639			i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2640	}
2641
2642	ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2643	if (ret)
2644		goto err_put_dev;
2645
2646	master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2647	if (!master->wq) {
2648		ret = -ENOMEM;
2649		goto err_put_dev;
2650	}
2651
2652	ret = i3c_master_bus_init(master);
2653	if (ret)
2654		goto err_put_dev;
2655
2656	ret = device_add(&master->dev);
2657	if (ret)
2658		goto err_cleanup_bus;
2659
2660	/*
2661	 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2662	 * through the I2C subsystem.
2663	 */
2664	ret = i3c_master_i2c_adapter_init(master);
2665	if (ret)
2666		goto err_del_dev;
2667
 
 
 
 
 
 
2668	/*
2669	 * We're done initializing the bus and the controller, we can now
2670	 * register I3C devices discovered during the initial DAA.
2671	 */
2672	master->init_done = true;
2673	i3c_bus_normaluse_lock(&master->bus);
2674	i3c_master_register_new_i3c_devs(master);
2675	i3c_bus_normaluse_unlock(&master->bus);
2676
2677	return 0;
2678
2679err_del_dev:
2680	device_del(&master->dev);
2681
2682err_cleanup_bus:
2683	i3c_master_bus_cleanup(master);
2684
2685err_put_dev:
2686	put_device(&master->dev);
2687
2688	return ret;
2689}
2690EXPORT_SYMBOL_GPL(i3c_master_register);
2691
2692/**
2693 * i3c_master_unregister() - unregister an I3C master
2694 * @master: master used to send frames on the bus
2695 *
2696 * Basically undo everything done in i3c_master_register().
2697 *
2698 * Return: 0 in case of success, a negative error code otherwise.
2699 */
2700int i3c_master_unregister(struct i3c_master_controller *master)
2701{
 
 
2702	i3c_master_i2c_adapter_cleanup(master);
2703	i3c_master_unregister_i3c_devs(master);
2704	i3c_master_bus_cleanup(master);
 
2705	device_unregister(&master->dev);
2706
2707	return 0;
2708}
2709EXPORT_SYMBOL_GPL(i3c_master_unregister);
2710
2711int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2712{
2713	struct i3c_master_controller *master;
2714
2715	if (!dev)
2716		return -ENOENT;
2717
2718	master = i3c_dev_get_master(dev);
2719	if (!master)
2720		return -EINVAL;
2721
2722	if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2723		!dev->boardinfo->static_addr)
2724		return -EINVAL;
2725
2726	return i3c_master_setdasa_locked(master, dev->info.static_addr,
2727						dev->boardinfo->init_dyn_addr);
2728}
2729
2730int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2731				 struct i3c_priv_xfer *xfers,
2732				 int nxfers)
2733{
2734	struct i3c_master_controller *master;
2735
2736	if (!dev)
2737		return -ENOENT;
2738
2739	master = i3c_dev_get_master(dev);
2740	if (!master || !xfers)
2741		return -EINVAL;
2742
2743	if (!master->ops->priv_xfers)
2744		return -ENOTSUPP;
2745
2746	return master->ops->priv_xfers(dev, xfers, nxfers);
2747}
2748
2749int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2750{
2751	struct i3c_master_controller *master;
2752	int ret;
2753
2754	if (!dev->ibi)
2755		return -EINVAL;
2756
2757	master = i3c_dev_get_master(dev);
2758	ret = master->ops->disable_ibi(dev);
2759	if (ret)
2760		return ret;
2761
2762	reinit_completion(&dev->ibi->all_ibis_handled);
2763	if (atomic_read(&dev->ibi->pending_ibis))
2764		wait_for_completion(&dev->ibi->all_ibis_handled);
2765
2766	dev->ibi->enabled = false;
2767
2768	return 0;
2769}
2770
2771int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2772{
2773	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2774	int ret;
2775
2776	if (!dev->ibi)
2777		return -EINVAL;
2778
2779	ret = master->ops->enable_ibi(dev);
2780	if (!ret)
2781		dev->ibi->enabled = true;
2782
2783	return ret;
2784}
2785
2786int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2787			       const struct i3c_ibi_setup *req)
2788{
2789	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2790	struct i3c_device_ibi_info *ibi;
2791	int ret;
2792
2793	if (!master->ops->request_ibi)
2794		return -ENOTSUPP;
2795
2796	if (dev->ibi)
2797		return -EBUSY;
2798
2799	ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2800	if (!ibi)
2801		return -ENOMEM;
2802
 
 
 
 
 
 
2803	atomic_set(&ibi->pending_ibis, 0);
2804	init_completion(&ibi->all_ibis_handled);
2805	ibi->handler = req->handler;
2806	ibi->max_payload_len = req->max_payload_len;
2807	ibi->num_slots = req->num_slots;
2808
2809	dev->ibi = ibi;
2810	ret = master->ops->request_ibi(dev, req);
2811	if (ret) {
2812		kfree(ibi);
2813		dev->ibi = NULL;
2814	}
2815
2816	return ret;
2817}
2818
2819void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2820{
2821	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2822
2823	if (!dev->ibi)
2824		return;
2825
2826	if (WARN_ON(dev->ibi->enabled))
2827		WARN_ON(i3c_dev_disable_ibi_locked(dev));
2828
2829	master->ops->free_ibi(dev);
 
 
 
 
 
 
2830	kfree(dev->ibi);
2831	dev->ibi = NULL;
2832}
2833
2834static int __init i3c_init(void)
2835{
2836	int res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
 
 
 
 
 
 
 
2837
 
2838	if (res)
2839		return res;
2840
2841	res = bus_register(&i3c_bus_type);
2842	if (res)
2843		goto out_unreg_notifier;
2844
2845	return 0;
2846
2847out_unreg_notifier:
2848	bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2849
2850	return res;
2851}
2852subsys_initcall(i3c_init);
2853
2854static void __exit i3c_exit(void)
2855{
2856	bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2857	idr_destroy(&i3c_bus_idr);
2858	bus_unregister(&i3c_bus_type);
2859}
2860module_exit(i3c_exit);
2861
2862MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2863MODULE_DESCRIPTION("I3C core");
2864MODULE_LICENSE("GPL v2");