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v6.2
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * AMD Secure Processor device driver
  4 *
  5 * Copyright (C) 2013,2019 Advanced Micro Devices, Inc.
  6 *
  7 * Author: Tom Lendacky <thomas.lendacky@amd.com>
  8 * Author: Gary R Hook <gary.hook@amd.com>
  9 */
 10
 11#include <linux/module.h>
 12#include <linux/kernel.h>
 13#include <linux/device.h>
 14#include <linux/pci.h>
 15#include <linux/pci_ids.h>
 16#include <linux/dma-mapping.h>
 17#include <linux/kthread.h>
 18#include <linux/sched.h>
 19#include <linux/interrupt.h>
 20#include <linux/spinlock.h>
 21#include <linux/delay.h>
 22#include <linux/ccp.h>
 23
 24#include "ccp-dev.h"
 25#include "psp-dev.h"
 26
 27#define MSIX_VECTORS			2
 28
 29struct sp_pci {
 30	int msix_count;
 31	struct msix_entry msix_entry[MSIX_VECTORS];
 32};
 33static struct sp_device *sp_dev_master;
 34
 35#define attribute_show(name, def)						\
 36static ssize_t name##_show(struct device *d, struct device_attribute *attr,	\
 37			   char *buf)						\
 38{										\
 39	struct sp_device *sp = dev_get_drvdata(d);				\
 40	struct psp_device *psp = sp->psp_data;					\
 41	int bit = PSP_SECURITY_##def << PSP_CAPABILITY_PSP_SECURITY_OFFSET;	\
 42	return sysfs_emit(buf, "%d\n", (psp->capability & bit) > 0);		\
 43}
 44
 45attribute_show(fused_part, FUSED_PART)
 46static DEVICE_ATTR_RO(fused_part);
 47attribute_show(debug_lock_on, DEBUG_LOCK_ON)
 48static DEVICE_ATTR_RO(debug_lock_on);
 49attribute_show(tsme_status, TSME_STATUS)
 50static DEVICE_ATTR_RO(tsme_status);
 51attribute_show(anti_rollback_status, ANTI_ROLLBACK_STATUS)
 52static DEVICE_ATTR_RO(anti_rollback_status);
 53attribute_show(rpmc_production_enabled, RPMC_PRODUCTION_ENABLED)
 54static DEVICE_ATTR_RO(rpmc_production_enabled);
 55attribute_show(rpmc_spirom_available, RPMC_SPIROM_AVAILABLE)
 56static DEVICE_ATTR_RO(rpmc_spirom_available);
 57attribute_show(hsp_tpm_available, HSP_TPM_AVAILABLE)
 58static DEVICE_ATTR_RO(hsp_tpm_available);
 59attribute_show(rom_armor_enforced, ROM_ARMOR_ENFORCED)
 60static DEVICE_ATTR_RO(rom_armor_enforced);
 61
 62static struct attribute *psp_attrs[] = {
 63	&dev_attr_fused_part.attr,
 64	&dev_attr_debug_lock_on.attr,
 65	&dev_attr_tsme_status.attr,
 66	&dev_attr_anti_rollback_status.attr,
 67	&dev_attr_rpmc_production_enabled.attr,
 68	&dev_attr_rpmc_spirom_available.attr,
 69	&dev_attr_hsp_tpm_available.attr,
 70	&dev_attr_rom_armor_enforced.attr,
 71	NULL
 72};
 73
 74static umode_t psp_security_is_visible(struct kobject *kobj, struct attribute *attr, int idx)
 75{
 76	struct device *dev = kobj_to_dev(kobj);
 77	struct sp_device *sp = dev_get_drvdata(dev);
 78	struct psp_device *psp = sp->psp_data;
 79
 80	if (psp && (psp->capability & PSP_CAPABILITY_PSP_SECURITY_REPORTING))
 81		return 0444;
 82
 83	return 0;
 84}
 85
 86static struct attribute_group psp_attr_group = {
 87	.attrs = psp_attrs,
 88	.is_visible = psp_security_is_visible,
 89};
 90
 91static const struct attribute_group *psp_groups[] = {
 92	&psp_attr_group,
 93	NULL,
 94};
 95
 96static int sp_get_msix_irqs(struct sp_device *sp)
 97{
 98	struct sp_pci *sp_pci = sp->dev_specific;
 99	struct device *dev = sp->dev;
100	struct pci_dev *pdev = to_pci_dev(dev);
101	int v, ret;
102
103	for (v = 0; v < ARRAY_SIZE(sp_pci->msix_entry); v++)
104		sp_pci->msix_entry[v].entry = v;
105
106	ret = pci_enable_msix_range(pdev, sp_pci->msix_entry, 1, v);
107	if (ret < 0)
108		return ret;
109
110	sp_pci->msix_count = ret;
111	sp->use_tasklet = true;
112
113	sp->psp_irq = sp_pci->msix_entry[0].vector;
114	sp->ccp_irq = (sp_pci->msix_count > 1) ? sp_pci->msix_entry[1].vector
115					       : sp_pci->msix_entry[0].vector;
116	return 0;
117}
118
119static int sp_get_msi_irq(struct sp_device *sp)
120{
121	struct device *dev = sp->dev;
122	struct pci_dev *pdev = to_pci_dev(dev);
123	int ret;
124
125	ret = pci_enable_msi(pdev);
126	if (ret)
127		return ret;
128
129	sp->ccp_irq = pdev->irq;
130	sp->psp_irq = pdev->irq;
131
132	return 0;
133}
134
135static int sp_get_irqs(struct sp_device *sp)
136{
137	struct device *dev = sp->dev;
138	int ret;
139
140	ret = sp_get_msix_irqs(sp);
141	if (!ret)
142		return 0;
143
144	/* Couldn't get MSI-X vectors, try MSI */
145	dev_notice(dev, "could not enable MSI-X (%d), trying MSI\n", ret);
146	ret = sp_get_msi_irq(sp);
147	if (!ret)
148		return 0;
149
150	/* Couldn't get MSI interrupt */
151	dev_notice(dev, "could not enable MSI (%d)\n", ret);
152
153	return ret;
154}
155
156static void sp_free_irqs(struct sp_device *sp)
157{
158	struct sp_pci *sp_pci = sp->dev_specific;
159	struct device *dev = sp->dev;
160	struct pci_dev *pdev = to_pci_dev(dev);
161
162	if (sp_pci->msix_count)
163		pci_disable_msix(pdev);
164	else if (sp->psp_irq)
165		pci_disable_msi(pdev);
166
167	sp->ccp_irq = 0;
168	sp->psp_irq = 0;
169}
170
171static bool sp_pci_is_master(struct sp_device *sp)
172{
173	struct device *dev_cur, *dev_new;
174	struct pci_dev *pdev_cur, *pdev_new;
175
176	dev_new = sp->dev;
177	dev_cur = sp_dev_master->dev;
178
179	pdev_new = to_pci_dev(dev_new);
180	pdev_cur = to_pci_dev(dev_cur);
181
182	if (pdev_new->bus->number < pdev_cur->bus->number)
183		return true;
184
185	if (PCI_SLOT(pdev_new->devfn) < PCI_SLOT(pdev_cur->devfn))
186		return true;
187
188	if (PCI_FUNC(pdev_new->devfn) < PCI_FUNC(pdev_cur->devfn))
189		return true;
190
191	return false;
192}
193
194static void psp_set_master(struct sp_device *sp)
195{
196	if (!sp_dev_master) {
197		sp_dev_master = sp;
198		return;
199	}
200
201	if (sp_pci_is_master(sp))
202		sp_dev_master = sp;
203}
204
205static struct sp_device *psp_get_master(void)
206{
207	return sp_dev_master;
208}
209
210static void psp_clear_master(struct sp_device *sp)
211{
212	if (sp == sp_dev_master) {
213		sp_dev_master = NULL;
214		dev_dbg(sp->dev, "Cleared sp_dev_master\n");
215	}
216}
217
218static int sp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
219{
220	struct sp_device *sp;
221	struct sp_pci *sp_pci;
222	struct device *dev = &pdev->dev;
223	void __iomem * const *iomap_table;
224	int bar_mask;
225	int ret;
226
227	ret = -ENOMEM;
228	sp = sp_alloc_struct(dev);
229	if (!sp)
230		goto e_err;
231
232	sp_pci = devm_kzalloc(dev, sizeof(*sp_pci), GFP_KERNEL);
233	if (!sp_pci)
234		goto e_err;
235
236	sp->dev_specific = sp_pci;
237	sp->dev_vdata = (struct sp_dev_vdata *)id->driver_data;
238	if (!sp->dev_vdata) {
239		ret = -ENODEV;
240		dev_err(dev, "missing driver data\n");
241		goto e_err;
242	}
243
244	ret = pcim_enable_device(pdev);
245	if (ret) {
246		dev_err(dev, "pcim_enable_device failed (%d)\n", ret);
247		goto e_err;
248	}
249
250	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
251	ret = pcim_iomap_regions(pdev, bar_mask, "ccp");
252	if (ret) {
253		dev_err(dev, "pcim_iomap_regions failed (%d)\n", ret);
254		goto e_err;
255	}
256
257	iomap_table = pcim_iomap_table(pdev);
258	if (!iomap_table) {
259		dev_err(dev, "pcim_iomap_table failed\n");
260		ret = -ENOMEM;
261		goto e_err;
262	}
263
264	sp->io_map = iomap_table[sp->dev_vdata->bar];
265	if (!sp->io_map) {
266		dev_err(dev, "ioremap failed\n");
267		ret = -ENOMEM;
268		goto e_err;
269	}
270
271	ret = sp_get_irqs(sp);
272	if (ret)
273		goto e_err;
274
275	pci_set_master(pdev);
276	sp->set_psp_master_device = psp_set_master;
277	sp->get_psp_master_device = psp_get_master;
278	sp->clear_psp_master_device = psp_clear_master;
279
280	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));
281	if (ret) {
282		ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
283		if (ret) {
284			dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n",
285				ret);
286			goto free_irqs;
287		}
288	}
289
290	dev_set_drvdata(dev, sp);
291
292	ret = sp_init(sp);
293	if (ret)
294		goto free_irqs;
295
296	return 0;
297
298free_irqs:
299	sp_free_irqs(sp);
300e_err:
301	dev_notice(dev, "initialization failed\n");
302	return ret;
303}
304
305static void sp_pci_shutdown(struct pci_dev *pdev)
306{
307	struct device *dev = &pdev->dev;
308	struct sp_device *sp = dev_get_drvdata(dev);
309
310	if (!sp)
311		return;
312
313	sp_destroy(sp);
314}
315
316static void sp_pci_remove(struct pci_dev *pdev)
317{
318	struct device *dev = &pdev->dev;
319	struct sp_device *sp = dev_get_drvdata(dev);
320
321	if (!sp)
322		return;
323
324	sp_destroy(sp);
325
326	sp_free_irqs(sp);
327}
328
329static int __maybe_unused sp_pci_suspend(struct device *dev)
330{
331	struct sp_device *sp = dev_get_drvdata(dev);
332
333	return sp_suspend(sp);
334}
335
336static int __maybe_unused sp_pci_resume(struct device *dev)
337{
338	struct sp_device *sp = dev_get_drvdata(dev);
339
340	return sp_resume(sp);
341}
342
343#ifdef CONFIG_CRYPTO_DEV_SP_PSP
344static const struct sev_vdata sevv1 = {
345	.cmdresp_reg		= 0x10580,
346	.cmdbuff_addr_lo_reg	= 0x105e0,
347	.cmdbuff_addr_hi_reg	= 0x105e4,
348};
349
350static const struct sev_vdata sevv2 = {
351	.cmdresp_reg		= 0x10980,
352	.cmdbuff_addr_lo_reg	= 0x109e0,
353	.cmdbuff_addr_hi_reg	= 0x109e4,
354};
355
356static const struct tee_vdata teev1 = {
357	.cmdresp_reg		= 0x10544,
358	.cmdbuff_addr_lo_reg	= 0x10548,
359	.cmdbuff_addr_hi_reg	= 0x1054c,
360	.ring_wptr_reg          = 0x10550,
361	.ring_rptr_reg          = 0x10554,
362};
363
364static const struct psp_vdata pspv1 = {
365	.sev			= &sevv1,
366	.feature_reg		= 0x105fc,
367	.inten_reg		= 0x10610,
368	.intsts_reg		= 0x10614,
369};
370
371static const struct psp_vdata pspv2 = {
372	.sev			= &sevv2,
373	.feature_reg		= 0x109fc,
374	.inten_reg		= 0x10690,
375	.intsts_reg		= 0x10694,
376};
377
378static const struct psp_vdata pspv3 = {
379	.tee			= &teev1,
380	.feature_reg		= 0x109fc,
381	.inten_reg		= 0x10690,
382	.intsts_reg		= 0x10694,
383};
384
385static const struct psp_vdata pspv4 = {
386	.sev			= &sevv2,
387	.tee			= &teev1,
388	.feature_reg		= 0x109fc,
389	.inten_reg		= 0x10690,
390	.intsts_reg		= 0x10694,
391};
392
393#endif
394
395static const struct sp_dev_vdata dev_vdata[] = {
396	{	/* 0 */
397		.bar = 2,
398#ifdef CONFIG_CRYPTO_DEV_SP_CCP
399		.ccp_vdata = &ccpv3,
400#endif
401	},
402	{	/* 1 */
403		.bar = 2,
404#ifdef CONFIG_CRYPTO_DEV_SP_CCP
405		.ccp_vdata = &ccpv5a,
406#endif
407#ifdef CONFIG_CRYPTO_DEV_SP_PSP
408		.psp_vdata = &pspv1,
409#endif
410	},
411	{	/* 2 */
412		.bar = 2,
413#ifdef CONFIG_CRYPTO_DEV_SP_CCP
414		.ccp_vdata = &ccpv5b,
415#endif
416	},
417	{	/* 3 */
418		.bar = 2,
419#ifdef CONFIG_CRYPTO_DEV_SP_CCP
420		.ccp_vdata = &ccpv5a,
421#endif
422#ifdef CONFIG_CRYPTO_DEV_SP_PSP
423		.psp_vdata = &pspv2,
424#endif
425	},
426	{	/* 4 */
427		.bar = 2,
428#ifdef CONFIG_CRYPTO_DEV_SP_CCP
429		.ccp_vdata = &ccpv5a,
430#endif
431#ifdef CONFIG_CRYPTO_DEV_SP_PSP
432		.psp_vdata = &pspv3,
433#endif
434	},
435	{	/* 5 */
436		.bar = 2,
437#ifdef CONFIG_CRYPTO_DEV_SP_PSP
438		.psp_vdata = &pspv4,
439#endif
440	},
441	{	/* 6 */
442		.bar = 2,
443#ifdef CONFIG_CRYPTO_DEV_SP_PSP
444		.psp_vdata = &pspv3,
445#endif
446	},
447};
448static const struct pci_device_id sp_pci_table[] = {
449	{ PCI_VDEVICE(AMD, 0x1537), (kernel_ulong_t)&dev_vdata[0] },
450	{ PCI_VDEVICE(AMD, 0x1456), (kernel_ulong_t)&dev_vdata[1] },
451	{ PCI_VDEVICE(AMD, 0x1468), (kernel_ulong_t)&dev_vdata[2] },
452	{ PCI_VDEVICE(AMD, 0x1486), (kernel_ulong_t)&dev_vdata[3] },
453	{ PCI_VDEVICE(AMD, 0x15DF), (kernel_ulong_t)&dev_vdata[4] },
454	{ PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[4] },
455	{ PCI_VDEVICE(AMD, 0x14CA), (kernel_ulong_t)&dev_vdata[5] },
456	{ PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] },
457	/* Last entry must be zero */
458	{ 0, }
459};
460MODULE_DEVICE_TABLE(pci, sp_pci_table);
461
462static SIMPLE_DEV_PM_OPS(sp_pci_pm_ops, sp_pci_suspend, sp_pci_resume);
463
464static struct pci_driver sp_pci_driver = {
465	.name = "ccp",
466	.id_table = sp_pci_table,
467	.probe = sp_pci_probe,
468	.remove = sp_pci_remove,
469	.shutdown = sp_pci_shutdown,
470	.driver.pm = &sp_pci_pm_ops,
471	.dev_groups = psp_groups,
472};
473
474int sp_pci_init(void)
475{
476	return pci_register_driver(&sp_pci_driver);
477}
478
479void sp_pci_exit(void)
480{
481	pci_unregister_driver(&sp_pci_driver);
482}
v5.9
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * AMD Secure Processor device driver
  4 *
  5 * Copyright (C) 2013,2019 Advanced Micro Devices, Inc.
  6 *
  7 * Author: Tom Lendacky <thomas.lendacky@amd.com>
  8 * Author: Gary R Hook <gary.hook@amd.com>
  9 */
 10
 11#include <linux/module.h>
 12#include <linux/kernel.h>
 13#include <linux/device.h>
 14#include <linux/pci.h>
 15#include <linux/pci_ids.h>
 16#include <linux/dma-mapping.h>
 17#include <linux/kthread.h>
 18#include <linux/sched.h>
 19#include <linux/interrupt.h>
 20#include <linux/spinlock.h>
 21#include <linux/delay.h>
 22#include <linux/ccp.h>
 23
 24#include "ccp-dev.h"
 25#include "psp-dev.h"
 26
 27#define MSIX_VECTORS			2
 28
 29struct sp_pci {
 30	int msix_count;
 31	struct msix_entry msix_entry[MSIX_VECTORS];
 32};
 33static struct sp_device *sp_dev_master;
 34
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 35static int sp_get_msix_irqs(struct sp_device *sp)
 36{
 37	struct sp_pci *sp_pci = sp->dev_specific;
 38	struct device *dev = sp->dev;
 39	struct pci_dev *pdev = to_pci_dev(dev);
 40	int v, ret;
 41
 42	for (v = 0; v < ARRAY_SIZE(sp_pci->msix_entry); v++)
 43		sp_pci->msix_entry[v].entry = v;
 44
 45	ret = pci_enable_msix_range(pdev, sp_pci->msix_entry, 1, v);
 46	if (ret < 0)
 47		return ret;
 48
 49	sp_pci->msix_count = ret;
 50	sp->use_tasklet = true;
 51
 52	sp->psp_irq = sp_pci->msix_entry[0].vector;
 53	sp->ccp_irq = (sp_pci->msix_count > 1) ? sp_pci->msix_entry[1].vector
 54					       : sp_pci->msix_entry[0].vector;
 55	return 0;
 56}
 57
 58static int sp_get_msi_irq(struct sp_device *sp)
 59{
 60	struct device *dev = sp->dev;
 61	struct pci_dev *pdev = to_pci_dev(dev);
 62	int ret;
 63
 64	ret = pci_enable_msi(pdev);
 65	if (ret)
 66		return ret;
 67
 68	sp->ccp_irq = pdev->irq;
 69	sp->psp_irq = pdev->irq;
 70
 71	return 0;
 72}
 73
 74static int sp_get_irqs(struct sp_device *sp)
 75{
 76	struct device *dev = sp->dev;
 77	int ret;
 78
 79	ret = sp_get_msix_irqs(sp);
 80	if (!ret)
 81		return 0;
 82
 83	/* Couldn't get MSI-X vectors, try MSI */
 84	dev_notice(dev, "could not enable MSI-X (%d), trying MSI\n", ret);
 85	ret = sp_get_msi_irq(sp);
 86	if (!ret)
 87		return 0;
 88
 89	/* Couldn't get MSI interrupt */
 90	dev_notice(dev, "could not enable MSI (%d)\n", ret);
 91
 92	return ret;
 93}
 94
 95static void sp_free_irqs(struct sp_device *sp)
 96{
 97	struct sp_pci *sp_pci = sp->dev_specific;
 98	struct device *dev = sp->dev;
 99	struct pci_dev *pdev = to_pci_dev(dev);
100
101	if (sp_pci->msix_count)
102		pci_disable_msix(pdev);
103	else if (sp->psp_irq)
104		pci_disable_msi(pdev);
105
106	sp->ccp_irq = 0;
107	sp->psp_irq = 0;
108}
109
110static bool sp_pci_is_master(struct sp_device *sp)
111{
112	struct device *dev_cur, *dev_new;
113	struct pci_dev *pdev_cur, *pdev_new;
114
115	dev_new = sp->dev;
116	dev_cur = sp_dev_master->dev;
117
118	pdev_new = to_pci_dev(dev_new);
119	pdev_cur = to_pci_dev(dev_cur);
120
121	if (pdev_new->bus->number < pdev_cur->bus->number)
122		return true;
123
124	if (PCI_SLOT(pdev_new->devfn) < PCI_SLOT(pdev_cur->devfn))
125		return true;
126
127	if (PCI_FUNC(pdev_new->devfn) < PCI_FUNC(pdev_cur->devfn))
128		return true;
129
130	return false;
131}
132
133static void psp_set_master(struct sp_device *sp)
134{
135	if (!sp_dev_master) {
136		sp_dev_master = sp;
137		return;
138	}
139
140	if (sp_pci_is_master(sp))
141		sp_dev_master = sp;
142}
143
144static struct sp_device *psp_get_master(void)
145{
146	return sp_dev_master;
147}
148
149static void psp_clear_master(struct sp_device *sp)
150{
151	if (sp == sp_dev_master) {
152		sp_dev_master = NULL;
153		dev_dbg(sp->dev, "Cleared sp_dev_master\n");
154	}
155}
156
157static int sp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
158{
159	struct sp_device *sp;
160	struct sp_pci *sp_pci;
161	struct device *dev = &pdev->dev;
162	void __iomem * const *iomap_table;
163	int bar_mask;
164	int ret;
165
166	ret = -ENOMEM;
167	sp = sp_alloc_struct(dev);
168	if (!sp)
169		goto e_err;
170
171	sp_pci = devm_kzalloc(dev, sizeof(*sp_pci), GFP_KERNEL);
172	if (!sp_pci)
173		goto e_err;
174
175	sp->dev_specific = sp_pci;
176	sp->dev_vdata = (struct sp_dev_vdata *)id->driver_data;
177	if (!sp->dev_vdata) {
178		ret = -ENODEV;
179		dev_err(dev, "missing driver data\n");
180		goto e_err;
181	}
182
183	ret = pcim_enable_device(pdev);
184	if (ret) {
185		dev_err(dev, "pcim_enable_device failed (%d)\n", ret);
186		goto e_err;
187	}
188
189	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
190	ret = pcim_iomap_regions(pdev, bar_mask, "ccp");
191	if (ret) {
192		dev_err(dev, "pcim_iomap_regions failed (%d)\n", ret);
193		goto e_err;
194	}
195
196	iomap_table = pcim_iomap_table(pdev);
197	if (!iomap_table) {
198		dev_err(dev, "pcim_iomap_table failed\n");
199		ret = -ENOMEM;
200		goto e_err;
201	}
202
203	sp->io_map = iomap_table[sp->dev_vdata->bar];
204	if (!sp->io_map) {
205		dev_err(dev, "ioremap failed\n");
206		ret = -ENOMEM;
207		goto e_err;
208	}
209
210	ret = sp_get_irqs(sp);
211	if (ret)
212		goto e_err;
213
214	pci_set_master(pdev);
215	sp->set_psp_master_device = psp_set_master;
216	sp->get_psp_master_device = psp_get_master;
217	sp->clear_psp_master_device = psp_clear_master;
218
219	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));
220	if (ret) {
221		ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
222		if (ret) {
223			dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n",
224				ret);
225			goto e_err;
226		}
227	}
228
229	dev_set_drvdata(dev, sp);
230
231	ret = sp_init(sp);
232	if (ret)
233		goto e_err;
234
235	return 0;
236
 
 
237e_err:
238	dev_notice(dev, "initialization failed\n");
239	return ret;
240}
241
 
 
 
 
 
 
 
 
 
 
 
242static void sp_pci_remove(struct pci_dev *pdev)
243{
244	struct device *dev = &pdev->dev;
245	struct sp_device *sp = dev_get_drvdata(dev);
246
247	if (!sp)
248		return;
249
250	sp_destroy(sp);
251
252	sp_free_irqs(sp);
253}
254
255static int __maybe_unused sp_pci_suspend(struct device *dev)
256{
257	struct sp_device *sp = dev_get_drvdata(dev);
258
259	return sp_suspend(sp);
260}
261
262static int __maybe_unused sp_pci_resume(struct device *dev)
263{
264	struct sp_device *sp = dev_get_drvdata(dev);
265
266	return sp_resume(sp);
267}
268
269#ifdef CONFIG_CRYPTO_DEV_SP_PSP
270static const struct sev_vdata sevv1 = {
271	.cmdresp_reg		= 0x10580,
272	.cmdbuff_addr_lo_reg	= 0x105e0,
273	.cmdbuff_addr_hi_reg	= 0x105e4,
274};
275
276static const struct sev_vdata sevv2 = {
277	.cmdresp_reg		= 0x10980,
278	.cmdbuff_addr_lo_reg	= 0x109e0,
279	.cmdbuff_addr_hi_reg	= 0x109e4,
280};
281
282static const struct tee_vdata teev1 = {
283	.cmdresp_reg		= 0x10544,
284	.cmdbuff_addr_lo_reg	= 0x10548,
285	.cmdbuff_addr_hi_reg	= 0x1054c,
286	.ring_wptr_reg          = 0x10550,
287	.ring_rptr_reg          = 0x10554,
288};
289
290static const struct psp_vdata pspv1 = {
291	.sev			= &sevv1,
292	.feature_reg		= 0x105fc,
293	.inten_reg		= 0x10610,
294	.intsts_reg		= 0x10614,
295};
296
297static const struct psp_vdata pspv2 = {
298	.sev			= &sevv2,
299	.feature_reg		= 0x109fc,
300	.inten_reg		= 0x10690,
301	.intsts_reg		= 0x10694,
302};
303
304static const struct psp_vdata pspv3 = {
305	.tee			= &teev1,
306	.feature_reg		= 0x109fc,
307	.inten_reg		= 0x10690,
308	.intsts_reg		= 0x10694,
309};
 
 
 
 
 
 
 
 
 
310#endif
311
312static const struct sp_dev_vdata dev_vdata[] = {
313	{	/* 0 */
314		.bar = 2,
315#ifdef CONFIG_CRYPTO_DEV_SP_CCP
316		.ccp_vdata = &ccpv3,
317#endif
318	},
319	{	/* 1 */
320		.bar = 2,
321#ifdef CONFIG_CRYPTO_DEV_SP_CCP
322		.ccp_vdata = &ccpv5a,
323#endif
324#ifdef CONFIG_CRYPTO_DEV_SP_PSP
325		.psp_vdata = &pspv1,
326#endif
327	},
328	{	/* 2 */
329		.bar = 2,
330#ifdef CONFIG_CRYPTO_DEV_SP_CCP
331		.ccp_vdata = &ccpv5b,
332#endif
333	},
334	{	/* 3 */
335		.bar = 2,
336#ifdef CONFIG_CRYPTO_DEV_SP_CCP
337		.ccp_vdata = &ccpv5a,
338#endif
339#ifdef CONFIG_CRYPTO_DEV_SP_PSP
340		.psp_vdata = &pspv2,
341#endif
342	},
343	{	/* 4 */
344		.bar = 2,
345#ifdef CONFIG_CRYPTO_DEV_SP_CCP
346		.ccp_vdata = &ccpv5a,
347#endif
348#ifdef CONFIG_CRYPTO_DEV_SP_PSP
349		.psp_vdata = &pspv3,
350#endif
351	},
 
 
 
 
 
 
 
 
 
 
 
 
352};
353static const struct pci_device_id sp_pci_table[] = {
354	{ PCI_VDEVICE(AMD, 0x1537), (kernel_ulong_t)&dev_vdata[0] },
355	{ PCI_VDEVICE(AMD, 0x1456), (kernel_ulong_t)&dev_vdata[1] },
356	{ PCI_VDEVICE(AMD, 0x1468), (kernel_ulong_t)&dev_vdata[2] },
357	{ PCI_VDEVICE(AMD, 0x1486), (kernel_ulong_t)&dev_vdata[3] },
358	{ PCI_VDEVICE(AMD, 0x15DF), (kernel_ulong_t)&dev_vdata[4] },
 
 
 
359	/* Last entry must be zero */
360	{ 0, }
361};
362MODULE_DEVICE_TABLE(pci, sp_pci_table);
363
364static SIMPLE_DEV_PM_OPS(sp_pci_pm_ops, sp_pci_suspend, sp_pci_resume);
365
366static struct pci_driver sp_pci_driver = {
367	.name = "ccp",
368	.id_table = sp_pci_table,
369	.probe = sp_pci_probe,
370	.remove = sp_pci_remove,
 
371	.driver.pm = &sp_pci_pm_ops,
 
372};
373
374int sp_pci_init(void)
375{
376	return pci_register_driver(&sp_pci_driver);
377}
378
379void sp_pci_exit(void)
380{
381	pci_unregister_driver(&sp_pci_driver);
382}