Linux Audio

Check our new training course

Loading...
v6.2
  1/*
  2 * Copyright (C) 2013,2014 Russell King
  3 *
  4 * This file is dual-licensed: you can use it either under the terms
  5 * of the GPL or the X11 license, at your option. Note that this dual
  6 * licensing only applies to this file, and not this project as a
  7 * whole.
  8 *
  9 *  a) This file is free software; you can redistribute it and/or
 10 *     modify it under the terms of the GNU General Public License
 11 *     version 2 as published by the Free Software Foundation.
 12 *
 13 *     This file is distributed in the hope that it will be useful,
 14 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 15 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16 *     GNU General Public License for more details.
 17 *
 18 * Or, alternatively,
 19 *
 20 *  b) Permission is hereby granted, free of charge, to any person
 21 *     obtaining a copy of this software and associated documentation
 22 *     files (the "Software"), to deal in the Software without
 23 *     restriction, including without limitation the rights to use,
 24 *     copy, modify, merge, publish, distribute, sublicense, and/or
 25 *     sell copies of the Software, and to permit persons to whom the
 26 *     Software is furnished to do so, subject to the following
 27 *     conditions:
 28 *
 29 *     The above copyright notice and this permission notice shall be
 30 *     included in all copies or substantial portions of the Software.
 31 *
 32 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 33 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 34 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 35 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 36 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 37 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 38 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 39 *     OTHER DEALINGS IN THE SOFTWARE.
 40 */
 41#include <dt-bindings/gpio/gpio.h>
 42/ {
 43	clk_brcm: brcm-clock {
 44		compatible = "gpio-gate-clock";
 45		#clock-cells = <0>;
 46		pinctrl-names = "default";
 47		pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
 48		enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
 49	};
 50
 51	reg_brcm: brcm-reg {
 52		compatible = "regulator-fixed";
 53		enable-active-high;
 54		gpio = <&gpio3 19 0>;
 55		pinctrl-names = "default";
 56		pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
 57		regulator-name = "brcm_reg";
 58		regulator-min-microvolt = <3300000>;
 59		regulator-max-microvolt = <3300000>;
 60		startup-delay-us = <200000>;
 61	};
 62
 63	usdhc1_pwrseq: usdhc1_pwrseq {
 64		compatible = "mmc-pwrseq-simple";
 65		reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
 66			      <&gpio6 0 GPIO_ACTIVE_LOW>;
 67		clocks = <&clk_brcm>;
 68		clock-names = "ext_clock";
 69	};
 70};
 71
 72&iomuxc {
 73	microsom {
 74		pinctrl_microsom_brcm_bt: microsom-brcm-bt {
 75			fsl,pins = <
 76				MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070
 77				MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	0x40013070
 78				MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070
 79			>;
 80		};
 81
 82		pinctrl_microsom_brcm_osc: microsom-brcm-osc {
 83			fsl,pins = <
 84				MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	0x40013070
 85			>;
 86		};
 87
 88		pinctrl_microsom_brcm_reg: microsom-brcm-reg {
 89			fsl,pins = <
 90				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x40013070
 91			>;
 92		};
 93
 94		pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
 95			fsl,pins = <
 96				MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0
 97				MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x40013070
 98				MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070
 99				MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x40013070
100			>;
101		};
102
103		pinctrl_microsom_uart4: microsom-uart4 {
104			fsl,pins = <
105				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
106				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
107				MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
108				MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
109			>;
110		};
111
112		pinctrl_microsom_usdhc1: microsom-usdhc1 {
113			fsl,pins = <
114				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059
115				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059
116				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
117				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
118				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
119				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
120			>;
121		};
122	};
123};
124
125/* UART4 - Connected to optional BRCM Wifi/BT/FM */
126&uart4 {
127	pinctrl-names = "default";
128	pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
129	uart-has-rtscts;
130	status = "okay";
131};
132
133/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
134&usdhc1 {
135	pinctrl-names = "default";
136	pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
137	bus-width = <4>;
138	mmc-pwrseq = <&usdhc1_pwrseq>;
139	keep-power-in-suspend;
140	no-1-8-v;
141	non-removable;
142	vmmc-supply = <&reg_brcm>;
143	status = "okay";
144};
v5.9
  1/*
  2 * Copyright (C) 2013,2014 Russell King
  3 *
  4 * This file is dual-licensed: you can use it either under the terms
  5 * of the GPL or the X11 license, at your option. Note that this dual
  6 * licensing only applies to this file, and not this project as a
  7 * whole.
  8 *
  9 *  a) This file is free software; you can redistribute it and/or
 10 *     modify it under the terms of the GNU General Public License
 11 *     version 2 as published by the Free Software Foundation.
 12 *
 13 *     This file is distributed in the hope that it will be useful,
 14 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 15 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16 *     GNU General Public License for more details.
 17 *
 18 * Or, alternatively,
 19 *
 20 *  b) Permission is hereby granted, free of charge, to any person
 21 *     obtaining a copy of this software and associated documentation
 22 *     files (the "Software"), to deal in the Software without
 23 *     restriction, including without limitation the rights to use,
 24 *     copy, modify, merge, publish, distribute, sublicense, and/or
 25 *     sell copies of the Software, and to permit persons to whom the
 26 *     Software is furnished to do so, subject to the following
 27 *     conditions:
 28 *
 29 *     The above copyright notice and this permission notice shall be
 30 *     included in all copies or substantial portions of the Software.
 31 *
 32 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 33 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 34 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 35 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 36 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 37 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 38 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 39 *     OTHER DEALINGS IN THE SOFTWARE.
 40 */
 41#include <dt-bindings/gpio/gpio.h>
 42/ {
 43	clk_brcm: brcm-clock {
 44		compatible = "gpio-gate-clock";
 45		#clock-cells = <0>;
 46		pinctrl-names = "default";
 47		pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
 48		enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
 49	};
 50
 51	reg_brcm: brcm-reg {
 52		compatible = "regulator-fixed";
 53		enable-active-high;
 54		gpio = <&gpio3 19 0>;
 55		pinctrl-names = "default";
 56		pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
 57		regulator-name = "brcm_reg";
 58		regulator-min-microvolt = <3300000>;
 59		regulator-max-microvolt = <3300000>;
 60		startup-delay-us = <200000>;
 61	};
 62
 63	usdhc1_pwrseq: usdhc1_pwrseq {
 64		compatible = "mmc-pwrseq-simple";
 65		reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
 66			      <&gpio6 0 GPIO_ACTIVE_LOW>;
 67		clocks = <&clk_brcm>;
 68		clock-names = "ext_clock";
 69	};
 70};
 71
 72&iomuxc {
 73	microsom {
 74		pinctrl_microsom_brcm_bt: microsom-brcm-bt {
 75			fsl,pins = <
 76				MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070
 77				MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	0x40013070
 78				MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070
 79			>;
 80		};
 81
 82		pinctrl_microsom_brcm_osc: microsom-brcm-osc {
 83			fsl,pins = <
 84				MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	0x40013070
 85			>;
 86		};
 87
 88		pinctrl_microsom_brcm_reg: microsom-brcm-reg {
 89			fsl,pins = <
 90				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x40013070
 91			>;
 92		};
 93
 94		pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
 95			fsl,pins = <
 96				MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0
 97				MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x40013070
 98				MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070
 99				MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x40013070
100			>;
101		};
102
103		pinctrl_microsom_uart4: microsom-uart4 {
104			fsl,pins = <
105				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
106				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
107				MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
108				MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
109			>;
110		};
111
112		pinctrl_microsom_usdhc1: microsom-usdhc1 {
113			fsl,pins = <
114				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059
115				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059
116				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
117				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
118				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
119				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
120			>;
121		};
122	};
123};
124
125/* UART4 - Connected to optional BRCM Wifi/BT/FM */
126&uart4 {
127	pinctrl-names = "default";
128	pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
129	uart-has-rtscts;
130	status = "okay";
131};
132
133/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
134&usdhc1 {
135	pinctrl-names = "default";
136	pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
137	bus-width = <4>;
138	mmc-pwrseq = <&usdhc1_pwrseq>;
139	keep-power-in-suspend;
140	no-1-8-v;
141	non-removable;
142	vmmc-supply = <&reg_brcm>;
143	status = "okay";
144};