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v6.2
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2// Copyright 2019 IBM Corp.
  3/dts-v1/;
  4
  5#include "aspeed-g6.dtsi"
  6#include <dt-bindings/gpio/aspeed-gpio.h>
  7#include <dt-bindings/i2c/i2c.h>
  8#include <dt-bindings/leds/leds-pca955x.h>
  9
 10/ {
 11	model = "Tacoma";
 12	compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
 13
 14	chosen {
 15		stdout-path = &uart5;
 16		bootargs = "console=ttyS4,115200n8 earlycon";
 17	};
 18
 19	memory@80000000 {
 20		device_type = "memory";
 21		reg = <0x80000000 0x40000000>;
 22	};
 23
 24	reserved-memory {
 25		#address-cells = <1>;
 26		#size-cells = <1>;
 27		ranges;
 28
 29		flash_memory: region@b8000000 {
 30			no-map;
 31			reg = <0xb8000000 0x4000000>; /* 64M */
 32		};
 33
 34		ramoops@bc000000 {
 35			compatible = "ramoops";
 36			reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */
 37			record-size = <0x8000>;
 38			console-size = <0x8000>;
 39			pmsg-size = <0x8000>;
 40			max-reason = <3>; /* KMSG_DUMP_EMERG */
 41		};
 42
 43		vga_memory: region@bf000000 {
 44			no-map;
 45			compatible = "shared-dma-pool";
 46			reg = <0xbf000000 0x01000000>;	/* 16M */
 47		};
 48	};
 49
 50	gpio-keys {
 51		compatible = "gpio-keys";
 52
 53		event-ps0-presence {
 54			label = "ps0-presence";
 55			gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
 56			linux,code = <ASPEED_GPIO(H, 3)>;
 57		};
 58
 59		event-ps1-presence {
 60			label = "ps1-presence";
 61			gpios = <&gpio0 ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>;
 62			linux,code = <ASPEED_GPIO(E, 5)>;
 63		};
 64	};
 65
 66	gpio-keys-polled {
 67		compatible = "gpio-keys-polled";
 
 
 68		poll-interval = <1000>;
 69
 70		event-fan0-presence {
 71			label = "fan0-presence";
 72			gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
 73			linux,code = <4>;
 74		};
 75
 76		event-fan1-presence {
 77			label = "fan1-presence";
 78			gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
 79			linux,code = <5>;
 80		};
 81
 82		event-fan2-presence {
 83			label = "fan2-presence";
 84			gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
 85			linux,code = <6>;
 86		};
 87
 88		event-fan3-presence {
 89			label = "fan3-presence";
 90			gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
 91			linux,code = <7>;
 92		};
 93	};
 94
 95	iio-hwmon-dps310 {
 96		compatible = "iio-hwmon";
 97		io-channels = <&dps 0>;
 98	};
 99
100	iio-hwmon-bmp280 {
101		compatible = "iio-hwmon";
102		io-channels = <&bmp 1>;
103	};
104};
105
106&ehci1 {
107	status = "okay";
108};
109
110&gpio0 {
111	gpio-line-names =
112	/*A0-A7*/	"","","","","","","","",
113	/*B0-B7*/	"fsi-mux","","","","","","","",
114	/*C0-C7*/	"","","","","","","","",
115	/*D0-D7*/	"","","","","","","","",
116	/*E0-E7*/	"power-button","","","checkstop","","presence-ps1","","led-rear-fault",
117	/*F0-F7*/	"","","","","","","","",
118	/*G0-G7*/	"","","","","","","","",
119	/*H0-H7*/	"","","","presence-ps0","","","","",
120	/*I0-I7*/	"","","","","","","","",
121	/*J0-J7*/	"","","","","","","","",
122	/*K0-K7*/	"","","","","","","","",
123	/*L0-L7*/	"","","","","","","","",
124	/*M0-M7*/	"","","","","","","","",
125	/*N0-N7*/	"","","","","","","","",
126	/*O0-O7*/	"led-rear-power","led-rear-id","","usb-power","","","","",
127	/*P0-P7*/	"","","","","","bmc-tpm-reset","","",
128	/*Q0-Q7*/	"cfam-reset","","","","","","","fsi-routing",
129	/*R0-R7*/	"","","","","","","","",
130	/*S0-S7*/	"","","","","","","","",
131	/*T0-T7*/	"","","","","","","","",
132	/*U0-U7*/	"","","","","","","","",
133	/*V0-V7*/	"","","","","","","","",
134	/*W0-W7*/	"","","","","","","","",
135	/*X0-X7*/	"","","","","","","","",
136	/*Y0-Y7*/	"","","","","","","","",
137	/*Z0-Z7*/	"","","","","","","","";
 
 
 
138};
139
140&fmc {
141	status = "okay";
142	flash@0 {
143		status = "okay";
144		m25p,fast-read;
145		label = "bmc";
146		spi-max-frequency = <50000000>;
147#include "openbmc-flash-layout-128.dtsi"
148	};
149
150	flash@1 {
151		status = "okay";
152		m25p,fast-read;
153		label = "alt-bmc";
154		spi-max-frequency = <50000000>;
155	};
156};
157
158&spi1 {
159	status = "okay";
160	pinctrl-names = "default";
161	pinctrl-0 = <&pinctrl_spi1_default>;
162
163	flash@0 {
164		status = "okay";
165		m25p,fast-read;
166		label = "pnor";
167		spi-max-frequency = <100000000>;
168	};
169};
170
171&mac2 {
172	status = "okay";
173	pinctrl-names = "default";
174	pinctrl-0 = <&pinctrl_rmii3_default>;
175	clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
176		 <&syscon ASPEED_CLK_MAC3RCLK>;
177	clock-names = "MACCLK", "RCLK";
178	use-ncsi;
179};
180
181&emmc_controller {
182	status = "okay";
183};
184
185&emmc {
186	status = "okay";
187	clk-phase-mmc-hs200 = <36>, <270>;
188};
189
190&fsim0 {
191	status = "okay";
192
193	#address-cells = <2>;
194	#size-cells = <0>;
195
196	fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>;
197	fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>;
 
198
199	cfam@0,0 {
200		reg = <0 0>;
201		#address-cells = <1>;
202		#size-cells = <1>;
203		chip-id = <0>;
204
205		scom@1000 {
206			compatible = "ibm,fsi2pib";
207			reg = <0x1000 0x400>;
208		};
209
210		i2c@1800 {
211			compatible = "ibm,fsi-i2c-master";
212			reg = <0x1800 0x400>;
213			#address-cells = <1>;
214			#size-cells = <0>;
215
216			cfam0_i2c0: i2c-bus@0 {
217				reg = <0>;
218			};
219
220			cfam0_i2c1: i2c-bus@1 {
221				reg = <1>;
222			};
223
224			cfam0_i2c2: i2c-bus@2 {
225				reg = <2>;
226			};
227
228			cfam0_i2c3: i2c-bus@3 {
229				reg = <3>;
230			};
231
232			cfam0_i2c4: i2c-bus@4 {
233				reg = <4>;
234			};
235
236			cfam0_i2c5: i2c-bus@5 {
237				reg = <5>;
238			};
239
240			cfam0_i2c6: i2c-bus@6 {
241				reg = <6>;
242			};
243
244			cfam0_i2c7: i2c-bus@7 {
245				reg = <7>;
246			};
247
248			cfam0_i2c8: i2c-bus@8 {
249				reg = <8>;
250			};
251
252			cfam0_i2c9: i2c-bus@9 {
253				reg = <9>;
254			};
255
256			cfam0_i2c10: i2c-bus@a {
257				reg = <10>;
258			};
259
260			cfam0_i2c11: i2c-bus@b {
261				reg = <11>;
262			};
263
264			cfam0_i2c12: i2c-bus@c {
265				reg = <12>;
266			};
267
268			cfam0_i2c13: i2c-bus@d {
269				reg = <13>;
270			};
271
272			cfam0_i2c14: i2c-bus@e {
273				reg = <14>;
274			};
275		};
276
277		sbefifo@2400 {
278			compatible = "ibm,p9-sbefifo";
279			reg = <0x2400 0x400>;
280			#address-cells = <1>;
281			#size-cells = <0>;
282
283			fsi_occ0: occ {
284				compatible = "ibm,p9-occ";
285			};
286		};
287
288		fsi_hub0: hub@3400 {
289			compatible = "fsi-master-hub";
290			reg = <0x3400 0x400>;
291			#address-cells = <2>;
292			#size-cells = <0>;
293
294			no-scan-on-init;
295		};
296	};
297};
298
299&fsi_hub0 {
300	cfam@1,0 {
301		reg = <1 0>;
302		#address-cells = <1>;
303		#size-cells = <1>;
304		chip-id = <1>;
305
306		scom@1000 {
307			compatible = "ibm,fsi2pib";
308			reg = <0x1000 0x400>;
309		};
310
311		i2c@1800 {
312			compatible = "ibm,fsi-i2c-master";
313			reg = <0x1800 0x400>;
314			#address-cells = <1>;
315			#size-cells = <0>;
316
317			cfam1_i2c0: i2c-bus@0 {
318				reg = <0>;
319			};
320
321			cfam1_i2c1: i2c-bus@1 {
322				reg = <1>;
323			};
324
325			cfam1_i2c2: i2c-bus@2 {
326				reg = <2>;
327			};
328
329			cfam1_i2c3: i2c-bus@3 {
330				reg = <3>;
331			};
332
333			cfam1_i2c4: i2c-bus@4 {
334				reg = <4>;
335			};
336
337			cfam1_i2c5: i2c-bus@5 {
338				reg = <5>;
339			};
340
341			cfam1_i2c6: i2c-bus@6 {
342				reg = <6>;
343			};
344
345			cfam1_i2c7: i2c-bus@7 {
346				reg = <7>;
347			};
348
349			cfam1_i2c8: i2c-bus@8 {
350				reg = <8>;
351			};
352
353			cfam1_i2c9: i2c-bus@9 {
354				reg = <9>;
355			};
356
357			cfam1_i2c10: i2c-bus@a {
358				reg = <10>;
359			};
360
361			cfam1_i2c11: i2c-bus@b {
362				reg = <11>;
363			};
364
365			cfam1_i2c12: i2c-bus@c {
366				reg = <12>;
367			};
368
369			cfam1_i2c13: i2c-bus@d {
370				reg = <13>;
371			};
372
373			cfam1_i2c14: i2c-bus@e {
374				reg = <14>;
375			};
376		};
377
378		sbefifo@2400 {
379			compatible = "ibm,p9-sbefifo";
380			reg = <0x2400 0x400>;
381			#address-cells = <1>;
382			#size-cells = <0>;
383
384			fsi_occ1: occ {
385				compatible = "ibm,p9-occ";
386			};
387		};
388
389		fsi_hub1: hub@3400 {
390			compatible = "fsi-master-hub";
391			reg = <0x3400 0x400>;
392			#address-cells = <2>;
393			#size-cells = <0>;
394
395			no-scan-on-init;
396		};
397	};
398};
399
400/* Legacy OCC numbering (to get rid of when userspace is fixed) */
401&fsi_occ0 {
402	reg = <1>;
403};
404
405&fsi_occ1 {
406	reg = <2>;
407};
408
409/ {
410	aliases {
411		i2c100 = &cfam0_i2c0;
412		i2c101 = &cfam0_i2c1;
413		i2c102 = &cfam0_i2c2;
414		i2c103 = &cfam0_i2c3;
415		i2c104 = &cfam0_i2c4;
416		i2c105 = &cfam0_i2c5;
417		i2c106 = &cfam0_i2c6;
418		i2c107 = &cfam0_i2c7;
419		i2c108 = &cfam0_i2c8;
420		i2c109 = &cfam0_i2c9;
421		i2c110 = &cfam0_i2c10;
422		i2c111 = &cfam0_i2c11;
423		i2c112 = &cfam0_i2c12;
424		i2c113 = &cfam0_i2c13;
425		i2c114 = &cfam0_i2c14;
426		i2c200 = &cfam1_i2c0;
427		i2c201 = &cfam1_i2c1;
428		i2c202 = &cfam1_i2c2;
429		i2c203 = &cfam1_i2c3;
430		i2c204 = &cfam1_i2c4;
431		i2c205 = &cfam1_i2c5;
432		i2c206 = &cfam1_i2c6;
433		i2c207 = &cfam1_i2c7;
434		i2c208 = &cfam1_i2c8;
435		i2c209 = &cfam1_i2c9;
436		i2c210 = &cfam1_i2c10;
437		i2c211 = &cfam1_i2c11;
438		i2c212 = &cfam1_i2c12;
439		i2c213 = &cfam1_i2c13;
440		i2c214 = &cfam1_i2c14;
441	};
442
443};
444
445&i2c0 {
446	multi-master;
447	status = "okay";
448
449	ibm-panel@62 {
450		compatible = "ibm,op-panel";
451		reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
452	};
453};
454
455&i2c1 {
456	status = "okay";
457
458	tpm: tpm@2e {
459		compatible = "tcg,tpm-tis-i2c";
460		reg = <0x2e>;
461	};
462};
463
464&i2c2 {
465	status = "okay";
466};
467
468&i2c3 {
469	status = "okay";
470
471	bmp: bmp280@77 {
472		compatible = "bosch,bmp280";
473		reg = <0x77>;
474		#io-channel-cells = <1>;
475	};
476
477	max31785@52 {
478		compatible = "maxim,max31785a";
479		reg = <0x52>;
480		#address-cells = <1>;
481		#size-cells = <0>;
482
483		fan@0 {
484			compatible = "pmbus-fan";
485			reg = <0>;
486			tach-pulses = <2>;
487			maxim,fan-rotor-input = "tach";
488			maxim,fan-pwm-freq = <25000>;
489			maxim,fan-dual-tach;
490			maxim,fan-no-watchdog;
491			maxim,fan-no-fault-ramp;
492			maxim,fan-ramp = <2>;
493			maxim,fan-fault-pin-mon;
494		};
495
496		fan@1 {
497			compatible = "pmbus-fan";
498			reg = <1>;
499			tach-pulses = <2>;
500			maxim,fan-rotor-input = "tach";
501			maxim,fan-pwm-freq = <25000>;
502			maxim,fan-dual-tach;
503			maxim,fan-no-watchdog;
504			maxim,fan-no-fault-ramp;
505			maxim,fan-ramp = <2>;
506			maxim,fan-fault-pin-mon;
507		};
508
509		fan@2 {
510			compatible = "pmbus-fan";
511			reg = <2>;
512			tach-pulses = <2>;
513			maxim,fan-rotor-input = "tach";
514			maxim,fan-pwm-freq = <25000>;
515			maxim,fan-dual-tach;
516			maxim,fan-no-watchdog;
517			maxim,fan-no-fault-ramp;
518			maxim,fan-ramp = <2>;
519			maxim,fan-fault-pin-mon;
520		};
521
522		fan@3 {
523			compatible = "pmbus-fan";
524			reg = <3>;
525			tach-pulses = <2>;
526			maxim,fan-rotor-input = "tach";
527			maxim,fan-pwm-freq = <25000>;
528			maxim,fan-dual-tach;
529			maxim,fan-no-watchdog;
530			maxim,fan-no-fault-ramp;
531			maxim,fan-ramp = <2>;
532			maxim,fan-fault-pin-mon;
533		};
534	};
535
536	dps: dps310@76 {
537		compatible = "infineon,dps310";
538		reg = <0x76>;
539		#io-channel-cells = <0>;
540	};
541
542	pca0: pca9552@60 {
543		compatible = "nxp,pca9552";
544		reg = <0x60>;
545		#address-cells = <1>;
546		#size-cells = <0>;
547
548		gpio-controller;
549		#gpio-cells = <2>;
550
551		gpio@0 {
552			reg = <0>;
553			type = <PCA955X_TYPE_GPIO>;
554		};
555
556		gpio@1 {
557			reg = <1>;
558			type = <PCA955X_TYPE_GPIO>;
559		};
560
561		gpio@2 {
562			reg = <2>;
563			type = <PCA955X_TYPE_GPIO>;
564		};
565
566		gpio@3 {
567			reg = <3>;
568			type = <PCA955X_TYPE_GPIO>;
569		};
570
571		gpio@4 {
572			reg = <4>;
573			type = <PCA955X_TYPE_GPIO>;
574		};
575
576		gpio@5 {
577			reg = <5>;
578			type = <PCA955X_TYPE_GPIO>;
579		};
580
581		gpio@6 {
582			reg = <6>;
583			type = <PCA955X_TYPE_GPIO>;
584		};
585
586		gpio@7 {
587			reg = <7>;
588			type = <PCA955X_TYPE_GPIO>;
589		};
590
591		gpio@8 {
592			reg = <8>;
593			type = <PCA955X_TYPE_GPIO>;
594		};
595
596		gpio@9 {
597			reg = <9>;
598			type = <PCA955X_TYPE_GPIO>;
599		};
600
601		gpio@10 {
602			reg = <10>;
603			type = <PCA955X_TYPE_GPIO>;
604		};
605
606		gpio@11 {
607			reg = <11>;
608			type = <PCA955X_TYPE_GPIO>;
609		};
610
611		gpio@12 {
612			reg = <12>;
613			type = <PCA955X_TYPE_GPIO>;
614		};
615
616		gpio@13 {
617			reg = <13>;
618			type = <PCA955X_TYPE_GPIO>;
619		};
620
621		gpio@14 {
622			reg = <14>;
623			type = <PCA955X_TYPE_GPIO>;
624		};
625
626		gpio@15 {
627			reg = <15>;
628			type = <PCA955X_TYPE_GPIO>;
629		};
630	};
631
632	power-supply@68 {
633		compatible = "ibm,cffps1";
634		reg = <0x68>;
635	};
636
637	power-supply@69 {
638		compatible = "ibm,cffps1";
639		reg = <0x69>;
640	};
641};
642
643&i2c4 {
644	status = "okay";
645
646	tmp423a@4c {
647		compatible = "ti,tmp423";
648		reg = <0x4c>;
649	};
650
651	ir35221@70 {
652		compatible = "infineon,ir35221";
653		reg = <0x70>;
654	};
655
656	ir35221@71 {
657		compatible = "infineon,ir35221";
658		reg = <0x71>;
659	};
660};
661
662&i2c5 {
663	status = "okay";
664
665	tmp423a@4c {
666		compatible = "ti,tmp423";
667		reg = <0x4c>;
668	};
669
670	ir35221@70 {
671		compatible = "infineon,ir35221";
672		reg = <0x70>;
673	};
674
675	ir35221@71 {
676		compatible = "infineon,ir35221";
677		reg = <0x71>;
678	};
679};
680
681&i2c7 {
682	status = "okay";
683};
684
685&i2c9 {
686	status = "okay";
687
688	tmp275@4a {
689		compatible = "ti,tmp275";
690		reg = <0x4a>;
691	};
692};
693
694&i2c10 {
695	status = "okay";
696};
697
698&i2c11 {
699	status = "okay";
700
701	pca9552: pca9552@60 {
702		compatible = "nxp,pca9552";
703		reg = <0x60>;
704		#address-cells = <1>;
705		#size-cells = <0>;
706		gpio-controller;
707		#gpio-cells = <2>;
708
709		gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
710			"GPU0_TH_OVERT_N_BUFF",	"GPU1_TH_OVERT_N_BUFF",
711			"GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
712			"GPU4_TH_OVERT_N_BUFF",	"GPU5_TH_OVERT_N_BUFF",
713			"GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
714			"GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
715			"GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF",
716			"12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
717
718		gpio@0 {
719			reg = <0>;
720			type = <PCA955X_TYPE_GPIO>;
721		};
722
723		gpio@1 {
724			reg = <1>;
725			type = <PCA955X_TYPE_GPIO>;
726		};
727
728		gpio@2 {
729			reg = <2>;
730			type = <PCA955X_TYPE_GPIO>;
731		};
732
733		gpio@3 {
734			reg = <3>;
735			type = <PCA955X_TYPE_GPIO>;
736		};
737
738		gpio@4 {
739			reg = <4>;
740			type = <PCA955X_TYPE_GPIO>;
741		};
742
743		gpio@5 {
744			reg = <5>;
745			type = <PCA955X_TYPE_GPIO>;
746		};
747
748		gpio@6 {
749			reg = <6>;
750			type = <PCA955X_TYPE_GPIO>;
751		};
752
753		gpio@7 {
754			reg = <7>;
755			type = <PCA955X_TYPE_GPIO>;
756		};
757
758		gpio@8 {
759			reg = <8>;
760			type = <PCA955X_TYPE_GPIO>;
761		};
762
763		gpio@9 {
764			reg = <9>;
765			type = <PCA955X_TYPE_GPIO>;
766		};
767
768		gpio@10 {
769			reg = <10>;
770			type = <PCA955X_TYPE_GPIO>;
771		};
772
773		gpio@11 {
774			reg = <11>;
775			type = <PCA955X_TYPE_GPIO>;
776		};
777
778		gpio@12 {
779			reg = <12>;
780			type = <PCA955X_TYPE_GPIO>;
781		};
782
783		gpio@13 {
784			reg = <13>;
785			type = <PCA955X_TYPE_GPIO>;
786		};
787
788		gpio@14 {
789			reg = <14>;
790			type = <PCA955X_TYPE_GPIO>;
791		};
792
793		gpio@15 {
794			reg = <15>;
795			type = <PCA955X_TYPE_GPIO>;
796		};
797	};
798
799	rtc@32 {
800		compatible = "epson,rx8900";
801		reg = <0x32>;
802	};
803
804	eeprom@51 {
805		compatible = "atmel,24c64";
806		reg = <0x51>;
807	};
808
809	ucd90160@64 {
810		compatible = "ti,ucd90160";
811		reg = <0x64>;
812	};
813};
814
815&i2c12 {
816	status = "okay";
817};
818
819&i2c13 {
820	status = "okay";
821};
822
823&ibt {
824	status = "okay";
825};
826
827&uart1 {
828	status = "okay";
829	// Workaround for A0
830	compatible = "snps,dw-apb-uart";
831};
832
833&uart5 {
834	// Workaround for A0
835	compatible = "snps,dw-apb-uart";
836};
837
838&vuart1 {
839	status = "okay";
840};
841
842&vuart2 {
843	status = "okay";
844};
845
846&lpc_ctrl {
847	status = "okay";
848	memory-region = <&flash_memory>;
849	flash = <&spi1>;
850};
851
852&wdt1 {
853	aspeed,reset-type = "none";
854	aspeed,external-signal;
855	aspeed,ext-push-pull;
856	aspeed,ext-active-high;
857
858	pinctrl-names = "default";
859	pinctrl-0 = <&pinctrl_wdtrst1_default>;
860};
861
862&wdt2 {
863	status = "okay";
864};
865
866&pinctrl {
867	/* Hog these as no driver is probed for the entire LPC block */
868	pinctrl-names = "default";
869	pinctrl-0 = <&pinctrl_lpc_default>,
870		    <&pinctrl_lsirq_default>;
871};
872
873&xdma {
874	status = "okay";
875	memory-region = <&vga_memory>;
876};
877
878&kcs2 {
879	status = "okay";
880	aspeed,lpc-io-reg = <0xca8 0xcac>;
881};
882
883&kcs3 {
884	status = "okay";
885	aspeed,lpc-io-reg = <0xca2>;
886	aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
887};
v5.9
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2// Copyright 2019 IBM Corp.
  3/dts-v1/;
  4
  5#include "aspeed-g6.dtsi"
  6#include <dt-bindings/gpio/aspeed-gpio.h>
 
  7#include <dt-bindings/leds/leds-pca955x.h>
  8
  9/ {
 10	model = "Tacoma";
 11	compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
 12
 13	chosen {
 14		stdout-path = &uart5;
 15		bootargs = "console=ttyS4,115200n8";
 16	};
 17
 18	memory@80000000 {
 19		device_type = "memory";
 20		reg = <0x80000000 0x40000000>;
 21	};
 22
 23	reserved-memory {
 24		#address-cells = <1>;
 25		#size-cells = <1>;
 26		ranges;
 27
 28		flash_memory: region@ba000000 {
 29			no-map;
 30			reg = <0xb8000000 0x4000000>; /* 64M */
 31		};
 32
 
 
 
 
 
 
 
 
 
 33		vga_memory: region@bf000000 {
 34			no-map;
 35			compatible = "shared-dma-pool";
 36			reg = <0xbf000000 0x01000000>;	/* 16M */
 37		};
 38	};
 39
 40	gpio-keys {
 41		compatible = "gpio-keys";
 42
 43		ps0-presence {
 44			label = "ps0-presence";
 45			gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
 46			linux,code = <ASPEED_GPIO(H, 3)>;
 47		};
 48
 49		ps1-presence {
 50			label = "ps1-presence";
 51			gpios = <&gpio0 ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>;
 52			linux,code = <ASPEED_GPIO(E, 5)>;
 53		};
 54	};
 55
 56	gpio-keys-polled {
 57		compatible = "gpio-keys-polled";
 58		#address-cells = <1>;
 59		#size-cells = <0>;
 60		poll-interval = <1000>;
 61
 62		fan0-presence {
 63			label = "fan0-presence";
 64			gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
 65			linux,code = <4>;
 66		};
 67
 68		fan1-presence {
 69			label = "fan1-presence";
 70			gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
 71			linux,code = <5>;
 72		};
 73
 74		fan2-presence {
 75			label = "fan2-presence";
 76			gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
 77			linux,code = <6>;
 78		};
 79
 80		fan3-presence {
 81			label = "fan3-presence";
 82			gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
 83			linux,code = <7>;
 84		};
 85	};
 86
 87	iio-hwmon-dps310 {
 88		compatible = "iio-hwmon";
 89		io-channels = <&dps 0>;
 90	};
 91
 92	iio-hwmon-bmp280 {
 93		compatible = "iio-hwmon";
 94		io-channels = <&bmp 1>;
 95	};
 96};
 97
 98&ehci1 {
 99	status = "okay";
100};
101
102&gpio0 {
103	gpio-line-names =
104	/*A0-A7*/	"","","","","","","","",
105	/*B0-B7*/	"fsi-mux","","","","","","","",
106	/*C0-C7*/	"","","","","","","","",
107	/*D0-D7*/	"","","","","","","","",
108	/*E0-E7*/	"power-button","","","checkstop","","presence-ps1","","led-rear-fault",
109	/*F0-F7*/	"","","","","","","","",
110	/*G0-G7*/	"","","","","","","","",
111	/*H0-H7*/	"","","","presence-ps0","","","","",
112	/*I0-I7*/	"","","","","","","","",
113	/*J0-J7*/	"","","","","","","","",
114	/*K0-K7*/	"","","","","","","","",
115	/*L0-L7*/	"","","","","","","","",
116	/*M0-M7*/	"","","","","","","","",
117	/*N0-N7*/	"","","","","","","","",
118	/*O0-O7*/	"led-rear-power","led-rear-id","","usb-power","","","","",
119	/*P0-P7*/	"","","","","","","","",
120	/*Q0-Q7*/	"cfam-reset","","","","","","","fsi-routing",
121	/*R0-R7*/	"","","","","","","","",
122	/*S0-S7*/	"","","","","","","","",
123	/*T0-T7*/	"","","","","","","","",
124	/*U0-U7*/	"","","","","","","","",
125	/*V0-V7*/	"","","","","","","","",
126	/*W0-W7*/	"","","","","","","","",
127	/*X0-X7*/	"","","","","","","","",
128	/*Y0-Y7*/	"","","","","","","","",
129	/*Z0-Z7*/	"","","","","","","","",
130	/*AA0-AA7*/	"","","","","","","","",
131	/*AB0-AB7*/	"","","","","","","","",
132	/*AC0-AC7*/	"","","","","","","","";
133};
134
135&fmc {
136	status = "okay";
137	flash@0 {
138		status = "okay";
139		m25p,fast-read;
140		label = "bmc";
141		spi-max-frequency = <50000000>;
142#include "openbmc-flash-layout-128.dtsi"
143	};
144
145	flash@1 {
146		status = "okay";
147		m25p,fast-read;
148		label = "alt-bmc";
149		spi-max-frequency = <50000000>;
150	};
151};
152
153&spi1 {
154	status = "okay";
155	pinctrl-names = "default";
156	pinctrl-0 = <&pinctrl_spi1_default>;
157
158	flash@0 {
159		status = "okay";
160		m25p,fast-read;
161		label = "pnor";
162		spi-max-frequency = <100000000>;
163	};
164};
165
166&mac2 {
167	status = "okay";
168	pinctrl-names = "default";
169	pinctrl-0 = <&pinctrl_rmii3_default>;
170	clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
171		 <&syscon ASPEED_CLK_MAC3RCLK>;
172	clock-names = "MACCLK", "RCLK";
173	use-ncsi;
174};
175
176&emmc_controller {
177	status = "okay";
178};
179
180&emmc {
181	status = "okay";
 
182};
183
184&fsim0 {
185	status = "okay";
186
187	#address-cells = <2>;
188	#size-cells = <0>;
189
190	fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>;
191	fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>;
192	cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
193
194	cfam@0,0 {
195		reg = <0 0>;
196		#address-cells = <1>;
197		#size-cells = <1>;
198		chip-id = <0>;
199
200		scom@1000 {
201			compatible = "ibm,fsi2pib";
202			reg = <0x1000 0x400>;
203		};
204
205		i2c@1800 {
206			compatible = "ibm,fsi-i2c-master";
207			reg = <0x1800 0x400>;
208			#address-cells = <1>;
209			#size-cells = <0>;
210
211			cfam0_i2c0: i2c-bus@0 {
212				reg = <0>;
213			};
214
215			cfam0_i2c1: i2c-bus@1 {
216				reg = <1>;
217			};
218
219			cfam0_i2c2: i2c-bus@2 {
220				reg = <2>;
221			};
222
223			cfam0_i2c3: i2c-bus@3 {
224				reg = <3>;
225			};
226
227			cfam0_i2c4: i2c-bus@4 {
228				reg = <4>;
229			};
230
231			cfam0_i2c5: i2c-bus@5 {
232				reg = <5>;
233			};
234
235			cfam0_i2c6: i2c-bus@6 {
236				reg = <6>;
237			};
238
239			cfam0_i2c7: i2c-bus@7 {
240				reg = <7>;
241			};
242
243			cfam0_i2c8: i2c-bus@8 {
244				reg = <8>;
245			};
246
247			cfam0_i2c9: i2c-bus@9 {
248				reg = <9>;
249			};
250
251			cfam0_i2c10: i2c-bus@a {
252				reg = <10>;
253			};
254
255			cfam0_i2c11: i2c-bus@b {
256				reg = <11>;
257			};
258
259			cfam0_i2c12: i2c-bus@c {
260				reg = <12>;
261			};
262
263			cfam0_i2c13: i2c-bus@d {
264				reg = <13>;
265			};
266
267			cfam0_i2c14: i2c-bus@e {
268				reg = <14>;
269			};
270		};
271
272		sbefifo@2400 {
273			compatible = "ibm,p9-sbefifo";
274			reg = <0x2400 0x400>;
275			#address-cells = <1>;
276			#size-cells = <0>;
277
278			fsi_occ0: occ {
279				compatible = "ibm,p9-occ";
280			};
281		};
282
283		fsi_hub0: hub@3400 {
284			compatible = "fsi-master-hub";
285			reg = <0x3400 0x400>;
286			#address-cells = <2>;
287			#size-cells = <0>;
288
289			no-scan-on-init;
290		};
291	};
292};
293
294&fsi_hub0 {
295	cfam@1,0 {
296		reg = <1 0>;
297		#address-cells = <1>;
298		#size-cells = <1>;
299		chip-id = <1>;
300
301		scom@1000 {
302			compatible = "ibm,fsi2pib";
303			reg = <0x1000 0x400>;
304		};
305
306		i2c@1800 {
307			compatible = "ibm,fsi-i2c-master";
308			reg = <0x1800 0x400>;
309			#address-cells = <1>;
310			#size-cells = <0>;
311
312			cfam1_i2c0: i2c-bus@0 {
313				reg = <0>;
314			};
315
316			cfam1_i2c1: i2c-bus@1 {
317				reg = <1>;
318			};
319
320			cfam1_i2c2: i2c-bus@2 {
321				reg = <2>;
322			};
323
324			cfam1_i2c3: i2c-bus@3 {
325				reg = <3>;
326			};
327
328			cfam1_i2c4: i2c-bus@4 {
329				reg = <4>;
330			};
331
332			cfam1_i2c5: i2c-bus@5 {
333				reg = <5>;
334			};
335
336			cfam1_i2c6: i2c-bus@6 {
337				reg = <6>;
338			};
339
340			cfam1_i2c7: i2c-bus@7 {
341				reg = <7>;
342			};
343
344			cfam1_i2c8: i2c-bus@8 {
345				reg = <8>;
346			};
347
348			cfam1_i2c9: i2c-bus@9 {
349				reg = <9>;
350			};
351
352			cfam1_i2c10: i2c-bus@a {
353				reg = <10>;
354			};
355
356			cfam1_i2c11: i2c-bus@b {
357				reg = <11>;
358			};
359
360			cfam1_i2c12: i2c-bus@c {
361				reg = <12>;
362			};
363
364			cfam1_i2c13: i2c-bus@d {
365				reg = <13>;
366			};
367
368			cfam1_i2c14: i2c-bus@e {
369				reg = <14>;
370			};
371		};
372
373		sbefifo@2400 {
374			compatible = "ibm,p9-sbefifo";
375			reg = <0x2400 0x400>;
376			#address-cells = <1>;
377			#size-cells = <0>;
378
379			fsi_occ1: occ {
380				compatible = "ibm,p9-occ";
381			};
382		};
383
384		fsi_hub1: hub@3400 {
385			compatible = "fsi-master-hub";
386			reg = <0x3400 0x400>;
387			#address-cells = <2>;
388			#size-cells = <0>;
389
390			no-scan-on-init;
391		};
392	};
393};
394
395/* Legacy OCC numbering (to get rid of when userspace is fixed) */
396&fsi_occ0 {
397	reg = <1>;
398};
399
400&fsi_occ1 {
401	reg = <2>;
402};
403
404/ {
405	aliases {
406		i2c100 = &cfam0_i2c0;
407		i2c101 = &cfam0_i2c1;
408		i2c102 = &cfam0_i2c2;
409		i2c103 = &cfam0_i2c3;
410		i2c104 = &cfam0_i2c4;
411		i2c105 = &cfam0_i2c5;
412		i2c106 = &cfam0_i2c6;
413		i2c107 = &cfam0_i2c7;
414		i2c108 = &cfam0_i2c8;
415		i2c109 = &cfam0_i2c9;
416		i2c110 = &cfam0_i2c10;
417		i2c111 = &cfam0_i2c11;
418		i2c112 = &cfam0_i2c12;
419		i2c113 = &cfam0_i2c13;
420		i2c114 = &cfam0_i2c14;
421		i2c200 = &cfam1_i2c0;
422		i2c201 = &cfam1_i2c1;
423		i2c202 = &cfam1_i2c2;
424		i2c203 = &cfam1_i2c3;
425		i2c204 = &cfam1_i2c4;
426		i2c205 = &cfam1_i2c5;
427		i2c206 = &cfam1_i2c6;
428		i2c207 = &cfam1_i2c7;
429		i2c208 = &cfam1_i2c8;
430		i2c209 = &cfam1_i2c9;
431		i2c210 = &cfam1_i2c10;
432		i2c211 = &cfam1_i2c11;
433		i2c212 = &cfam1_i2c12;
434		i2c213 = &cfam1_i2c13;
435		i2c214 = &cfam1_i2c14;
436	};
437
438};
439
440&i2c0 {
 
441	status = "okay";
 
 
 
 
 
442};
443
444&i2c1 {
445	status = "okay";
446
447	tpm: tpm@2e {
448		compatible = "tcg,tpm-tis-i2c";
449		reg = <0x2e>;
450	};
451};
452
453&i2c2 {
454	status = "okay";
455};
456
457&i2c3 {
458	status = "okay";
459
460	bmp: bmp280@77 {
461		compatible = "bosch,bmp280";
462		reg = <0x77>;
463		#io-channel-cells = <1>;
464	};
465
466	max31785@52 {
467		compatible = "maxim,max31785a";
468		reg = <0x52>;
469		#address-cells = <1>;
470		#size-cells = <0>;
471
472		fan@0 {
473			compatible = "pmbus-fan";
474			reg = <0>;
475			tach-pulses = <2>;
476			maxim,fan-rotor-input = "tach";
477			maxim,fan-pwm-freq = <25000>;
478			maxim,fan-dual-tach;
479			maxim,fan-no-watchdog;
480			maxim,fan-no-fault-ramp;
481			maxim,fan-ramp = <2>;
482			maxim,fan-fault-pin-mon;
483		};
484
485		fan@1 {
486			compatible = "pmbus-fan";
487			reg = <1>;
488			tach-pulses = <2>;
489			maxim,fan-rotor-input = "tach";
490			maxim,fan-pwm-freq = <25000>;
491			maxim,fan-dual-tach;
492			maxim,fan-no-watchdog;
493			maxim,fan-no-fault-ramp;
494			maxim,fan-ramp = <2>;
495			maxim,fan-fault-pin-mon;
496		};
497
498		fan@2 {
499			compatible = "pmbus-fan";
500			reg = <2>;
501			tach-pulses = <2>;
502			maxim,fan-rotor-input = "tach";
503			maxim,fan-pwm-freq = <25000>;
504			maxim,fan-dual-tach;
505			maxim,fan-no-watchdog;
506			maxim,fan-no-fault-ramp;
507			maxim,fan-ramp = <2>;
508			maxim,fan-fault-pin-mon;
509		};
510
511		fan@3 {
512			compatible = "pmbus-fan";
513			reg = <3>;
514			tach-pulses = <2>;
515			maxim,fan-rotor-input = "tach";
516			maxim,fan-pwm-freq = <25000>;
517			maxim,fan-dual-tach;
518			maxim,fan-no-watchdog;
519			maxim,fan-no-fault-ramp;
520			maxim,fan-ramp = <2>;
521			maxim,fan-fault-pin-mon;
522		};
523	};
524
525	dps: dps310@76 {
526		compatible = "infineon,dps310";
527		reg = <0x76>;
528		#io-channel-cells = <0>;
529	};
530
531	pca0: pca9552@60 {
532		compatible = "nxp,pca9552";
533		reg = <0x60>;
534		#address-cells = <1>;
535		#size-cells = <0>;
536
537		gpio-controller;
538		#gpio-cells = <2>;
539
540		gpio@0 {
541			reg = <0>;
542			type = <PCA955X_TYPE_GPIO>;
543		};
544
545		gpio@1 {
546			reg = <1>;
547			type = <PCA955X_TYPE_GPIO>;
548		};
549
550		gpio@2 {
551			reg = <2>;
552			type = <PCA955X_TYPE_GPIO>;
553		};
554
555		gpio@3 {
556			reg = <3>;
557			type = <PCA955X_TYPE_GPIO>;
558		};
559
560		gpio@4 {
561			reg = <4>;
562			type = <PCA955X_TYPE_GPIO>;
563		};
564
565		gpio@5 {
566			reg = <5>;
567			type = <PCA955X_TYPE_GPIO>;
568		};
569
570		gpio@6 {
571			reg = <6>;
572			type = <PCA955X_TYPE_GPIO>;
573		};
574
575		gpio@7 {
576			reg = <7>;
577			type = <PCA955X_TYPE_GPIO>;
578		};
579
580		gpio@8 {
581			reg = <8>;
582			type = <PCA955X_TYPE_GPIO>;
583		};
584
585		gpio@9 {
586			reg = <9>;
587			type = <PCA955X_TYPE_GPIO>;
588		};
589
590		gpio@10 {
591			reg = <10>;
592			type = <PCA955X_TYPE_GPIO>;
593		};
594
595		gpio@11 {
596			reg = <11>;
597			type = <PCA955X_TYPE_GPIO>;
598		};
599
600		gpio@12 {
601			reg = <12>;
602			type = <PCA955X_TYPE_GPIO>;
603		};
604
605		gpio@13 {
606			reg = <13>;
607			type = <PCA955X_TYPE_GPIO>;
608		};
609
610		gpio@14 {
611			reg = <14>;
612			type = <PCA955X_TYPE_GPIO>;
613		};
614
615		gpio@15 {
616			reg = <15>;
617			type = <PCA955X_TYPE_GPIO>;
618		};
619	};
620
621	power-supply@68 {
622		compatible = "ibm,cffps1";
623		reg = <0x68>;
624	};
625
626	power-supply@69 {
627		compatible = "ibm,cffps1";
628		reg = <0x69>;
629	};
630};
631
632&i2c4 {
633	status = "okay";
634
635	tmp423a@4c {
636		compatible = "ti,tmp423";
637		reg = <0x4c>;
638	};
639
640	ir35221@70 {
641		compatible = "infineon,ir35221";
642		reg = <0x70>;
643	};
644
645	ir35221@71 {
646		compatible = "infineon,ir35221";
647		reg = <0x71>;
648	};
649};
650
651&i2c5 {
652	status = "okay";
653
654	tmp423a@4c {
655		compatible = "ti,tmp423";
656		reg = <0x4c>;
657	};
658
659	ir35221@70 {
660		compatible = "infineon,ir35221";
661		reg = <0x70>;
662	};
663
664	ir35221@71 {
665		compatible = "infineon,ir35221";
666		reg = <0x71>;
667	};
668};
669
670&i2c7 {
671	status = "okay";
672};
673
674&i2c9 {
675	status = "okay";
676
677	tmp275@4a {
678		compatible = "ti,tmp275";
679		reg = <0x4a>;
680	};
681};
682
683&i2c10 {
684	status = "okay";
685};
686
687&i2c11 {
688	status = "okay";
689
690	pca9552: pca9552@60 {
691		compatible = "nxp,pca9552";
692		reg = <0x60>;
693		#address-cells = <1>;
694		#size-cells = <0>;
695		gpio-controller;
696		#gpio-cells = <2>;
697
698		gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
699			"GPU0_TH_OVERT_N_BUFF",	"GPU1_TH_OVERT_N_BUFF",
700			"GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
701			"GPU4_TH_OVERT_N_BUFF",	"GPU5_TH_OVERT_N_BUFF",
702			"GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
703			"GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
704			"GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF",
705			"12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
706
707		gpio@0 {
708			reg = <0>;
709			type = <PCA955X_TYPE_GPIO>;
710		};
711
712		gpio@1 {
713			reg = <1>;
714			type = <PCA955X_TYPE_GPIO>;
715		};
716
717		gpio@2 {
718			reg = <2>;
719			type = <PCA955X_TYPE_GPIO>;
720		};
721
722		gpio@3 {
723			reg = <3>;
724			type = <PCA955X_TYPE_GPIO>;
725		};
726
727		gpio@4 {
728			reg = <4>;
729			type = <PCA955X_TYPE_GPIO>;
730		};
731
732		gpio@5 {
733			reg = <5>;
734			type = <PCA955X_TYPE_GPIO>;
735		};
736
737		gpio@6 {
738			reg = <6>;
739			type = <PCA955X_TYPE_GPIO>;
740		};
741
742		gpio@7 {
743			reg = <7>;
744			type = <PCA955X_TYPE_GPIO>;
745		};
746
747		gpio@8 {
748			reg = <8>;
749			type = <PCA955X_TYPE_GPIO>;
750		};
751
752		gpio@9 {
753			reg = <9>;
754			type = <PCA955X_TYPE_GPIO>;
755		};
756
757		gpio@10 {
758			reg = <10>;
759			type = <PCA955X_TYPE_GPIO>;
760		};
761
762		gpio@11 {
763			reg = <11>;
764			type = <PCA955X_TYPE_GPIO>;
765		};
766
767		gpio@12 {
768			reg = <12>;
769			type = <PCA955X_TYPE_GPIO>;
770		};
771
772		gpio@13 {
773			reg = <13>;
774			type = <PCA955X_TYPE_GPIO>;
775		};
776
777		gpio@14 {
778			reg = <14>;
779			type = <PCA955X_TYPE_GPIO>;
780		};
781
782		gpio@15 {
783			reg = <15>;
784			type = <PCA955X_TYPE_GPIO>;
785		};
786	};
787
788	rtc@32 {
789		compatible = "epson,rx8900";
790		reg = <0x32>;
791	};
792
793	eeprom@51 {
794		compatible = "atmel,24c64";
795		reg = <0x51>;
796	};
797
798	ucd90160@64 {
799		compatible = "ti,ucd90160";
800		reg = <0x64>;
801	};
802};
803
804&i2c12 {
805	status = "okay";
806};
807
808&i2c13 {
809	status = "okay";
810};
811
812&ibt {
813	status = "okay";
814};
815
816&uart1 {
817	status = "okay";
818	// Workaround for A0
819	compatible = "snps,dw-apb-uart";
820};
821
822&uart5 {
823	// Workaround for A0
824	compatible = "snps,dw-apb-uart";
825};
826
827&vuart1 {
828	status = "okay";
829};
830
831&vuart2 {
832	status = "okay";
833};
834
835&lpc_ctrl {
836	status = "okay";
837	memory-region = <&flash_memory>;
838	flash = <&spi1>;
839};
840
841&wdt1 {
842	aspeed,reset-type = "none";
843	aspeed,external-signal;
844	aspeed,ext-push-pull;
845	aspeed,ext-active-high;
846
847	pinctrl-names = "default";
848	pinctrl-0 = <&pinctrl_wdtrst1_default>;
849};
850
851&wdt2 {
852	status = "okay";
853};
854
855&pinctrl {
856	/* Hog these as no driver is probed for the entire LPC block */
857	pinctrl-names = "default";
858	pinctrl-0 = <&pinctrl_lpc_default>,
859		    <&pinctrl_lsirq_default>;
860};
861
862&xdma {
863	status = "okay";
864	memory-region = <&vga_memory>;
 
 
 
 
 
 
 
 
 
 
 
865};