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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * drivers/pwm/pwm-pxa.c
4 *
5 * simple driver for PWM (Pulse Width Modulator) controller
6 *
7 * 2008-02-13 initial version
8 * eric miao <eric.miao@marvell.com>
9 *
10 * Links to reference manuals for some of the supported PWM chips can be found
11 * in Documentation/arm/marvell.rst.
12 *
13 * Limitations:
14 * - When PWM is stopped, the current PWM period stops abruptly at the next
15 * input clock (PWMCR_SD is set) and the output is driven to inactive.
16 */
17
18#include <linux/module.h>
19#include <linux/kernel.h>
20#include <linux/platform_device.h>
21#include <linux/slab.h>
22#include <linux/err.h>
23#include <linux/clk.h>
24#include <linux/io.h>
25#include <linux/pwm.h>
26#include <linux/of_device.h>
27
28#include <asm/div64.h>
29
30#define HAS_SECONDARY_PWM 0x10
31
32static const struct platform_device_id pwm_id_table[] = {
33 /* PWM has_secondary_pwm? */
34 { "pxa25x-pwm", 0 },
35 { "pxa27x-pwm", HAS_SECONDARY_PWM },
36 { "pxa168-pwm", 0 },
37 { "pxa910-pwm", 0 },
38 { },
39};
40MODULE_DEVICE_TABLE(platform, pwm_id_table);
41
42/* PWM registers and bits definitions */
43#define PWMCR (0x00)
44#define PWMDCR (0x04)
45#define PWMPCR (0x08)
46
47#define PWMCR_SD (1 << 6)
48#define PWMDCR_FD (1 << 10)
49
50struct pxa_pwm_chip {
51 struct pwm_chip chip;
52 struct device *dev;
53
54 struct clk *clk;
55 void __iomem *mmio_base;
56};
57
58static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
59{
60 return container_of(chip, struct pxa_pwm_chip, chip);
61}
62
63/*
64 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
65 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
66 */
67static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
68 u64 duty_ns, u64 period_ns)
69{
70 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
71 unsigned long long c;
72 unsigned long period_cycles, prescale, pv, dc;
73 unsigned long offset;
74
75 offset = pwm->hwpwm ? 0x10 : 0;
76
77 c = clk_get_rate(pc->clk);
78 c = c * period_ns;
79 do_div(c, 1000000000);
80 period_cycles = c;
81
82 if (period_cycles < 1)
83 period_cycles = 1;
84 prescale = (period_cycles - 1) / 1024;
85 pv = period_cycles / (prescale + 1) - 1;
86
87 if (prescale > 63)
88 return -EINVAL;
89
90 if (duty_ns == period_ns)
91 dc = PWMDCR_FD;
92 else
93 dc = mul_u64_u64_div_u64(pv + 1, duty_ns, period_ns);
94
95 writel(prescale | PWMCR_SD, pc->mmio_base + offset + PWMCR);
96 writel(dc, pc->mmio_base + offset + PWMDCR);
97 writel(pv, pc->mmio_base + offset + PWMPCR);
98
99 return 0;
100}
101
102static int pxa_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
103 const struct pwm_state *state)
104{
105 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
106 u64 duty_cycle;
107 int err;
108
109 if (state->polarity != PWM_POLARITY_NORMAL)
110 return -EINVAL;
111
112 err = clk_prepare_enable(pc->clk);
113 if (err)
114 return err;
115
116 duty_cycle = state->enabled ? state->duty_cycle : 0;
117
118 err = pxa_pwm_config(chip, pwm, duty_cycle, state->period);
119 if (err) {
120 clk_disable_unprepare(pc->clk);
121 return err;
122 }
123
124 if (state->enabled && !pwm->state.enabled)
125 return 0;
126
127 clk_disable_unprepare(pc->clk);
128
129 if (!state->enabled && pwm->state.enabled)
130 clk_disable_unprepare(pc->clk);
131
132 return 0;
133}
134
135static const struct pwm_ops pxa_pwm_ops = {
136 .apply = pxa_pwm_apply,
137 .owner = THIS_MODULE,
138};
139
140#ifdef CONFIG_OF
141/*
142 * Device tree users must create one device instance for each PWM channel.
143 * Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver
144 * code that this is a single channel pxa25x-pwm. Currently all devices are
145 * supported identically.
146 */
147static const struct of_device_id pwm_of_match[] = {
148 { .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
149 { .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
150 { .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
151 { .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
152 { }
153};
154MODULE_DEVICE_TABLE(of, pwm_of_match);
155#else
156#define pwm_of_match NULL
157#endif
158
159static const struct platform_device_id *pxa_pwm_get_id_dt(struct device *dev)
160{
161 const struct of_device_id *id = of_match_device(pwm_of_match, dev);
162
163 return id ? id->data : NULL;
164}
165
166static int pwm_probe(struct platform_device *pdev)
167{
168 const struct platform_device_id *id = platform_get_device_id(pdev);
169 struct pxa_pwm_chip *pc;
170 int ret = 0;
171
172 if (IS_ENABLED(CONFIG_OF) && id == NULL)
173 id = pxa_pwm_get_id_dt(&pdev->dev);
174
175 if (id == NULL)
176 return -EINVAL;
177
178 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
179 if (pc == NULL)
180 return -ENOMEM;
181
182 pc->clk = devm_clk_get(&pdev->dev, NULL);
183 if (IS_ERR(pc->clk))
184 return PTR_ERR(pc->clk);
185
186 pc->chip.dev = &pdev->dev;
187 pc->chip.ops = &pxa_pwm_ops;
188 pc->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
189
190 if (IS_ENABLED(CONFIG_OF)) {
191 pc->chip.of_xlate = of_pwm_single_xlate;
192 pc->chip.of_pwm_n_cells = 1;
193 }
194
195 pc->mmio_base = devm_platform_ioremap_resource(pdev, 0);
196 if (IS_ERR(pc->mmio_base))
197 return PTR_ERR(pc->mmio_base);
198
199 ret = devm_pwmchip_add(&pdev->dev, &pc->chip);
200 if (ret < 0) {
201 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
202 return ret;
203 }
204
205 return 0;
206}
207
208static struct platform_driver pwm_driver = {
209 .driver = {
210 .name = "pxa25x-pwm",
211 .of_match_table = pwm_of_match,
212 },
213 .probe = pwm_probe,
214 .id_table = pwm_id_table,
215};
216
217module_platform_driver(pwm_driver);
218
219MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * drivers/pwm/pwm-pxa.c
4 *
5 * simple driver for PWM (Pulse Width Modulator) controller
6 *
7 * 2008-02-13 initial version
8 * eric miao <eric.miao@marvell.com>
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/slab.h>
15#include <linux/err.h>
16#include <linux/clk.h>
17#include <linux/io.h>
18#include <linux/pwm.h>
19#include <linux/of_device.h>
20
21#include <asm/div64.h>
22
23#define HAS_SECONDARY_PWM 0x10
24
25static const struct platform_device_id pwm_id_table[] = {
26 /* PWM has_secondary_pwm? */
27 { "pxa25x-pwm", 0 },
28 { "pxa27x-pwm", HAS_SECONDARY_PWM },
29 { "pxa168-pwm", 0 },
30 { "pxa910-pwm", 0 },
31 { },
32};
33MODULE_DEVICE_TABLE(platform, pwm_id_table);
34
35/* PWM registers and bits definitions */
36#define PWMCR (0x00)
37#define PWMDCR (0x04)
38#define PWMPCR (0x08)
39
40#define PWMCR_SD (1 << 6)
41#define PWMDCR_FD (1 << 10)
42
43struct pxa_pwm_chip {
44 struct pwm_chip chip;
45 struct device *dev;
46
47 struct clk *clk;
48 void __iomem *mmio_base;
49};
50
51static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
52{
53 return container_of(chip, struct pxa_pwm_chip, chip);
54}
55
56/*
57 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
58 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
59 */
60static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
61 int duty_ns, int period_ns)
62{
63 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
64 unsigned long long c;
65 unsigned long period_cycles, prescale, pv, dc;
66 unsigned long offset;
67 int rc;
68
69 offset = pwm->hwpwm ? 0x10 : 0;
70
71 c = clk_get_rate(pc->clk);
72 c = c * period_ns;
73 do_div(c, 1000000000);
74 period_cycles = c;
75
76 if (period_cycles < 1)
77 period_cycles = 1;
78 prescale = (period_cycles - 1) / 1024;
79 pv = period_cycles / (prescale + 1) - 1;
80
81 if (prescale > 63)
82 return -EINVAL;
83
84 if (duty_ns == period_ns)
85 dc = PWMDCR_FD;
86 else
87 dc = (pv + 1) * duty_ns / period_ns;
88
89 /* NOTE: the clock to PWM has to be enabled first
90 * before writing to the registers
91 */
92 rc = clk_prepare_enable(pc->clk);
93 if (rc < 0)
94 return rc;
95
96 writel(prescale, pc->mmio_base + offset + PWMCR);
97 writel(dc, pc->mmio_base + offset + PWMDCR);
98 writel(pv, pc->mmio_base + offset + PWMPCR);
99
100 clk_disable_unprepare(pc->clk);
101 return 0;
102}
103
104static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
105{
106 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
107
108 return clk_prepare_enable(pc->clk);
109}
110
111static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
112{
113 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
114
115 clk_disable_unprepare(pc->clk);
116}
117
118static const struct pwm_ops pxa_pwm_ops = {
119 .config = pxa_pwm_config,
120 .enable = pxa_pwm_enable,
121 .disable = pxa_pwm_disable,
122 .owner = THIS_MODULE,
123};
124
125#ifdef CONFIG_OF
126/*
127 * Device tree users must create one device instance for each PWM channel.
128 * Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver
129 * code that this is a single channel pxa25x-pwm. Currently all devices are
130 * supported identically.
131 */
132static const struct of_device_id pwm_of_match[] = {
133 { .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
134 { .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
135 { .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
136 { .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
137 { }
138};
139MODULE_DEVICE_TABLE(of, pwm_of_match);
140#else
141#define pwm_of_match NULL
142#endif
143
144static const struct platform_device_id *pxa_pwm_get_id_dt(struct device *dev)
145{
146 const struct of_device_id *id = of_match_device(pwm_of_match, dev);
147
148 return id ? id->data : NULL;
149}
150
151static struct pwm_device *
152pxa_pwm_of_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
153{
154 struct pwm_device *pwm;
155
156 pwm = pwm_request_from_chip(pc, 0, NULL);
157 if (IS_ERR(pwm))
158 return pwm;
159
160 pwm->args.period = args->args[0];
161
162 return pwm;
163}
164
165static int pwm_probe(struct platform_device *pdev)
166{
167 const struct platform_device_id *id = platform_get_device_id(pdev);
168 struct pxa_pwm_chip *pwm;
169 struct resource *r;
170 int ret = 0;
171
172 if (IS_ENABLED(CONFIG_OF) && id == NULL)
173 id = pxa_pwm_get_id_dt(&pdev->dev);
174
175 if (id == NULL)
176 return -EINVAL;
177
178 pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
179 if (pwm == NULL)
180 return -ENOMEM;
181
182 pwm->clk = devm_clk_get(&pdev->dev, NULL);
183 if (IS_ERR(pwm->clk))
184 return PTR_ERR(pwm->clk);
185
186 pwm->chip.dev = &pdev->dev;
187 pwm->chip.ops = &pxa_pwm_ops;
188 pwm->chip.base = -1;
189 pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
190
191 if (IS_ENABLED(CONFIG_OF)) {
192 pwm->chip.of_xlate = pxa_pwm_of_xlate;
193 pwm->chip.of_pwm_n_cells = 1;
194 }
195
196 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
197 pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r);
198 if (IS_ERR(pwm->mmio_base))
199 return PTR_ERR(pwm->mmio_base);
200
201 ret = pwmchip_add(&pwm->chip);
202 if (ret < 0) {
203 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
204 return ret;
205 }
206
207 platform_set_drvdata(pdev, pwm);
208 return 0;
209}
210
211static int pwm_remove(struct platform_device *pdev)
212{
213 struct pxa_pwm_chip *chip;
214
215 chip = platform_get_drvdata(pdev);
216 if (chip == NULL)
217 return -ENODEV;
218
219 return pwmchip_remove(&chip->chip);
220}
221
222static struct platform_driver pwm_driver = {
223 .driver = {
224 .name = "pxa25x-pwm",
225 .of_match_table = pwm_of_match,
226 },
227 .probe = pwm_probe,
228 .remove = pwm_remove,
229 .id_table = pwm_id_table,
230};
231
232module_platform_driver(pwm_driver);
233
234MODULE_LICENSE("GPL v2");