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1/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef __DC_HW_SEQUENCER_H__
27#define __DC_HW_SEQUENCER_H__
28#include "dc_types.h"
29#include "clock_source.h"
30#include "inc/hw/timing_generator.h"
31#include "inc/hw/opp.h"
32#include "inc/hw/link_encoder.h"
33#include "core_status.h"
34
35struct pipe_ctx;
36struct dc_state;
37struct dc_stream_status;
38struct dc_writeback_info;
39struct dchub_init_data;
40struct dc_static_screen_params;
41struct resource_pool;
42struct dc_phy_addr_space_config;
43struct dc_virtual_addr_space_config;
44struct dpp;
45struct dce_hwseq;
46struct link_resource;
47
48struct hw_sequencer_funcs {
49 void (*hardware_release)(struct dc *dc);
50 /* Embedded Display Related */
51 void (*edp_power_control)(struct dc_link *link, bool enable);
52 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
53 void (*edp_wait_for_T12)(struct dc_link *link);
54
55 /* Pipe Programming Related */
56 void (*init_hw)(struct dc *dc);
57 void (*power_down_on_boot)(struct dc *dc);
58 void (*enable_accelerated_mode)(struct dc *dc,
59 struct dc_state *context);
60 enum dc_status (*apply_ctx_to_hw)(struct dc *dc,
61 struct dc_state *context);
62 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
63 void (*disable_pixel_data)(struct dc *dc, struct pipe_ctx *pipe_ctx, bool blank);
64 void (*apply_ctx_for_surface)(struct dc *dc,
65 const struct dc_stream_state *stream,
66 int num_planes, struct dc_state *context);
67 void (*program_front_end_for_ctx)(struct dc *dc,
68 struct dc_state *context);
69 void (*wait_for_pending_cleared)(struct dc *dc,
70 struct dc_state *context);
71 void (*post_unlock_program_front_end)(struct dc *dc,
72 struct dc_state *context);
73 void (*update_plane_addr)(const struct dc *dc,
74 struct pipe_ctx *pipe_ctx);
75 void (*update_dchub)(struct dce_hwseq *hws,
76 struct dchub_init_data *dh_data);
77 void (*wait_for_mpcc_disconnect)(struct dc *dc,
78 struct resource_pool *res_pool,
79 struct pipe_ctx *pipe_ctx);
80 void (*edp_backlight_control)(
81 struct dc_link *link,
82 bool enable);
83 void (*program_triplebuffer)(const struct dc *dc,
84 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer);
85 void (*update_pending_status)(struct pipe_ctx *pipe_ctx);
86 void (*power_down)(struct dc *dc);
87 void (*update_dsc_pg)(struct dc *dc, struct dc_state *context, bool safe_to_disable);
88
89 /* Pipe Lock Related */
90 void (*pipe_control_lock)(struct dc *dc,
91 struct pipe_ctx *pipe, bool lock);
92 void (*interdependent_update_lock)(struct dc *dc,
93 struct dc_state *context, bool lock);
94 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx,
95 bool flip_immediate);
96 void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock);
97
98 /* Timing Related */
99 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
100 struct crtc_position *position);
101 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx);
102 void (*calc_vupdate_position)(
103 struct dc *dc,
104 struct pipe_ctx *pipe_ctx,
105 uint32_t *start_line,
106 uint32_t *end_line);
107 void (*enable_per_frame_crtc_position_reset)(struct dc *dc,
108 int group_size, struct pipe_ctx *grouped_pipes[]);
109 void (*enable_timing_synchronization)(struct dc *dc,
110 int group_index, int group_size,
111 struct pipe_ctx *grouped_pipes[]);
112 void (*enable_vblanks_synchronization)(struct dc *dc,
113 int group_index, int group_size,
114 struct pipe_ctx *grouped_pipes[]);
115 void (*setup_periodic_interrupt)(struct dc *dc,
116 struct pipe_ctx *pipe_ctx);
117 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
118 struct dc_crtc_timing_adjust adjust);
119 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
120 int num_pipes,
121 const struct dc_static_screen_params *events);
122#ifndef TRIM_FSFT
123 bool (*optimize_timing_for_fsft)(struct dc *dc,
124 struct dc_crtc_timing *timing,
125 unsigned int max_input_rate_in_khz);
126#endif
127
128 /* Stream Related */
129 void (*enable_stream)(struct pipe_ctx *pipe_ctx);
130 void (*disable_stream)(struct pipe_ctx *pipe_ctx);
131 void (*blank_stream)(struct pipe_ctx *pipe_ctx);
132 void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
133 struct dc_link_settings *link_settings);
134
135 /* Bandwidth Related */
136 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);
137 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);
138 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);
139
140 /* Infopacket Related */
141 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
142 void (*send_immediate_sdp_message)(
143 struct pipe_ctx *pipe_ctx,
144 const uint8_t *custom_sdp_message,
145 unsigned int sdp_message_size);
146 void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
147 void (*set_dmdata_attributes)(struct pipe_ctx *pipe);
148 void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx);
149 bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx);
150
151 /* Cursor Related */
152 void (*set_cursor_position)(struct pipe_ctx *pipe);
153 void (*set_cursor_attribute)(struct pipe_ctx *pipe);
154 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
155
156 /* Colour Related */
157 void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx);
158 void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx,
159 enum dc_color_space colorspace,
160 uint16_t *matrix, int opp_id);
161
162 /* VM Related */
163 int (*init_sys_ctx)(struct dce_hwseq *hws,
164 struct dc *dc,
165 struct dc_phy_addr_space_config *pa_config);
166 void (*init_vm_ctx)(struct dce_hwseq *hws,
167 struct dc *dc,
168 struct dc_virtual_addr_space_config *va_config,
169 int vmid);
170
171 /* Writeback Related */
172 void (*update_writeback)(struct dc *dc,
173 struct dc_writeback_info *wb_info,
174 struct dc_state *context);
175 void (*enable_writeback)(struct dc *dc,
176 struct dc_writeback_info *wb_info,
177 struct dc_state *context);
178 void (*disable_writeback)(struct dc *dc,
179 unsigned int dwb_pipe_inst);
180
181 bool (*mmhubbub_warmup)(struct dc *dc,
182 unsigned int num_dwb,
183 struct dc_writeback_info *wb_info);
184
185 /* Clock Related */
186 enum dc_status (*set_clock)(struct dc *dc,
187 enum dc_clock_type clock_type,
188 uint32_t clk_khz, uint32_t stepping);
189 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
190 struct dc_clock_config *clock_cfg);
191 void (*optimize_pwr_state)(const struct dc *dc,
192 struct dc_state *context);
193 void (*exit_optimized_pwr_state)(const struct dc *dc,
194 struct dc_state *context);
195
196 /* Audio Related */
197 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
198 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx);
199
200 /* Stereo 3D Related */
201 void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc);
202
203 /* HW State Logging Related */
204 void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx);
205 void (*get_hw_state)(struct dc *dc, char *pBuf,
206 unsigned int bufSize, unsigned int mask);
207 void (*clear_status_bits)(struct dc *dc, unsigned int mask);
208
209 bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx,
210 uint32_t backlight_pwm_u16_16,
211 uint32_t frame_ramp);
212
213 void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx);
214
215 void (*set_pipe)(struct pipe_ctx *pipe_ctx);
216
217 void (*enable_dp_link_output)(struct dc_link *link,
218 const struct link_resource *link_res,
219 enum signal_type signal,
220 enum clock_source_id clock_source,
221 const struct dc_link_settings *link_settings);
222 void (*enable_tmds_link_output)(struct dc_link *link,
223 const struct link_resource *link_res,
224 enum signal_type signal,
225 enum clock_source_id clock_source,
226 enum dc_color_depth color_depth,
227 uint32_t pixel_clock);
228 void (*enable_lvds_link_output)(struct dc_link *link,
229 const struct link_resource *link_res,
230 enum clock_source_id clock_source,
231 uint32_t pixel_clock);
232 void (*disable_link_output)(struct dc_link *link,
233 const struct link_resource *link_res,
234 enum signal_type signal);
235
236 void (*get_dcc_en_bits)(struct dc *dc, int *dcc_en_bits);
237
238 /* Idle Optimization Related */
239 bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable);
240
241 bool (*does_plane_fit_in_mall)(struct dc *dc, struct dc_plane_state *plane,
242 struct dc_cursor_attributes *cursor_attr);
243
244 bool (*is_abm_supported)(struct dc *dc,
245 struct dc_state *context, struct dc_stream_state *stream);
246
247 void (*set_disp_pattern_generator)(const struct dc *dc,
248 struct pipe_ctx *pipe_ctx,
249 enum controller_dp_test_pattern test_pattern,
250 enum controller_dp_color_space color_space,
251 enum dc_color_depth color_depth,
252 const struct tg_color *solid_color,
253 int width, int height, int offset);
254
255 void (*z10_restore)(const struct dc *dc);
256 void (*z10_save_init)(struct dc *dc);
257
258 void (*update_visual_confirm_color)(struct dc *dc,
259 struct pipe_ctx *pipe_ctx,
260 struct tg_color *color,
261 int mpcc_id);
262
263 void (*update_phantom_vp_position)(struct dc *dc,
264 struct dc_state *context,
265 struct pipe_ctx *phantom_pipe);
266 void (*apply_update_flags_for_phantom)(struct pipe_ctx *phantom_pipe);
267
268 void (*commit_subvp_config)(struct dc *dc, struct dc_state *context);
269 void (*subvp_pipe_control_lock)(struct dc *dc,
270 struct dc_state *context,
271 bool lock,
272 bool should_lock_all_pipes,
273 struct pipe_ctx *top_pipe_to_program,
274 bool subvp_prev_use);
275
276};
277
278void color_space_to_black_color(
279 const struct dc *dc,
280 enum dc_color_space colorspace,
281 struct tg_color *black_color);
282
283bool hwss_wait_for_blank_complete(
284 struct timing_generator *tg);
285
286const uint16_t *find_color_matrix(
287 enum dc_color_space color_space,
288 uint32_t *array_size);
289
290void get_surface_visual_confirm_color(
291 const struct pipe_ctx *pipe_ctx,
292 struct tg_color *color);
293
294void get_subvp_visual_confirm_color(
295 struct dc *dc,
296 struct pipe_ctx *pipe_ctx,
297 struct tg_color *color);
298
299void get_hdr_visual_confirm_color(
300 struct pipe_ctx *pipe_ctx,
301 struct tg_color *color);
302void get_mpctree_visual_confirm_color(
303 struct pipe_ctx *pipe_ctx,
304 struct tg_color *color);
305void get_surface_tile_visual_confirm_color(
306 struct pipe_ctx *pipe_ctx,
307 struct tg_color *color);
308#endif /* __DC_HW_SEQUENCER_H__ */
1/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef __DC_HW_SEQUENCER_H__
27#define __DC_HW_SEQUENCER_H__
28#include "dc_types.h"
29#include "clock_source.h"
30#include "inc/hw/timing_generator.h"
31#include "inc/hw/opp.h"
32#include "inc/hw/link_encoder.h"
33#include "core_status.h"
34
35enum vline_select {
36 VLINE0,
37 VLINE1
38};
39
40struct pipe_ctx;
41struct dc_state;
42struct dc_stream_status;
43struct dc_writeback_info;
44struct dchub_init_data;
45struct dc_static_screen_params;
46struct resource_pool;
47struct dc_phy_addr_space_config;
48struct dc_virtual_addr_space_config;
49struct dpp;
50struct dce_hwseq;
51
52struct hw_sequencer_funcs {
53 /* Embedded Display Related */
54 void (*edp_power_control)(struct dc_link *link, bool enable);
55 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
56
57 /* Pipe Programming Related */
58 void (*init_hw)(struct dc *dc);
59 void (*power_down_on_boot)(struct dc *dc);
60 void (*enable_accelerated_mode)(struct dc *dc,
61 struct dc_state *context);
62 enum dc_status (*apply_ctx_to_hw)(struct dc *dc,
63 struct dc_state *context);
64 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
65 void (*apply_ctx_for_surface)(struct dc *dc,
66 const struct dc_stream_state *stream,
67 int num_planes, struct dc_state *context);
68 void (*program_front_end_for_ctx)(struct dc *dc,
69 struct dc_state *context);
70 void (*post_unlock_program_front_end)(struct dc *dc,
71 struct dc_state *context);
72 void (*update_plane_addr)(const struct dc *dc,
73 struct pipe_ctx *pipe_ctx);
74 void (*update_dchub)(struct dce_hwseq *hws,
75 struct dchub_init_data *dh_data);
76 void (*wait_for_mpcc_disconnect)(struct dc *dc,
77 struct resource_pool *res_pool,
78 struct pipe_ctx *pipe_ctx);
79 void (*edp_backlight_control)(
80 struct dc_link *link,
81 bool enable);
82 void (*program_triplebuffer)(const struct dc *dc,
83 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer);
84 void (*update_pending_status)(struct pipe_ctx *pipe_ctx);
85 void (*power_down)(struct dc *dc);
86
87 /* Pipe Lock Related */
88 void (*pipe_control_lock)(struct dc *dc,
89 struct pipe_ctx *pipe, bool lock);
90 void (*interdependent_update_lock)(struct dc *dc,
91 struct dc_state *context, bool lock);
92 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx,
93 bool flip_immediate);
94 void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock);
95
96 /* Timing Related */
97 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
98 struct crtc_position *position);
99 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx);
100 void (*calc_vupdate_position)(
101 struct dc *dc,
102 struct pipe_ctx *pipe_ctx,
103 uint32_t *start_line,
104 uint32_t *end_line);
105 void (*enable_per_frame_crtc_position_reset)(struct dc *dc,
106 int group_size, struct pipe_ctx *grouped_pipes[]);
107 void (*enable_timing_synchronization)(struct dc *dc,
108 int group_index, int group_size,
109 struct pipe_ctx *grouped_pipes[]);
110 void (*setup_periodic_interrupt)(struct dc *dc,
111 struct pipe_ctx *pipe_ctx,
112 enum vline_select vline);
113 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
114 unsigned int vmin, unsigned int vmax,
115 unsigned int vmid, unsigned int vmid_frame_number);
116 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
117 int num_pipes,
118 const struct dc_static_screen_params *events);
119#ifndef TRIM_FSFT
120 bool (*optimize_timing_for_fsft)(struct dc *dc,
121 struct dc_crtc_timing *timing,
122 unsigned int max_input_rate_in_khz);
123#endif
124
125 /* Stream Related */
126 void (*enable_stream)(struct pipe_ctx *pipe_ctx);
127 void (*disable_stream)(struct pipe_ctx *pipe_ctx);
128 void (*blank_stream)(struct pipe_ctx *pipe_ctx);
129 void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
130 struct dc_link_settings *link_settings);
131
132 /* Bandwidth Related */
133 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);
134 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);
135 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);
136
137 /* Infopacket Related */
138 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
139 void (*send_immediate_sdp_message)(
140 struct pipe_ctx *pipe_ctx,
141 const uint8_t *custom_sdp_message,
142 unsigned int sdp_message_size);
143 void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
144 void (*set_dmdata_attributes)(struct pipe_ctx *pipe);
145 void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx);
146 bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx);
147
148 /* Cursor Related */
149 void (*set_cursor_position)(struct pipe_ctx *pipe);
150 void (*set_cursor_attribute)(struct pipe_ctx *pipe);
151 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
152
153 /* Colour Related */
154 void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx);
155 void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx,
156 enum dc_color_space colorspace,
157 uint16_t *matrix, int opp_id);
158
159 /* VM Related */
160 int (*init_sys_ctx)(struct dce_hwseq *hws,
161 struct dc *dc,
162 struct dc_phy_addr_space_config *pa_config);
163 void (*init_vm_ctx)(struct dce_hwseq *hws,
164 struct dc *dc,
165 struct dc_virtual_addr_space_config *va_config,
166 int vmid);
167
168 /* Writeback Related */
169 void (*update_writeback)(struct dc *dc,
170 struct dc_writeback_info *wb_info,
171 struct dc_state *context);
172 void (*enable_writeback)(struct dc *dc,
173 struct dc_writeback_info *wb_info,
174 struct dc_state *context);
175 void (*disable_writeback)(struct dc *dc,
176 unsigned int dwb_pipe_inst);
177
178 bool (*mmhubbub_warmup)(struct dc *dc,
179 unsigned int num_dwb,
180 struct dc_writeback_info *wb_info);
181
182 /* Clock Related */
183 enum dc_status (*set_clock)(struct dc *dc,
184 enum dc_clock_type clock_type,
185 uint32_t clk_khz, uint32_t stepping);
186 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
187 struct dc_clock_config *clock_cfg);
188 void (*optimize_pwr_state)(const struct dc *dc,
189 struct dc_state *context);
190 void (*exit_optimized_pwr_state)(const struct dc *dc,
191 struct dc_state *context);
192
193 /* Audio Related */
194 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
195 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx);
196
197 /* Stereo 3D Related */
198 void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc);
199
200 /* HW State Logging Related */
201 void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx);
202 void (*get_hw_state)(struct dc *dc, char *pBuf,
203 unsigned int bufSize, unsigned int mask);
204 void (*clear_status_bits)(struct dc *dc, unsigned int mask);
205
206 bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx,
207 uint32_t backlight_pwm_u16_16,
208 uint32_t frame_ramp);
209
210 void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx);
211
212 void (*set_pipe)(struct pipe_ctx *pipe_ctx);
213
214#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
215 /* Idle Optimization Related */
216 bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable);
217#endif
218
219};
220
221void color_space_to_black_color(
222 const struct dc *dc,
223 enum dc_color_space colorspace,
224 struct tg_color *black_color);
225
226bool hwss_wait_for_blank_complete(
227 struct timing_generator *tg);
228
229const uint16_t *find_color_matrix(
230 enum dc_color_space color_space,
231 uint32_t *array_size);
232
233#endif /* __DC_HW_SEQUENCER_H__ */