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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
4 *
5 * Copyright (C) 2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2014 Cogent Embedded Inc.
8 */
9
10#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11#include <dt-bindings/interrupt-controller/arm-gic.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/power/r8a7790-sysc.h>
14
15/ {
16 compatible = "renesas,r8a7790";
17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 i2c3 = &i2c3;
25 i2c4 = &iic0;
26 i2c5 = &iic1;
27 i2c6 = &iic2;
28 i2c7 = &iic3;
29 spi0 = &qspi;
30 spi1 = &msiof0;
31 spi2 = &msiof1;
32 spi3 = &msiof2;
33 spi4 = &msiof3;
34 vin0 = &vin0;
35 vin1 = &vin1;
36 vin2 = &vin2;
37 vin3 = &vin3;
38 };
39
40 /*
41 * The external audio clocks are configured as 0 Hz fixed frequency
42 * clocks by default.
43 * Boards that provide audio clocks should override them.
44 */
45 audio_clk_a: audio_clk_a {
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 clock-frequency = <0>;
49 };
50 audio_clk_b: audio_clk_b {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55 audio_clk_c: audio_clk_c {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 clock-frequency = <0>;
59 };
60
61 /* External CAN clock */
62 can_clk: can {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 /* This value must be overridden by the board. */
66 clock-frequency = <0>;
67 };
68
69 cpus {
70 #address-cells = <1>;
71 #size-cells = <0>;
72
73 cpu0: cpu@0 {
74 device_type = "cpu";
75 compatible = "arm,cortex-a15";
76 reg = <0>;
77 clock-frequency = <1300000000>;
78 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
79 power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
80 enable-method = "renesas,apmu";
81 next-level-cache = <&L2_CA15>;
82 capacity-dmips-mhz = <1024>;
83 voltage-tolerance = <1>; /* 1% */
84 clock-latency = <300000>; /* 300 us */
85
86 /* kHz - uV - OPPs unknown yet */
87 operating-points = <1400000 1000000>,
88 <1225000 1000000>,
89 <1050000 1000000>,
90 < 875000 1000000>,
91 < 700000 1000000>,
92 < 350000 1000000>;
93 };
94
95 cpu1: cpu@1 {
96 device_type = "cpu";
97 compatible = "arm,cortex-a15";
98 reg = <1>;
99 clock-frequency = <1300000000>;
100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
101 power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
102 enable-method = "renesas,apmu";
103 next-level-cache = <&L2_CA15>;
104 capacity-dmips-mhz = <1024>;
105 voltage-tolerance = <1>; /* 1% */
106 clock-latency = <300000>; /* 300 us */
107
108 /* kHz - uV - OPPs unknown yet */
109 operating-points = <1400000 1000000>,
110 <1225000 1000000>,
111 <1050000 1000000>,
112 < 875000 1000000>,
113 < 700000 1000000>,
114 < 350000 1000000>;
115 };
116
117 cpu2: cpu@2 {
118 device_type = "cpu";
119 compatible = "arm,cortex-a15";
120 reg = <2>;
121 clock-frequency = <1300000000>;
122 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
123 power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
124 enable-method = "renesas,apmu";
125 next-level-cache = <&L2_CA15>;
126 capacity-dmips-mhz = <1024>;
127 voltage-tolerance = <1>; /* 1% */
128 clock-latency = <300000>; /* 300 us */
129
130 /* kHz - uV - OPPs unknown yet */
131 operating-points = <1400000 1000000>,
132 <1225000 1000000>,
133 <1050000 1000000>,
134 < 875000 1000000>,
135 < 700000 1000000>,
136 < 350000 1000000>;
137 };
138
139 cpu3: cpu@3 {
140 device_type = "cpu";
141 compatible = "arm,cortex-a15";
142 reg = <3>;
143 clock-frequency = <1300000000>;
144 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
145 power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
146 enable-method = "renesas,apmu";
147 next-level-cache = <&L2_CA15>;
148 capacity-dmips-mhz = <1024>;
149 voltage-tolerance = <1>; /* 1% */
150 clock-latency = <300000>; /* 300 us */
151
152 /* kHz - uV - OPPs unknown yet */
153 operating-points = <1400000 1000000>,
154 <1225000 1000000>,
155 <1050000 1000000>,
156 < 875000 1000000>,
157 < 700000 1000000>,
158 < 350000 1000000>;
159 };
160
161 cpu4: cpu@100 {
162 device_type = "cpu";
163 compatible = "arm,cortex-a7";
164 reg = <0x100>;
165 clock-frequency = <780000000>;
166 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
167 power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
168 enable-method = "renesas,apmu";
169 next-level-cache = <&L2_CA7>;
170 capacity-dmips-mhz = <539>;
171 };
172
173 cpu5: cpu@101 {
174 device_type = "cpu";
175 compatible = "arm,cortex-a7";
176 reg = <0x101>;
177 clock-frequency = <780000000>;
178 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
179 power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
180 enable-method = "renesas,apmu";
181 next-level-cache = <&L2_CA7>;
182 capacity-dmips-mhz = <539>;
183 };
184
185 cpu6: cpu@102 {
186 device_type = "cpu";
187 compatible = "arm,cortex-a7";
188 reg = <0x102>;
189 clock-frequency = <780000000>;
190 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
191 power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
192 enable-method = "renesas,apmu";
193 next-level-cache = <&L2_CA7>;
194 capacity-dmips-mhz = <539>;
195 };
196
197 cpu7: cpu@103 {
198 device_type = "cpu";
199 compatible = "arm,cortex-a7";
200 reg = <0x103>;
201 clock-frequency = <780000000>;
202 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
203 power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
204 enable-method = "renesas,apmu";
205 next-level-cache = <&L2_CA7>;
206 capacity-dmips-mhz = <539>;
207 };
208
209 L2_CA15: cache-controller-0 {
210 compatible = "cache";
211 power-domains = <&sysc R8A7790_PD_CA15_SCU>;
212 cache-unified;
213 cache-level = <2>;
214 };
215
216 L2_CA7: cache-controller-1 {
217 compatible = "cache";
218 power-domains = <&sysc R8A7790_PD_CA7_SCU>;
219 cache-unified;
220 cache-level = <2>;
221 };
222 };
223
224 /* External root clock */
225 extal_clk: extal {
226 compatible = "fixed-clock";
227 #clock-cells = <0>;
228 /* This value must be overridden by the board. */
229 clock-frequency = <0>;
230 };
231
232 /* External PCIe clock - can be overridden by the board */
233 pcie_bus_clk: pcie_bus {
234 compatible = "fixed-clock";
235 #clock-cells = <0>;
236 clock-frequency = <0>;
237 };
238
239 pmu-0 {
240 compatible = "arm,cortex-a15-pmu";
241 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
242 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
243 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
244 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
245 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
246 };
247
248 pmu-1 {
249 compatible = "arm,cortex-a7-pmu";
250 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
251 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
252 <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
253 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
254 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
255 };
256
257 /* External SCIF clock */
258 scif_clk: scif {
259 compatible = "fixed-clock";
260 #clock-cells = <0>;
261 /* This value must be overridden by the board. */
262 clock-frequency = <0>;
263 };
264
265 soc {
266 compatible = "simple-bus";
267 interrupt-parent = <&gic>;
268
269 #address-cells = <2>;
270 #size-cells = <2>;
271 ranges;
272
273 rwdt: watchdog@e6020000 {
274 compatible = "renesas,r8a7790-wdt",
275 "renesas,rcar-gen2-wdt";
276 reg = <0 0xe6020000 0 0x0c>;
277 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
278 clocks = <&cpg CPG_MOD 402>;
279 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
280 resets = <&cpg 402>;
281 status = "disabled";
282 };
283
284 gpio0: gpio@e6050000 {
285 compatible = "renesas,gpio-r8a7790",
286 "renesas,rcar-gen2-gpio";
287 reg = <0 0xe6050000 0 0x50>;
288 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
289 #gpio-cells = <2>;
290 gpio-controller;
291 gpio-ranges = <&pfc 0 0 32>;
292 #interrupt-cells = <2>;
293 interrupt-controller;
294 clocks = <&cpg CPG_MOD 912>;
295 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
296 resets = <&cpg 912>;
297 };
298
299 gpio1: gpio@e6051000 {
300 compatible = "renesas,gpio-r8a7790",
301 "renesas,rcar-gen2-gpio";
302 reg = <0 0xe6051000 0 0x50>;
303 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
304 #gpio-cells = <2>;
305 gpio-controller;
306 gpio-ranges = <&pfc 0 32 30>;
307 #interrupt-cells = <2>;
308 interrupt-controller;
309 clocks = <&cpg CPG_MOD 911>;
310 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
311 resets = <&cpg 911>;
312 };
313
314 gpio2: gpio@e6052000 {
315 compatible = "renesas,gpio-r8a7790",
316 "renesas,rcar-gen2-gpio";
317 reg = <0 0xe6052000 0 0x50>;
318 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
319 #gpio-cells = <2>;
320 gpio-controller;
321 gpio-ranges = <&pfc 0 64 30>;
322 #interrupt-cells = <2>;
323 interrupt-controller;
324 clocks = <&cpg CPG_MOD 910>;
325 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
326 resets = <&cpg 910>;
327 };
328
329 gpio3: gpio@e6053000 {
330 compatible = "renesas,gpio-r8a7790",
331 "renesas,rcar-gen2-gpio";
332 reg = <0 0xe6053000 0 0x50>;
333 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
334 #gpio-cells = <2>;
335 gpio-controller;
336 gpio-ranges = <&pfc 0 96 32>;
337 #interrupt-cells = <2>;
338 interrupt-controller;
339 clocks = <&cpg CPG_MOD 909>;
340 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
341 resets = <&cpg 909>;
342 };
343
344 gpio4: gpio@e6054000 {
345 compatible = "renesas,gpio-r8a7790",
346 "renesas,rcar-gen2-gpio";
347 reg = <0 0xe6054000 0 0x50>;
348 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
349 #gpio-cells = <2>;
350 gpio-controller;
351 gpio-ranges = <&pfc 0 128 32>;
352 #interrupt-cells = <2>;
353 interrupt-controller;
354 clocks = <&cpg CPG_MOD 908>;
355 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
356 resets = <&cpg 908>;
357 };
358
359 gpio5: gpio@e6055000 {
360 compatible = "renesas,gpio-r8a7790",
361 "renesas,rcar-gen2-gpio";
362 reg = <0 0xe6055000 0 0x50>;
363 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
364 #gpio-cells = <2>;
365 gpio-controller;
366 gpio-ranges = <&pfc 0 160 32>;
367 #interrupt-cells = <2>;
368 interrupt-controller;
369 clocks = <&cpg CPG_MOD 907>;
370 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
371 resets = <&cpg 907>;
372 };
373
374 pfc: pinctrl@e6060000 {
375 compatible = "renesas,pfc-r8a7790";
376 reg = <0 0xe6060000 0 0x250>;
377 };
378
379 cpg: clock-controller@e6150000 {
380 compatible = "renesas,r8a7790-cpg-mssr";
381 reg = <0 0xe6150000 0 0x1000>;
382 clocks = <&extal_clk>, <&usb_extal_clk>;
383 clock-names = "extal", "usb_extal";
384 #clock-cells = <2>;
385 #power-domain-cells = <0>;
386 #reset-cells = <1>;
387 };
388
389 apmu@e6151000 {
390 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
391 reg = <0 0xe6151000 0 0x188>;
392 cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
393 };
394
395 apmu@e6152000 {
396 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
397 reg = <0 0xe6152000 0 0x188>;
398 cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
399 };
400
401 rst: reset-controller@e6160000 {
402 compatible = "renesas,r8a7790-rst";
403 reg = <0 0xe6160000 0 0x0100>;
404 };
405
406 sysc: system-controller@e6180000 {
407 compatible = "renesas,r8a7790-sysc";
408 reg = <0 0xe6180000 0 0x0200>;
409 #power-domain-cells = <1>;
410 };
411
412 irqc0: interrupt-controller@e61c0000 {
413 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
414 #interrupt-cells = <2>;
415 interrupt-controller;
416 reg = <0 0xe61c0000 0 0x200>;
417 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
418 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
419 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
420 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
421 clocks = <&cpg CPG_MOD 407>;
422 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
423 resets = <&cpg 407>;
424 };
425
426 thermal: thermal@e61f0000 {
427 compatible = "renesas,thermal-r8a7790",
428 "renesas,rcar-gen2-thermal",
429 "renesas,rcar-thermal";
430 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
431 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
432 clocks = <&cpg CPG_MOD 522>;
433 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
434 resets = <&cpg 522>;
435 #thermal-sensor-cells = <0>;
436 };
437
438 ipmmu_sy0: iommu@e6280000 {
439 compatible = "renesas,ipmmu-r8a7790",
440 "renesas,ipmmu-vmsa";
441 reg = <0 0xe6280000 0 0x1000>;
442 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
443 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
444 #iommu-cells = <1>;
445 status = "disabled";
446 };
447
448 ipmmu_sy1: iommu@e6290000 {
449 compatible = "renesas,ipmmu-r8a7790",
450 "renesas,ipmmu-vmsa";
451 reg = <0 0xe6290000 0 0x1000>;
452 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
453 #iommu-cells = <1>;
454 status = "disabled";
455 };
456
457 ipmmu_ds: iommu@e6740000 {
458 compatible = "renesas,ipmmu-r8a7790",
459 "renesas,ipmmu-vmsa";
460 reg = <0 0xe6740000 0 0x1000>;
461 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
462 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
463 #iommu-cells = <1>;
464 status = "disabled";
465 };
466
467 ipmmu_mp: iommu@ec680000 {
468 compatible = "renesas,ipmmu-r8a7790",
469 "renesas,ipmmu-vmsa";
470 reg = <0 0xec680000 0 0x1000>;
471 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
472 #iommu-cells = <1>;
473 status = "disabled";
474 };
475
476 ipmmu_mx: iommu@fe951000 {
477 compatible = "renesas,ipmmu-r8a7790",
478 "renesas,ipmmu-vmsa";
479 reg = <0 0xfe951000 0 0x1000>;
480 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
481 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
482 #iommu-cells = <1>;
483 status = "disabled";
484 };
485
486 ipmmu_rt: iommu@ffc80000 {
487 compatible = "renesas,ipmmu-r8a7790",
488 "renesas,ipmmu-vmsa";
489 reg = <0 0xffc80000 0 0x1000>;
490 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
491 #iommu-cells = <1>;
492 status = "disabled";
493 };
494
495 icram0: sram@e63a0000 {
496 compatible = "mmio-sram";
497 reg = <0 0xe63a0000 0 0x12000>;
498 #address-cells = <1>;
499 #size-cells = <1>;
500 ranges = <0 0 0xe63a0000 0x12000>;
501 };
502
503 icram1: sram@e63c0000 {
504 compatible = "mmio-sram";
505 reg = <0 0xe63c0000 0 0x1000>;
506 #address-cells = <1>;
507 #size-cells = <1>;
508 ranges = <0 0 0xe63c0000 0x1000>;
509
510 smp-sram@0 {
511 compatible = "renesas,smp-sram";
512 reg = <0 0x100>;
513 };
514 };
515
516 i2c0: i2c@e6508000 {
517 #address-cells = <1>;
518 #size-cells = <0>;
519 compatible = "renesas,i2c-r8a7790",
520 "renesas,rcar-gen2-i2c";
521 reg = <0 0xe6508000 0 0x40>;
522 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
523 clocks = <&cpg CPG_MOD 931>;
524 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
525 resets = <&cpg 931>;
526 i2c-scl-internal-delay-ns = <110>;
527 status = "disabled";
528 };
529
530 i2c1: i2c@e6518000 {
531 #address-cells = <1>;
532 #size-cells = <0>;
533 compatible = "renesas,i2c-r8a7790",
534 "renesas,rcar-gen2-i2c";
535 reg = <0 0xe6518000 0 0x40>;
536 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
537 clocks = <&cpg CPG_MOD 930>;
538 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
539 resets = <&cpg 930>;
540 i2c-scl-internal-delay-ns = <6>;
541 status = "disabled";
542 };
543
544 i2c2: i2c@e6530000 {
545 #address-cells = <1>;
546 #size-cells = <0>;
547 compatible = "renesas,i2c-r8a7790",
548 "renesas,rcar-gen2-i2c";
549 reg = <0 0xe6530000 0 0x40>;
550 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
551 clocks = <&cpg CPG_MOD 929>;
552 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
553 resets = <&cpg 929>;
554 i2c-scl-internal-delay-ns = <6>;
555 status = "disabled";
556 };
557
558 i2c3: i2c@e6540000 {
559 #address-cells = <1>;
560 #size-cells = <0>;
561 compatible = "renesas,i2c-r8a7790",
562 "renesas,rcar-gen2-i2c";
563 reg = <0 0xe6540000 0 0x40>;
564 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
565 clocks = <&cpg CPG_MOD 928>;
566 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
567 resets = <&cpg 928>;
568 i2c-scl-internal-delay-ns = <110>;
569 status = "disabled";
570 };
571
572 iic0: i2c@e6500000 {
573 #address-cells = <1>;
574 #size-cells = <0>;
575 compatible = "renesas,iic-r8a7790",
576 "renesas,rcar-gen2-iic",
577 "renesas,rmobile-iic";
578 reg = <0 0xe6500000 0 0x425>;
579 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
580 clocks = <&cpg CPG_MOD 318>;
581 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
582 <&dmac1 0x61>, <&dmac1 0x62>;
583 dma-names = "tx", "rx", "tx", "rx";
584 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
585 resets = <&cpg 318>;
586 status = "disabled";
587 };
588
589 iic1: i2c@e6510000 {
590 #address-cells = <1>;
591 #size-cells = <0>;
592 compatible = "renesas,iic-r8a7790",
593 "renesas,rcar-gen2-iic",
594 "renesas,rmobile-iic";
595 reg = <0 0xe6510000 0 0x425>;
596 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
597 clocks = <&cpg CPG_MOD 323>;
598 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
599 <&dmac1 0x65>, <&dmac1 0x66>;
600 dma-names = "tx", "rx", "tx", "rx";
601 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
602 resets = <&cpg 323>;
603 status = "disabled";
604 };
605
606 iic2: i2c@e6520000 {
607 #address-cells = <1>;
608 #size-cells = <0>;
609 compatible = "renesas,iic-r8a7790",
610 "renesas,rcar-gen2-iic",
611 "renesas,rmobile-iic";
612 reg = <0 0xe6520000 0 0x425>;
613 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
614 clocks = <&cpg CPG_MOD 300>;
615 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
616 <&dmac1 0x69>, <&dmac1 0x6a>;
617 dma-names = "tx", "rx", "tx", "rx";
618 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
619 resets = <&cpg 300>;
620 status = "disabled";
621 };
622
623 iic3: i2c@e60b0000 {
624 #address-cells = <1>;
625 #size-cells = <0>;
626 compatible = "renesas,iic-r8a7790",
627 "renesas,rcar-gen2-iic",
628 "renesas,rmobile-iic";
629 reg = <0 0xe60b0000 0 0x425>;
630 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
631 clocks = <&cpg CPG_MOD 926>;
632 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
633 <&dmac1 0x77>, <&dmac1 0x78>;
634 dma-names = "tx", "rx", "tx", "rx";
635 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
636 resets = <&cpg 926>;
637 status = "disabled";
638 };
639
640 hsusb: usb@e6590000 {
641 compatible = "renesas,usbhs-r8a7790",
642 "renesas,rcar-gen2-usbhs";
643 reg = <0 0xe6590000 0 0x100>;
644 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
645 clocks = <&cpg CPG_MOD 704>;
646 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
647 <&usb_dmac1 0>, <&usb_dmac1 1>;
648 dma-names = "ch0", "ch1", "ch2", "ch3";
649 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
650 resets = <&cpg 704>;
651 renesas,buswait = <4>;
652 phys = <&usb0 1>;
653 phy-names = "usb";
654 status = "disabled";
655 };
656
657 usbphy: usb-phy-controller@e6590100 {
658 compatible = "renesas,usb-phy-r8a7790",
659 "renesas,rcar-gen2-usb-phy";
660 reg = <0 0xe6590100 0 0x100>;
661 #address-cells = <1>;
662 #size-cells = <0>;
663 clocks = <&cpg CPG_MOD 704>;
664 clock-names = "usbhs";
665 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
666 resets = <&cpg 704>;
667 status = "disabled";
668
669 usb0: usb-phy@0 {
670 reg = <0>;
671 #phy-cells = <1>;
672 };
673 usb2: usb-phy@2 {
674 reg = <2>;
675 #phy-cells = <1>;
676 };
677 };
678
679 usb_dmac0: dma-controller@e65a0000 {
680 compatible = "renesas,r8a7790-usb-dmac",
681 "renesas,usb-dmac";
682 reg = <0 0xe65a0000 0 0x100>;
683 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
684 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
685 interrupt-names = "ch0", "ch1";
686 clocks = <&cpg CPG_MOD 330>;
687 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
688 resets = <&cpg 330>;
689 #dma-cells = <1>;
690 dma-channels = <2>;
691 };
692
693 usb_dmac1: dma-controller@e65b0000 {
694 compatible = "renesas,r8a7790-usb-dmac",
695 "renesas,usb-dmac";
696 reg = <0 0xe65b0000 0 0x100>;
697 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
698 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
699 interrupt-names = "ch0", "ch1";
700 clocks = <&cpg CPG_MOD 331>;
701 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
702 resets = <&cpg 331>;
703 #dma-cells = <1>;
704 dma-channels = <2>;
705 };
706
707 dmac0: dma-controller@e6700000 {
708 compatible = "renesas,dmac-r8a7790",
709 "renesas,rcar-dmac";
710 reg = <0 0xe6700000 0 0x20000>;
711 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
712 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
713 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
714 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
715 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
716 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
717 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
718 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
719 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
720 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
721 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
722 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
723 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
724 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
725 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
726 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
727 interrupt-names = "error",
728 "ch0", "ch1", "ch2", "ch3",
729 "ch4", "ch5", "ch6", "ch7",
730 "ch8", "ch9", "ch10", "ch11",
731 "ch12", "ch13", "ch14";
732 clocks = <&cpg CPG_MOD 219>;
733 clock-names = "fck";
734 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
735 resets = <&cpg 219>;
736 #dma-cells = <1>;
737 dma-channels = <15>;
738 };
739
740 dmac1: dma-controller@e6720000 {
741 compatible = "renesas,dmac-r8a7790",
742 "renesas,rcar-dmac";
743 reg = <0 0xe6720000 0 0x20000>;
744 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
745 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
746 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
747 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
748 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
749 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
750 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
751 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
752 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
754 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
755 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
756 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
757 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
758 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
760 interrupt-names = "error",
761 "ch0", "ch1", "ch2", "ch3",
762 "ch4", "ch5", "ch6", "ch7",
763 "ch8", "ch9", "ch10", "ch11",
764 "ch12", "ch13", "ch14";
765 clocks = <&cpg CPG_MOD 218>;
766 clock-names = "fck";
767 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
768 resets = <&cpg 218>;
769 #dma-cells = <1>;
770 dma-channels = <15>;
771 };
772
773 avb: ethernet@e6800000 {
774 compatible = "renesas,etheravb-r8a7790",
775 "renesas,etheravb-rcar-gen2";
776 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
777 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
778 clocks = <&cpg CPG_MOD 812>;
779 clock-names = "fck";
780 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
781 resets = <&cpg 812>;
782 #address-cells = <1>;
783 #size-cells = <0>;
784 status = "disabled";
785 };
786
787 qspi: spi@e6b10000 {
788 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
789 reg = <0 0xe6b10000 0 0x2c>;
790 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
791 clocks = <&cpg CPG_MOD 917>;
792 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
793 <&dmac1 0x17>, <&dmac1 0x18>;
794 dma-names = "tx", "rx", "tx", "rx";
795 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
796 resets = <&cpg 917>;
797 num-cs = <1>;
798 #address-cells = <1>;
799 #size-cells = <0>;
800 status = "disabled";
801 };
802
803 scifa0: serial@e6c40000 {
804 compatible = "renesas,scifa-r8a7790",
805 "renesas,rcar-gen2-scifa", "renesas,scifa";
806 reg = <0 0xe6c40000 0 64>;
807 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
808 clocks = <&cpg CPG_MOD 204>;
809 clock-names = "fck";
810 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
811 <&dmac1 0x21>, <&dmac1 0x22>;
812 dma-names = "tx", "rx", "tx", "rx";
813 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
814 resets = <&cpg 204>;
815 status = "disabled";
816 };
817
818 scifa1: serial@e6c50000 {
819 compatible = "renesas,scifa-r8a7790",
820 "renesas,rcar-gen2-scifa", "renesas,scifa";
821 reg = <0 0xe6c50000 0 64>;
822 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
823 clocks = <&cpg CPG_MOD 203>;
824 clock-names = "fck";
825 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
826 <&dmac1 0x25>, <&dmac1 0x26>;
827 dma-names = "tx", "rx", "tx", "rx";
828 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
829 resets = <&cpg 203>;
830 status = "disabled";
831 };
832
833 scifa2: serial@e6c60000 {
834 compatible = "renesas,scifa-r8a7790",
835 "renesas,rcar-gen2-scifa", "renesas,scifa";
836 reg = <0 0xe6c60000 0 64>;
837 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
838 clocks = <&cpg CPG_MOD 202>;
839 clock-names = "fck";
840 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
841 <&dmac1 0x27>, <&dmac1 0x28>;
842 dma-names = "tx", "rx", "tx", "rx";
843 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
844 resets = <&cpg 202>;
845 status = "disabled";
846 };
847
848 scifb0: serial@e6c20000 {
849 compatible = "renesas,scifb-r8a7790",
850 "renesas,rcar-gen2-scifb", "renesas,scifb";
851 reg = <0 0xe6c20000 0 0x100>;
852 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
853 clocks = <&cpg CPG_MOD 206>;
854 clock-names = "fck";
855 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
856 <&dmac1 0x3d>, <&dmac1 0x3e>;
857 dma-names = "tx", "rx", "tx", "rx";
858 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
859 resets = <&cpg 206>;
860 status = "disabled";
861 };
862
863 scifb1: serial@e6c30000 {
864 compatible = "renesas,scifb-r8a7790",
865 "renesas,rcar-gen2-scifb", "renesas,scifb";
866 reg = <0 0xe6c30000 0 0x100>;
867 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
868 clocks = <&cpg CPG_MOD 207>;
869 clock-names = "fck";
870 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
871 <&dmac1 0x19>, <&dmac1 0x1a>;
872 dma-names = "tx", "rx", "tx", "rx";
873 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
874 resets = <&cpg 207>;
875 status = "disabled";
876 };
877
878 scifb2: serial@e6ce0000 {
879 compatible = "renesas,scifb-r8a7790",
880 "renesas,rcar-gen2-scifb", "renesas,scifb";
881 reg = <0 0xe6ce0000 0 0x100>;
882 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
883 clocks = <&cpg CPG_MOD 216>;
884 clock-names = "fck";
885 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
886 <&dmac1 0x1d>, <&dmac1 0x1e>;
887 dma-names = "tx", "rx", "tx", "rx";
888 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
889 resets = <&cpg 216>;
890 status = "disabled";
891 };
892
893 scif0: serial@e6e60000 {
894 compatible = "renesas,scif-r8a7790",
895 "renesas,rcar-gen2-scif",
896 "renesas,scif";
897 reg = <0 0xe6e60000 0 64>;
898 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
899 clocks = <&cpg CPG_MOD 721>,
900 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
901 clock-names = "fck", "brg_int", "scif_clk";
902 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
903 <&dmac1 0x29>, <&dmac1 0x2a>;
904 dma-names = "tx", "rx", "tx", "rx";
905 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
906 resets = <&cpg 721>;
907 status = "disabled";
908 };
909
910 scif1: serial@e6e68000 {
911 compatible = "renesas,scif-r8a7790",
912 "renesas,rcar-gen2-scif",
913 "renesas,scif";
914 reg = <0 0xe6e68000 0 64>;
915 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
916 clocks = <&cpg CPG_MOD 720>,
917 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
918 clock-names = "fck", "brg_int", "scif_clk";
919 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
920 <&dmac1 0x2d>, <&dmac1 0x2e>;
921 dma-names = "tx", "rx", "tx", "rx";
922 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
923 resets = <&cpg 720>;
924 status = "disabled";
925 };
926
927 scif2: serial@e6e56000 {
928 compatible = "renesas,scif-r8a7790",
929 "renesas,rcar-gen2-scif",
930 "renesas,scif";
931 reg = <0 0xe6e56000 0 64>;
932 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
933 clocks = <&cpg CPG_MOD 310>,
934 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
935 clock-names = "fck", "brg_int", "scif_clk";
936 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
937 <&dmac1 0x2b>, <&dmac1 0x2c>;
938 dma-names = "tx", "rx", "tx", "rx";
939 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
940 resets = <&cpg 310>;
941 status = "disabled";
942 };
943
944 hscif0: serial@e62c0000 {
945 compatible = "renesas,hscif-r8a7790",
946 "renesas,rcar-gen2-hscif", "renesas,hscif";
947 reg = <0 0xe62c0000 0 96>;
948 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
949 clocks = <&cpg CPG_MOD 717>,
950 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
951 clock-names = "fck", "brg_int", "scif_clk";
952 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
953 <&dmac1 0x39>, <&dmac1 0x3a>;
954 dma-names = "tx", "rx", "tx", "rx";
955 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
956 resets = <&cpg 717>;
957 status = "disabled";
958 };
959
960 hscif1: serial@e62c8000 {
961 compatible = "renesas,hscif-r8a7790",
962 "renesas,rcar-gen2-hscif", "renesas,hscif";
963 reg = <0 0xe62c8000 0 96>;
964 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
965 clocks = <&cpg CPG_MOD 716>,
966 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
967 clock-names = "fck", "brg_int", "scif_clk";
968 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
969 <&dmac1 0x4d>, <&dmac1 0x4e>;
970 dma-names = "tx", "rx", "tx", "rx";
971 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
972 resets = <&cpg 716>;
973 status = "disabled";
974 };
975
976 msiof0: spi@e6e20000 {
977 compatible = "renesas,msiof-r8a7790",
978 "renesas,rcar-gen2-msiof";
979 reg = <0 0xe6e20000 0 0x0064>;
980 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
981 clocks = <&cpg CPG_MOD 0>;
982 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
983 <&dmac1 0x51>, <&dmac1 0x52>;
984 dma-names = "tx", "rx", "tx", "rx";
985 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
986 resets = <&cpg 0>;
987 #address-cells = <1>;
988 #size-cells = <0>;
989 status = "disabled";
990 };
991
992 msiof1: spi@e6e10000 {
993 compatible = "renesas,msiof-r8a7790",
994 "renesas,rcar-gen2-msiof";
995 reg = <0 0xe6e10000 0 0x0064>;
996 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
997 clocks = <&cpg CPG_MOD 208>;
998 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
999 <&dmac1 0x55>, <&dmac1 0x56>;
1000 dma-names = "tx", "rx", "tx", "rx";
1001 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1002 resets = <&cpg 208>;
1003 #address-cells = <1>;
1004 #size-cells = <0>;
1005 status = "disabled";
1006 };
1007
1008 msiof2: spi@e6e00000 {
1009 compatible = "renesas,msiof-r8a7790",
1010 "renesas,rcar-gen2-msiof";
1011 reg = <0 0xe6e00000 0 0x0064>;
1012 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1013 clocks = <&cpg CPG_MOD 205>;
1014 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1015 <&dmac1 0x41>, <&dmac1 0x42>;
1016 dma-names = "tx", "rx", "tx", "rx";
1017 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1018 resets = <&cpg 205>;
1019 #address-cells = <1>;
1020 #size-cells = <0>;
1021 status = "disabled";
1022 };
1023
1024 msiof3: spi@e6c90000 {
1025 compatible = "renesas,msiof-r8a7790",
1026 "renesas,rcar-gen2-msiof";
1027 reg = <0 0xe6c90000 0 0x0064>;
1028 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1029 clocks = <&cpg CPG_MOD 215>;
1030 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1031 <&dmac1 0x45>, <&dmac1 0x46>;
1032 dma-names = "tx", "rx", "tx", "rx";
1033 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1034 resets = <&cpg 215>;
1035 #address-cells = <1>;
1036 #size-cells = <0>;
1037 status = "disabled";
1038 };
1039
1040 can0: can@e6e80000 {
1041 compatible = "renesas,can-r8a7790",
1042 "renesas,rcar-gen2-can";
1043 reg = <0 0xe6e80000 0 0x1000>;
1044 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1045 clocks = <&cpg CPG_MOD 916>,
1046 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1047 clock-names = "clkp1", "clkp2", "can_clk";
1048 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1049 resets = <&cpg 916>;
1050 status = "disabled";
1051 };
1052
1053 can1: can@e6e88000 {
1054 compatible = "renesas,can-r8a7790",
1055 "renesas,rcar-gen2-can";
1056 reg = <0 0xe6e88000 0 0x1000>;
1057 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1058 clocks = <&cpg CPG_MOD 915>,
1059 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1060 clock-names = "clkp1", "clkp2", "can_clk";
1061 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1062 resets = <&cpg 915>;
1063 status = "disabled";
1064 };
1065
1066 vin0: video@e6ef0000 {
1067 compatible = "renesas,vin-r8a7790",
1068 "renesas,rcar-gen2-vin";
1069 reg = <0 0xe6ef0000 0 0x1000>;
1070 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1071 clocks = <&cpg CPG_MOD 811>;
1072 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1073 resets = <&cpg 811>;
1074 status = "disabled";
1075 };
1076
1077 vin1: video@e6ef1000 {
1078 compatible = "renesas,vin-r8a7790",
1079 "renesas,rcar-gen2-vin";
1080 reg = <0 0xe6ef1000 0 0x1000>;
1081 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1082 clocks = <&cpg CPG_MOD 810>;
1083 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1084 resets = <&cpg 810>;
1085 status = "disabled";
1086 };
1087
1088 vin2: video@e6ef2000 {
1089 compatible = "renesas,vin-r8a7790",
1090 "renesas,rcar-gen2-vin";
1091 reg = <0 0xe6ef2000 0 0x1000>;
1092 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1093 clocks = <&cpg CPG_MOD 809>;
1094 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1095 resets = <&cpg 809>;
1096 status = "disabled";
1097 };
1098
1099 vin3: video@e6ef3000 {
1100 compatible = "renesas,vin-r8a7790",
1101 "renesas,rcar-gen2-vin";
1102 reg = <0 0xe6ef3000 0 0x1000>;
1103 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1104 clocks = <&cpg CPG_MOD 808>;
1105 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1106 resets = <&cpg 808>;
1107 status = "disabled";
1108 };
1109
1110 rcar_sound: sound@ec500000 {
1111 /*
1112 * #sound-dai-cells is required
1113 *
1114 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1115 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1116 */
1117 compatible = "renesas,rcar_sound-r8a7790",
1118 "renesas,rcar_sound-gen2";
1119 reg = <0 0xec500000 0 0x1000>, /* SCU */
1120 <0 0xec5a0000 0 0x100>, /* ADG */
1121 <0 0xec540000 0 0x1000>, /* SSIU */
1122 <0 0xec541000 0 0x280>, /* SSI */
1123 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1124 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1125
1126 clocks = <&cpg CPG_MOD 1005>,
1127 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1128 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1129 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1130 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1131 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1132 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1133 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1134 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1135 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1136 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1137 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1138 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1139 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1140 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1141 <&cpg CPG_CORE R8A7790_CLK_M2>;
1142 clock-names = "ssi-all",
1143 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1144 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1145 "ssi.1", "ssi.0",
1146 "src.9", "src.8", "src.7", "src.6",
1147 "src.5", "src.4", "src.3", "src.2",
1148 "src.1", "src.0",
1149 "ctu.0", "ctu.1",
1150 "mix.0", "mix.1",
1151 "dvc.0", "dvc.1",
1152 "clk_a", "clk_b", "clk_c", "clk_i";
1153 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1154 resets = <&cpg 1005>,
1155 <&cpg 1006>, <&cpg 1007>,
1156 <&cpg 1008>, <&cpg 1009>,
1157 <&cpg 1010>, <&cpg 1011>,
1158 <&cpg 1012>, <&cpg 1013>,
1159 <&cpg 1014>, <&cpg 1015>;
1160 reset-names = "ssi-all",
1161 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1162 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1163 "ssi.1", "ssi.0";
1164
1165 status = "disabled";
1166
1167 rcar_sound,dvc {
1168 dvc0: dvc-0 {
1169 dmas = <&audma1 0xbc>;
1170 dma-names = "tx";
1171 };
1172 dvc1: dvc-1 {
1173 dmas = <&audma1 0xbe>;
1174 dma-names = "tx";
1175 };
1176 };
1177
1178 rcar_sound,mix {
1179 mix0: mix-0 { };
1180 mix1: mix-1 { };
1181 };
1182
1183 rcar_sound,ctu {
1184 ctu00: ctu-0 { };
1185 ctu01: ctu-1 { };
1186 ctu02: ctu-2 { };
1187 ctu03: ctu-3 { };
1188 ctu10: ctu-4 { };
1189 ctu11: ctu-5 { };
1190 ctu12: ctu-6 { };
1191 ctu13: ctu-7 { };
1192 };
1193
1194 rcar_sound,src {
1195 src0: src-0 {
1196 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1197 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1198 dma-names = "rx", "tx";
1199 };
1200 src1: src-1 {
1201 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1202 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1203 dma-names = "rx", "tx";
1204 };
1205 src2: src-2 {
1206 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1207 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1208 dma-names = "rx", "tx";
1209 };
1210 src3: src-3 {
1211 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1212 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1213 dma-names = "rx", "tx";
1214 };
1215 src4: src-4 {
1216 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1217 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1218 dma-names = "rx", "tx";
1219 };
1220 src5: src-5 {
1221 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1222 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1223 dma-names = "rx", "tx";
1224 };
1225 src6: src-6 {
1226 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1227 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1228 dma-names = "rx", "tx";
1229 };
1230 src7: src-7 {
1231 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1232 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1233 dma-names = "rx", "tx";
1234 };
1235 src8: src-8 {
1236 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1237 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1238 dma-names = "rx", "tx";
1239 };
1240 src9: src-9 {
1241 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1242 dmas = <&audma0 0x97>, <&audma1 0xba>;
1243 dma-names = "rx", "tx";
1244 };
1245 };
1246
1247 rcar_sound,ssi {
1248 ssi0: ssi-0 {
1249 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1250 dmas = <&audma0 0x01>, <&audma1 0x02>,
1251 <&audma0 0x15>, <&audma1 0x16>;
1252 dma-names = "rx", "tx", "rxu", "txu";
1253 };
1254 ssi1: ssi-1 {
1255 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1256 dmas = <&audma0 0x03>, <&audma1 0x04>,
1257 <&audma0 0x49>, <&audma1 0x4a>;
1258 dma-names = "rx", "tx", "rxu", "txu";
1259 };
1260 ssi2: ssi-2 {
1261 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1262 dmas = <&audma0 0x05>, <&audma1 0x06>,
1263 <&audma0 0x63>, <&audma1 0x64>;
1264 dma-names = "rx", "tx", "rxu", "txu";
1265 };
1266 ssi3: ssi-3 {
1267 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1268 dmas = <&audma0 0x07>, <&audma1 0x08>,
1269 <&audma0 0x6f>, <&audma1 0x70>;
1270 dma-names = "rx", "tx", "rxu", "txu";
1271 };
1272 ssi4: ssi-4 {
1273 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1274 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1275 <&audma0 0x71>, <&audma1 0x72>;
1276 dma-names = "rx", "tx", "rxu", "txu";
1277 };
1278 ssi5: ssi-5 {
1279 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1280 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1281 <&audma0 0x73>, <&audma1 0x74>;
1282 dma-names = "rx", "tx", "rxu", "txu";
1283 };
1284 ssi6: ssi-6 {
1285 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1286 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1287 <&audma0 0x75>, <&audma1 0x76>;
1288 dma-names = "rx", "tx", "rxu", "txu";
1289 };
1290 ssi7: ssi-7 {
1291 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1292 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1293 <&audma0 0x79>, <&audma1 0x7a>;
1294 dma-names = "rx", "tx", "rxu", "txu";
1295 };
1296 ssi8: ssi-8 {
1297 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1298 dmas = <&audma0 0x11>, <&audma1 0x12>,
1299 <&audma0 0x7b>, <&audma1 0x7c>;
1300 dma-names = "rx", "tx", "rxu", "txu";
1301 };
1302 ssi9: ssi-9 {
1303 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1304 dmas = <&audma0 0x13>, <&audma1 0x14>,
1305 <&audma0 0x7d>, <&audma1 0x7e>;
1306 dma-names = "rx", "tx", "rxu", "txu";
1307 };
1308 };
1309 };
1310
1311 audma0: dma-controller@ec700000 {
1312 compatible = "renesas,dmac-r8a7790",
1313 "renesas,rcar-dmac";
1314 reg = <0 0xec700000 0 0x10000>;
1315 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1316 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1317 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1318 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1319 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1320 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1321 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1322 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1323 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1324 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1325 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1326 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1327 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1328 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1329 interrupt-names = "error",
1330 "ch0", "ch1", "ch2", "ch3",
1331 "ch4", "ch5", "ch6", "ch7",
1332 "ch8", "ch9", "ch10", "ch11",
1333 "ch12";
1334 clocks = <&cpg CPG_MOD 502>;
1335 clock-names = "fck";
1336 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1337 resets = <&cpg 502>;
1338 #dma-cells = <1>;
1339 dma-channels = <13>;
1340 };
1341
1342 audma1: dma-controller@ec720000 {
1343 compatible = "renesas,dmac-r8a7790",
1344 "renesas,rcar-dmac";
1345 reg = <0 0xec720000 0 0x10000>;
1346 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1347 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1348 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1349 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1350 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1351 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1352 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1353 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1354 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1355 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1356 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1357 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1358 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1359 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1360 interrupt-names = "error",
1361 "ch0", "ch1", "ch2", "ch3",
1362 "ch4", "ch5", "ch6", "ch7",
1363 "ch8", "ch9", "ch10", "ch11",
1364 "ch12";
1365 clocks = <&cpg CPG_MOD 501>;
1366 clock-names = "fck";
1367 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1368 resets = <&cpg 501>;
1369 #dma-cells = <1>;
1370 dma-channels = <13>;
1371 };
1372
1373 xhci: usb@ee000000 {
1374 compatible = "renesas,xhci-r8a7790",
1375 "renesas,rcar-gen2-xhci";
1376 reg = <0 0xee000000 0 0xc00>;
1377 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1378 clocks = <&cpg CPG_MOD 328>;
1379 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1380 resets = <&cpg 328>;
1381 phys = <&usb2 1>;
1382 phy-names = "usb";
1383 status = "disabled";
1384 };
1385
1386 pci0: pci@ee090000 {
1387 compatible = "renesas,pci-r8a7790",
1388 "renesas,pci-rcar-gen2";
1389 device_type = "pci";
1390 reg = <0 0xee090000 0 0xc00>,
1391 <0 0xee080000 0 0x1100>;
1392 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1393 clocks = <&cpg CPG_MOD 703>;
1394 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1395 resets = <&cpg 703>;
1396 status = "disabled";
1397
1398 bus-range = <0 0>;
1399 #address-cells = <3>;
1400 #size-cells = <2>;
1401 #interrupt-cells = <1>;
1402 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1403 interrupt-map-mask = <0xf800 0 0 0x7>;
1404 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1405 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1406 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1407
1408 usb@1,0 {
1409 reg = <0x800 0 0 0 0>;
1410 phys = <&usb0 0>;
1411 phy-names = "usb";
1412 };
1413
1414 usb@2,0 {
1415 reg = <0x1000 0 0 0 0>;
1416 phys = <&usb0 0>;
1417 phy-names = "usb";
1418 };
1419 };
1420
1421 pci1: pci@ee0b0000 {
1422 compatible = "renesas,pci-r8a7790",
1423 "renesas,pci-rcar-gen2";
1424 device_type = "pci";
1425 reg = <0 0xee0b0000 0 0xc00>,
1426 <0 0xee0a0000 0 0x1100>;
1427 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1428 clocks = <&cpg CPG_MOD 703>;
1429 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1430 resets = <&cpg 703>;
1431 status = "disabled";
1432
1433 bus-range = <1 1>;
1434 #address-cells = <3>;
1435 #size-cells = <2>;
1436 #interrupt-cells = <1>;
1437 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1438 interrupt-map-mask = <0xf800 0 0 0x7>;
1439 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1440 <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1441 <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1442 };
1443
1444 pci2: pci@ee0d0000 {
1445 compatible = "renesas,pci-r8a7790",
1446 "renesas,pci-rcar-gen2";
1447 device_type = "pci";
1448 clocks = <&cpg CPG_MOD 703>;
1449 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1450 resets = <&cpg 703>;
1451 reg = <0 0xee0d0000 0 0xc00>,
1452 <0 0xee0c0000 0 0x1100>;
1453 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1454 status = "disabled";
1455
1456 bus-range = <2 2>;
1457 #address-cells = <3>;
1458 #size-cells = <2>;
1459 #interrupt-cells = <1>;
1460 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1461 interrupt-map-mask = <0xf800 0 0 0x7>;
1462 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1463 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1464 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1465
1466 usb@1,0 {
1467 reg = <0x20800 0 0 0 0>;
1468 phys = <&usb2 0>;
1469 phy-names = "usb";
1470 };
1471
1472 usb@2,0 {
1473 reg = <0x21000 0 0 0 0>;
1474 phys = <&usb2 0>;
1475 phy-names = "usb";
1476 };
1477 };
1478
1479 sdhi0: mmc@ee100000 {
1480 compatible = "renesas,sdhi-r8a7790",
1481 "renesas,rcar-gen2-sdhi";
1482 reg = <0 0xee100000 0 0x328>;
1483 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1484 clocks = <&cpg CPG_MOD 314>;
1485 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1486 <&dmac1 0xcd>, <&dmac1 0xce>;
1487 dma-names = "tx", "rx", "tx", "rx";
1488 max-frequency = <195000000>;
1489 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1490 resets = <&cpg 314>;
1491 status = "disabled";
1492 };
1493
1494 sdhi1: mmc@ee120000 {
1495 compatible = "renesas,sdhi-r8a7790",
1496 "renesas,rcar-gen2-sdhi";
1497 reg = <0 0xee120000 0 0x328>;
1498 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1499 clocks = <&cpg CPG_MOD 313>;
1500 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1501 <&dmac1 0xc9>, <&dmac1 0xca>;
1502 dma-names = "tx", "rx", "tx", "rx";
1503 max-frequency = <195000000>;
1504 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1505 resets = <&cpg 313>;
1506 status = "disabled";
1507 };
1508
1509 sdhi2: mmc@ee140000 {
1510 compatible = "renesas,sdhi-r8a7790",
1511 "renesas,rcar-gen2-sdhi";
1512 reg = <0 0xee140000 0 0x100>;
1513 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1514 clocks = <&cpg CPG_MOD 312>;
1515 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1516 <&dmac1 0xc1>, <&dmac1 0xc2>;
1517 dma-names = "tx", "rx", "tx", "rx";
1518 max-frequency = <97500000>;
1519 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1520 resets = <&cpg 312>;
1521 status = "disabled";
1522 };
1523
1524 sdhi3: mmc@ee160000 {
1525 compatible = "renesas,sdhi-r8a7790",
1526 "renesas,rcar-gen2-sdhi";
1527 reg = <0 0xee160000 0 0x100>;
1528 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1529 clocks = <&cpg CPG_MOD 311>;
1530 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1531 <&dmac1 0xd3>, <&dmac1 0xd4>;
1532 dma-names = "tx", "rx", "tx", "rx";
1533 max-frequency = <97500000>;
1534 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1535 resets = <&cpg 311>;
1536 status = "disabled";
1537 };
1538
1539 mmcif0: mmc@ee200000 {
1540 compatible = "renesas,mmcif-r8a7790",
1541 "renesas,sh-mmcif";
1542 reg = <0 0xee200000 0 0x80>;
1543 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1544 clocks = <&cpg CPG_MOD 315>;
1545 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1546 <&dmac1 0xd1>, <&dmac1 0xd2>;
1547 dma-names = "tx", "rx", "tx", "rx";
1548 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1549 resets = <&cpg 315>;
1550 reg-io-width = <4>;
1551 status = "disabled";
1552 max-frequency = <97500000>;
1553 };
1554
1555 mmcif1: mmc@ee220000 {
1556 compatible = "renesas,mmcif-r8a7790",
1557 "renesas,sh-mmcif";
1558 reg = <0 0xee220000 0 0x80>;
1559 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1560 clocks = <&cpg CPG_MOD 305>;
1561 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1562 <&dmac1 0xe1>, <&dmac1 0xe2>;
1563 dma-names = "tx", "rx", "tx", "rx";
1564 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1565 resets = <&cpg 305>;
1566 reg-io-width = <4>;
1567 status = "disabled";
1568 max-frequency = <97500000>;
1569 };
1570
1571 sata0: sata@ee300000 {
1572 compatible = "renesas,sata-r8a7790",
1573 "renesas,rcar-gen2-sata";
1574 reg = <0 0xee300000 0 0x200000>;
1575 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1576 clocks = <&cpg CPG_MOD 815>;
1577 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1578 resets = <&cpg 815>;
1579 status = "disabled";
1580 };
1581
1582 sata1: sata@ee500000 {
1583 compatible = "renesas,sata-r8a7790",
1584 "renesas,rcar-gen2-sata";
1585 reg = <0 0xee500000 0 0x200000>;
1586 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1587 clocks = <&cpg CPG_MOD 814>;
1588 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1589 resets = <&cpg 814>;
1590 status = "disabled";
1591 };
1592
1593 ether: ethernet@ee700000 {
1594 compatible = "renesas,ether-r8a7790",
1595 "renesas,rcar-gen2-ether";
1596 reg = <0 0xee700000 0 0x400>;
1597 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1598 clocks = <&cpg CPG_MOD 813>;
1599 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1600 resets = <&cpg 813>;
1601 phy-mode = "rmii";
1602 #address-cells = <1>;
1603 #size-cells = <0>;
1604 status = "disabled";
1605 };
1606
1607 gic: interrupt-controller@f1001000 {
1608 compatible = "arm,gic-400";
1609 #interrupt-cells = <3>;
1610 #address-cells = <0>;
1611 interrupt-controller;
1612 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1613 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1614 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1615 clocks = <&cpg CPG_MOD 408>;
1616 clock-names = "clk";
1617 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1618 resets = <&cpg 408>;
1619 };
1620
1621 pciec: pcie@fe000000 {
1622 compatible = "renesas,pcie-r8a7790",
1623 "renesas,pcie-rcar-gen2";
1624 reg = <0 0xfe000000 0 0x80000>;
1625 #address-cells = <3>;
1626 #size-cells = <2>;
1627 bus-range = <0x00 0xff>;
1628 device_type = "pci";
1629 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1630 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1631 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1632 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1633 /* Map all possible DDR as inbound ranges */
1634 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1635 <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1636 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1637 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1638 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1639 #interrupt-cells = <1>;
1640 interrupt-map-mask = <0 0 0 0>;
1641 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1642 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1643 clock-names = "pcie", "pcie_bus";
1644 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1645 resets = <&cpg 319>;
1646 status = "disabled";
1647 };
1648
1649 vsp@fe920000 {
1650 compatible = "renesas,vsp1";
1651 reg = <0 0xfe920000 0 0x8000>;
1652 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1653 clocks = <&cpg CPG_MOD 130>;
1654 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1655 resets = <&cpg 130>;
1656 };
1657
1658 vsp@fe928000 {
1659 compatible = "renesas,vsp1";
1660 reg = <0 0xfe928000 0 0x8000>;
1661 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1662 clocks = <&cpg CPG_MOD 131>;
1663 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1664 resets = <&cpg 131>;
1665 };
1666
1667 vsp@fe930000 {
1668 compatible = "renesas,vsp1";
1669 reg = <0 0xfe930000 0 0x8000>;
1670 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1671 clocks = <&cpg CPG_MOD 128>;
1672 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1673 resets = <&cpg 128>;
1674 };
1675
1676 vsp@fe938000 {
1677 compatible = "renesas,vsp1";
1678 reg = <0 0xfe938000 0 0x8000>;
1679 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1680 clocks = <&cpg CPG_MOD 127>;
1681 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1682 resets = <&cpg 127>;
1683 };
1684
1685 fdp1@fe940000 {
1686 compatible = "renesas,fdp1";
1687 reg = <0 0xfe940000 0 0x2400>;
1688 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1689 clocks = <&cpg CPG_MOD 119>;
1690 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1691 resets = <&cpg 119>;
1692 };
1693
1694 fdp1@fe944000 {
1695 compatible = "renesas,fdp1";
1696 reg = <0 0xfe944000 0 0x2400>;
1697 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1698 clocks = <&cpg CPG_MOD 118>;
1699 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1700 resets = <&cpg 118>;
1701 };
1702
1703 fdp1@fe948000 {
1704 compatible = "renesas,fdp1";
1705 reg = <0 0xfe948000 0 0x2400>;
1706 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1707 clocks = <&cpg CPG_MOD 117>;
1708 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1709 resets = <&cpg 117>;
1710 };
1711
1712 jpu: jpeg-codec@fe980000 {
1713 compatible = "renesas,jpu-r8a7790",
1714 "renesas,rcar-gen2-jpu";
1715 reg = <0 0xfe980000 0 0x10300>;
1716 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1717 clocks = <&cpg CPG_MOD 106>;
1718 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1719 resets = <&cpg 106>;
1720 };
1721
1722 du: display@feb00000 {
1723 compatible = "renesas,du-r8a7790";
1724 reg = <0 0xfeb00000 0 0x70000>;
1725 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1726 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1727 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1728 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1729 <&cpg CPG_MOD 722>;
1730 clock-names = "du.0", "du.1", "du.2";
1731 resets = <&cpg 724>;
1732 reset-names = "du.0";
1733 status = "disabled";
1734
1735 ports {
1736 #address-cells = <1>;
1737 #size-cells = <0>;
1738
1739 port@0 {
1740 reg = <0>;
1741 du_out_rgb: endpoint {
1742 };
1743 };
1744 port@1 {
1745 reg = <1>;
1746 du_out_lvds0: endpoint {
1747 remote-endpoint = <&lvds0_in>;
1748 };
1749 };
1750 port@2 {
1751 reg = <2>;
1752 du_out_lvds1: endpoint {
1753 remote-endpoint = <&lvds1_in>;
1754 };
1755 };
1756 };
1757 };
1758
1759 lvds0: lvds@feb90000 {
1760 compatible = "renesas,r8a7790-lvds";
1761 reg = <0 0xfeb90000 0 0x1c>;
1762 clocks = <&cpg CPG_MOD 726>;
1763 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1764 resets = <&cpg 726>;
1765 status = "disabled";
1766
1767 ports {
1768 #address-cells = <1>;
1769 #size-cells = <0>;
1770
1771 port@0 {
1772 reg = <0>;
1773 lvds0_in: endpoint {
1774 remote-endpoint = <&du_out_lvds0>;
1775 };
1776 };
1777 port@1 {
1778 reg = <1>;
1779 lvds0_out: endpoint {
1780 };
1781 };
1782 };
1783 };
1784
1785 lvds1: lvds@feb94000 {
1786 compatible = "renesas,r8a7790-lvds";
1787 reg = <0 0xfeb94000 0 0x1c>;
1788 clocks = <&cpg CPG_MOD 725>;
1789 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1790 resets = <&cpg 725>;
1791 status = "disabled";
1792
1793 ports {
1794 #address-cells = <1>;
1795 #size-cells = <0>;
1796
1797 port@0 {
1798 reg = <0>;
1799 lvds1_in: endpoint {
1800 remote-endpoint = <&du_out_lvds1>;
1801 };
1802 };
1803 port@1 {
1804 reg = <1>;
1805 lvds1_out: endpoint {
1806 };
1807 };
1808 };
1809 };
1810
1811 prr: chipid@ff000044 {
1812 compatible = "renesas,prr";
1813 reg = <0 0xff000044 0 4>;
1814 };
1815
1816 cmt0: timer@ffca0000 {
1817 compatible = "renesas,r8a7790-cmt0",
1818 "renesas,rcar-gen2-cmt0";
1819 reg = <0 0xffca0000 0 0x1004>;
1820 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1821 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1822 clocks = <&cpg CPG_MOD 124>;
1823 clock-names = "fck";
1824 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1825 resets = <&cpg 124>;
1826
1827 status = "disabled";
1828 };
1829
1830 cmt1: timer@e6130000 {
1831 compatible = "renesas,r8a7790-cmt1",
1832 "renesas,rcar-gen2-cmt1";
1833 reg = <0 0xe6130000 0 0x1004>;
1834 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1835 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1836 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1837 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1838 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1839 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1840 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1841 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1842 clocks = <&cpg CPG_MOD 329>;
1843 clock-names = "fck";
1844 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1845 resets = <&cpg 329>;
1846
1847 status = "disabled";
1848 };
1849 };
1850
1851 thermal-zones {
1852 cpu_thermal: cpu-thermal {
1853 polling-delay-passive = <0>;
1854 polling-delay = <0>;
1855
1856 thermal-sensors = <&thermal>;
1857
1858 trips {
1859 cpu-crit {
1860 temperature = <95000>;
1861 hysteresis = <0>;
1862 type = "critical";
1863 };
1864 };
1865 cooling-maps {
1866 };
1867 };
1868 };
1869
1870 timer {
1871 compatible = "arm,armv7-timer";
1872 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1873 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1874 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1875 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1876 };
1877
1878 /* External USB clock - can be overridden by the board */
1879 usb_extal_clk: usb_extal {
1880 compatible = "fixed-clock";
1881 #clock-cells = <0>;
1882 clock-frequency = <48000000>;
1883 };
1884};
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
4 *
5 * Copyright (C) 2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2014 Cogent Embedded Inc.
8 */
9
10#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11#include <dt-bindings/interrupt-controller/arm-gic.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/power/r8a7790-sysc.h>
14
15/ {
16 compatible = "renesas,r8a7790";
17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 i2c3 = &i2c3;
25 i2c4 = &iic0;
26 i2c5 = &iic1;
27 i2c6 = &iic2;
28 i2c7 = &iic3;
29 spi0 = &qspi;
30 spi1 = &msiof0;
31 spi2 = &msiof1;
32 spi3 = &msiof2;
33 spi4 = &msiof3;
34 vin0 = &vin0;
35 vin1 = &vin1;
36 vin2 = &vin2;
37 vin3 = &vin3;
38 };
39
40 /*
41 * The external audio clocks are configured as 0 Hz fixed frequency
42 * clocks by default.
43 * Boards that provide audio clocks should override them.
44 */
45 audio_clk_a: audio_clk_a {
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 clock-frequency = <0>;
49 };
50 audio_clk_b: audio_clk_b {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55 audio_clk_c: audio_clk_c {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 clock-frequency = <0>;
59 };
60
61 /* External CAN clock */
62 can_clk: can {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 /* This value must be overridden by the board. */
66 clock-frequency = <0>;
67 };
68
69 cpus {
70 #address-cells = <1>;
71 #size-cells = <0>;
72 enable-method = "renesas,apmu";
73
74 cpu0: cpu@0 {
75 device_type = "cpu";
76 compatible = "arm,cortex-a15";
77 reg = <0>;
78 clock-frequency = <1300000000>;
79 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
80 power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
81 next-level-cache = <&L2_CA15>;
82 capacity-dmips-mhz = <1024>;
83 voltage-tolerance = <1>; /* 1% */
84 clock-latency = <300000>; /* 300 us */
85
86 /* kHz - uV - OPPs unknown yet */
87 operating-points = <1400000 1000000>,
88 <1225000 1000000>,
89 <1050000 1000000>,
90 < 875000 1000000>,
91 < 700000 1000000>,
92 < 350000 1000000>;
93 };
94
95 cpu1: cpu@1 {
96 device_type = "cpu";
97 compatible = "arm,cortex-a15";
98 reg = <1>;
99 clock-frequency = <1300000000>;
100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
101 power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
102 next-level-cache = <&L2_CA15>;
103 capacity-dmips-mhz = <1024>;
104 voltage-tolerance = <1>; /* 1% */
105 clock-latency = <300000>; /* 300 us */
106
107 /* kHz - uV - OPPs unknown yet */
108 operating-points = <1400000 1000000>,
109 <1225000 1000000>,
110 <1050000 1000000>,
111 < 875000 1000000>,
112 < 700000 1000000>,
113 < 350000 1000000>;
114 };
115
116 cpu2: cpu@2 {
117 device_type = "cpu";
118 compatible = "arm,cortex-a15";
119 reg = <2>;
120 clock-frequency = <1300000000>;
121 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
122 power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
123 next-level-cache = <&L2_CA15>;
124 capacity-dmips-mhz = <1024>;
125 voltage-tolerance = <1>; /* 1% */
126 clock-latency = <300000>; /* 300 us */
127
128 /* kHz - uV - OPPs unknown yet */
129 operating-points = <1400000 1000000>,
130 <1225000 1000000>,
131 <1050000 1000000>,
132 < 875000 1000000>,
133 < 700000 1000000>,
134 < 350000 1000000>;
135 };
136
137 cpu3: cpu@3 {
138 device_type = "cpu";
139 compatible = "arm,cortex-a15";
140 reg = <3>;
141 clock-frequency = <1300000000>;
142 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
143 power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
144 next-level-cache = <&L2_CA15>;
145 capacity-dmips-mhz = <1024>;
146 voltage-tolerance = <1>; /* 1% */
147 clock-latency = <300000>; /* 300 us */
148
149 /* kHz - uV - OPPs unknown yet */
150 operating-points = <1400000 1000000>,
151 <1225000 1000000>,
152 <1050000 1000000>,
153 < 875000 1000000>,
154 < 700000 1000000>,
155 < 350000 1000000>;
156 };
157
158 cpu4: cpu@100 {
159 device_type = "cpu";
160 compatible = "arm,cortex-a7";
161 reg = <0x100>;
162 clock-frequency = <780000000>;
163 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
164 power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
165 next-level-cache = <&L2_CA7>;
166 capacity-dmips-mhz = <539>;
167 };
168
169 cpu5: cpu@101 {
170 device_type = "cpu";
171 compatible = "arm,cortex-a7";
172 reg = <0x101>;
173 clock-frequency = <780000000>;
174 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
175 power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
176 next-level-cache = <&L2_CA7>;
177 capacity-dmips-mhz = <539>;
178 };
179
180 cpu6: cpu@102 {
181 device_type = "cpu";
182 compatible = "arm,cortex-a7";
183 reg = <0x102>;
184 clock-frequency = <780000000>;
185 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
186 power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
187 next-level-cache = <&L2_CA7>;
188 capacity-dmips-mhz = <539>;
189 };
190
191 cpu7: cpu@103 {
192 device_type = "cpu";
193 compatible = "arm,cortex-a7";
194 reg = <0x103>;
195 clock-frequency = <780000000>;
196 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
197 power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
198 next-level-cache = <&L2_CA7>;
199 capacity-dmips-mhz = <539>;
200 };
201
202 L2_CA15: cache-controller-0 {
203 compatible = "cache";
204 power-domains = <&sysc R8A7790_PD_CA15_SCU>;
205 cache-unified;
206 cache-level = <2>;
207 };
208
209 L2_CA7: cache-controller-1 {
210 compatible = "cache";
211 power-domains = <&sysc R8A7790_PD_CA7_SCU>;
212 cache-unified;
213 cache-level = <2>;
214 };
215 };
216
217 /* External root clock */
218 extal_clk: extal {
219 compatible = "fixed-clock";
220 #clock-cells = <0>;
221 /* This value must be overridden by the board. */
222 clock-frequency = <0>;
223 };
224
225 /* External PCIe clock - can be overridden by the board */
226 pcie_bus_clk: pcie_bus {
227 compatible = "fixed-clock";
228 #clock-cells = <0>;
229 clock-frequency = <0>;
230 };
231
232 pmu-0 {
233 compatible = "arm,cortex-a15-pmu";
234 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
235 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
236 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
237 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
238 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
239 };
240
241 pmu-1 {
242 compatible = "arm,cortex-a7-pmu";
243 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
244 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
245 <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
246 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
247 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
248 };
249
250 /* External SCIF clock */
251 scif_clk: scif {
252 compatible = "fixed-clock";
253 #clock-cells = <0>;
254 /* This value must be overridden by the board. */
255 clock-frequency = <0>;
256 };
257
258 soc {
259 compatible = "simple-bus";
260 interrupt-parent = <&gic>;
261
262 #address-cells = <2>;
263 #size-cells = <2>;
264 ranges;
265
266 rwdt: watchdog@e6020000 {
267 compatible = "renesas,r8a7790-wdt",
268 "renesas,rcar-gen2-wdt";
269 reg = <0 0xe6020000 0 0x0c>;
270 clocks = <&cpg CPG_MOD 402>;
271 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
272 resets = <&cpg 402>;
273 status = "disabled";
274 };
275
276 gpio0: gpio@e6050000 {
277 compatible = "renesas,gpio-r8a7790",
278 "renesas,rcar-gen2-gpio";
279 reg = <0 0xe6050000 0 0x50>;
280 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
281 #gpio-cells = <2>;
282 gpio-controller;
283 gpio-ranges = <&pfc 0 0 32>;
284 #interrupt-cells = <2>;
285 interrupt-controller;
286 clocks = <&cpg CPG_MOD 912>;
287 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
288 resets = <&cpg 912>;
289 };
290
291 gpio1: gpio@e6051000 {
292 compatible = "renesas,gpio-r8a7790",
293 "renesas,rcar-gen2-gpio";
294 reg = <0 0xe6051000 0 0x50>;
295 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
296 #gpio-cells = <2>;
297 gpio-controller;
298 gpio-ranges = <&pfc 0 32 30>;
299 #interrupt-cells = <2>;
300 interrupt-controller;
301 clocks = <&cpg CPG_MOD 911>;
302 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
303 resets = <&cpg 911>;
304 };
305
306 gpio2: gpio@e6052000 {
307 compatible = "renesas,gpio-r8a7790",
308 "renesas,rcar-gen2-gpio";
309 reg = <0 0xe6052000 0 0x50>;
310 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
311 #gpio-cells = <2>;
312 gpio-controller;
313 gpio-ranges = <&pfc 0 64 30>;
314 #interrupt-cells = <2>;
315 interrupt-controller;
316 clocks = <&cpg CPG_MOD 910>;
317 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
318 resets = <&cpg 910>;
319 };
320
321 gpio3: gpio@e6053000 {
322 compatible = "renesas,gpio-r8a7790",
323 "renesas,rcar-gen2-gpio";
324 reg = <0 0xe6053000 0 0x50>;
325 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
326 #gpio-cells = <2>;
327 gpio-controller;
328 gpio-ranges = <&pfc 0 96 32>;
329 #interrupt-cells = <2>;
330 interrupt-controller;
331 clocks = <&cpg CPG_MOD 909>;
332 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
333 resets = <&cpg 909>;
334 };
335
336 gpio4: gpio@e6054000 {
337 compatible = "renesas,gpio-r8a7790",
338 "renesas,rcar-gen2-gpio";
339 reg = <0 0xe6054000 0 0x50>;
340 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
341 #gpio-cells = <2>;
342 gpio-controller;
343 gpio-ranges = <&pfc 0 128 32>;
344 #interrupt-cells = <2>;
345 interrupt-controller;
346 clocks = <&cpg CPG_MOD 908>;
347 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
348 resets = <&cpg 908>;
349 };
350
351 gpio5: gpio@e6055000 {
352 compatible = "renesas,gpio-r8a7790",
353 "renesas,rcar-gen2-gpio";
354 reg = <0 0xe6055000 0 0x50>;
355 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
356 #gpio-cells = <2>;
357 gpio-controller;
358 gpio-ranges = <&pfc 0 160 32>;
359 #interrupt-cells = <2>;
360 interrupt-controller;
361 clocks = <&cpg CPG_MOD 907>;
362 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
363 resets = <&cpg 907>;
364 };
365
366 pfc: pin-controller@e6060000 {
367 compatible = "renesas,pfc-r8a7790";
368 reg = <0 0xe6060000 0 0x250>;
369 };
370
371 cpg: clock-controller@e6150000 {
372 compatible = "renesas,r8a7790-cpg-mssr";
373 reg = <0 0xe6150000 0 0x1000>;
374 clocks = <&extal_clk>, <&usb_extal_clk>;
375 clock-names = "extal", "usb_extal";
376 #clock-cells = <2>;
377 #power-domain-cells = <0>;
378 #reset-cells = <1>;
379 };
380
381 apmu@e6151000 {
382 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
383 reg = <0 0xe6151000 0 0x188>;
384 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
385 };
386
387 apmu@e6152000 {
388 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
389 reg = <0 0xe6152000 0 0x188>;
390 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
391 };
392
393 rst: reset-controller@e6160000 {
394 compatible = "renesas,r8a7790-rst";
395 reg = <0 0xe6160000 0 0x0100>;
396 };
397
398 sysc: system-controller@e6180000 {
399 compatible = "renesas,r8a7790-sysc";
400 reg = <0 0xe6180000 0 0x0200>;
401 #power-domain-cells = <1>;
402 };
403
404 irqc0: interrupt-controller@e61c0000 {
405 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
406 #interrupt-cells = <2>;
407 interrupt-controller;
408 reg = <0 0xe61c0000 0 0x200>;
409 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
410 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
411 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
412 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
413 clocks = <&cpg CPG_MOD 407>;
414 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
415 resets = <&cpg 407>;
416 };
417
418 thermal: thermal@e61f0000 {
419 compatible = "renesas,thermal-r8a7790",
420 "renesas,rcar-gen2-thermal",
421 "renesas,rcar-thermal";
422 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
423 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 522>;
425 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
426 resets = <&cpg 522>;
427 #thermal-sensor-cells = <0>;
428 };
429
430 ipmmu_sy0: iommu@e6280000 {
431 compatible = "renesas,ipmmu-r8a7790",
432 "renesas,ipmmu-vmsa";
433 reg = <0 0xe6280000 0 0x1000>;
434 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
435 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
436 #iommu-cells = <1>;
437 status = "disabled";
438 };
439
440 ipmmu_sy1: iommu@e6290000 {
441 compatible = "renesas,ipmmu-r8a7790",
442 "renesas,ipmmu-vmsa";
443 reg = <0 0xe6290000 0 0x1000>;
444 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
445 #iommu-cells = <1>;
446 status = "disabled";
447 };
448
449 ipmmu_ds: iommu@e6740000 {
450 compatible = "renesas,ipmmu-r8a7790",
451 "renesas,ipmmu-vmsa";
452 reg = <0 0xe6740000 0 0x1000>;
453 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
454 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
455 #iommu-cells = <1>;
456 status = "disabled";
457 };
458
459 ipmmu_mp: iommu@ec680000 {
460 compatible = "renesas,ipmmu-r8a7790",
461 "renesas,ipmmu-vmsa";
462 reg = <0 0xec680000 0 0x1000>;
463 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
464 #iommu-cells = <1>;
465 status = "disabled";
466 };
467
468 ipmmu_mx: iommu@fe951000 {
469 compatible = "renesas,ipmmu-r8a7790",
470 "renesas,ipmmu-vmsa";
471 reg = <0 0xfe951000 0 0x1000>;
472 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
473 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
474 #iommu-cells = <1>;
475 status = "disabled";
476 };
477
478 ipmmu_rt: iommu@ffc80000 {
479 compatible = "renesas,ipmmu-r8a7790",
480 "renesas,ipmmu-vmsa";
481 reg = <0 0xffc80000 0 0x1000>;
482 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
483 #iommu-cells = <1>;
484 status = "disabled";
485 };
486
487 icram0: sram@e63a0000 {
488 compatible = "mmio-sram";
489 reg = <0 0xe63a0000 0 0x12000>;
490 #address-cells = <1>;
491 #size-cells = <1>;
492 ranges = <0 0 0xe63a0000 0x12000>;
493 };
494
495 icram1: sram@e63c0000 {
496 compatible = "mmio-sram";
497 reg = <0 0xe63c0000 0 0x1000>;
498 #address-cells = <1>;
499 #size-cells = <1>;
500 ranges = <0 0 0xe63c0000 0x1000>;
501
502 smp-sram@0 {
503 compatible = "renesas,smp-sram";
504 reg = <0 0x100>;
505 };
506 };
507
508 i2c0: i2c@e6508000 {
509 #address-cells = <1>;
510 #size-cells = <0>;
511 compatible = "renesas,i2c-r8a7790",
512 "renesas,rcar-gen2-i2c";
513 reg = <0 0xe6508000 0 0x40>;
514 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
515 clocks = <&cpg CPG_MOD 931>;
516 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
517 resets = <&cpg 931>;
518 i2c-scl-internal-delay-ns = <110>;
519 status = "disabled";
520 };
521
522 i2c1: i2c@e6518000 {
523 #address-cells = <1>;
524 #size-cells = <0>;
525 compatible = "renesas,i2c-r8a7790",
526 "renesas,rcar-gen2-i2c";
527 reg = <0 0xe6518000 0 0x40>;
528 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
529 clocks = <&cpg CPG_MOD 930>;
530 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
531 resets = <&cpg 930>;
532 i2c-scl-internal-delay-ns = <6>;
533 status = "disabled";
534 };
535
536 i2c2: i2c@e6530000 {
537 #address-cells = <1>;
538 #size-cells = <0>;
539 compatible = "renesas,i2c-r8a7790",
540 "renesas,rcar-gen2-i2c";
541 reg = <0 0xe6530000 0 0x40>;
542 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
543 clocks = <&cpg CPG_MOD 929>;
544 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
545 resets = <&cpg 929>;
546 i2c-scl-internal-delay-ns = <6>;
547 status = "disabled";
548 };
549
550 i2c3: i2c@e6540000 {
551 #address-cells = <1>;
552 #size-cells = <0>;
553 compatible = "renesas,i2c-r8a7790",
554 "renesas,rcar-gen2-i2c";
555 reg = <0 0xe6540000 0 0x40>;
556 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
557 clocks = <&cpg CPG_MOD 928>;
558 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
559 resets = <&cpg 928>;
560 i2c-scl-internal-delay-ns = <110>;
561 status = "disabled";
562 };
563
564 iic0: i2c@e6500000 {
565 #address-cells = <1>;
566 #size-cells = <0>;
567 compatible = "renesas,iic-r8a7790",
568 "renesas,rcar-gen2-iic",
569 "renesas,rmobile-iic";
570 reg = <0 0xe6500000 0 0x425>;
571 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
572 clocks = <&cpg CPG_MOD 318>;
573 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
574 <&dmac1 0x61>, <&dmac1 0x62>;
575 dma-names = "tx", "rx", "tx", "rx";
576 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
577 resets = <&cpg 318>;
578 status = "disabled";
579 };
580
581 iic1: i2c@e6510000 {
582 #address-cells = <1>;
583 #size-cells = <0>;
584 compatible = "renesas,iic-r8a7790",
585 "renesas,rcar-gen2-iic",
586 "renesas,rmobile-iic";
587 reg = <0 0xe6510000 0 0x425>;
588 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
589 clocks = <&cpg CPG_MOD 323>;
590 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
591 <&dmac1 0x65>, <&dmac1 0x66>;
592 dma-names = "tx", "rx", "tx", "rx";
593 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
594 resets = <&cpg 323>;
595 status = "disabled";
596 };
597
598 iic2: i2c@e6520000 {
599 #address-cells = <1>;
600 #size-cells = <0>;
601 compatible = "renesas,iic-r8a7790",
602 "renesas,rcar-gen2-iic",
603 "renesas,rmobile-iic";
604 reg = <0 0xe6520000 0 0x425>;
605 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&cpg CPG_MOD 300>;
607 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
608 <&dmac1 0x69>, <&dmac1 0x6a>;
609 dma-names = "tx", "rx", "tx", "rx";
610 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
611 resets = <&cpg 300>;
612 status = "disabled";
613 };
614
615 iic3: i2c@e60b0000 {
616 #address-cells = <1>;
617 #size-cells = <0>;
618 compatible = "renesas,iic-r8a7790",
619 "renesas,rcar-gen2-iic",
620 "renesas,rmobile-iic";
621 reg = <0 0xe60b0000 0 0x425>;
622 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
623 clocks = <&cpg CPG_MOD 926>;
624 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
625 <&dmac1 0x77>, <&dmac1 0x78>;
626 dma-names = "tx", "rx", "tx", "rx";
627 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
628 resets = <&cpg 926>;
629 status = "disabled";
630 };
631
632 hsusb: usb@e6590000 {
633 compatible = "renesas,usbhs-r8a7790",
634 "renesas,rcar-gen2-usbhs";
635 reg = <0 0xe6590000 0 0x100>;
636 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&cpg CPG_MOD 704>;
638 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
639 <&usb_dmac1 0>, <&usb_dmac1 1>;
640 dma-names = "ch0", "ch1", "ch2", "ch3";
641 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
642 resets = <&cpg 704>;
643 renesas,buswait = <4>;
644 phys = <&usb0 1>;
645 phy-names = "usb";
646 status = "disabled";
647 };
648
649 usbphy: usb-phy@e6590100 {
650 compatible = "renesas,usb-phy-r8a7790",
651 "renesas,rcar-gen2-usb-phy";
652 reg = <0 0xe6590100 0 0x100>;
653 #address-cells = <1>;
654 #size-cells = <0>;
655 clocks = <&cpg CPG_MOD 704>;
656 clock-names = "usbhs";
657 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
658 resets = <&cpg 704>;
659 status = "disabled";
660
661 usb0: usb-channel@0 {
662 reg = <0>;
663 #phy-cells = <1>;
664 };
665 usb2: usb-channel@2 {
666 reg = <2>;
667 #phy-cells = <1>;
668 };
669 };
670
671 usb_dmac0: dma-controller@e65a0000 {
672 compatible = "renesas,r8a7790-usb-dmac",
673 "renesas,usb-dmac";
674 reg = <0 0xe65a0000 0 0x100>;
675 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
676 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
677 interrupt-names = "ch0", "ch1";
678 clocks = <&cpg CPG_MOD 330>;
679 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
680 resets = <&cpg 330>;
681 #dma-cells = <1>;
682 dma-channels = <2>;
683 };
684
685 usb_dmac1: dma-controller@e65b0000 {
686 compatible = "renesas,r8a7790-usb-dmac",
687 "renesas,usb-dmac";
688 reg = <0 0xe65b0000 0 0x100>;
689 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
690 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
691 interrupt-names = "ch0", "ch1";
692 clocks = <&cpg CPG_MOD 331>;
693 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
694 resets = <&cpg 331>;
695 #dma-cells = <1>;
696 dma-channels = <2>;
697 };
698
699 dmac0: dma-controller@e6700000 {
700 compatible = "renesas,dmac-r8a7790",
701 "renesas,rcar-dmac";
702 reg = <0 0xe6700000 0 0x20000>;
703 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
704 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
705 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
706 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
707 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
708 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
709 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
710 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
711 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
712 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
713 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
714 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
715 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
716 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
717 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
718 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
719 interrupt-names = "error",
720 "ch0", "ch1", "ch2", "ch3",
721 "ch4", "ch5", "ch6", "ch7",
722 "ch8", "ch9", "ch10", "ch11",
723 "ch12", "ch13", "ch14";
724 clocks = <&cpg CPG_MOD 219>;
725 clock-names = "fck";
726 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
727 resets = <&cpg 219>;
728 #dma-cells = <1>;
729 dma-channels = <15>;
730 };
731
732 dmac1: dma-controller@e6720000 {
733 compatible = "renesas,dmac-r8a7790",
734 "renesas,rcar-dmac";
735 reg = <0 0xe6720000 0 0x20000>;
736 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
737 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
738 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
739 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
740 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
741 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
742 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
743 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
744 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
745 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
746 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
747 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
748 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
749 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
750 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
751 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
752 interrupt-names = "error",
753 "ch0", "ch1", "ch2", "ch3",
754 "ch4", "ch5", "ch6", "ch7",
755 "ch8", "ch9", "ch10", "ch11",
756 "ch12", "ch13", "ch14";
757 clocks = <&cpg CPG_MOD 218>;
758 clock-names = "fck";
759 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
760 resets = <&cpg 218>;
761 #dma-cells = <1>;
762 dma-channels = <15>;
763 };
764
765 avb: ethernet@e6800000 {
766 compatible = "renesas,etheravb-r8a7790",
767 "renesas,etheravb-rcar-gen2";
768 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
769 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
770 clocks = <&cpg CPG_MOD 812>;
771 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
772 resets = <&cpg 812>;
773 #address-cells = <1>;
774 #size-cells = <0>;
775 status = "disabled";
776 };
777
778 qspi: spi@e6b10000 {
779 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
780 reg = <0 0xe6b10000 0 0x2c>;
781 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
782 clocks = <&cpg CPG_MOD 917>;
783 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
784 <&dmac1 0x17>, <&dmac1 0x18>;
785 dma-names = "tx", "rx", "tx", "rx";
786 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
787 resets = <&cpg 917>;
788 num-cs = <1>;
789 #address-cells = <1>;
790 #size-cells = <0>;
791 status = "disabled";
792 };
793
794 scifa0: serial@e6c40000 {
795 compatible = "renesas,scifa-r8a7790",
796 "renesas,rcar-gen2-scifa", "renesas,scifa";
797 reg = <0 0xe6c40000 0 64>;
798 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
799 clocks = <&cpg CPG_MOD 204>;
800 clock-names = "fck";
801 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
802 <&dmac1 0x21>, <&dmac1 0x22>;
803 dma-names = "tx", "rx", "tx", "rx";
804 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
805 resets = <&cpg 204>;
806 status = "disabled";
807 };
808
809 scifa1: serial@e6c50000 {
810 compatible = "renesas,scifa-r8a7790",
811 "renesas,rcar-gen2-scifa", "renesas,scifa";
812 reg = <0 0xe6c50000 0 64>;
813 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
814 clocks = <&cpg CPG_MOD 203>;
815 clock-names = "fck";
816 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
817 <&dmac1 0x25>, <&dmac1 0x26>;
818 dma-names = "tx", "rx", "tx", "rx";
819 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
820 resets = <&cpg 203>;
821 status = "disabled";
822 };
823
824 scifa2: serial@e6c60000 {
825 compatible = "renesas,scifa-r8a7790",
826 "renesas,rcar-gen2-scifa", "renesas,scifa";
827 reg = <0 0xe6c60000 0 64>;
828 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&cpg CPG_MOD 202>;
830 clock-names = "fck";
831 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
832 <&dmac1 0x27>, <&dmac1 0x28>;
833 dma-names = "tx", "rx", "tx", "rx";
834 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
835 resets = <&cpg 202>;
836 status = "disabled";
837 };
838
839 scifb0: serial@e6c20000 {
840 compatible = "renesas,scifb-r8a7790",
841 "renesas,rcar-gen2-scifb", "renesas,scifb";
842 reg = <0 0xe6c20000 0 0x100>;
843 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
844 clocks = <&cpg CPG_MOD 206>;
845 clock-names = "fck";
846 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
847 <&dmac1 0x3d>, <&dmac1 0x3e>;
848 dma-names = "tx", "rx", "tx", "rx";
849 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
850 resets = <&cpg 206>;
851 status = "disabled";
852 };
853
854 scifb1: serial@e6c30000 {
855 compatible = "renesas,scifb-r8a7790",
856 "renesas,rcar-gen2-scifb", "renesas,scifb";
857 reg = <0 0xe6c30000 0 0x100>;
858 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
859 clocks = <&cpg CPG_MOD 207>;
860 clock-names = "fck";
861 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
862 <&dmac1 0x19>, <&dmac1 0x1a>;
863 dma-names = "tx", "rx", "tx", "rx";
864 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
865 resets = <&cpg 207>;
866 status = "disabled";
867 };
868
869 scifb2: serial@e6ce0000 {
870 compatible = "renesas,scifb-r8a7790",
871 "renesas,rcar-gen2-scifb", "renesas,scifb";
872 reg = <0 0xe6ce0000 0 0x100>;
873 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
874 clocks = <&cpg CPG_MOD 216>;
875 clock-names = "fck";
876 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
877 <&dmac1 0x1d>, <&dmac1 0x1e>;
878 dma-names = "tx", "rx", "tx", "rx";
879 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
880 resets = <&cpg 216>;
881 status = "disabled";
882 };
883
884 scif0: serial@e6e60000 {
885 compatible = "renesas,scif-r8a7790",
886 "renesas,rcar-gen2-scif",
887 "renesas,scif";
888 reg = <0 0xe6e60000 0 64>;
889 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
890 clocks = <&cpg CPG_MOD 721>,
891 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
892 clock-names = "fck", "brg_int", "scif_clk";
893 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
894 <&dmac1 0x29>, <&dmac1 0x2a>;
895 dma-names = "tx", "rx", "tx", "rx";
896 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
897 resets = <&cpg 721>;
898 status = "disabled";
899 };
900
901 scif1: serial@e6e68000 {
902 compatible = "renesas,scif-r8a7790",
903 "renesas,rcar-gen2-scif",
904 "renesas,scif";
905 reg = <0 0xe6e68000 0 64>;
906 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
907 clocks = <&cpg CPG_MOD 720>,
908 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
909 clock-names = "fck", "brg_int", "scif_clk";
910 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
911 <&dmac1 0x2d>, <&dmac1 0x2e>;
912 dma-names = "tx", "rx", "tx", "rx";
913 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
914 resets = <&cpg 720>;
915 status = "disabled";
916 };
917
918 scif2: serial@e6e56000 {
919 compatible = "renesas,scif-r8a7790",
920 "renesas,rcar-gen2-scif",
921 "renesas,scif";
922 reg = <0 0xe6e56000 0 64>;
923 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
924 clocks = <&cpg CPG_MOD 310>,
925 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
926 clock-names = "fck", "brg_int", "scif_clk";
927 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
928 <&dmac1 0x2b>, <&dmac1 0x2c>;
929 dma-names = "tx", "rx", "tx", "rx";
930 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
931 resets = <&cpg 310>;
932 status = "disabled";
933 };
934
935 hscif0: serial@e62c0000 {
936 compatible = "renesas,hscif-r8a7790",
937 "renesas,rcar-gen2-hscif", "renesas,hscif";
938 reg = <0 0xe62c0000 0 96>;
939 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
940 clocks = <&cpg CPG_MOD 717>,
941 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
942 clock-names = "fck", "brg_int", "scif_clk";
943 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
944 <&dmac1 0x39>, <&dmac1 0x3a>;
945 dma-names = "tx", "rx", "tx", "rx";
946 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
947 resets = <&cpg 717>;
948 status = "disabled";
949 };
950
951 hscif1: serial@e62c8000 {
952 compatible = "renesas,hscif-r8a7790",
953 "renesas,rcar-gen2-hscif", "renesas,hscif";
954 reg = <0 0xe62c8000 0 96>;
955 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
956 clocks = <&cpg CPG_MOD 716>,
957 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
958 clock-names = "fck", "brg_int", "scif_clk";
959 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
960 <&dmac1 0x4d>, <&dmac1 0x4e>;
961 dma-names = "tx", "rx", "tx", "rx";
962 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
963 resets = <&cpg 716>;
964 status = "disabled";
965 };
966
967 msiof0: spi@e6e20000 {
968 compatible = "renesas,msiof-r8a7790",
969 "renesas,rcar-gen2-msiof";
970 reg = <0 0xe6e20000 0 0x0064>;
971 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
972 clocks = <&cpg CPG_MOD 0>;
973 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
974 <&dmac1 0x51>, <&dmac1 0x52>;
975 dma-names = "tx", "rx", "tx", "rx";
976 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
977 resets = <&cpg 0>;
978 #address-cells = <1>;
979 #size-cells = <0>;
980 status = "disabled";
981 };
982
983 msiof1: spi@e6e10000 {
984 compatible = "renesas,msiof-r8a7790",
985 "renesas,rcar-gen2-msiof";
986 reg = <0 0xe6e10000 0 0x0064>;
987 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
988 clocks = <&cpg CPG_MOD 208>;
989 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
990 <&dmac1 0x55>, <&dmac1 0x56>;
991 dma-names = "tx", "rx", "tx", "rx";
992 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
993 resets = <&cpg 208>;
994 #address-cells = <1>;
995 #size-cells = <0>;
996 status = "disabled";
997 };
998
999 msiof2: spi@e6e00000 {
1000 compatible = "renesas,msiof-r8a7790",
1001 "renesas,rcar-gen2-msiof";
1002 reg = <0 0xe6e00000 0 0x0064>;
1003 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1004 clocks = <&cpg CPG_MOD 205>;
1005 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1006 <&dmac1 0x41>, <&dmac1 0x42>;
1007 dma-names = "tx", "rx", "tx", "rx";
1008 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1009 resets = <&cpg 205>;
1010 #address-cells = <1>;
1011 #size-cells = <0>;
1012 status = "disabled";
1013 };
1014
1015 msiof3: spi@e6c90000 {
1016 compatible = "renesas,msiof-r8a7790",
1017 "renesas,rcar-gen2-msiof";
1018 reg = <0 0xe6c90000 0 0x0064>;
1019 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1020 clocks = <&cpg CPG_MOD 215>;
1021 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1022 <&dmac1 0x45>, <&dmac1 0x46>;
1023 dma-names = "tx", "rx", "tx", "rx";
1024 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1025 resets = <&cpg 215>;
1026 #address-cells = <1>;
1027 #size-cells = <0>;
1028 status = "disabled";
1029 };
1030
1031 can0: can@e6e80000 {
1032 compatible = "renesas,can-r8a7790",
1033 "renesas,rcar-gen2-can";
1034 reg = <0 0xe6e80000 0 0x1000>;
1035 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1036 clocks = <&cpg CPG_MOD 916>,
1037 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1038 clock-names = "clkp1", "clkp2", "can_clk";
1039 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1040 resets = <&cpg 916>;
1041 status = "disabled";
1042 };
1043
1044 can1: can@e6e88000 {
1045 compatible = "renesas,can-r8a7790",
1046 "renesas,rcar-gen2-can";
1047 reg = <0 0xe6e88000 0 0x1000>;
1048 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1049 clocks = <&cpg CPG_MOD 915>,
1050 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1051 clock-names = "clkp1", "clkp2", "can_clk";
1052 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1053 resets = <&cpg 915>;
1054 status = "disabled";
1055 };
1056
1057 vin0: video@e6ef0000 {
1058 compatible = "renesas,vin-r8a7790",
1059 "renesas,rcar-gen2-vin";
1060 reg = <0 0xe6ef0000 0 0x1000>;
1061 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1062 clocks = <&cpg CPG_MOD 811>;
1063 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1064 resets = <&cpg 811>;
1065 status = "disabled";
1066 };
1067
1068 vin1: video@e6ef1000 {
1069 compatible = "renesas,vin-r8a7790",
1070 "renesas,rcar-gen2-vin";
1071 reg = <0 0xe6ef1000 0 0x1000>;
1072 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1073 clocks = <&cpg CPG_MOD 810>;
1074 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1075 resets = <&cpg 810>;
1076 status = "disabled";
1077 };
1078
1079 vin2: video@e6ef2000 {
1080 compatible = "renesas,vin-r8a7790",
1081 "renesas,rcar-gen2-vin";
1082 reg = <0 0xe6ef2000 0 0x1000>;
1083 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1084 clocks = <&cpg CPG_MOD 809>;
1085 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1086 resets = <&cpg 809>;
1087 status = "disabled";
1088 };
1089
1090 vin3: video@e6ef3000 {
1091 compatible = "renesas,vin-r8a7790",
1092 "renesas,rcar-gen2-vin";
1093 reg = <0 0xe6ef3000 0 0x1000>;
1094 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1095 clocks = <&cpg CPG_MOD 808>;
1096 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1097 resets = <&cpg 808>;
1098 status = "disabled";
1099 };
1100
1101 rcar_sound: sound@ec500000 {
1102 /*
1103 * #sound-dai-cells is required
1104 *
1105 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1106 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1107 */
1108 compatible = "renesas,rcar_sound-r8a7790",
1109 "renesas,rcar_sound-gen2";
1110 reg = <0 0xec500000 0 0x1000>, /* SCU */
1111 <0 0xec5a0000 0 0x100>, /* ADG */
1112 <0 0xec540000 0 0x1000>, /* SSIU */
1113 <0 0xec541000 0 0x280>, /* SSI */
1114 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1115 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1116
1117 clocks = <&cpg CPG_MOD 1005>,
1118 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1119 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1120 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1121 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1122 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1123 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1124 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1125 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1126 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1127 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1128 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1129 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1130 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1131 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1132 <&cpg CPG_CORE R8A7790_CLK_M2>;
1133 clock-names = "ssi-all",
1134 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1135 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1136 "ssi.1", "ssi.0",
1137 "src.9", "src.8", "src.7", "src.6",
1138 "src.5", "src.4", "src.3", "src.2",
1139 "src.1", "src.0",
1140 "ctu.0", "ctu.1",
1141 "mix.0", "mix.1",
1142 "dvc.0", "dvc.1",
1143 "clk_a", "clk_b", "clk_c", "clk_i";
1144 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1145 resets = <&cpg 1005>,
1146 <&cpg 1006>, <&cpg 1007>,
1147 <&cpg 1008>, <&cpg 1009>,
1148 <&cpg 1010>, <&cpg 1011>,
1149 <&cpg 1012>, <&cpg 1013>,
1150 <&cpg 1014>, <&cpg 1015>;
1151 reset-names = "ssi-all",
1152 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1153 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1154 "ssi.1", "ssi.0";
1155
1156 status = "disabled";
1157
1158 rcar_sound,dvc {
1159 dvc0: dvc-0 {
1160 dmas = <&audma1 0xbc>;
1161 dma-names = "tx";
1162 };
1163 dvc1: dvc-1 {
1164 dmas = <&audma1 0xbe>;
1165 dma-names = "tx";
1166 };
1167 };
1168
1169 rcar_sound,mix {
1170 mix0: mix-0 { };
1171 mix1: mix-1 { };
1172 };
1173
1174 rcar_sound,ctu {
1175 ctu00: ctu-0 { };
1176 ctu01: ctu-1 { };
1177 ctu02: ctu-2 { };
1178 ctu03: ctu-3 { };
1179 ctu10: ctu-4 { };
1180 ctu11: ctu-5 { };
1181 ctu12: ctu-6 { };
1182 ctu13: ctu-7 { };
1183 };
1184
1185 rcar_sound,src {
1186 src0: src-0 {
1187 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1188 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1189 dma-names = "rx", "tx";
1190 };
1191 src1: src-1 {
1192 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1193 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1194 dma-names = "rx", "tx";
1195 };
1196 src2: src-2 {
1197 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1198 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1199 dma-names = "rx", "tx";
1200 };
1201 src3: src-3 {
1202 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1203 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1204 dma-names = "rx", "tx";
1205 };
1206 src4: src-4 {
1207 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1208 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1209 dma-names = "rx", "tx";
1210 };
1211 src5: src-5 {
1212 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1213 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1214 dma-names = "rx", "tx";
1215 };
1216 src6: src-6 {
1217 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1218 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1219 dma-names = "rx", "tx";
1220 };
1221 src7: src-7 {
1222 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1223 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1224 dma-names = "rx", "tx";
1225 };
1226 src8: src-8 {
1227 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1228 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1229 dma-names = "rx", "tx";
1230 };
1231 src9: src-9 {
1232 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1233 dmas = <&audma0 0x97>, <&audma1 0xba>;
1234 dma-names = "rx", "tx";
1235 };
1236 };
1237
1238 rcar_sound,ssi {
1239 ssi0: ssi-0 {
1240 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1241 dmas = <&audma0 0x01>, <&audma1 0x02>,
1242 <&audma0 0x15>, <&audma1 0x16>;
1243 dma-names = "rx", "tx", "rxu", "txu";
1244 };
1245 ssi1: ssi-1 {
1246 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1247 dmas = <&audma0 0x03>, <&audma1 0x04>,
1248 <&audma0 0x49>, <&audma1 0x4a>;
1249 dma-names = "rx", "tx", "rxu", "txu";
1250 };
1251 ssi2: ssi-2 {
1252 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1253 dmas = <&audma0 0x05>, <&audma1 0x06>,
1254 <&audma0 0x63>, <&audma1 0x64>;
1255 dma-names = "rx", "tx", "rxu", "txu";
1256 };
1257 ssi3: ssi-3 {
1258 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1259 dmas = <&audma0 0x07>, <&audma1 0x08>,
1260 <&audma0 0x6f>, <&audma1 0x70>;
1261 dma-names = "rx", "tx", "rxu", "txu";
1262 };
1263 ssi4: ssi-4 {
1264 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1265 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1266 <&audma0 0x71>, <&audma1 0x72>;
1267 dma-names = "rx", "tx", "rxu", "txu";
1268 };
1269 ssi5: ssi-5 {
1270 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1271 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1272 <&audma0 0x73>, <&audma1 0x74>;
1273 dma-names = "rx", "tx", "rxu", "txu";
1274 };
1275 ssi6: ssi-6 {
1276 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1277 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1278 <&audma0 0x75>, <&audma1 0x76>;
1279 dma-names = "rx", "tx", "rxu", "txu";
1280 };
1281 ssi7: ssi-7 {
1282 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1283 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1284 <&audma0 0x79>, <&audma1 0x7a>;
1285 dma-names = "rx", "tx", "rxu", "txu";
1286 };
1287 ssi8: ssi-8 {
1288 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1289 dmas = <&audma0 0x11>, <&audma1 0x12>,
1290 <&audma0 0x7b>, <&audma1 0x7c>;
1291 dma-names = "rx", "tx", "rxu", "txu";
1292 };
1293 ssi9: ssi-9 {
1294 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1295 dmas = <&audma0 0x13>, <&audma1 0x14>,
1296 <&audma0 0x7d>, <&audma1 0x7e>;
1297 dma-names = "rx", "tx", "rxu", "txu";
1298 };
1299 };
1300 };
1301
1302 audma0: dma-controller@ec700000 {
1303 compatible = "renesas,dmac-r8a7790",
1304 "renesas,rcar-dmac";
1305 reg = <0 0xec700000 0 0x10000>;
1306 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1307 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1308 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1309 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1310 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1311 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1312 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1313 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1314 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1315 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1316 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1317 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1318 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1319 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1320 interrupt-names = "error",
1321 "ch0", "ch1", "ch2", "ch3",
1322 "ch4", "ch5", "ch6", "ch7",
1323 "ch8", "ch9", "ch10", "ch11",
1324 "ch12";
1325 clocks = <&cpg CPG_MOD 502>;
1326 clock-names = "fck";
1327 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1328 resets = <&cpg 502>;
1329 #dma-cells = <1>;
1330 dma-channels = <13>;
1331 };
1332
1333 audma1: dma-controller@ec720000 {
1334 compatible = "renesas,dmac-r8a7790",
1335 "renesas,rcar-dmac";
1336 reg = <0 0xec720000 0 0x10000>;
1337 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1338 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1339 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1340 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1341 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1342 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1343 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1344 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1345 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1346 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1347 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1348 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1349 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1350 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1351 interrupt-names = "error",
1352 "ch0", "ch1", "ch2", "ch3",
1353 "ch4", "ch5", "ch6", "ch7",
1354 "ch8", "ch9", "ch10", "ch11",
1355 "ch12";
1356 clocks = <&cpg CPG_MOD 501>;
1357 clock-names = "fck";
1358 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1359 resets = <&cpg 501>;
1360 #dma-cells = <1>;
1361 dma-channels = <13>;
1362 };
1363
1364 xhci: usb@ee000000 {
1365 compatible = "renesas,xhci-r8a7790",
1366 "renesas,rcar-gen2-xhci";
1367 reg = <0 0xee000000 0 0xc00>;
1368 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1369 clocks = <&cpg CPG_MOD 328>;
1370 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1371 resets = <&cpg 328>;
1372 phys = <&usb2 1>;
1373 phy-names = "usb";
1374 status = "disabled";
1375 };
1376
1377 pci0: pci@ee090000 {
1378 compatible = "renesas,pci-r8a7790",
1379 "renesas,pci-rcar-gen2";
1380 device_type = "pci";
1381 reg = <0 0xee090000 0 0xc00>,
1382 <0 0xee080000 0 0x1100>;
1383 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1384 clocks = <&cpg CPG_MOD 703>;
1385 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1386 resets = <&cpg 703>;
1387 status = "disabled";
1388
1389 bus-range = <0 0>;
1390 #address-cells = <3>;
1391 #size-cells = <2>;
1392 #interrupt-cells = <1>;
1393 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1394 interrupt-map-mask = <0xf800 0 0 0x7>;
1395 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1396 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1397 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1398
1399 usb@1,0 {
1400 reg = <0x800 0 0 0 0>;
1401 phys = <&usb0 0>;
1402 phy-names = "usb";
1403 };
1404
1405 usb@2,0 {
1406 reg = <0x1000 0 0 0 0>;
1407 phys = <&usb0 0>;
1408 phy-names = "usb";
1409 };
1410 };
1411
1412 pci1: pci@ee0b0000 {
1413 compatible = "renesas,pci-r8a7790",
1414 "renesas,pci-rcar-gen2";
1415 device_type = "pci";
1416 reg = <0 0xee0b0000 0 0xc00>,
1417 <0 0xee0a0000 0 0x1100>;
1418 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1419 clocks = <&cpg CPG_MOD 703>;
1420 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1421 resets = <&cpg 703>;
1422 status = "disabled";
1423
1424 bus-range = <1 1>;
1425 #address-cells = <3>;
1426 #size-cells = <2>;
1427 #interrupt-cells = <1>;
1428 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1429 interrupt-map-mask = <0xf800 0 0 0x7>;
1430 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1431 <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1432 <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1433 };
1434
1435 pci2: pci@ee0d0000 {
1436 compatible = "renesas,pci-r8a7790",
1437 "renesas,pci-rcar-gen2";
1438 device_type = "pci";
1439 clocks = <&cpg CPG_MOD 703>;
1440 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1441 resets = <&cpg 703>;
1442 reg = <0 0xee0d0000 0 0xc00>,
1443 <0 0xee0c0000 0 0x1100>;
1444 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1445 status = "disabled";
1446
1447 bus-range = <2 2>;
1448 #address-cells = <3>;
1449 #size-cells = <2>;
1450 #interrupt-cells = <1>;
1451 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1452 interrupt-map-mask = <0xf800 0 0 0x7>;
1453 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1454 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1455 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1456
1457 usb@1,0 {
1458 reg = <0x20800 0 0 0 0>;
1459 phys = <&usb2 0>;
1460 phy-names = "usb";
1461 };
1462
1463 usb@2,0 {
1464 reg = <0x21000 0 0 0 0>;
1465 phys = <&usb2 0>;
1466 phy-names = "usb";
1467 };
1468 };
1469
1470 sdhi0: mmc@ee100000 {
1471 compatible = "renesas,sdhi-r8a7790",
1472 "renesas,rcar-gen2-sdhi";
1473 reg = <0 0xee100000 0 0x328>;
1474 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1475 clocks = <&cpg CPG_MOD 314>;
1476 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1477 <&dmac1 0xcd>, <&dmac1 0xce>;
1478 dma-names = "tx", "rx", "tx", "rx";
1479 max-frequency = <195000000>;
1480 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1481 resets = <&cpg 314>;
1482 status = "disabled";
1483 };
1484
1485 sdhi1: mmc@ee120000 {
1486 compatible = "renesas,sdhi-r8a7790",
1487 "renesas,rcar-gen2-sdhi";
1488 reg = <0 0xee120000 0 0x328>;
1489 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1490 clocks = <&cpg CPG_MOD 313>;
1491 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1492 <&dmac1 0xc9>, <&dmac1 0xca>;
1493 dma-names = "tx", "rx", "tx", "rx";
1494 max-frequency = <195000000>;
1495 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1496 resets = <&cpg 313>;
1497 status = "disabled";
1498 };
1499
1500 sdhi2: mmc@ee140000 {
1501 compatible = "renesas,sdhi-r8a7790",
1502 "renesas,rcar-gen2-sdhi";
1503 reg = <0 0xee140000 0 0x100>;
1504 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1505 clocks = <&cpg CPG_MOD 312>;
1506 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1507 <&dmac1 0xc1>, <&dmac1 0xc2>;
1508 dma-names = "tx", "rx", "tx", "rx";
1509 max-frequency = <97500000>;
1510 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1511 resets = <&cpg 312>;
1512 status = "disabled";
1513 };
1514
1515 sdhi3: mmc@ee160000 {
1516 compatible = "renesas,sdhi-r8a7790",
1517 "renesas,rcar-gen2-sdhi";
1518 reg = <0 0xee160000 0 0x100>;
1519 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1520 clocks = <&cpg CPG_MOD 311>;
1521 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1522 <&dmac1 0xd3>, <&dmac1 0xd4>;
1523 dma-names = "tx", "rx", "tx", "rx";
1524 max-frequency = <97500000>;
1525 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1526 resets = <&cpg 311>;
1527 status = "disabled";
1528 };
1529
1530 mmcif0: mmc@ee200000 {
1531 compatible = "renesas,mmcif-r8a7790",
1532 "renesas,sh-mmcif";
1533 reg = <0 0xee200000 0 0x80>;
1534 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1535 clocks = <&cpg CPG_MOD 315>;
1536 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1537 <&dmac1 0xd1>, <&dmac1 0xd2>;
1538 dma-names = "tx", "rx", "tx", "rx";
1539 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1540 resets = <&cpg 315>;
1541 reg-io-width = <4>;
1542 status = "disabled";
1543 max-frequency = <97500000>;
1544 };
1545
1546 mmcif1: mmc@ee220000 {
1547 compatible = "renesas,mmcif-r8a7790",
1548 "renesas,sh-mmcif";
1549 reg = <0 0xee220000 0 0x80>;
1550 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1551 clocks = <&cpg CPG_MOD 305>;
1552 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1553 <&dmac1 0xe1>, <&dmac1 0xe2>;
1554 dma-names = "tx", "rx", "tx", "rx";
1555 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1556 resets = <&cpg 305>;
1557 reg-io-width = <4>;
1558 status = "disabled";
1559 max-frequency = <97500000>;
1560 };
1561
1562 sata0: sata@ee300000 {
1563 compatible = "renesas,sata-r8a7790",
1564 "renesas,rcar-gen2-sata";
1565 reg = <0 0xee300000 0 0x200000>;
1566 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1567 clocks = <&cpg CPG_MOD 815>;
1568 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1569 resets = <&cpg 815>;
1570 status = "disabled";
1571 };
1572
1573 sata1: sata@ee500000 {
1574 compatible = "renesas,sata-r8a7790",
1575 "renesas,rcar-gen2-sata";
1576 reg = <0 0xee500000 0 0x200000>;
1577 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1578 clocks = <&cpg CPG_MOD 814>;
1579 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1580 resets = <&cpg 814>;
1581 status = "disabled";
1582 };
1583
1584 ether: ethernet@ee700000 {
1585 compatible = "renesas,ether-r8a7790",
1586 "renesas,rcar-gen2-ether";
1587 reg = <0 0xee700000 0 0x400>;
1588 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1589 clocks = <&cpg CPG_MOD 813>;
1590 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1591 resets = <&cpg 813>;
1592 phy-mode = "rmii";
1593 #address-cells = <1>;
1594 #size-cells = <0>;
1595 status = "disabled";
1596 };
1597
1598 gic: interrupt-controller@f1001000 {
1599 compatible = "arm,gic-400";
1600 #interrupt-cells = <3>;
1601 #address-cells = <0>;
1602 interrupt-controller;
1603 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1604 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1605 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1606 clocks = <&cpg CPG_MOD 408>;
1607 clock-names = "clk";
1608 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1609 resets = <&cpg 408>;
1610 };
1611
1612 pciec: pcie@fe000000 {
1613 compatible = "renesas,pcie-r8a7790",
1614 "renesas,pcie-rcar-gen2";
1615 reg = <0 0xfe000000 0 0x80000>;
1616 #address-cells = <3>;
1617 #size-cells = <2>;
1618 bus-range = <0x00 0xff>;
1619 device_type = "pci";
1620 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1621 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1622 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1623 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1624 /* Map all possible DDR as inbound ranges */
1625 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1626 <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1627 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1628 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1629 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1630 #interrupt-cells = <1>;
1631 interrupt-map-mask = <0 0 0 0>;
1632 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1633 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1634 clock-names = "pcie", "pcie_bus";
1635 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1636 resets = <&cpg 319>;
1637 status = "disabled";
1638 };
1639
1640 vsp@fe920000 {
1641 compatible = "renesas,vsp1";
1642 reg = <0 0xfe920000 0 0x8000>;
1643 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1644 clocks = <&cpg CPG_MOD 130>;
1645 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1646 resets = <&cpg 130>;
1647 };
1648
1649 vsp@fe928000 {
1650 compatible = "renesas,vsp1";
1651 reg = <0 0xfe928000 0 0x8000>;
1652 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1653 clocks = <&cpg CPG_MOD 131>;
1654 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1655 resets = <&cpg 131>;
1656 };
1657
1658 vsp@fe930000 {
1659 compatible = "renesas,vsp1";
1660 reg = <0 0xfe930000 0 0x8000>;
1661 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1662 clocks = <&cpg CPG_MOD 128>;
1663 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1664 resets = <&cpg 128>;
1665 };
1666
1667 vsp@fe938000 {
1668 compatible = "renesas,vsp1";
1669 reg = <0 0xfe938000 0 0x8000>;
1670 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1671 clocks = <&cpg CPG_MOD 127>;
1672 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1673 resets = <&cpg 127>;
1674 };
1675
1676 fdp1@fe940000 {
1677 compatible = "renesas,fdp1";
1678 reg = <0 0xfe940000 0 0x2400>;
1679 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1680 clocks = <&cpg CPG_MOD 119>;
1681 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1682 resets = <&cpg 119>;
1683 };
1684
1685 fdp1@fe944000 {
1686 compatible = "renesas,fdp1";
1687 reg = <0 0xfe944000 0 0x2400>;
1688 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1689 clocks = <&cpg CPG_MOD 118>;
1690 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1691 resets = <&cpg 118>;
1692 };
1693
1694 fdp1@fe948000 {
1695 compatible = "renesas,fdp1";
1696 reg = <0 0xfe948000 0 0x2400>;
1697 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1698 clocks = <&cpg CPG_MOD 117>;
1699 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1700 resets = <&cpg 117>;
1701 };
1702
1703 jpu: jpeg-codec@fe980000 {
1704 compatible = "renesas,jpu-r8a7790",
1705 "renesas,rcar-gen2-jpu";
1706 reg = <0 0xfe980000 0 0x10300>;
1707 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1708 clocks = <&cpg CPG_MOD 106>;
1709 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1710 resets = <&cpg 106>;
1711 };
1712
1713 du: display@feb00000 {
1714 compatible = "renesas,du-r8a7790";
1715 reg = <0 0xfeb00000 0 0x70000>;
1716 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1717 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1718 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1719 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1720 <&cpg CPG_MOD 722>;
1721 clock-names = "du.0", "du.1", "du.2";
1722 resets = <&cpg 724>;
1723 reset-names = "du.0";
1724 status = "disabled";
1725
1726 ports {
1727 #address-cells = <1>;
1728 #size-cells = <0>;
1729
1730 port@0 {
1731 reg = <0>;
1732 du_out_rgb: endpoint {
1733 };
1734 };
1735 port@1 {
1736 reg = <1>;
1737 du_out_lvds0: endpoint {
1738 remote-endpoint = <&lvds0_in>;
1739 };
1740 };
1741 port@2 {
1742 reg = <2>;
1743 du_out_lvds1: endpoint {
1744 remote-endpoint = <&lvds1_in>;
1745 };
1746 };
1747 };
1748 };
1749
1750 lvds0: lvds@feb90000 {
1751 compatible = "renesas,r8a7790-lvds";
1752 reg = <0 0xfeb90000 0 0x1c>;
1753 clocks = <&cpg CPG_MOD 726>;
1754 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1755 resets = <&cpg 726>;
1756 status = "disabled";
1757
1758 ports {
1759 #address-cells = <1>;
1760 #size-cells = <0>;
1761
1762 port@0 {
1763 reg = <0>;
1764 lvds0_in: endpoint {
1765 remote-endpoint = <&du_out_lvds0>;
1766 };
1767 };
1768 port@1 {
1769 reg = <1>;
1770 lvds0_out: endpoint {
1771 };
1772 };
1773 };
1774 };
1775
1776 lvds1: lvds@feb94000 {
1777 compatible = "renesas,r8a7790-lvds";
1778 reg = <0 0xfeb94000 0 0x1c>;
1779 clocks = <&cpg CPG_MOD 725>;
1780 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1781 resets = <&cpg 725>;
1782 status = "disabled";
1783
1784 ports {
1785 #address-cells = <1>;
1786 #size-cells = <0>;
1787
1788 port@0 {
1789 reg = <0>;
1790 lvds1_in: endpoint {
1791 remote-endpoint = <&du_out_lvds1>;
1792 };
1793 };
1794 port@1 {
1795 reg = <1>;
1796 lvds1_out: endpoint {
1797 };
1798 };
1799 };
1800 };
1801
1802 prr: chipid@ff000044 {
1803 compatible = "renesas,prr";
1804 reg = <0 0xff000044 0 4>;
1805 };
1806
1807 cmt0: timer@ffca0000 {
1808 compatible = "renesas,r8a7790-cmt0",
1809 "renesas,rcar-gen2-cmt0";
1810 reg = <0 0xffca0000 0 0x1004>;
1811 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1812 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1813 clocks = <&cpg CPG_MOD 124>;
1814 clock-names = "fck";
1815 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1816 resets = <&cpg 124>;
1817
1818 status = "disabled";
1819 };
1820
1821 cmt1: timer@e6130000 {
1822 compatible = "renesas,r8a7790-cmt1",
1823 "renesas,rcar-gen2-cmt1";
1824 reg = <0 0xe6130000 0 0x1004>;
1825 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1826 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1827 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1828 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1829 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1830 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1831 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1832 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1833 clocks = <&cpg CPG_MOD 329>;
1834 clock-names = "fck";
1835 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1836 resets = <&cpg 329>;
1837
1838 status = "disabled";
1839 };
1840 };
1841
1842 thermal-zones {
1843 cpu_thermal: cpu-thermal {
1844 polling-delay-passive = <0>;
1845 polling-delay = <0>;
1846
1847 thermal-sensors = <&thermal>;
1848
1849 trips {
1850 cpu-crit {
1851 temperature = <95000>;
1852 hysteresis = <0>;
1853 type = "critical";
1854 };
1855 };
1856 cooling-maps {
1857 };
1858 };
1859 };
1860
1861 timer {
1862 compatible = "arm,armv7-timer";
1863 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1864 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1865 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1866 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1867 };
1868
1869 /* External USB clock - can be overridden by the board */
1870 usb_extal_clk: usb_extal {
1871 compatible = "fixed-clock";
1872 #clock-cells = <0>;
1873 clock-frequency = <48000000>;
1874 };
1875};