1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 2/*
 3 * Copyright (C) 2019 PHYTEC Messtechnik GmbH
 4 * Author: Stefan Riedmueller <s.riedmueller@phytec.de>
 5 */
 6
 7/dts-v1/;
 8#include "imx6ull.dtsi"
 9#include "imx6ull-phytec-phycore-som.dtsi"
10#include "imx6ull-phytec-segin.dtsi"
11#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
12#include "imx6ull-phytec-segin-peb-av-02.dtsi"
13#include "imx6ull-phytec-segin-peb-wlbt-05.dtsi"
14
15/ {
16	model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with NAND";
17	compatible = "phytec,imx6ull-pbacd10-nand", "phytec,imx6ull-pbacd10",
18		     "phytec,imx6ull-pcl063", "fsl,imx6ull";
19};
20
21&adc1 {
22	status = "okay";
23};
24
25&can1 {
26	status = "okay";
27};
28
29&tlv320 {
30	status = "okay";
31};
32
33&ecspi3 {
34	status = "okay";
35};
36
37&ethphy1 {
38	status = "okay";
39};
40
41&ethphy2 {
42	status = "okay";
43};
44
45&fec1 {
46	status = "okay";
47};
48
49&fec2 {
50	status = "okay";
51};
52
53&gpmi {
54	status = "okay";
55};
56
57&i2c_rtc {
58	status = "okay";
59};
60
61&reg_can1_en {
62	status = "okay";
63};
64
65&reg_sound_1v8 {
66	status = "okay";
67};
68
69&reg_sound_3v3 {
70	status = "okay";
71};
72
73&sai2 {
74	status = "okay";
75};
76
77&sound {
78	status = "okay";
79};
80
81&uart5 {
82	status = "okay";
83};
84
85&usbotg1 {
86	status = "okay";
87};
88
89&usbotg2 {
90	status = "okay";
91};
92
93&usdhc1 {
94	status = "okay";
95};

 1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 2/*
 3 * Copyright (C) 2019 PHYTEC Messtechnik GmbH
 4 * Author: Stefan Riedmueller <s.riedmueller@phytec.de>
 5 */
 6
 7/dts-v1/;
 8#include "imx6ull.dtsi"
 9#include "imx6ull-phytec-phycore-som.dtsi"
10#include "imx6ull-phytec-segin.dtsi"
11#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
 
 
12
13/ {
14	model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with NAND";
15	compatible = "phytec,imx6ull-pbacd10-nand", "phytec,imx6ull-pbacd10",
16		     "phytec,imx6ull-pcl063", "fsl,imx6ull";
17};
18
19&adc1 {
20	status = "okay";
21};
22
23&can1 {
24	status = "okay";
25};
26
27&tlv320 {
28	status = "okay";
29};
30
31&ecspi3 {
32	status = "okay";
33};
34
35&ethphy1 {
36	status = "okay";
37};
38
39&ethphy2 {
40	status = "okay";
41};
42
43&fec1 {
44	status = "okay";
45};
46
47&fec2 {
48	status = "okay";
49};
50
51&gpmi {
52	status = "okay";
53};
54
55&i2c_rtc {
56	status = "okay";
57};
58
59&reg_can1_en {
60	status = "okay";
61};
62
63&reg_sound_1v8 {
64	status = "okay";
65};
66
67&reg_sound_3v3 {
68	status = "okay";
69};
70
71&sai2 {
72	status = "okay";
73};
74
75&sound {
76	status = "okay";
77};
78
79&uart5 {
80	status = "okay";
81};
82
83&usbotg1 {
84	status = "okay";
85};
86
87&usbotg2 {
88	status = "okay";
89};
90
91&usdhc1 {
92	status = "okay";
93};