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1// SPDX-License-Identifier: GPL-2.0-or-later
2// Copyright 2019 IBM Corp.
3
4#include <dt-bindings/interrupt-controller/arm-gic.h>
5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6#include <dt-bindings/clock/ast2600-clock.h>
7
8/ {
9 model = "Aspeed BMC";
10 compatible = "aspeed,ast2600";
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
14
15 aliases {
16 i2c0 = &i2c0;
17 i2c1 = &i2c1;
18 i2c2 = &i2c2;
19 i2c3 = &i2c3;
20 i2c4 = &i2c4;
21 i2c5 = &i2c5;
22 i2c6 = &i2c6;
23 i2c7 = &i2c7;
24 i2c8 = &i2c8;
25 i2c9 = &i2c9;
26 i2c10 = &i2c10;
27 i2c11 = &i2c11;
28 i2c12 = &i2c12;
29 i2c13 = &i2c13;
30 i2c14 = &i2c14;
31 i2c15 = &i2c15;
32 serial0 = &uart1;
33 serial1 = &uart2;
34 serial2 = &uart3;
35 serial3 = &uart4;
36 serial4 = &uart5;
37 serial5 = &vuart1;
38 serial6 = &vuart2;
39 mdio0 = &mdio0;
40 mdio1 = &mdio1;
41 mdio2 = &mdio2;
42 mdio3 = &mdio3;
43 };
44
45
46 cpus {
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
50
51 cpu@f00 {
52 compatible = "arm,cortex-a7";
53 device_type = "cpu";
54 reg = <0xf00>;
55 };
56
57 cpu@f01 {
58 compatible = "arm,cortex-a7";
59 device_type = "cpu";
60 reg = <0xf01>;
61 };
62 };
63
64 timer {
65 compatible = "arm,armv7-timer";
66 interrupt-parent = <&gic>;
67 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
68 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
69 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
70 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
71 clocks = <&syscon ASPEED_CLK_HPLL>;
72 arm,cpu-registers-not-fw-configured;
73 always-on;
74 };
75
76 edac: sdram@1e6e0000 {
77 compatible = "aspeed,ast2600-sdram-edac", "syscon";
78 reg = <0x1e6e0000 0x174>;
79 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
80 };
81
82 ahb {
83 compatible = "simple-bus";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 device_type = "soc";
87 ranges;
88
89 gic: interrupt-controller@40461000 {
90 compatible = "arm,cortex-a7-gic";
91 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
92 #interrupt-cells = <3>;
93 interrupt-controller;
94 interrupt-parent = <&gic>;
95 reg = <0x40461000 0x1000>,
96 <0x40462000 0x1000>,
97 <0x40464000 0x2000>,
98 <0x40466000 0x2000>;
99 };
100
101 fmc: spi@1e620000 {
102 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
103 #address-cells = <1>;
104 #size-cells = <0>;
105 compatible = "aspeed,ast2600-fmc";
106 clocks = <&syscon ASPEED_CLK_AHB>;
107 status = "disabled";
108 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
109 flash@0 {
110 reg = < 0 >;
111 compatible = "jedec,spi-nor";
112 spi-max-frequency = <50000000>;
113 spi-rx-bus-width = <2>;
114 status = "disabled";
115 };
116 flash@1 {
117 reg = < 1 >;
118 compatible = "jedec,spi-nor";
119 spi-max-frequency = <50000000>;
120 spi-rx-bus-width = <2>;
121 status = "disabled";
122 };
123 flash@2 {
124 reg = < 2 >;
125 compatible = "jedec,spi-nor";
126 spi-max-frequency = <50000000>;
127 spi-rx-bus-width = <2>;
128 status = "disabled";
129 };
130 };
131
132 spi1: spi@1e630000 {
133 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>;
134 #address-cells = <1>;
135 #size-cells = <0>;
136 compatible = "aspeed,ast2600-spi";
137 clocks = <&syscon ASPEED_CLK_AHB>;
138 status = "disabled";
139 flash@0 {
140 reg = < 0 >;
141 compatible = "jedec,spi-nor";
142 spi-max-frequency = <50000000>;
143 spi-rx-bus-width = <2>;
144 status = "disabled";
145 };
146 flash@1 {
147 reg = < 1 >;
148 compatible = "jedec,spi-nor";
149 spi-max-frequency = <50000000>;
150 spi-rx-bus-width = <2>;
151 status = "disabled";
152 };
153 };
154
155 spi2: spi@1e631000 {
156 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>;
157 #address-cells = <1>;
158 #size-cells = <0>;
159 compatible = "aspeed,ast2600-spi";
160 clocks = <&syscon ASPEED_CLK_AHB>;
161 status = "disabled";
162 flash@0 {
163 reg = < 0 >;
164 compatible = "jedec,spi-nor";
165 spi-max-frequency = <50000000>;
166 spi-rx-bus-width = <2>;
167 status = "disabled";
168 };
169 flash@1 {
170 reg = < 1 >;
171 compatible = "jedec,spi-nor";
172 spi-max-frequency = <50000000>;
173 spi-rx-bus-width = <2>;
174 status = "disabled";
175 };
176 flash@2 {
177 reg = < 2 >;
178 compatible = "jedec,spi-nor";
179 spi-max-frequency = <50000000>;
180 spi-rx-bus-width = <2>;
181 status = "disabled";
182 };
183 };
184
185 mdio0: mdio@1e650000 {
186 compatible = "aspeed,ast2600-mdio";
187 reg = <0x1e650000 0x8>;
188 #address-cells = <1>;
189 #size-cells = <0>;
190 status = "disabled";
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_mdio1_default>;
193 resets = <&syscon ASPEED_RESET_MII>;
194 };
195
196 mdio1: mdio@1e650008 {
197 compatible = "aspeed,ast2600-mdio";
198 reg = <0x1e650008 0x8>;
199 #address-cells = <1>;
200 #size-cells = <0>;
201 status = "disabled";
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_mdio2_default>;
204 resets = <&syscon ASPEED_RESET_MII>;
205 };
206
207 mdio2: mdio@1e650010 {
208 compatible = "aspeed,ast2600-mdio";
209 reg = <0x1e650010 0x8>;
210 #address-cells = <1>;
211 #size-cells = <0>;
212 status = "disabled";
213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_mdio3_default>;
215 resets = <&syscon ASPEED_RESET_MII>;
216 };
217
218 mdio3: mdio@1e650018 {
219 compatible = "aspeed,ast2600-mdio";
220 reg = <0x1e650018 0x8>;
221 #address-cells = <1>;
222 #size-cells = <0>;
223 status = "disabled";
224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_mdio4_default>;
226 resets = <&syscon ASPEED_RESET_MII>;
227 };
228
229 mac0: ftgmac@1e660000 {
230 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
231 reg = <0x1e660000 0x180>;
232 #address-cells = <1>;
233 #size-cells = <0>;
234 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
235 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
236 status = "disabled";
237 };
238
239 mac1: ftgmac@1e680000 {
240 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
241 reg = <0x1e680000 0x180>;
242 #address-cells = <1>;
243 #size-cells = <0>;
244 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
245 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
246 status = "disabled";
247 };
248
249 mac2: ftgmac@1e670000 {
250 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
251 reg = <0x1e670000 0x180>;
252 #address-cells = <1>;
253 #size-cells = <0>;
254 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
255 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
256 status = "disabled";
257 };
258
259 mac3: ftgmac@1e690000 {
260 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
261 reg = <0x1e690000 0x180>;
262 #address-cells = <1>;
263 #size-cells = <0>;
264 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
265 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
266 status = "disabled";
267 };
268
269 ehci0: usb@1e6a1000 {
270 compatible = "aspeed,ast2600-ehci", "generic-ehci";
271 reg = <0x1e6a1000 0x100>;
272 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
273 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&pinctrl_usb2ah_default>;
276 status = "disabled";
277 };
278
279 ehci1: usb@1e6a3000 {
280 compatible = "aspeed,ast2600-ehci", "generic-ehci";
281 reg = <0x1e6a3000 0x100>;
282 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
283 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
284 pinctrl-names = "default";
285 pinctrl-0 = <&pinctrl_usb2bh_default>;
286 status = "disabled";
287 };
288
289 uhci: usb@1e6b0000 {
290 compatible = "aspeed,ast2600-uhci", "generic-uhci";
291 reg = <0x1e6b0000 0x100>;
292 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
293 #ports = <2>;
294 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
295 status = "disabled";
296 /*
297 * No default pinmux, it will follow EHCI, use an
298 * explicit pinmux override if EHCI is not enabled.
299 */
300 };
301
302 vhub: usb-vhub@1e6a0000 {
303 compatible = "aspeed,ast2600-usb-vhub";
304 reg = <0x1e6a0000 0x350>;
305 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
306 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
307 aspeed,vhub-downstream-ports = <7>;
308 aspeed,vhub-generic-endpoints = <21>;
309 pinctrl-names = "default";
310 pinctrl-0 = <&pinctrl_usb2ad_default>;
311 status = "disabled";
312 };
313
314 udc: usb@1e6a2000 {
315 compatible = "aspeed,ast2600-udc";
316 reg = <0x1e6a2000 0x300>;
317 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
318 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
319 pinctrl-names = "default";
320 pinctrl-0 = <&pinctrl_usb2bd_default>;
321 status = "disabled";
322 };
323
324 apb {
325 compatible = "simple-bus";
326 #address-cells = <1>;
327 #size-cells = <1>;
328 ranges;
329
330 hace: crypto@1e6d0000 {
331 compatible = "aspeed,ast2600-hace";
332 reg = <0x1e6d0000 0x200>;
333 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
334 clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
335 resets = <&syscon ASPEED_RESET_HACE>;
336 };
337
338 syscon: syscon@1e6e2000 {
339 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
340 reg = <0x1e6e2000 0x1000>;
341 ranges = <0 0x1e6e2000 0x1000>;
342 #address-cells = <1>;
343 #size-cells = <1>;
344 #clock-cells = <1>;
345 #reset-cells = <1>;
346
347 pinctrl: pinctrl {
348 compatible = "aspeed,ast2600-pinctrl";
349 };
350
351 silicon-id@14 {
352 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
353 reg = <0x14 0x4 0x5b0 0x8>;
354 };
355
356 smp-memram@180 {
357 compatible = "aspeed,ast2600-smpmem";
358 reg = <0x180 0x40>;
359 };
360
361 scu_ic0: interrupt-controller@560 {
362 #interrupt-cells = <1>;
363 compatible = "aspeed,ast2600-scu-ic0";
364 reg = <0x560 0x4>;
365 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
366 interrupt-controller;
367 };
368
369 scu_ic1: interrupt-controller@570 {
370 #interrupt-cells = <1>;
371 compatible = "aspeed,ast2600-scu-ic1";
372 reg = <0x570 0x4>;
373 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
374 interrupt-controller;
375 };
376 };
377
378 rng: hwrng@1e6e2524 {
379 compatible = "timeriomem_rng";
380 reg = <0x1e6e2524 0x4>;
381 period = <1>;
382 quality = <100>;
383 };
384
385 gfx: display@1e6e6000 {
386 compatible = "aspeed,ast2600-gfx", "syscon";
387 reg = <0x1e6e6000 0x1000>;
388 reg-io-width = <4>;
389 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
390 resets = <&syscon ASPEED_RESET_GRAPHICS>;
391 syscon = <&syscon>;
392 status = "disabled";
393 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
394 };
395
396 xdma: xdma@1e6e7000 {
397 compatible = "aspeed,ast2600-xdma";
398 reg = <0x1e6e7000 0x100>;
399 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
400 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
401 reset-names = "device", "root-complex";
402 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
403 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
404 aspeed,pcie-device = "bmc";
405 aspeed,scu = <&syscon>;
406 status = "disabled";
407 };
408
409 adc0: adc@1e6e9000 {
410 compatible = "aspeed,ast2600-adc0";
411 reg = <0x1e6e9000 0x100>;
412 clocks = <&syscon ASPEED_CLK_APB2>;
413 resets = <&syscon ASPEED_RESET_ADC>;
414 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
415 #io-channel-cells = <1>;
416 status = "disabled";
417 };
418
419 adc1: adc@1e6e9100 {
420 compatible = "aspeed,ast2600-adc1";
421 reg = <0x1e6e9100 0x100>;
422 clocks = <&syscon ASPEED_CLK_APB2>;
423 resets = <&syscon ASPEED_RESET_ADC>;
424 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
425 #io-channel-cells = <1>;
426 status = "disabled";
427 };
428
429 sbc: secure-boot-controller@1e6f2000 {
430 compatible = "aspeed,ast2600-sbc";
431 reg = <0x1e6f2000 0x1000>;
432 };
433
434 video: video@1e700000 {
435 compatible = "aspeed,ast2600-video-engine";
436 reg = <0x1e700000 0x1000>;
437 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
438 <&syscon ASPEED_CLK_GATE_ECLK>;
439 clock-names = "vclk", "eclk";
440 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
441 status = "disabled";
442 };
443
444 gpio0: gpio@1e780000 {
445 #gpio-cells = <2>;
446 gpio-controller;
447 compatible = "aspeed,ast2600-gpio";
448 reg = <0x1e780000 0x400>;
449 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
450 gpio-ranges = <&pinctrl 0 0 208>;
451 ngpios = <208>;
452 clocks = <&syscon ASPEED_CLK_APB2>;
453 interrupt-controller;
454 #interrupt-cells = <2>;
455 };
456
457 sgpiom0: sgpiom@1e780500 {
458 #gpio-cells = <2>;
459 gpio-controller;
460 compatible = "aspeed,ast2600-sgpiom";
461 reg = <0x1e780500 0x100>;
462 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
463 clocks = <&syscon ASPEED_CLK_APB2>;
464 interrupt-controller;
465 bus-frequency = <12000000>;
466 pinctrl-names = "default";
467 pinctrl-0 = <&pinctrl_sgpm1_default>;
468 status = "disabled";
469 };
470
471 sgpiom1: sgpiom@1e780600 {
472 #gpio-cells = <2>;
473 gpio-controller;
474 compatible = "aspeed,ast2600-sgpiom";
475 reg = <0x1e780600 0x100>;
476 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
477 clocks = <&syscon ASPEED_CLK_APB2>;
478 interrupt-controller;
479 bus-frequency = <12000000>;
480 pinctrl-names = "default";
481 pinctrl-0 = <&pinctrl_sgpm2_default>;
482 status = "disabled";
483 };
484
485 gpio1: gpio@1e780800 {
486 #gpio-cells = <2>;
487 gpio-controller;
488 compatible = "aspeed,ast2600-gpio";
489 reg = <0x1e780800 0x800>;
490 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
491 gpio-ranges = <&pinctrl 0 208 36>;
492 ngpios = <36>;
493 clocks = <&syscon ASPEED_CLK_APB1>;
494 interrupt-controller;
495 #interrupt-cells = <2>;
496 };
497
498 rtc: rtc@1e781000 {
499 compatible = "aspeed,ast2600-rtc";
500 reg = <0x1e781000 0x18>;
501 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
502 status = "disabled";
503 };
504
505 timer: timer@1e782000 {
506 compatible = "aspeed,ast2600-timer";
507 reg = <0x1e782000 0x90>;
508 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
509 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
510 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
511 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
512 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
513 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
514 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
515 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
516 clocks = <&syscon ASPEED_CLK_APB1>;
517 clock-names = "PCLK";
518 status = "disabled";
519 };
520
521 uart1: serial@1e783000 {
522 compatible = "ns16550a";
523 reg = <0x1e783000 0x20>;
524 reg-shift = <2>;
525 reg-io-width = <4>;
526 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
527 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
528 resets = <&lpc_reset 4>;
529 no-loopback-test;
530 pinctrl-names = "default";
531 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
532 status = "disabled";
533 };
534
535 uart5: serial@1e784000 {
536 compatible = "ns16550a";
537 reg = <0x1e784000 0x1000>;
538 reg-shift = <2>;
539 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
540 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
541 no-loopback-test;
542 };
543
544 wdt1: watchdog@1e785000 {
545 compatible = "aspeed,ast2600-wdt";
546 reg = <0x1e785000 0x40>;
547 };
548
549 wdt2: watchdog@1e785040 {
550 compatible = "aspeed,ast2600-wdt";
551 reg = <0x1e785040 0x40>;
552 status = "disabled";
553 };
554
555 wdt3: watchdog@1e785080 {
556 compatible = "aspeed,ast2600-wdt";
557 reg = <0x1e785080 0x40>;
558 status = "disabled";
559 };
560
561 wdt4: watchdog@1e7850c0 {
562 compatible = "aspeed,ast2600-wdt";
563 reg = <0x1e7850C0 0x40>;
564 status = "disabled";
565 };
566
567 peci0: peci-controller@1e78b000 {
568 compatible = "aspeed,ast2600-peci";
569 reg = <0x1e78b000 0x100>;
570 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
571 clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>;
572 resets = <&syscon ASPEED_RESET_PECI>;
573 cmd-timeout-ms = <1000>;
574 clock-frequency = <1000000>;
575 status = "disabled";
576 };
577
578 lpc: lpc@1e789000 {
579 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon";
580 reg = <0x1e789000 0x1000>;
581 reg-io-width = <4>;
582
583 #address-cells = <1>;
584 #size-cells = <1>;
585 ranges = <0x0 0x1e789000 0x1000>;
586
587 kcs1: kcs@24 {
588 compatible = "aspeed,ast2500-kcs-bmc-v2";
589 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
590 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
591 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
592 kcs_chan = <1>;
593 status = "disabled";
594 };
595
596 kcs2: kcs@28 {
597 compatible = "aspeed,ast2500-kcs-bmc-v2";
598 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
599 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
600 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
601 status = "disabled";
602 };
603
604 kcs3: kcs@2c {
605 compatible = "aspeed,ast2500-kcs-bmc-v2";
606 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
607 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
609 status = "disabled";
610 };
611
612 kcs4: kcs@114 {
613 compatible = "aspeed,ast2500-kcs-bmc-v2";
614 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
615 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
616 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
617 status = "disabled";
618 };
619
620 lpc_ctrl: lpc-ctrl@80 {
621 compatible = "aspeed,ast2600-lpc-ctrl";
622 reg = <0x80 0x80>;
623 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
624 status = "disabled";
625 };
626
627 lpc_snoop: lpc-snoop@80 {
628 compatible = "aspeed,ast2600-lpc-snoop";
629 reg = <0x80 0x80>;
630 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
631 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
632 status = "disabled";
633 };
634
635 lhc: lhc@a0 {
636 compatible = "aspeed,ast2600-lhc";
637 reg = <0xa0 0x24 0xc8 0x8>;
638 };
639
640 lpc_reset: reset-controller@98 {
641 compatible = "aspeed,ast2600-lpc-reset";
642 reg = <0x98 0x4>;
643 #reset-cells = <1>;
644 };
645
646 uart_routing: uart-routing@98 {
647 compatible = "aspeed,ast2600-uart-routing";
648 reg = <0x98 0x8>;
649 status = "disabled";
650 };
651
652 ibt: ibt@140 {
653 compatible = "aspeed,ast2600-ibt-bmc";
654 reg = <0x140 0x18>;
655 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
656 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
657 status = "disabled";
658 };
659 };
660
661 sdc: sdc@1e740000 {
662 compatible = "aspeed,ast2600-sd-controller";
663 reg = <0x1e740000 0x100>;
664 #address-cells = <1>;
665 #size-cells = <1>;
666 ranges = <0 0x1e740000 0x10000>;
667 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
668 status = "disabled";
669
670 sdhci0: sdhci@1e740100 {
671 compatible = "aspeed,ast2600-sdhci", "sdhci";
672 reg = <0x100 0x100>;
673 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
674 sdhci,auto-cmd12;
675 clocks = <&syscon ASPEED_CLK_SDIO>;
676 status = "disabled";
677 };
678
679 sdhci1: sdhci@1e740200 {
680 compatible = "aspeed,ast2600-sdhci", "sdhci";
681 reg = <0x200 0x100>;
682 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
683 sdhci,auto-cmd12;
684 clocks = <&syscon ASPEED_CLK_SDIO>;
685 status = "disabled";
686 };
687 };
688
689 emmc_controller: sdc@1e750000 {
690 compatible = "aspeed,ast2600-sd-controller";
691 reg = <0x1e750000 0x100>;
692 #address-cells = <1>;
693 #size-cells = <1>;
694 ranges = <0 0x1e750000 0x10000>;
695 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
696 status = "disabled";
697
698 emmc: sdhci@1e750100 {
699 compatible = "aspeed,ast2600-sdhci";
700 reg = <0x100 0x100>;
701 sdhci,auto-cmd12;
702 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
703 clocks = <&syscon ASPEED_CLK_EMMC>;
704 pinctrl-names = "default";
705 pinctrl-0 = <&pinctrl_emmc_default>;
706 };
707 };
708
709 vuart1: serial@1e787000 {
710 compatible = "aspeed,ast2500-vuart";
711 reg = <0x1e787000 0x40>;
712 reg-shift = <2>;
713 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
714 clocks = <&syscon ASPEED_CLK_APB1>;
715 no-loopback-test;
716 status = "disabled";
717 };
718
719 vuart2: serial@1e788000 {
720 compatible = "aspeed,ast2500-vuart";
721 reg = <0x1e788000 0x40>;
722 reg-shift = <2>;
723 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
724 clocks = <&syscon ASPEED_CLK_APB1>;
725 no-loopback-test;
726 status = "disabled";
727 };
728
729 uart2: serial@1e78d000 {
730 compatible = "ns16550a";
731 reg = <0x1e78d000 0x20>;
732 reg-shift = <2>;
733 reg-io-width = <4>;
734 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
735 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
736 resets = <&lpc_reset 5>;
737 no-loopback-test;
738 pinctrl-names = "default";
739 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
740 status = "disabled";
741 };
742
743 uart3: serial@1e78e000 {
744 compatible = "ns16550a";
745 reg = <0x1e78e000 0x20>;
746 reg-shift = <2>;
747 reg-io-width = <4>;
748 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
749 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
750 resets = <&lpc_reset 6>;
751 no-loopback-test;
752 pinctrl-names = "default";
753 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
754 status = "disabled";
755 };
756
757 uart4: serial@1e78f000 {
758 compatible = "ns16550a";
759 reg = <0x1e78f000 0x20>;
760 reg-shift = <2>;
761 reg-io-width = <4>;
762 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
763 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
764 resets = <&lpc_reset 7>;
765 no-loopback-test;
766 pinctrl-names = "default";
767 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
768 status = "disabled";
769 };
770
771 uart6: serial@1e790000 {
772 compatible = "ns16550a";
773 reg = <0x1e790000 0x20>;
774 reg-shift = <2>;
775 reg-io-width = <4>;
776 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
777 clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>;
778 no-loopback-test;
779 pinctrl-names = "default";
780 pinctrl-0 = <&pinctrl_uart6_default>;
781
782 status = "disabled";
783 };
784
785 uart7: serial@1e790100 {
786 compatible = "ns16550a";
787 reg = <0x1e790100 0x20>;
788 reg-shift = <2>;
789 reg-io-width = <4>;
790 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
791 clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>;
792 no-loopback-test;
793 pinctrl-names = "default";
794 pinctrl-0 = <&pinctrl_uart7_default>;
795
796 status = "disabled";
797 };
798
799 uart8: serial@1e790200 {
800 compatible = "ns16550a";
801 reg = <0x1e790200 0x20>;
802 reg-shift = <2>;
803 reg-io-width = <4>;
804 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
805 clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>;
806 no-loopback-test;
807 pinctrl-names = "default";
808 pinctrl-0 = <&pinctrl_uart8_default>;
809
810 status = "disabled";
811 };
812
813 uart9: serial@1e790300 {
814 compatible = "ns16550a";
815 reg = <0x1e790300 0x20>;
816 reg-shift = <2>;
817 reg-io-width = <4>;
818 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
819 clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>;
820 no-loopback-test;
821 pinctrl-names = "default";
822 pinctrl-0 = <&pinctrl_uart9_default>;
823
824 status = "disabled";
825 };
826
827 i2c: bus@1e78a000 {
828 compatible = "simple-bus";
829 #address-cells = <1>;
830 #size-cells = <1>;
831 ranges = <0 0x1e78a000 0x1000>;
832 };
833
834 fsim0: fsi@1e79b000 {
835 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
836 reg = <0x1e79b000 0x94>;
837 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
838 pinctrl-names = "default";
839 pinctrl-0 = <&pinctrl_fsi1_default>;
840 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
841 status = "disabled";
842 };
843
844 fsim1: fsi@1e79b100 {
845 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
846 reg = <0x1e79b100 0x94>;
847 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
848 pinctrl-names = "default";
849 pinctrl-0 = <&pinctrl_fsi2_default>;
850 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
851 status = "disabled";
852 };
853 };
854 };
855};
856
857#include "aspeed-g6-pinctrl.dtsi"
858
859&i2c {
860 i2c0: i2c-bus@80 {
861 #address-cells = <1>;
862 #size-cells = <0>;
863 #interrupt-cells = <1>;
864 reg = <0x80 0x80>;
865 compatible = "aspeed,ast2600-i2c-bus";
866 clocks = <&syscon ASPEED_CLK_APB2>;
867 resets = <&syscon ASPEED_RESET_I2C>;
868 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
869 bus-frequency = <100000>;
870 pinctrl-names = "default";
871 pinctrl-0 = <&pinctrl_i2c1_default>;
872 status = "disabled";
873 };
874
875 i2c1: i2c-bus@100 {
876 #address-cells = <1>;
877 #size-cells = <0>;
878 #interrupt-cells = <1>;
879 reg = <0x100 0x80>;
880 compatible = "aspeed,ast2600-i2c-bus";
881 clocks = <&syscon ASPEED_CLK_APB2>;
882 resets = <&syscon ASPEED_RESET_I2C>;
883 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
884 bus-frequency = <100000>;
885 pinctrl-names = "default";
886 pinctrl-0 = <&pinctrl_i2c2_default>;
887 status = "disabled";
888 };
889
890 i2c2: i2c-bus@180 {
891 #address-cells = <1>;
892 #size-cells = <0>;
893 #interrupt-cells = <1>;
894 reg = <0x180 0x80>;
895 compatible = "aspeed,ast2600-i2c-bus";
896 clocks = <&syscon ASPEED_CLK_APB2>;
897 resets = <&syscon ASPEED_RESET_I2C>;
898 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
899 bus-frequency = <100000>;
900 pinctrl-names = "default";
901 pinctrl-0 = <&pinctrl_i2c3_default>;
902 status = "disabled";
903 };
904
905 i2c3: i2c-bus@200 {
906 #address-cells = <1>;
907 #size-cells = <0>;
908 #interrupt-cells = <1>;
909 reg = <0x200 0x80>;
910 compatible = "aspeed,ast2600-i2c-bus";
911 clocks = <&syscon ASPEED_CLK_APB2>;
912 resets = <&syscon ASPEED_RESET_I2C>;
913 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
914 bus-frequency = <100000>;
915 pinctrl-names = "default";
916 pinctrl-0 = <&pinctrl_i2c4_default>;
917 status = "disabled";
918 };
919
920 i2c4: i2c-bus@280 {
921 #address-cells = <1>;
922 #size-cells = <0>;
923 #interrupt-cells = <1>;
924 reg = <0x280 0x80>;
925 compatible = "aspeed,ast2600-i2c-bus";
926 clocks = <&syscon ASPEED_CLK_APB2>;
927 resets = <&syscon ASPEED_RESET_I2C>;
928 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
929 bus-frequency = <100000>;
930 pinctrl-names = "default";
931 pinctrl-0 = <&pinctrl_i2c5_default>;
932 status = "disabled";
933 };
934
935 i2c5: i2c-bus@300 {
936 #address-cells = <1>;
937 #size-cells = <0>;
938 #interrupt-cells = <1>;
939 reg = <0x300 0x80>;
940 compatible = "aspeed,ast2600-i2c-bus";
941 clocks = <&syscon ASPEED_CLK_APB2>;
942 resets = <&syscon ASPEED_RESET_I2C>;
943 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
944 bus-frequency = <100000>;
945 pinctrl-names = "default";
946 pinctrl-0 = <&pinctrl_i2c6_default>;
947 status = "disabled";
948 };
949
950 i2c6: i2c-bus@380 {
951 #address-cells = <1>;
952 #size-cells = <0>;
953 #interrupt-cells = <1>;
954 reg = <0x380 0x80>;
955 compatible = "aspeed,ast2600-i2c-bus";
956 clocks = <&syscon ASPEED_CLK_APB2>;
957 resets = <&syscon ASPEED_RESET_I2C>;
958 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
959 bus-frequency = <100000>;
960 pinctrl-names = "default";
961 pinctrl-0 = <&pinctrl_i2c7_default>;
962 status = "disabled";
963 };
964
965 i2c7: i2c-bus@400 {
966 #address-cells = <1>;
967 #size-cells = <0>;
968 #interrupt-cells = <1>;
969 reg = <0x400 0x80>;
970 compatible = "aspeed,ast2600-i2c-bus";
971 clocks = <&syscon ASPEED_CLK_APB2>;
972 resets = <&syscon ASPEED_RESET_I2C>;
973 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
974 bus-frequency = <100000>;
975 pinctrl-names = "default";
976 pinctrl-0 = <&pinctrl_i2c8_default>;
977 status = "disabled";
978 };
979
980 i2c8: i2c-bus@480 {
981 #address-cells = <1>;
982 #size-cells = <0>;
983 #interrupt-cells = <1>;
984 reg = <0x480 0x80>;
985 compatible = "aspeed,ast2600-i2c-bus";
986 clocks = <&syscon ASPEED_CLK_APB2>;
987 resets = <&syscon ASPEED_RESET_I2C>;
988 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
989 bus-frequency = <100000>;
990 pinctrl-names = "default";
991 pinctrl-0 = <&pinctrl_i2c9_default>;
992 status = "disabled";
993 };
994
995 i2c9: i2c-bus@500 {
996 #address-cells = <1>;
997 #size-cells = <0>;
998 #interrupt-cells = <1>;
999 reg = <0x500 0x80>;
1000 compatible = "aspeed,ast2600-i2c-bus";
1001 clocks = <&syscon ASPEED_CLK_APB2>;
1002 resets = <&syscon ASPEED_RESET_I2C>;
1003 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
1004 bus-frequency = <100000>;
1005 pinctrl-names = "default";
1006 pinctrl-0 = <&pinctrl_i2c10_default>;
1007 status = "disabled";
1008 };
1009
1010 i2c10: i2c-bus@580 {
1011 #address-cells = <1>;
1012 #size-cells = <0>;
1013 #interrupt-cells = <1>;
1014 reg = <0x580 0x80>;
1015 compatible = "aspeed,ast2600-i2c-bus";
1016 clocks = <&syscon ASPEED_CLK_APB2>;
1017 resets = <&syscon ASPEED_RESET_I2C>;
1018 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1019 bus-frequency = <100000>;
1020 pinctrl-names = "default";
1021 pinctrl-0 = <&pinctrl_i2c11_default>;
1022 status = "disabled";
1023 };
1024
1025 i2c11: i2c-bus@600 {
1026 #address-cells = <1>;
1027 #size-cells = <0>;
1028 #interrupt-cells = <1>;
1029 reg = <0x600 0x80>;
1030 compatible = "aspeed,ast2600-i2c-bus";
1031 clocks = <&syscon ASPEED_CLK_APB2>;
1032 resets = <&syscon ASPEED_RESET_I2C>;
1033 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1034 bus-frequency = <100000>;
1035 pinctrl-names = "default";
1036 pinctrl-0 = <&pinctrl_i2c12_default>;
1037 status = "disabled";
1038 };
1039
1040 i2c12: i2c-bus@680 {
1041 #address-cells = <1>;
1042 #size-cells = <0>;
1043 #interrupt-cells = <1>;
1044 reg = <0x680 0x80>;
1045 compatible = "aspeed,ast2600-i2c-bus";
1046 clocks = <&syscon ASPEED_CLK_APB2>;
1047 resets = <&syscon ASPEED_RESET_I2C>;
1048 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
1049 bus-frequency = <100000>;
1050 pinctrl-names = "default";
1051 pinctrl-0 = <&pinctrl_i2c13_default>;
1052 status = "disabled";
1053 };
1054
1055 i2c13: i2c-bus@700 {
1056 #address-cells = <1>;
1057 #size-cells = <0>;
1058 #interrupt-cells = <1>;
1059 reg = <0x700 0x80>;
1060 compatible = "aspeed,ast2600-i2c-bus";
1061 clocks = <&syscon ASPEED_CLK_APB2>;
1062 resets = <&syscon ASPEED_RESET_I2C>;
1063 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
1064 bus-frequency = <100000>;
1065 pinctrl-names = "default";
1066 pinctrl-0 = <&pinctrl_i2c14_default>;
1067 status = "disabled";
1068 };
1069
1070 i2c14: i2c-bus@780 {
1071 #address-cells = <1>;
1072 #size-cells = <0>;
1073 #interrupt-cells = <1>;
1074 reg = <0x780 0x80>;
1075 compatible = "aspeed,ast2600-i2c-bus";
1076 clocks = <&syscon ASPEED_CLK_APB2>;
1077 resets = <&syscon ASPEED_RESET_I2C>;
1078 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
1079 bus-frequency = <100000>;
1080 pinctrl-names = "default";
1081 pinctrl-0 = <&pinctrl_i2c15_default>;
1082 status = "disabled";
1083 };
1084
1085 i2c15: i2c-bus@800 {
1086 #address-cells = <1>;
1087 #size-cells = <0>;
1088 #interrupt-cells = <1>;
1089 reg = <0x800 0x80>;
1090 compatible = "aspeed,ast2600-i2c-bus";
1091 clocks = <&syscon ASPEED_CLK_APB2>;
1092 resets = <&syscon ASPEED_RESET_I2C>;
1093 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1094 bus-frequency = <100000>;
1095 pinctrl-names = "default";
1096 pinctrl-0 = <&pinctrl_i2c16_default>;
1097 status = "disabled";
1098 };
1099};
1// SPDX-License-Identifier: GPL-2.0-or-later
2// Copyright 2019 IBM Corp.
3
4#include <dt-bindings/interrupt-controller/arm-gic.h>
5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6#include <dt-bindings/clock/ast2600-clock.h>
7
8/ {
9 model = "Aspeed BMC";
10 compatible = "aspeed,ast2600";
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
14
15 aliases {
16 i2c0 = &i2c0;
17 i2c1 = &i2c1;
18 i2c2 = &i2c2;
19 i2c3 = &i2c3;
20 i2c4 = &i2c4;
21 i2c5 = &i2c5;
22 i2c6 = &i2c6;
23 i2c7 = &i2c7;
24 i2c8 = &i2c8;
25 i2c9 = &i2c9;
26 i2c10 = &i2c10;
27 i2c11 = &i2c11;
28 i2c12 = &i2c12;
29 i2c13 = &i2c13;
30 i2c14 = &i2c14;
31 i2c15 = &i2c15;
32 serial0 = &uart1;
33 serial1 = &uart2;
34 serial2 = &uart3;
35 serial3 = &uart4;
36 serial4 = &uart5;
37 serial5 = &vuart1;
38 serial6 = &vuart2;
39 };
40
41
42 cpus {
43 #address-cells = <1>;
44 #size-cells = <0>;
45 enable-method = "aspeed,ast2600-smp";
46
47 cpu@f00 {
48 compatible = "arm,cortex-a7";
49 device_type = "cpu";
50 reg = <0xf00>;
51 };
52
53 cpu@f01 {
54 compatible = "arm,cortex-a7";
55 device_type = "cpu";
56 reg = <0xf01>;
57 };
58 };
59
60 timer {
61 compatible = "arm,armv7-timer";
62 interrupt-parent = <&gic>;
63 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
64 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
65 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
66 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
67 clocks = <&syscon ASPEED_CLK_HPLL>;
68 arm,cpu-registers-not-fw-configured;
69 always-on;
70 };
71
72 ahb {
73 compatible = "simple-bus";
74 #address-cells = <1>;
75 #size-cells = <1>;
76 device_type = "soc";
77 ranges;
78
79 gic: interrupt-controller@40461000 {
80 compatible = "arm,cortex-a7-gic";
81 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
82 #interrupt-cells = <3>;
83 interrupt-controller;
84 interrupt-parent = <&gic>;
85 reg = <0x40461000 0x1000>,
86 <0x40462000 0x1000>,
87 <0x40464000 0x2000>,
88 <0x40466000 0x2000>;
89 };
90
91 fmc: spi@1e620000 {
92 reg = < 0x1e620000 0xc4
93 0x20000000 0x10000000 >;
94 #address-cells = <1>;
95 #size-cells = <0>;
96 compatible = "aspeed,ast2600-fmc";
97 clocks = <&syscon ASPEED_CLK_AHB>;
98 status = "disabled";
99 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
100 flash@0 {
101 reg = < 0 >;
102 compatible = "jedec,spi-nor";
103 spi-max-frequency = <50000000>;
104 status = "disabled";
105 };
106 flash@1 {
107 reg = < 1 >;
108 compatible = "jedec,spi-nor";
109 spi-max-frequency = <50000000>;
110 status = "disabled";
111 };
112 flash@2 {
113 reg = < 2 >;
114 compatible = "jedec,spi-nor";
115 spi-max-frequency = <50000000>;
116 status = "disabled";
117 };
118 };
119
120 spi1: spi@1e630000 {
121 reg = < 0x1e630000 0xc4
122 0x30000000 0x10000000 >;
123 #address-cells = <1>;
124 #size-cells = <0>;
125 compatible = "aspeed,ast2600-spi";
126 clocks = <&syscon ASPEED_CLK_AHB>;
127 status = "disabled";
128 flash@0 {
129 reg = < 0 >;
130 compatible = "jedec,spi-nor";
131 spi-max-frequency = <50000000>;
132 status = "disabled";
133 };
134 flash@1 {
135 reg = < 1 >;
136 compatible = "jedec,spi-nor";
137 spi-max-frequency = <50000000>;
138 status = "disabled";
139 };
140 };
141
142 spi2: spi@1e631000 {
143 reg = < 0x1e631000 0xc4
144 0x50000000 0x10000000 >;
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "aspeed,ast2600-spi";
148 clocks = <&syscon ASPEED_CLK_AHB>;
149 status = "disabled";
150 flash@0 {
151 reg = < 0 >;
152 compatible = "jedec,spi-nor";
153 spi-max-frequency = <50000000>;
154 status = "disabled";
155 };
156 flash@1 {
157 reg = < 1 >;
158 compatible = "jedec,spi-nor";
159 spi-max-frequency = <50000000>;
160 status = "disabled";
161 };
162 flash@2 {
163 reg = < 2 >;
164 compatible = "jedec,spi-nor";
165 spi-max-frequency = <50000000>;
166 status = "disabled";
167 };
168 };
169
170 mdio0: mdio@1e650000 {
171 compatible = "aspeed,ast2600-mdio";
172 reg = <0x1e650000 0x8>;
173 #address-cells = <1>;
174 #size-cells = <0>;
175 status = "disabled";
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_mdio1_default>;
178 };
179
180 mdio1: mdio@1e650008 {
181 compatible = "aspeed,ast2600-mdio";
182 reg = <0x1e650008 0x8>;
183 #address-cells = <1>;
184 #size-cells = <0>;
185 status = "disabled";
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_mdio2_default>;
188 };
189
190 mdio2: mdio@1e650010 {
191 compatible = "aspeed,ast2600-mdio";
192 reg = <0x1e650010 0x8>;
193 #address-cells = <1>;
194 #size-cells = <0>;
195 status = "disabled";
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_mdio3_default>;
198 };
199
200 mdio3: mdio@1e650018 {
201 compatible = "aspeed,ast2600-mdio";
202 reg = <0x1e650018 0x8>;
203 #address-cells = <1>;
204 #size-cells = <0>;
205 status = "disabled";
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_mdio4_default>;
208 };
209
210 mac0: ftgmac@1e660000 {
211 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
212 reg = <0x1e660000 0x180>;
213 #address-cells = <1>;
214 #size-cells = <0>;
215 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
216 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
217 status = "disabled";
218 };
219
220 mac1: ftgmac@1e680000 {
221 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
222 reg = <0x1e680000 0x180>;
223 #address-cells = <1>;
224 #size-cells = <0>;
225 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
226 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
227 status = "disabled";
228 };
229
230 mac2: ftgmac@1e670000 {
231 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
232 reg = <0x1e670000 0x180>;
233 #address-cells = <1>;
234 #size-cells = <0>;
235 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
236 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
237 status = "disabled";
238 };
239
240 mac3: ftgmac@1e690000 {
241 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
242 reg = <0x1e690000 0x180>;
243 #address-cells = <1>;
244 #size-cells = <0>;
245 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
246 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
247 status = "disabled";
248 };
249
250 ehci0: usb@1e6a1000 {
251 compatible = "aspeed,ast2600-ehci", "generic-ehci";
252 reg = <0x1e6a1000 0x100>;
253 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
254 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_usb2ah_default>;
257 status = "disabled";
258 };
259
260 ehci1: usb@1e6a3000 {
261 compatible = "aspeed,ast2600-ehci", "generic-ehci";
262 reg = <0x1e6a3000 0x100>;
263 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
265 pinctrl-names = "default";
266 pinctrl-0 = <&pinctrl_usb2bh_default>;
267 status = "disabled";
268 };
269
270 uhci: usb@1e6b0000 {
271 compatible = "aspeed,ast2600-uhci", "generic-uhci";
272 reg = <0x1e6b0000 0x100>;
273 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
274 #ports = <2>;
275 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
276 status = "disabled";
277 /*
278 * No default pinmux, it will follow EHCI, use an
279 * explicit pinmux override if EHCI is not enabled.
280 */
281 };
282
283 vhub: usb-vhub@1e6a0000 {
284 compatible = "aspeed,ast2600-usb-vhub";
285 reg = <0x1e6a0000 0x350>;
286 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
287 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
288 aspeed,vhub-downstream-ports = <7>;
289 aspeed,vhub-generic-endpoints = <21>;
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_usb2ad_default>;
292 status = "disabled";
293 };
294
295 apb {
296 compatible = "simple-bus";
297 #address-cells = <1>;
298 #size-cells = <1>;
299 ranges;
300
301 syscon: syscon@1e6e2000 {
302 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
303 reg = <0x1e6e2000 0x1000>;
304 ranges = <0 0x1e6e2000 0x1000>;
305 #address-cells = <1>;
306 #size-cells = <1>;
307 #clock-cells = <1>;
308 #reset-cells = <1>;
309
310 pinctrl: pinctrl {
311 compatible = "aspeed,ast2600-pinctrl";
312 };
313
314 smp-memram@180 {
315 compatible = "aspeed,ast2600-smpmem";
316 reg = <0x180 0x40>;
317 };
318
319 scu_ic0: interrupt-controller@560 {
320 #interrupt-cells = <1>;
321 compatible = "aspeed,ast2600-scu-ic0";
322 reg = <0x560 0x4>;
323 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
324 interrupt-controller;
325 };
326
327 scu_ic1: interrupt-controller@570 {
328 #interrupt-cells = <1>;
329 compatible = "aspeed,ast2600-scu-ic1";
330 reg = <0x570 0x4>;
331 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
332 interrupt-controller;
333 };
334 };
335
336 rng: hwrng@1e6e2524 {
337 compatible = "timeriomem_rng";
338 reg = <0x1e6e2524 0x4>;
339 period = <1>;
340 quality = <100>;
341 };
342
343 xdma: xdma@1e6e7000 {
344 compatible = "aspeed,ast2600-xdma";
345 reg = <0x1e6e7000 0x100>;
346 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
347 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
348 reset-names = "device", "root-complex";
349 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
350 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
351 aspeed,pcie-device = "bmc";
352 aspeed,scu = <&syscon>;
353 status = "disabled";
354 };
355
356 gpio0: gpio@1e780000 {
357 #gpio-cells = <2>;
358 gpio-controller;
359 compatible = "aspeed,ast2600-gpio";
360 reg = <0x1e780000 0x800>;
361 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
362 gpio-ranges = <&pinctrl 0 0 208>;
363 ngpios = <208>;
364 clocks = <&syscon ASPEED_CLK_APB2>;
365 interrupt-controller;
366 #interrupt-cells = <2>;
367 };
368
369 gpio1: gpio@1e780800 {
370 #gpio-cells = <2>;
371 gpio-controller;
372 compatible = "aspeed,ast2600-gpio";
373 reg = <0x1e780800 0x800>;
374 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
375 gpio-ranges = <&pinctrl 0 208 36>;
376 ngpios = <36>;
377 clocks = <&syscon ASPEED_CLK_APB1>;
378 interrupt-controller;
379 #interrupt-cells = <2>;
380 };
381
382 rtc: rtc@1e781000 {
383 compatible = "aspeed,ast2600-rtc";
384 reg = <0x1e781000 0x18>;
385 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
386 status = "disabled";
387 };
388
389 timer: timer@1e782000 {
390 compatible = "aspeed,ast2600-timer";
391 reg = <0x1e782000 0x90>;
392 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
393 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
394 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
395 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
396 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
397 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
398 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
399 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
400 clocks = <&syscon ASPEED_CLK_APB1>;
401 clock-names = "PCLK";
402 status = "disabled";
403 };
404
405 uart1: serial@1e783000 {
406 compatible = "ns16550a";
407 reg = <0x1e783000 0x20>;
408 reg-shift = <2>;
409 reg-io-width = <4>;
410 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
411 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
412 resets = <&lpc_reset 4>;
413 no-loopback-test;
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
416 status = "disabled";
417 };
418
419 uart5: serial@1e784000 {
420 compatible = "ns16550a";
421 reg = <0x1e784000 0x1000>;
422 reg-shift = <2>;
423 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
425 no-loopback-test;
426 };
427
428 wdt1: watchdog@1e785000 {
429 compatible = "aspeed,ast2600-wdt";
430 reg = <0x1e785000 0x40>;
431 };
432
433 wdt2: watchdog@1e785040 {
434 compatible = "aspeed,ast2600-wdt";
435 reg = <0x1e785040 0x40>;
436 status = "disabled";
437 };
438
439 wdt3: watchdog@1e785080 {
440 compatible = "aspeed,ast2600-wdt";
441 reg = <0x1e785080 0x40>;
442 status = "disabled";
443 };
444
445 wdt4: watchdog@1e7850c0 {
446 compatible = "aspeed,ast2600-wdt";
447 reg = <0x1e7850C0 0x40>;
448 status = "disabled";
449 };
450
451 lpc: lpc@1e789000 {
452 compatible = "aspeed,ast2600-lpc", "simple-mfd";
453 reg = <0x1e789000 0x1000>;
454
455 #address-cells = <1>;
456 #size-cells = <1>;
457 ranges = <0x0 0x1e789000 0x1000>;
458
459 lpc_bmc: lpc-bmc@0 {
460 compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
461 reg = <0x0 0x80>;
462 reg-io-width = <4>;
463
464 #address-cells = <1>;
465 #size-cells = <1>;
466 ranges = <0x0 0x0 0x80>;
467
468 kcs1: kcs@24 {
469 compatible = "aspeed,ast2500-kcs-bmc-v2";
470 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
471 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
472 kcs_chan = <1>;
473 status = "disabled";
474 };
475 kcs2: kcs@28 {
476 compatible = "aspeed,ast2500-kcs-bmc-v2";
477 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
478 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
479 status = "disabled";
480 };
481 kcs3: kcs@2c {
482 compatible = "aspeed,ast2500-kcs-bmc-v2";
483 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
484 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
485 status = "disabled";
486 };
487 };
488
489 lpc_host: lpc-host@80 {
490 compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
491 reg = <0x80 0x1e0>;
492 reg-io-width = <4>;
493
494 #address-cells = <1>;
495 #size-cells = <1>;
496 ranges = <0x0 0x80 0x1e0>;
497
498 kcs4: kcs@94 {
499 compatible = "aspeed,ast2500-kcs-bmc-v2";
500 reg = <0x94 0x1>, <0x98 0x1>, <0x9c 0x1>;
501 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
502 status = "disabled";
503 };
504
505 lpc_ctrl: lpc-ctrl@0 {
506 compatible = "aspeed,ast2600-lpc-ctrl";
507 reg = <0x0 0x80>;
508 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
509 status = "disabled";
510 };
511
512 lpc_snoop: lpc-snoop@0 {
513 compatible = "aspeed,ast2600-lpc-snoop";
514 reg = <0x0 0x80>;
515 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
516 status = "disabled";
517 };
518
519 lhc: lhc@20 {
520 compatible = "aspeed,ast2600-lhc";
521 reg = <0x20 0x24 0x48 0x8>;
522 };
523
524 lpc_reset: reset-controller@18 {
525 compatible = "aspeed,ast2600-lpc-reset";
526 reg = <0x18 0x4>;
527 #reset-cells = <1>;
528 };
529
530 ibt: ibt@c0 {
531 compatible = "aspeed,ast2600-ibt-bmc";
532 reg = <0xc0 0x18>;
533 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
534 status = "disabled";
535 };
536 };
537 };
538
539 sdc: sdc@1e740000 {
540 compatible = "aspeed,ast2600-sd-controller";
541 reg = <0x1e740000 0x100>;
542 #address-cells = <1>;
543 #size-cells = <1>;
544 ranges = <0 0x1e740000 0x10000>;
545 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
546 status = "disabled";
547
548 sdhci0: sdhci@1e740100 {
549 compatible = "aspeed,ast2600-sdhci", "sdhci";
550 reg = <0x100 0x100>;
551 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
552 sdhci,auto-cmd12;
553 clocks = <&syscon ASPEED_CLK_SDIO>;
554 status = "disabled";
555 };
556
557 sdhci1: sdhci@1e740200 {
558 compatible = "aspeed,ast2600-sdhci", "sdhci";
559 reg = <0x200 0x100>;
560 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
561 sdhci,auto-cmd12;
562 clocks = <&syscon ASPEED_CLK_SDIO>;
563 status = "disabled";
564 };
565 };
566
567 emmc_controller: sdc@1e750000 {
568 compatible = "aspeed,ast2600-sd-controller";
569 reg = <0x1e750000 0x100>;
570 #address-cells = <1>;
571 #size-cells = <1>;
572 ranges = <0 0x1e750000 0x10000>;
573 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
574 status = "disabled";
575
576 emmc: sdhci@1e750100 {
577 compatible = "aspeed,ast2600-sdhci";
578 reg = <0x100 0x100>;
579 sdhci,auto-cmd12;
580 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
581 clocks = <&syscon ASPEED_CLK_EMMC>;
582 pinctrl-names = "default";
583 pinctrl-0 = <&pinctrl_emmc_default>;
584 };
585 };
586
587 vuart1: serial@1e787000 {
588 compatible = "aspeed,ast2500-vuart";
589 reg = <0x1e787000 0x40>;
590 reg-shift = <2>;
591 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&syscon ASPEED_CLK_APB1>;
593 no-loopback-test;
594 status = "disabled";
595 };
596
597 vuart2: serial@1e788000 {
598 compatible = "aspeed,ast2500-vuart";
599 reg = <0x1e788000 0x40>;
600 reg-shift = <2>;
601 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
602 clocks = <&syscon ASPEED_CLK_APB1>;
603 no-loopback-test;
604 status = "disabled";
605 };
606
607 uart2: serial@1e78d000 {
608 compatible = "ns16550a";
609 reg = <0x1e78d000 0x20>;
610 reg-shift = <2>;
611 reg-io-width = <4>;
612 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
613 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
614 resets = <&lpc_reset 5>;
615 no-loopback-test;
616 pinctrl-names = "default";
617 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
618 status = "disabled";
619 };
620
621 uart3: serial@1e78e000 {
622 compatible = "ns16550a";
623 reg = <0x1e78e000 0x20>;
624 reg-shift = <2>;
625 reg-io-width = <4>;
626 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
627 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
628 resets = <&lpc_reset 6>;
629 no-loopback-test;
630 pinctrl-names = "default";
631 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
632 status = "disabled";
633 };
634
635 uart4: serial@1e78f000 {
636 compatible = "ns16550a";
637 reg = <0x1e78f000 0x20>;
638 reg-shift = <2>;
639 reg-io-width = <4>;
640 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
642 resets = <&lpc_reset 7>;
643 no-loopback-test;
644 pinctrl-names = "default";
645 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
646 status = "disabled";
647 };
648
649 i2c: bus@1e78a000 {
650 compatible = "simple-bus";
651 #address-cells = <1>;
652 #size-cells = <1>;
653 ranges = <0 0x1e78a000 0x1000>;
654 };
655
656 fsim0: fsi@1e79b000 {
657 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
658 reg = <0x1e79b000 0x94>;
659 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
660 pinctrl-names = "default";
661 pinctrl-0 = <&pinctrl_fsi1_default>;
662 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
663 status = "disabled";
664 };
665
666 fsim1: fsi@1e79b100 {
667 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
668 reg = <0x1e79b100 0x94>;
669 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
670 pinctrl-names = "default";
671 pinctrl-0 = <&pinctrl_fsi2_default>;
672 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
673 status = "disabled";
674 };
675 };
676 };
677};
678
679#include "aspeed-g6-pinctrl.dtsi"
680
681&i2c {
682 i2c0: i2c-bus@80 {
683 #address-cells = <1>;
684 #size-cells = <0>;
685 #interrupt-cells = <1>;
686 reg = <0x80 0x80>;
687 compatible = "aspeed,ast2600-i2c-bus";
688 clocks = <&syscon ASPEED_CLK_APB2>;
689 resets = <&syscon ASPEED_RESET_I2C>;
690 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
691 bus-frequency = <100000>;
692 pinctrl-names = "default";
693 pinctrl-0 = <&pinctrl_i2c1_default>;
694 status = "disabled";
695 };
696
697 i2c1: i2c-bus@100 {
698 #address-cells = <1>;
699 #size-cells = <0>;
700 #interrupt-cells = <1>;
701 reg = <0x100 0x80>;
702 compatible = "aspeed,ast2600-i2c-bus";
703 clocks = <&syscon ASPEED_CLK_APB2>;
704 resets = <&syscon ASPEED_RESET_I2C>;
705 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
706 bus-frequency = <100000>;
707 pinctrl-names = "default";
708 pinctrl-0 = <&pinctrl_i2c2_default>;
709 status = "disabled";
710 };
711
712 i2c2: i2c-bus@180 {
713 #address-cells = <1>;
714 #size-cells = <0>;
715 #interrupt-cells = <1>;
716 reg = <0x180 0x80>;
717 compatible = "aspeed,ast2600-i2c-bus";
718 clocks = <&syscon ASPEED_CLK_APB2>;
719 resets = <&syscon ASPEED_RESET_I2C>;
720 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
721 bus-frequency = <100000>;
722 pinctrl-names = "default";
723 pinctrl-0 = <&pinctrl_i2c3_default>;
724 status = "disabled";
725 };
726
727 i2c3: i2c-bus@200 {
728 #address-cells = <1>;
729 #size-cells = <0>;
730 #interrupt-cells = <1>;
731 reg = <0x200 0x80>;
732 compatible = "aspeed,ast2600-i2c-bus";
733 clocks = <&syscon ASPEED_CLK_APB2>;
734 resets = <&syscon ASPEED_RESET_I2C>;
735 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
736 bus-frequency = <100000>;
737 pinctrl-names = "default";
738 pinctrl-0 = <&pinctrl_i2c4_default>;
739 status = "disabled";
740 };
741
742 i2c4: i2c-bus@280 {
743 #address-cells = <1>;
744 #size-cells = <0>;
745 #interrupt-cells = <1>;
746 reg = <0x280 0x80>;
747 compatible = "aspeed,ast2600-i2c-bus";
748 clocks = <&syscon ASPEED_CLK_APB2>;
749 resets = <&syscon ASPEED_RESET_I2C>;
750 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
751 bus-frequency = <100000>;
752 pinctrl-names = "default";
753 pinctrl-0 = <&pinctrl_i2c5_default>;
754 status = "disabled";
755 };
756
757 i2c5: i2c-bus@300 {
758 #address-cells = <1>;
759 #size-cells = <0>;
760 #interrupt-cells = <1>;
761 reg = <0x300 0x80>;
762 compatible = "aspeed,ast2600-i2c-bus";
763 clocks = <&syscon ASPEED_CLK_APB2>;
764 resets = <&syscon ASPEED_RESET_I2C>;
765 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
766 bus-frequency = <100000>;
767 pinctrl-names = "default";
768 pinctrl-0 = <&pinctrl_i2c6_default>;
769 status = "disabled";
770 };
771
772 i2c6: i2c-bus@380 {
773 #address-cells = <1>;
774 #size-cells = <0>;
775 #interrupt-cells = <1>;
776 reg = <0x380 0x80>;
777 compatible = "aspeed,ast2600-i2c-bus";
778 clocks = <&syscon ASPEED_CLK_APB2>;
779 resets = <&syscon ASPEED_RESET_I2C>;
780 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
781 bus-frequency = <100000>;
782 pinctrl-names = "default";
783 pinctrl-0 = <&pinctrl_i2c7_default>;
784 status = "disabled";
785 };
786
787 i2c7: i2c-bus@400 {
788 #address-cells = <1>;
789 #size-cells = <0>;
790 #interrupt-cells = <1>;
791 reg = <0x400 0x80>;
792 compatible = "aspeed,ast2600-i2c-bus";
793 clocks = <&syscon ASPEED_CLK_APB2>;
794 resets = <&syscon ASPEED_RESET_I2C>;
795 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
796 bus-frequency = <100000>;
797 pinctrl-names = "default";
798 pinctrl-0 = <&pinctrl_i2c8_default>;
799 status = "disabled";
800 };
801
802 i2c8: i2c-bus@480 {
803 #address-cells = <1>;
804 #size-cells = <0>;
805 #interrupt-cells = <1>;
806 reg = <0x480 0x80>;
807 compatible = "aspeed,ast2600-i2c-bus";
808 clocks = <&syscon ASPEED_CLK_APB2>;
809 resets = <&syscon ASPEED_RESET_I2C>;
810 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
811 bus-frequency = <100000>;
812 pinctrl-names = "default";
813 pinctrl-0 = <&pinctrl_i2c9_default>;
814 status = "disabled";
815 };
816
817 i2c9: i2c-bus@500 {
818 #address-cells = <1>;
819 #size-cells = <0>;
820 #interrupt-cells = <1>;
821 reg = <0x500 0x80>;
822 compatible = "aspeed,ast2600-i2c-bus";
823 clocks = <&syscon ASPEED_CLK_APB2>;
824 resets = <&syscon ASPEED_RESET_I2C>;
825 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
826 bus-frequency = <100000>;
827 pinctrl-names = "default";
828 pinctrl-0 = <&pinctrl_i2c10_default>;
829 status = "disabled";
830 };
831
832 i2c10: i2c-bus@580 {
833 #address-cells = <1>;
834 #size-cells = <0>;
835 #interrupt-cells = <1>;
836 reg = <0x580 0x80>;
837 compatible = "aspeed,ast2600-i2c-bus";
838 clocks = <&syscon ASPEED_CLK_APB2>;
839 resets = <&syscon ASPEED_RESET_I2C>;
840 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
841 bus-frequency = <100000>;
842 pinctrl-names = "default";
843 pinctrl-0 = <&pinctrl_i2c11_default>;
844 status = "disabled";
845 };
846
847 i2c11: i2c-bus@600 {
848 #address-cells = <1>;
849 #size-cells = <0>;
850 #interrupt-cells = <1>;
851 reg = <0x600 0x80>;
852 compatible = "aspeed,ast2600-i2c-bus";
853 clocks = <&syscon ASPEED_CLK_APB2>;
854 resets = <&syscon ASPEED_RESET_I2C>;
855 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
856 bus-frequency = <100000>;
857 pinctrl-names = "default";
858 pinctrl-0 = <&pinctrl_i2c12_default>;
859 status = "disabled";
860 };
861
862 i2c12: i2c-bus@680 {
863 #address-cells = <1>;
864 #size-cells = <0>;
865 #interrupt-cells = <1>;
866 reg = <0x680 0x80>;
867 compatible = "aspeed,ast2600-i2c-bus";
868 clocks = <&syscon ASPEED_CLK_APB2>;
869 resets = <&syscon ASPEED_RESET_I2C>;
870 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
871 bus-frequency = <100000>;
872 pinctrl-names = "default";
873 pinctrl-0 = <&pinctrl_i2c13_default>;
874 status = "disabled";
875 };
876
877 i2c13: i2c-bus@700 {
878 #address-cells = <1>;
879 #size-cells = <0>;
880 #interrupt-cells = <1>;
881 reg = <0x700 0x80>;
882 compatible = "aspeed,ast2600-i2c-bus";
883 clocks = <&syscon ASPEED_CLK_APB2>;
884 resets = <&syscon ASPEED_RESET_I2C>;
885 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
886 bus-frequency = <100000>;
887 pinctrl-names = "default";
888 pinctrl-0 = <&pinctrl_i2c14_default>;
889 status = "disabled";
890 };
891
892 i2c14: i2c-bus@780 {
893 #address-cells = <1>;
894 #size-cells = <0>;
895 #interrupt-cells = <1>;
896 reg = <0x780 0x80>;
897 compatible = "aspeed,ast2600-i2c-bus";
898 clocks = <&syscon ASPEED_CLK_APB2>;
899 resets = <&syscon ASPEED_RESET_I2C>;
900 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
901 bus-frequency = <100000>;
902 pinctrl-names = "default";
903 pinctrl-0 = <&pinctrl_i2c15_default>;
904 status = "disabled";
905 };
906
907 i2c15: i2c-bus@800 {
908 #address-cells = <1>;
909 #size-cells = <0>;
910 #interrupt-cells = <1>;
911 reg = <0x800 0x80>;
912 compatible = "aspeed,ast2600-i2c-bus";
913 clocks = <&syscon ASPEED_CLK_APB2>;
914 resets = <&syscon ASPEED_RESET_I2C>;
915 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
916 bus-frequency = <100000>;
917 pinctrl-names = "default";
918 pinctrl-0 = <&pinctrl_i2c16_default>;
919 status = "disabled";
920 };
921};