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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
4 * Copyright (c) 2015, Google Inc.
5 */
6
7#ifndef __PHY_TEGRA_XUSB_H
8#define __PHY_TEGRA_XUSB_H
9
10#include <linux/io.h>
11#include <linux/mutex.h>
12#include <linux/workqueue.h>
13
14#include <linux/usb/ch9.h>
15#include <linux/usb/otg.h>
16#include <linux/usb/role.h>
17
18/* legacy entry points for backwards-compatibility */
19int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
20int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
21
22struct phy;
23struct phy_provider;
24struct platform_device;
25struct regulator;
26
27/*
28 * lanes
29 */
30struct tegra_xusb_lane_soc {
31 const char *name;
32
33 unsigned int offset;
34 unsigned int shift;
35 unsigned int mask;
36
37 const char * const *funcs;
38 unsigned int num_funcs;
39
40 struct {
41 unsigned int misc_ctl2;
42 } regs;
43};
44
45struct tegra_xusb_lane {
46 const struct tegra_xusb_lane_soc *soc;
47 struct tegra_xusb_pad *pad;
48 struct device_node *np;
49 struct list_head list;
50 unsigned int function;
51 unsigned int index;
52};
53
54int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
55 struct device_node *np);
56
57struct tegra_xusb_usb3_lane {
58 struct tegra_xusb_lane base;
59};
60
61static inline struct tegra_xusb_usb3_lane *
62to_usb3_lane(struct tegra_xusb_lane *lane)
63{
64 return container_of(lane, struct tegra_xusb_usb3_lane, base);
65}
66
67struct tegra_xusb_usb2_lane {
68 struct tegra_xusb_lane base;
69
70 u32 hs_curr_level_offset;
71 bool powered_on;
72};
73
74static inline struct tegra_xusb_usb2_lane *
75to_usb2_lane(struct tegra_xusb_lane *lane)
76{
77 return container_of(lane, struct tegra_xusb_usb2_lane, base);
78}
79
80struct tegra_xusb_ulpi_lane {
81 struct tegra_xusb_lane base;
82};
83
84static inline struct tegra_xusb_ulpi_lane *
85to_ulpi_lane(struct tegra_xusb_lane *lane)
86{
87 return container_of(lane, struct tegra_xusb_ulpi_lane, base);
88}
89
90struct tegra_xusb_hsic_lane {
91 struct tegra_xusb_lane base;
92
93 u32 strobe_trim;
94 u32 rx_strobe_trim;
95 u32 rx_data_trim;
96 u32 tx_rtune_n;
97 u32 tx_rtune_p;
98 u32 tx_rslew_n;
99 u32 tx_rslew_p;
100 bool auto_term;
101};
102
103static inline struct tegra_xusb_hsic_lane *
104to_hsic_lane(struct tegra_xusb_lane *lane)
105{
106 return container_of(lane, struct tegra_xusb_hsic_lane, base);
107}
108
109struct tegra_xusb_pcie_lane {
110 struct tegra_xusb_lane base;
111};
112
113static inline struct tegra_xusb_pcie_lane *
114to_pcie_lane(struct tegra_xusb_lane *lane)
115{
116 return container_of(lane, struct tegra_xusb_pcie_lane, base);
117}
118
119struct tegra_xusb_sata_lane {
120 struct tegra_xusb_lane base;
121};
122
123static inline struct tegra_xusb_sata_lane *
124to_sata_lane(struct tegra_xusb_lane *lane)
125{
126 return container_of(lane, struct tegra_xusb_sata_lane, base);
127}
128
129struct tegra_xusb_lane_ops {
130 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,
131 struct device_node *np,
132 unsigned int index);
133 void (*remove)(struct tegra_xusb_lane *lane);
134 void (*iddq_enable)(struct tegra_xusb_lane *lane);
135 void (*iddq_disable)(struct tegra_xusb_lane *lane);
136 int (*enable_phy_sleepwalk)(struct tegra_xusb_lane *lane, enum usb_device_speed speed);
137 int (*disable_phy_sleepwalk)(struct tegra_xusb_lane *lane);
138 int (*enable_phy_wake)(struct tegra_xusb_lane *lane);
139 int (*disable_phy_wake)(struct tegra_xusb_lane *lane);
140 bool (*remote_wake_detected)(struct tegra_xusb_lane *lane);
141};
142
143bool tegra_xusb_lane_check(struct tegra_xusb_lane *lane, const char *function);
144
145/*
146 * pads
147 */
148struct tegra_xusb_pad_soc;
149struct tegra_xusb_padctl;
150
151struct tegra_xusb_pad_ops {
152 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,
153 const struct tegra_xusb_pad_soc *soc,
154 struct device_node *np);
155 void (*remove)(struct tegra_xusb_pad *pad);
156};
157
158struct tegra_xusb_pad_soc {
159 const char *name;
160
161 const struct tegra_xusb_lane_soc *lanes;
162 unsigned int num_lanes;
163
164 const struct tegra_xusb_pad_ops *ops;
165};
166
167struct tegra_xusb_pad {
168 const struct tegra_xusb_pad_soc *soc;
169 struct tegra_xusb_padctl *padctl;
170 struct phy_provider *provider;
171 struct phy **lanes;
172 struct device dev;
173
174 const struct tegra_xusb_lane_ops *ops;
175
176 struct list_head list;
177};
178
179static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)
180{
181 return container_of(dev, struct tegra_xusb_pad, dev);
182}
183
184int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
185 struct tegra_xusb_padctl *padctl,
186 struct device_node *np);
187int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
188 const struct phy_ops *ops);
189void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
190
191struct tegra_xusb_usb3_pad {
192 struct tegra_xusb_pad base;
193
194 unsigned int enable;
195 struct mutex lock;
196};
197
198static inline struct tegra_xusb_usb3_pad *
199to_usb3_pad(struct tegra_xusb_pad *pad)
200{
201 return container_of(pad, struct tegra_xusb_usb3_pad, base);
202}
203
204struct tegra_xusb_usb2_pad {
205 struct tegra_xusb_pad base;
206
207 struct clk *clk;
208 unsigned int enable;
209 struct mutex lock;
210};
211
212static inline struct tegra_xusb_usb2_pad *
213to_usb2_pad(struct tegra_xusb_pad *pad)
214{
215 return container_of(pad, struct tegra_xusb_usb2_pad, base);
216}
217
218struct tegra_xusb_ulpi_pad {
219 struct tegra_xusb_pad base;
220};
221
222static inline struct tegra_xusb_ulpi_pad *
223to_ulpi_pad(struct tegra_xusb_pad *pad)
224{
225 return container_of(pad, struct tegra_xusb_ulpi_pad, base);
226}
227
228struct tegra_xusb_hsic_pad {
229 struct tegra_xusb_pad base;
230
231 struct regulator *supply;
232 struct clk *clk;
233};
234
235static inline struct tegra_xusb_hsic_pad *
236to_hsic_pad(struct tegra_xusb_pad *pad)
237{
238 return container_of(pad, struct tegra_xusb_hsic_pad, base);
239}
240
241struct tegra_xusb_pcie_pad {
242 struct tegra_xusb_pad base;
243
244 struct reset_control *rst;
245 struct clk *pll;
246
247 bool enable;
248};
249
250static inline struct tegra_xusb_pcie_pad *
251to_pcie_pad(struct tegra_xusb_pad *pad)
252{
253 return container_of(pad, struct tegra_xusb_pcie_pad, base);
254}
255
256struct tegra_xusb_sata_pad {
257 struct tegra_xusb_pad base;
258
259 struct reset_control *rst;
260 struct clk *pll;
261
262 bool enable;
263};
264
265static inline struct tegra_xusb_sata_pad *
266to_sata_pad(struct tegra_xusb_pad *pad)
267{
268 return container_of(pad, struct tegra_xusb_sata_pad, base);
269}
270
271/*
272 * ports
273 */
274struct tegra_xusb_port_ops;
275
276struct tegra_xusb_port {
277 struct tegra_xusb_padctl *padctl;
278 struct tegra_xusb_lane *lane;
279 unsigned int index;
280
281 struct list_head list;
282 struct device dev;
283
284 struct usb_role_switch *usb_role_sw;
285 struct work_struct usb_phy_work;
286 struct usb_phy usb_phy;
287
288 const struct tegra_xusb_port_ops *ops;
289};
290
291static inline struct tegra_xusb_port *to_tegra_xusb_port(struct device *dev)
292{
293 return container_of(dev, struct tegra_xusb_port, dev);
294}
295
296struct tegra_xusb_lane_map {
297 unsigned int port;
298 const char *type;
299 unsigned int index;
300 const char *func;
301};
302
303struct tegra_xusb_lane *
304tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
305 const struct tegra_xusb_lane_map *map,
306 const char *function);
307
308struct tegra_xusb_port *
309tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
310 unsigned int index);
311
312struct tegra_xusb_usb2_port {
313 struct tegra_xusb_port base;
314
315 struct regulator *supply;
316 enum usb_dr_mode mode;
317 bool internal;
318 int usb3_port_fake;
319};
320
321static inline struct tegra_xusb_usb2_port *
322to_usb2_port(struct tegra_xusb_port *port)
323{
324 return container_of(port, struct tegra_xusb_usb2_port, base);
325}
326
327struct tegra_xusb_usb2_port *
328tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,
329 unsigned int index);
330void tegra_xusb_usb2_port_release(struct tegra_xusb_port *port);
331void tegra_xusb_usb2_port_remove(struct tegra_xusb_port *port);
332
333struct tegra_xusb_ulpi_port {
334 struct tegra_xusb_port base;
335
336 struct regulator *supply;
337 bool internal;
338};
339
340static inline struct tegra_xusb_ulpi_port *
341to_ulpi_port(struct tegra_xusb_port *port)
342{
343 return container_of(port, struct tegra_xusb_ulpi_port, base);
344}
345
346void tegra_xusb_ulpi_port_release(struct tegra_xusb_port *port);
347
348struct tegra_xusb_hsic_port {
349 struct tegra_xusb_port base;
350};
351
352static inline struct tegra_xusb_hsic_port *
353to_hsic_port(struct tegra_xusb_port *port)
354{
355 return container_of(port, struct tegra_xusb_hsic_port, base);
356}
357
358void tegra_xusb_hsic_port_release(struct tegra_xusb_port *port);
359
360struct tegra_xusb_usb3_port {
361 struct tegra_xusb_port base;
362 bool context_saved;
363 unsigned int port;
364 bool internal;
365 bool disable_gen2;
366
367 u32 tap1;
368 u32 amp;
369 u32 ctle_z;
370 u32 ctle_g;
371};
372
373static inline struct tegra_xusb_usb3_port *
374to_usb3_port(struct tegra_xusb_port *port)
375{
376 return container_of(port, struct tegra_xusb_usb3_port, base);
377}
378
379struct tegra_xusb_usb3_port *
380tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,
381 unsigned int index);
382void tegra_xusb_usb3_port_release(struct tegra_xusb_port *port);
383
384struct tegra_xusb_port_ops {
385 void (*release)(struct tegra_xusb_port *port);
386 void (*remove)(struct tegra_xusb_port *port);
387 int (*enable)(struct tegra_xusb_port *port);
388 void (*disable)(struct tegra_xusb_port *port);
389 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);
390};
391
392/*
393 * pad controller
394 */
395struct tegra_xusb_padctl_soc;
396
397struct tegra_xusb_padctl_ops {
398 struct tegra_xusb_padctl *
399 (*probe)(struct device *dev,
400 const struct tegra_xusb_padctl_soc *soc);
401 void (*remove)(struct tegra_xusb_padctl *padctl);
402
403 int (*suspend_noirq)(struct tegra_xusb_padctl *padctl);
404 int (*resume_noirq)(struct tegra_xusb_padctl *padctl);
405 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,
406 unsigned int index);
407 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,
408 unsigned int index, bool idle);
409 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,
410 unsigned int index, bool enable);
411 int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set);
412 int (*utmi_port_reset)(struct phy *phy);
413 void (*utmi_pad_power_on)(struct phy *phy);
414 void (*utmi_pad_power_down)(struct phy *phy);
415};
416
417struct tegra_xusb_padctl_soc {
418 const struct tegra_xusb_pad_soc * const *pads;
419 unsigned int num_pads;
420
421 struct {
422 struct {
423 const struct tegra_xusb_port_ops *ops;
424 unsigned int count;
425 } usb2, ulpi, hsic, usb3;
426 } ports;
427
428 const struct tegra_xusb_padctl_ops *ops;
429
430 const char * const *supply_names;
431 unsigned int num_supplies;
432 bool supports_gen2;
433 bool need_fake_usb3_port;
434};
435
436struct tegra_xusb_padctl {
437 struct device *dev;
438 void __iomem *regs;
439 struct mutex lock;
440 struct reset_control *rst;
441
442 const struct tegra_xusb_padctl_soc *soc;
443
444 struct tegra_xusb_pad *pcie;
445 struct tegra_xusb_pad *sata;
446 struct tegra_xusb_pad *ulpi;
447 struct tegra_xusb_pad *usb2;
448 struct tegra_xusb_pad *hsic;
449
450 struct list_head ports;
451 struct list_head lanes;
452 struct list_head pads;
453
454 unsigned int enable;
455
456 struct clk *clk;
457
458 struct regulator_bulk_data *supplies;
459};
460
461static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
462 unsigned long offset)
463{
464 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);
465 writel(value, padctl->regs + offset);
466}
467
468static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
469 unsigned long offset)
470{
471 u32 value = readl(padctl->regs + offset);
472 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);
473 return value;
474}
475
476struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
477 const char *name,
478 unsigned int index);
479
480#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
481extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
482#endif
483#if defined(CONFIG_ARCH_TEGRA_210_SOC)
484extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
485#endif
486#if defined(CONFIG_ARCH_TEGRA_186_SOC)
487extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc;
488#endif
489#if defined(CONFIG_ARCH_TEGRA_194_SOC)
490extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc;
491#endif
492
493#endif /* __PHY_TEGRA_XUSB_H */
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
4 * Copyright (c) 2015, Google Inc.
5 */
6
7#ifndef __PHY_TEGRA_XUSB_H
8#define __PHY_TEGRA_XUSB_H
9
10#include <linux/io.h>
11#include <linux/mutex.h>
12#include <linux/workqueue.h>
13
14#include <linux/usb/otg.h>
15
16/* legacy entry points for backwards-compatibility */
17int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
18int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
19
20struct phy;
21struct phy_provider;
22struct platform_device;
23struct regulator;
24
25/*
26 * lanes
27 */
28struct tegra_xusb_lane_soc {
29 const char *name;
30
31 unsigned int offset;
32 unsigned int shift;
33 unsigned int mask;
34
35 const char * const *funcs;
36 unsigned int num_funcs;
37};
38
39struct tegra_xusb_lane {
40 const struct tegra_xusb_lane_soc *soc;
41 struct tegra_xusb_pad *pad;
42 struct device_node *np;
43 struct list_head list;
44 unsigned int function;
45 unsigned int index;
46};
47
48int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
49 struct device_node *np);
50
51struct tegra_xusb_usb3_lane {
52 struct tegra_xusb_lane base;
53};
54
55static inline struct tegra_xusb_usb3_lane *
56to_usb3_lane(struct tegra_xusb_lane *lane)
57{
58 return container_of(lane, struct tegra_xusb_usb3_lane, base);
59}
60
61struct tegra_xusb_usb2_lane {
62 struct tegra_xusb_lane base;
63
64 u32 hs_curr_level_offset;
65 bool powered_on;
66};
67
68static inline struct tegra_xusb_usb2_lane *
69to_usb2_lane(struct tegra_xusb_lane *lane)
70{
71 return container_of(lane, struct tegra_xusb_usb2_lane, base);
72}
73
74struct tegra_xusb_ulpi_lane {
75 struct tegra_xusb_lane base;
76};
77
78static inline struct tegra_xusb_ulpi_lane *
79to_ulpi_lane(struct tegra_xusb_lane *lane)
80{
81 return container_of(lane, struct tegra_xusb_ulpi_lane, base);
82}
83
84struct tegra_xusb_hsic_lane {
85 struct tegra_xusb_lane base;
86
87 u32 strobe_trim;
88 u32 rx_strobe_trim;
89 u32 rx_data_trim;
90 u32 tx_rtune_n;
91 u32 tx_rtune_p;
92 u32 tx_rslew_n;
93 u32 tx_rslew_p;
94 bool auto_term;
95};
96
97static inline struct tegra_xusb_hsic_lane *
98to_hsic_lane(struct tegra_xusb_lane *lane)
99{
100 return container_of(lane, struct tegra_xusb_hsic_lane, base);
101}
102
103struct tegra_xusb_pcie_lane {
104 struct tegra_xusb_lane base;
105};
106
107static inline struct tegra_xusb_pcie_lane *
108to_pcie_lane(struct tegra_xusb_lane *lane)
109{
110 return container_of(lane, struct tegra_xusb_pcie_lane, base);
111}
112
113struct tegra_xusb_sata_lane {
114 struct tegra_xusb_lane base;
115};
116
117static inline struct tegra_xusb_sata_lane *
118to_sata_lane(struct tegra_xusb_lane *lane)
119{
120 return container_of(lane, struct tegra_xusb_sata_lane, base);
121}
122
123struct tegra_xusb_lane_ops {
124 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,
125 struct device_node *np,
126 unsigned int index);
127 void (*remove)(struct tegra_xusb_lane *lane);
128};
129
130/*
131 * pads
132 */
133struct tegra_xusb_pad_soc;
134struct tegra_xusb_padctl;
135
136struct tegra_xusb_pad_ops {
137 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,
138 const struct tegra_xusb_pad_soc *soc,
139 struct device_node *np);
140 void (*remove)(struct tegra_xusb_pad *pad);
141};
142
143struct tegra_xusb_pad_soc {
144 const char *name;
145
146 const struct tegra_xusb_lane_soc *lanes;
147 unsigned int num_lanes;
148
149 const struct tegra_xusb_pad_ops *ops;
150};
151
152struct tegra_xusb_pad {
153 const struct tegra_xusb_pad_soc *soc;
154 struct tegra_xusb_padctl *padctl;
155 struct phy_provider *provider;
156 struct phy **lanes;
157 struct device dev;
158
159 const struct tegra_xusb_lane_ops *ops;
160
161 struct list_head list;
162};
163
164static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)
165{
166 return container_of(dev, struct tegra_xusb_pad, dev);
167}
168
169int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
170 struct tegra_xusb_padctl *padctl,
171 struct device_node *np);
172int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
173 const struct phy_ops *ops);
174void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
175
176struct tegra_xusb_usb3_pad {
177 struct tegra_xusb_pad base;
178
179 unsigned int enable;
180 struct mutex lock;
181};
182
183static inline struct tegra_xusb_usb3_pad *
184to_usb3_pad(struct tegra_xusb_pad *pad)
185{
186 return container_of(pad, struct tegra_xusb_usb3_pad, base);
187}
188
189struct tegra_xusb_usb2_pad {
190 struct tegra_xusb_pad base;
191
192 struct clk *clk;
193 unsigned int enable;
194 struct mutex lock;
195};
196
197static inline struct tegra_xusb_usb2_pad *
198to_usb2_pad(struct tegra_xusb_pad *pad)
199{
200 return container_of(pad, struct tegra_xusb_usb2_pad, base);
201}
202
203struct tegra_xusb_ulpi_pad {
204 struct tegra_xusb_pad base;
205};
206
207static inline struct tegra_xusb_ulpi_pad *
208to_ulpi_pad(struct tegra_xusb_pad *pad)
209{
210 return container_of(pad, struct tegra_xusb_ulpi_pad, base);
211}
212
213struct tegra_xusb_hsic_pad {
214 struct tegra_xusb_pad base;
215
216 struct regulator *supply;
217 struct clk *clk;
218};
219
220static inline struct tegra_xusb_hsic_pad *
221to_hsic_pad(struct tegra_xusb_pad *pad)
222{
223 return container_of(pad, struct tegra_xusb_hsic_pad, base);
224}
225
226struct tegra_xusb_pcie_pad {
227 struct tegra_xusb_pad base;
228
229 struct reset_control *rst;
230 struct clk *pll;
231
232 unsigned int enable;
233};
234
235static inline struct tegra_xusb_pcie_pad *
236to_pcie_pad(struct tegra_xusb_pad *pad)
237{
238 return container_of(pad, struct tegra_xusb_pcie_pad, base);
239}
240
241struct tegra_xusb_sata_pad {
242 struct tegra_xusb_pad base;
243
244 struct reset_control *rst;
245 struct clk *pll;
246
247 unsigned int enable;
248};
249
250static inline struct tegra_xusb_sata_pad *
251to_sata_pad(struct tegra_xusb_pad *pad)
252{
253 return container_of(pad, struct tegra_xusb_sata_pad, base);
254}
255
256/*
257 * ports
258 */
259struct tegra_xusb_port_ops;
260
261struct tegra_xusb_port {
262 struct tegra_xusb_padctl *padctl;
263 struct tegra_xusb_lane *lane;
264 unsigned int index;
265
266 struct list_head list;
267 struct device dev;
268
269 const struct tegra_xusb_port_ops *ops;
270};
271
272struct tegra_xusb_lane_map {
273 unsigned int port;
274 const char *type;
275 unsigned int index;
276 const char *func;
277};
278
279struct tegra_xusb_lane *
280tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
281 const struct tegra_xusb_lane_map *map,
282 const char *function);
283
284struct tegra_xusb_port *
285tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
286 unsigned int index);
287
288struct tegra_xusb_usb2_port {
289 struct tegra_xusb_port base;
290
291 struct regulator *supply;
292 enum usb_dr_mode mode;
293 bool internal;
294};
295
296static inline struct tegra_xusb_usb2_port *
297to_usb2_port(struct tegra_xusb_port *port)
298{
299 return container_of(port, struct tegra_xusb_usb2_port, base);
300}
301
302struct tegra_xusb_usb2_port *
303tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,
304 unsigned int index);
305
306struct tegra_xusb_ulpi_port {
307 struct tegra_xusb_port base;
308
309 struct regulator *supply;
310 bool internal;
311};
312
313static inline struct tegra_xusb_ulpi_port *
314to_ulpi_port(struct tegra_xusb_port *port)
315{
316 return container_of(port, struct tegra_xusb_ulpi_port, base);
317}
318
319struct tegra_xusb_hsic_port {
320 struct tegra_xusb_port base;
321};
322
323static inline struct tegra_xusb_hsic_port *
324to_hsic_port(struct tegra_xusb_port *port)
325{
326 return container_of(port, struct tegra_xusb_hsic_port, base);
327}
328
329struct tegra_xusb_usb3_port {
330 struct tegra_xusb_port base;
331 struct regulator *supply;
332 bool context_saved;
333 unsigned int port;
334 bool internal;
335
336 u32 tap1;
337 u32 amp;
338 u32 ctle_z;
339 u32 ctle_g;
340};
341
342static inline struct tegra_xusb_usb3_port *
343to_usb3_port(struct tegra_xusb_port *port)
344{
345 return container_of(port, struct tegra_xusb_usb3_port, base);
346}
347
348struct tegra_xusb_usb3_port *
349tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,
350 unsigned int index);
351
352struct tegra_xusb_port_ops {
353 int (*enable)(struct tegra_xusb_port *port);
354 void (*disable)(struct tegra_xusb_port *port);
355 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);
356};
357
358/*
359 * pad controller
360 */
361struct tegra_xusb_padctl_soc;
362
363struct tegra_xusb_padctl_ops {
364 struct tegra_xusb_padctl *
365 (*probe)(struct device *dev,
366 const struct tegra_xusb_padctl_soc *soc);
367 void (*remove)(struct tegra_xusb_padctl *padctl);
368
369 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,
370 unsigned int index);
371 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,
372 unsigned int index, bool idle);
373 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,
374 unsigned int index, bool enable);
375};
376
377struct tegra_xusb_padctl_soc {
378 const struct tegra_xusb_pad_soc * const *pads;
379 unsigned int num_pads;
380
381 struct {
382 struct {
383 const struct tegra_xusb_port_ops *ops;
384 unsigned int count;
385 } usb2, ulpi, hsic, usb3;
386 } ports;
387
388 const struct tegra_xusb_padctl_ops *ops;
389
390 const char * const *supply_names;
391 unsigned int num_supplies;
392};
393
394struct tegra_xusb_padctl {
395 struct device *dev;
396 void __iomem *regs;
397 struct mutex lock;
398 struct reset_control *rst;
399
400 const struct tegra_xusb_padctl_soc *soc;
401
402 struct tegra_xusb_pad *pcie;
403 struct tegra_xusb_pad *sata;
404 struct tegra_xusb_pad *ulpi;
405 struct tegra_xusb_pad *usb2;
406 struct tegra_xusb_pad *hsic;
407
408 struct list_head ports;
409 struct list_head lanes;
410 struct list_head pads;
411
412 unsigned int enable;
413
414 struct clk *clk;
415
416 struct regulator_bulk_data *supplies;
417};
418
419static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
420 unsigned long offset)
421{
422 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);
423 writel(value, padctl->regs + offset);
424}
425
426static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
427 unsigned long offset)
428{
429 u32 value = readl(padctl->regs + offset);
430 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);
431 return value;
432}
433
434struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
435 const char *name,
436 unsigned int index);
437
438#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
439extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
440#endif
441#if defined(CONFIG_ARCH_TEGRA_210_SOC)
442extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
443#endif
444#if defined(CONFIG_ARCH_TEGRA_186_SOC)
445extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc;
446#endif
447
448#endif /* __PHY_TEGRA_XUSB_H */