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v6.2
  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Renesas R-Car Gen3 for USB2.0 PHY driver
  4 *
  5 * Copyright (C) 2015-2017 Renesas Electronics Corporation
  6 *
  7 * This is based on the phy-rcar-gen2 driver:
  8 * Copyright (C) 2014 Renesas Solutions Corp.
  9 * Copyright (C) 2014 Cogent Embedded, Inc.
 10 */
 11
 12#include <linux/extcon-provider.h>
 13#include <linux/interrupt.h>
 14#include <linux/io.h>
 15#include <linux/module.h>
 16#include <linux/mutex.h>
 17#include <linux/of.h>
 18#include <linux/of_address.h>
 19#include <linux/of_device.h>
 20#include <linux/phy/phy.h>
 21#include <linux/platform_device.h>
 22#include <linux/pm_runtime.h>
 23#include <linux/regulator/consumer.h>
 24#include <linux/string.h>
 25#include <linux/usb/of.h>
 26#include <linux/workqueue.h>
 27
 28/******* USB2.0 Host registers (original offset is +0x200) *******/
 29#define USB2_INT_ENABLE		0x000
 30#define USB2_USBCTR		0x00c
 31#define USB2_SPD_RSM_TIMSET	0x10c
 32#define USB2_OC_TIMSET		0x110
 33#define USB2_COMMCTRL		0x600
 34#define USB2_OBINTSTA		0x604
 35#define USB2_OBINTEN		0x608
 36#define USB2_VBCTRL		0x60c
 37#define USB2_LINECTRL1		0x610
 38#define USB2_ADPCTRL		0x630
 39
 40/* INT_ENABLE */
 41#define USB2_INT_ENABLE_UCOM_INTEN	BIT(3)
 42#define USB2_INT_ENABLE_USBH_INTB_EN	BIT(2)	/* For EHCI */
 43#define USB2_INT_ENABLE_USBH_INTA_EN	BIT(1)	/* For OHCI */
 44
 45/* USBCTR */
 46#define USB2_USBCTR_DIRPD	BIT(2)
 47#define USB2_USBCTR_PLL_RST	BIT(1)
 48
 49/* SPD_RSM_TIMSET */
 50#define USB2_SPD_RSM_TIMSET_INIT	0x014e029b
 51
 52/* OC_TIMSET */
 53#define USB2_OC_TIMSET_INIT		0x000209ab
 54
 55/* COMMCTRL */
 56#define USB2_COMMCTRL_OTG_PERI		BIT(31)	/* 1 = Peripheral mode */
 57
 58/* OBINTSTA and OBINTEN */
 59#define USB2_OBINT_SESSVLDCHG		BIT(12)
 60#define USB2_OBINT_IDDIGCHG		BIT(11)
 61#define USB2_OBINT_BITS			(USB2_OBINT_SESSVLDCHG | \
 62					 USB2_OBINT_IDDIGCHG)
 63
 64/* VBCTRL */
 65#define USB2_VBCTRL_OCCLREN		BIT(16)
 66#define USB2_VBCTRL_DRVVBUSSEL		BIT(8)
 67#define USB2_VBCTRL_VBOUT		BIT(0)
 68
 69/* LINECTRL1 */
 70#define USB2_LINECTRL1_DPRPD_EN		BIT(19)
 71#define USB2_LINECTRL1_DP_RPD		BIT(18)
 72#define USB2_LINECTRL1_DMRPD_EN		BIT(17)
 73#define USB2_LINECTRL1_DM_RPD		BIT(16)
 74#define USB2_LINECTRL1_OPMODE_NODRV	BIT(6)
 75
 76/* ADPCTRL */
 77#define USB2_ADPCTRL_OTGSESSVLD		BIT(20)
 78#define USB2_ADPCTRL_IDDIG		BIT(19)
 79#define USB2_ADPCTRL_IDPULLUP		BIT(5)	/* 1 = ID sampling is enabled */
 80#define USB2_ADPCTRL_DRVVBUS		BIT(4)
 81
 82/*  RZ/G2L specific */
 83#define USB2_OBINT_IDCHG_EN		BIT(0)
 84#define USB2_LINECTRL1_USB2_IDMON	BIT(0)
 85
 86#define NUM_OF_PHYS			4
 87enum rcar_gen3_phy_index {
 88	PHY_INDEX_BOTH_HC,
 89	PHY_INDEX_OHCI,
 90	PHY_INDEX_EHCI,
 91	PHY_INDEX_HSUSB
 92};
 93
 94static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
 95	USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
 96	USB2_INT_ENABLE_USBH_INTA_EN,
 97	USB2_INT_ENABLE_USBH_INTB_EN,
 98	0
 99};
100
101struct rcar_gen3_phy {
102	struct phy *phy;
103	struct rcar_gen3_chan *ch;
104	u32 int_enable_bits;
105	bool initialized;
106	bool otg_initialized;
107	bool powered;
108};
109
110struct rcar_gen3_chan {
111	void __iomem *base;
112	struct device *dev;	/* platform_device's device */
113	struct extcon_dev *extcon;
114	struct rcar_gen3_phy rphys[NUM_OF_PHYS];
115	struct regulator *vbus;
116	struct work_struct work;
117	struct mutex lock;	/* protects rphys[...].powered */
118	enum usb_dr_mode dr_mode;
119	int irq;
120	u32 obint_enable_bits;
121	bool extcon_host;
122	bool is_otg_channel;
123	bool uses_otg_pins;
124	bool soc_no_adp_ctrl;
125};
126
127struct rcar_gen3_phy_drv_data {
128	const struct phy_ops *phy_usb2_ops;
129	bool no_adp_ctrl;
130};
131
132/*
133 * Combination about is_otg_channel and uses_otg_pins:
134 *
135 * Parameters				|| Behaviors
136 * is_otg_channel	| uses_otg_pins	|| irqs		| role sysfs
137 * ---------------------+---------------++--------------+------------
138 * true			| true		|| enabled	| enabled
139 * true                 | false		|| disabled	| enabled
140 * false                | any		|| disabled	| disabled
141 */
142
143static void rcar_gen3_phy_usb2_work(struct work_struct *work)
144{
145	struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
146						 work);
147
148	if (ch->extcon_host) {
149		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
150		extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
151	} else {
152		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
153		extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
154	}
155}
156
157static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
158{
159	void __iomem *usb2_base = ch->base;
160	u32 val = readl(usb2_base + USB2_COMMCTRL);
161
162	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
163	if (host)
164		val &= ~USB2_COMMCTRL_OTG_PERI;
165	else
166		val |= USB2_COMMCTRL_OTG_PERI;
167	writel(val, usb2_base + USB2_COMMCTRL);
168}
169
170static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
171{
172	void __iomem *usb2_base = ch->base;
173	u32 val = readl(usb2_base + USB2_LINECTRL1);
174
175	dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
176	val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
177	if (dp)
178		val |= USB2_LINECTRL1_DP_RPD;
179	if (dm)
180		val |= USB2_LINECTRL1_DM_RPD;
181	writel(val, usb2_base + USB2_LINECTRL1);
182}
183
184static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
185{
186	void __iomem *usb2_base = ch->base;
187	u32 vbus_ctrl_reg = USB2_ADPCTRL;
188	u32 vbus_ctrl_val = USB2_ADPCTRL_DRVVBUS;
189	u32 val;
190
191	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
192	if (ch->soc_no_adp_ctrl) {
193		vbus_ctrl_reg = USB2_VBCTRL;
194		vbus_ctrl_val = USB2_VBCTRL_VBOUT;
195	}
196
197	val = readl(usb2_base + vbus_ctrl_reg);
198	if (vbus)
199		val |= vbus_ctrl_val;
200	else
201		val &= ~vbus_ctrl_val;
202	writel(val, usb2_base + vbus_ctrl_reg);
203}
204
205static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
206{
207	void __iomem *usb2_base = ch->base;
208	u32 val = readl(usb2_base + USB2_OBINTEN);
209
210	if (ch->uses_otg_pins && enable)
211		val |= ch->obint_enable_bits;
212	else
213		val &= ~ch->obint_enable_bits;
214	writel(val, usb2_base + USB2_OBINTEN);
215}
216
217static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
218{
219	rcar_gen3_set_linectrl(ch, 1, 1);
220	rcar_gen3_set_host_mode(ch, 1);
221	rcar_gen3_enable_vbus_ctrl(ch, 1);
222
223	ch->extcon_host = true;
224	schedule_work(&ch->work);
225}
226
227static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
228{
229	rcar_gen3_set_linectrl(ch, 0, 1);
230	rcar_gen3_set_host_mode(ch, 0);
231	rcar_gen3_enable_vbus_ctrl(ch, 0);
232
233	ch->extcon_host = false;
234	schedule_work(&ch->work);
235}
236
237static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
238{
239	void __iomem *usb2_base = ch->base;
240	u32 val;
241
242	val = readl(usb2_base + USB2_LINECTRL1);
243	writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
244
245	rcar_gen3_set_linectrl(ch, 1, 1);
246	rcar_gen3_set_host_mode(ch, 1);
247	rcar_gen3_enable_vbus_ctrl(ch, 0);
248
249	val = readl(usb2_base + USB2_LINECTRL1);
250	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
251}
252
253static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
254{
255	rcar_gen3_set_linectrl(ch, 0, 1);
256	rcar_gen3_set_host_mode(ch, 0);
257	rcar_gen3_enable_vbus_ctrl(ch, 1);
258}
259
260static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
261{
262	rcar_gen3_control_otg_irq(ch, 0);
263
264	rcar_gen3_enable_vbus_ctrl(ch, 1);
265	rcar_gen3_init_for_host(ch);
266
267	rcar_gen3_control_otg_irq(ch, 1);
268}
269
270static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
271{
272	if (!ch->uses_otg_pins)
273		return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
274
275	if (ch->soc_no_adp_ctrl)
276		return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON);
277
278	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
279}
280
281static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
282{
283	if (!rcar_gen3_check_id(ch))
284		rcar_gen3_init_for_host(ch);
285	else
286		rcar_gen3_init_for_peri(ch);
287}
288
289static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
290{
291	return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
292}
293
294static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
295{
296	if (rcar_gen3_is_host(ch))
297		return PHY_MODE_USB_HOST;
298
299	return PHY_MODE_USB_DEVICE;
300}
301
302static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
303{
304	int i;
305
306	for (i = 0; i < NUM_OF_PHYS; i++) {
307		if (ch->rphys[i].initialized)
308			return true;
309	}
310
311	return false;
312}
313
314static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch)
315{
316	int i;
317
318	for (i = 0; i < NUM_OF_PHYS; i++) {
319		if (ch->rphys[i].otg_initialized)
320			return false;
321	}
322
323	return true;
324}
325
326static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
327{
328	int i;
329
330	for (i = 0; i < NUM_OF_PHYS; i++) {
331		if (ch->rphys[i].powered)
332			return false;
333	}
334
335	return true;
336}
337
338static ssize_t role_store(struct device *dev, struct device_attribute *attr,
339			  const char *buf, size_t count)
340{
341	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
342	bool is_b_device;
343	enum phy_mode cur_mode, new_mode;
344
345	if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
346		return -EIO;
347
348	if (sysfs_streq(buf, "host"))
349		new_mode = PHY_MODE_USB_HOST;
350	else if (sysfs_streq(buf, "peripheral"))
351		new_mode = PHY_MODE_USB_DEVICE;
352	else
353		return -EINVAL;
354
355	/* is_b_device: true is B-Device. false is A-Device. */
356	is_b_device = rcar_gen3_check_id(ch);
357	cur_mode = rcar_gen3_get_phy_mode(ch);
358
359	/* If current and new mode is the same, this returns the error */
360	if (cur_mode == new_mode)
361		return -EINVAL;
362
363	if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
364		if (!is_b_device)	/* A-Peripheral */
365			rcar_gen3_init_from_a_peri_to_a_host(ch);
366		else			/* B-Peripheral */
367			rcar_gen3_init_for_b_host(ch);
368	} else {			/* And is_host must be true */
369		if (!is_b_device)	/* A-Host */
370			rcar_gen3_init_for_a_peri(ch);
371		else			/* B-Host */
372			rcar_gen3_init_for_peri(ch);
373	}
374
375	return count;
376}
377
378static ssize_t role_show(struct device *dev, struct device_attribute *attr,
379			 char *buf)
380{
381	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
382
383	if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
384		return -EIO;
385
386	return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
387							    "peripheral");
388}
389static DEVICE_ATTR_RW(role);
390
391static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
392{
393	void __iomem *usb2_base = ch->base;
394	u32 val;
395
396	/* Should not use functions of read-modify-write a register */
397	val = readl(usb2_base + USB2_LINECTRL1);
398	val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
399	      USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
400	writel(val, usb2_base + USB2_LINECTRL1);
401
402	if (!ch->soc_no_adp_ctrl) {
403		val = readl(usb2_base + USB2_VBCTRL);
404		val &= ~USB2_VBCTRL_OCCLREN;
405		writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
406		val = readl(usb2_base + USB2_ADPCTRL);
407		writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
408	}
409	msleep(20);
410
411	writel(0xffffffff, usb2_base + USB2_OBINTSTA);
412	writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN);
413
414	rcar_gen3_device_recognition(ch);
415}
416
417static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
418{
419	struct rcar_gen3_chan *ch = _ch;
420	void __iomem *usb2_base = ch->base;
421	u32 status = readl(usb2_base + USB2_OBINTSTA);
422	irqreturn_t ret = IRQ_NONE;
423
424	if (status & ch->obint_enable_bits) {
425		dev_vdbg(ch->dev, "%s: %08x\n", __func__, status);
426		writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA);
427		rcar_gen3_device_recognition(ch);
428		ret = IRQ_HANDLED;
429	}
430
431	return ret;
432}
433
434static int rcar_gen3_phy_usb2_init(struct phy *p)
435{
436	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
437	struct rcar_gen3_chan *channel = rphy->ch;
438	void __iomem *usb2_base = channel->base;
439	u32 val;
440	int ret;
441
442	if (!rcar_gen3_is_any_rphy_initialized(channel) && channel->irq >= 0) {
443		INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
444		ret = request_irq(channel->irq, rcar_gen3_phy_usb2_irq,
445				  IRQF_SHARED, dev_name(channel->dev), channel);
446		if (ret < 0) {
447			dev_err(channel->dev, "No irq handler (%d)\n", channel->irq);
448			return ret;
449		}
450	}
451
452	/* Initialize USB2 part */
453	val = readl(usb2_base + USB2_INT_ENABLE);
454	val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
455	writel(val, usb2_base + USB2_INT_ENABLE);
456	writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
457	writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
458
459	/* Initialize otg part */
460	if (channel->is_otg_channel) {
461		if (rcar_gen3_needs_init_otg(channel))
462			rcar_gen3_init_otg(channel);
463		rphy->otg_initialized = true;
464	}
465
466	rphy->initialized = true;
467
468	return 0;
469}
470
471static int rcar_gen3_phy_usb2_exit(struct phy *p)
472{
473	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
474	struct rcar_gen3_chan *channel = rphy->ch;
475	void __iomem *usb2_base = channel->base;
476	u32 val;
477
478	rphy->initialized = false;
479
480	if (channel->is_otg_channel)
481		rphy->otg_initialized = false;
482
483	val = readl(usb2_base + USB2_INT_ENABLE);
484	val &= ~rphy->int_enable_bits;
485	if (!rcar_gen3_is_any_rphy_initialized(channel))
486		val &= ~USB2_INT_ENABLE_UCOM_INTEN;
487	writel(val, usb2_base + USB2_INT_ENABLE);
488
489	if (channel->irq >= 0 && !rcar_gen3_is_any_rphy_initialized(channel))
490		free_irq(channel->irq, channel);
491
492	return 0;
493}
494
495static int rcar_gen3_phy_usb2_power_on(struct phy *p)
496{
497	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
498	struct rcar_gen3_chan *channel = rphy->ch;
499	void __iomem *usb2_base = channel->base;
500	u32 val;
501	int ret = 0;
502
503	mutex_lock(&channel->lock);
504	if (!rcar_gen3_are_all_rphys_power_off(channel))
505		goto out;
506
507	if (channel->vbus) {
508		ret = regulator_enable(channel->vbus);
509		if (ret)
510			goto out;
511	}
512
513	val = readl(usb2_base + USB2_USBCTR);
514	val |= USB2_USBCTR_PLL_RST;
515	writel(val, usb2_base + USB2_USBCTR);
516	val &= ~USB2_USBCTR_PLL_RST;
517	writel(val, usb2_base + USB2_USBCTR);
518
519out:
520	/* The powered flag should be set for any other phys anyway */
521	rphy->powered = true;
522	mutex_unlock(&channel->lock);
523
524	return 0;
525}
526
527static int rcar_gen3_phy_usb2_power_off(struct phy *p)
528{
529	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
530	struct rcar_gen3_chan *channel = rphy->ch;
531	int ret = 0;
532
533	mutex_lock(&channel->lock);
534	rphy->powered = false;
535
536	if (!rcar_gen3_are_all_rphys_power_off(channel))
537		goto out;
538
539	if (channel->vbus)
540		ret = regulator_disable(channel->vbus);
541
542out:
543	mutex_unlock(&channel->lock);
544
545	return ret;
546}
547
548static const struct phy_ops rcar_gen3_phy_usb2_ops = {
549	.init		= rcar_gen3_phy_usb2_init,
550	.exit		= rcar_gen3_phy_usb2_exit,
551	.power_on	= rcar_gen3_phy_usb2_power_on,
552	.power_off	= rcar_gen3_phy_usb2_power_off,
553	.owner		= THIS_MODULE,
554};
555
556static const struct phy_ops rz_g1c_phy_usb2_ops = {
557	.init		= rcar_gen3_phy_usb2_init,
558	.exit		= rcar_gen3_phy_usb2_exit,
559	.owner		= THIS_MODULE,
560};
561
562static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data = {
563	.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
564	.no_adp_ctrl = false,
565};
 
 
566
567static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data = {
568	.phy_usb2_ops = &rz_g1c_phy_usb2_ops,
569	.no_adp_ctrl = false,
570};
 
 
571
572static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data = {
573	.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
574	.no_adp_ctrl = true,
575};
576
577static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
578	{
579		.compatible = "renesas,usb2-phy-r8a77470",
580		.data = &rz_g1c_phy_usb2_data,
581	},
582	{
583		.compatible = "renesas,usb2-phy-r8a7795",
584		.data = &rcar_gen3_phy_usb2_data,
585	},
586	{
587		.compatible = "renesas,usb2-phy-r8a7796",
588		.data = &rcar_gen3_phy_usb2_data,
589	},
590	{
591		.compatible = "renesas,usb2-phy-r8a77965",
592		.data = &rcar_gen3_phy_usb2_data,
593	},
594	{
595		.compatible = "renesas,rzg2l-usb2-phy",
596		.data = &rz_g2l_phy_usb2_data,
597	},
598	{
599		.compatible = "renesas,rcar-gen3-usb2-phy",
600		.data = &rcar_gen3_phy_usb2_data,
601	},
602	{ /* sentinel */ },
603};
604MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
605
606static const unsigned int rcar_gen3_phy_cable[] = {
607	EXTCON_USB,
608	EXTCON_USB_HOST,
609	EXTCON_NONE,
610};
611
612static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
613					    struct of_phandle_args *args)
614{
615	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
616
617	if (args->args_count == 0)	/* For old version dts */
618		return ch->rphys[PHY_INDEX_BOTH_HC].phy;
619	else if (args->args_count > 1)	/* Prevent invalid args count */
620		return ERR_PTR(-ENODEV);
621
622	if (args->args[0] >= NUM_OF_PHYS)
623		return ERR_PTR(-ENODEV);
624
625	return ch->rphys[args->args[0]].phy;
626}
627
628static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
629{
630	enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
631	int i;
632
633	/*
634	 * If one of device nodes has other dr_mode except UNKNOWN,
635	 * this function returns UNKNOWN. To achieve backward compatibility,
636	 * this loop starts the index as 0.
637	 */
638	for (i = 0; i < NUM_OF_PHYS; i++) {
639		enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
640
641		if (mode != USB_DR_MODE_UNKNOWN) {
642			if (candidate == USB_DR_MODE_UNKNOWN)
643				candidate = mode;
644			else if (candidate != mode)
645				return USB_DR_MODE_UNKNOWN;
646		}
647	}
648
649	return candidate;
650}
651
652static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
653{
654	const struct rcar_gen3_phy_drv_data *phy_data;
655	struct device *dev = &pdev->dev;
656	struct rcar_gen3_chan *channel;
657	struct phy_provider *provider;
658	int ret = 0, i;
 
 
659
660	if (!dev->of_node) {
661		dev_err(dev, "This driver needs device tree\n");
662		return -EINVAL;
663	}
664
665	channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
666	if (!channel)
667		return -ENOMEM;
668
669	channel->base = devm_platform_ioremap_resource(pdev, 0);
 
670	if (IS_ERR(channel->base))
671		return PTR_ERR(channel->base);
672
673	channel->obint_enable_bits = USB2_OBINT_BITS;
674	/* get irq number here and request_irq for OTG in phy_init */
675	channel->irq = platform_get_irq_optional(pdev, 0);
 
 
 
 
 
 
 
676	channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
677	if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
678		int ret;
679
680		channel->is_otg_channel = true;
681		channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
682							"renesas,no-otg-pins");
683		channel->extcon = devm_extcon_dev_allocate(dev,
684							rcar_gen3_phy_cable);
685		if (IS_ERR(channel->extcon))
686			return PTR_ERR(channel->extcon);
687
688		ret = devm_extcon_dev_register(dev, channel->extcon);
689		if (ret < 0) {
690			dev_err(dev, "Failed to register extcon\n");
691			return ret;
692		}
693	}
694
695	/*
696	 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
697	 * And then, phy-core will manage runtime pm for this device.
698	 */
699	pm_runtime_enable(dev);
700
701	phy_data = of_device_get_match_data(dev);
702	if (!phy_data) {
703		ret = -EINVAL;
704		goto error;
705	}
706
707	channel->soc_no_adp_ctrl = phy_data->no_adp_ctrl;
708	if (phy_data->no_adp_ctrl)
709		channel->obint_enable_bits = USB2_OBINT_IDCHG_EN;
710
711	mutex_init(&channel->lock);
712	for (i = 0; i < NUM_OF_PHYS; i++) {
713		channel->rphys[i].phy = devm_phy_create(dev, NULL,
714							phy_data->phy_usb2_ops);
715		if (IS_ERR(channel->rphys[i].phy)) {
716			dev_err(dev, "Failed to create USB2 PHY\n");
717			ret = PTR_ERR(channel->rphys[i].phy);
718			goto error;
719		}
720		channel->rphys[i].ch = channel;
721		channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
722		phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
723	}
724
725	channel->vbus = devm_regulator_get_optional(dev, "vbus");
726	if (IS_ERR(channel->vbus)) {
727		if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
728			ret = PTR_ERR(channel->vbus);
729			goto error;
730		}
731		channel->vbus = NULL;
732	}
733
734	platform_set_drvdata(pdev, channel);
735	channel->dev = dev;
736
737	provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
738	if (IS_ERR(provider)) {
739		dev_err(dev, "Failed to register PHY provider\n");
740		ret = PTR_ERR(provider);
741		goto error;
742	} else if (channel->is_otg_channel) {
743		int ret;
744
745		ret = device_create_file(dev, &dev_attr_role);
746		if (ret < 0)
747			goto error;
748	}
749
750	return 0;
751
752error:
753	pm_runtime_disable(dev);
754
755	return ret;
756}
757
758static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
759{
760	struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
761
762	if (channel->is_otg_channel)
763		device_remove_file(&pdev->dev, &dev_attr_role);
764
765	pm_runtime_disable(&pdev->dev);
766
767	return 0;
768};
769
770static struct platform_driver rcar_gen3_phy_usb2_driver = {
771	.driver = {
772		.name		= "phy_rcar_gen3_usb2",
773		.of_match_table	= rcar_gen3_phy_usb2_match_table,
774	},
775	.probe	= rcar_gen3_phy_usb2_probe,
776	.remove = rcar_gen3_phy_usb2_remove,
777};
778module_platform_driver(rcar_gen3_phy_usb2_driver);
779
780MODULE_LICENSE("GPL v2");
781MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
782MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
v5.4
  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Renesas R-Car Gen3 for USB2.0 PHY driver
  4 *
  5 * Copyright (C) 2015-2017 Renesas Electronics Corporation
  6 *
  7 * This is based on the phy-rcar-gen2 driver:
  8 * Copyright (C) 2014 Renesas Solutions Corp.
  9 * Copyright (C) 2014 Cogent Embedded, Inc.
 10 */
 11
 12#include <linux/extcon-provider.h>
 13#include <linux/interrupt.h>
 14#include <linux/io.h>
 15#include <linux/module.h>
 16#include <linux/mutex.h>
 17#include <linux/of.h>
 18#include <linux/of_address.h>
 19#include <linux/of_device.h>
 20#include <linux/phy/phy.h>
 21#include <linux/platform_device.h>
 22#include <linux/pm_runtime.h>
 23#include <linux/regulator/consumer.h>
 
 24#include <linux/usb/of.h>
 25#include <linux/workqueue.h>
 26
 27/******* USB2.0 Host registers (original offset is +0x200) *******/
 28#define USB2_INT_ENABLE		0x000
 29#define USB2_USBCTR		0x00c
 30#define USB2_SPD_RSM_TIMSET	0x10c
 31#define USB2_OC_TIMSET		0x110
 32#define USB2_COMMCTRL		0x600
 33#define USB2_OBINTSTA		0x604
 34#define USB2_OBINTEN		0x608
 35#define USB2_VBCTRL		0x60c
 36#define USB2_LINECTRL1		0x610
 37#define USB2_ADPCTRL		0x630
 38
 39/* INT_ENABLE */
 40#define USB2_INT_ENABLE_UCOM_INTEN	BIT(3)
 41#define USB2_INT_ENABLE_USBH_INTB_EN	BIT(2)	/* For EHCI */
 42#define USB2_INT_ENABLE_USBH_INTA_EN	BIT(1)	/* For OHCI */
 43
 44/* USBCTR */
 45#define USB2_USBCTR_DIRPD	BIT(2)
 46#define USB2_USBCTR_PLL_RST	BIT(1)
 47
 48/* SPD_RSM_TIMSET */
 49#define USB2_SPD_RSM_TIMSET_INIT	0x014e029b
 50
 51/* OC_TIMSET */
 52#define USB2_OC_TIMSET_INIT		0x000209ab
 53
 54/* COMMCTRL */
 55#define USB2_COMMCTRL_OTG_PERI		BIT(31)	/* 1 = Peripheral mode */
 56
 57/* OBINTSTA and OBINTEN */
 58#define USB2_OBINT_SESSVLDCHG		BIT(12)
 59#define USB2_OBINT_IDDIGCHG		BIT(11)
 60#define USB2_OBINT_BITS			(USB2_OBINT_SESSVLDCHG | \
 61					 USB2_OBINT_IDDIGCHG)
 62
 63/* VBCTRL */
 64#define USB2_VBCTRL_OCCLREN		BIT(16)
 65#define USB2_VBCTRL_DRVVBUSSEL		BIT(8)
 
 66
 67/* LINECTRL1 */
 68#define USB2_LINECTRL1_DPRPD_EN		BIT(19)
 69#define USB2_LINECTRL1_DP_RPD		BIT(18)
 70#define USB2_LINECTRL1_DMRPD_EN		BIT(17)
 71#define USB2_LINECTRL1_DM_RPD		BIT(16)
 72#define USB2_LINECTRL1_OPMODE_NODRV	BIT(6)
 73
 74/* ADPCTRL */
 75#define USB2_ADPCTRL_OTGSESSVLD		BIT(20)
 76#define USB2_ADPCTRL_IDDIG		BIT(19)
 77#define USB2_ADPCTRL_IDPULLUP		BIT(5)	/* 1 = ID sampling is enabled */
 78#define USB2_ADPCTRL_DRVVBUS		BIT(4)
 79
 
 
 
 
 80#define NUM_OF_PHYS			4
 81enum rcar_gen3_phy_index {
 82	PHY_INDEX_BOTH_HC,
 83	PHY_INDEX_OHCI,
 84	PHY_INDEX_EHCI,
 85	PHY_INDEX_HSUSB
 86};
 87
 88static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
 89	USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
 90	USB2_INT_ENABLE_USBH_INTA_EN,
 91	USB2_INT_ENABLE_USBH_INTB_EN,
 92	0
 93};
 94
 95struct rcar_gen3_phy {
 96	struct phy *phy;
 97	struct rcar_gen3_chan *ch;
 98	u32 int_enable_bits;
 99	bool initialized;
100	bool otg_initialized;
101	bool powered;
102};
103
104struct rcar_gen3_chan {
105	void __iomem *base;
106	struct device *dev;	/* platform_device's device */
107	struct extcon_dev *extcon;
108	struct rcar_gen3_phy rphys[NUM_OF_PHYS];
109	struct regulator *vbus;
110	struct work_struct work;
111	struct mutex lock;	/* protects rphys[...].powered */
112	enum usb_dr_mode dr_mode;
 
 
113	bool extcon_host;
114	bool is_otg_channel;
115	bool uses_otg_pins;
 
 
 
 
 
 
116};
117
118/*
119 * Combination about is_otg_channel and uses_otg_pins:
120 *
121 * Parameters				|| Behaviors
122 * is_otg_channel	| uses_otg_pins	|| irqs		| role sysfs
123 * ---------------------+---------------++--------------+------------
124 * true			| true		|| enabled	| enabled
125 * true                 | false		|| disabled	| enabled
126 * false                | any		|| disabled	| disabled
127 */
128
129static void rcar_gen3_phy_usb2_work(struct work_struct *work)
130{
131	struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
132						 work);
133
134	if (ch->extcon_host) {
135		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
136		extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
137	} else {
138		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
139		extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
140	}
141}
142
143static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
144{
145	void __iomem *usb2_base = ch->base;
146	u32 val = readl(usb2_base + USB2_COMMCTRL);
147
148	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
149	if (host)
150		val &= ~USB2_COMMCTRL_OTG_PERI;
151	else
152		val |= USB2_COMMCTRL_OTG_PERI;
153	writel(val, usb2_base + USB2_COMMCTRL);
154}
155
156static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
157{
158	void __iomem *usb2_base = ch->base;
159	u32 val = readl(usb2_base + USB2_LINECTRL1);
160
161	dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
162	val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
163	if (dp)
164		val |= USB2_LINECTRL1_DP_RPD;
165	if (dm)
166		val |= USB2_LINECTRL1_DM_RPD;
167	writel(val, usb2_base + USB2_LINECTRL1);
168}
169
170static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
171{
172	void __iomem *usb2_base = ch->base;
173	u32 val = readl(usb2_base + USB2_ADPCTRL);
 
 
174
175	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
 
 
 
 
 
 
176	if (vbus)
177		val |= USB2_ADPCTRL_DRVVBUS;
178	else
179		val &= ~USB2_ADPCTRL_DRVVBUS;
180	writel(val, usb2_base + USB2_ADPCTRL);
181}
182
183static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
184{
185	void __iomem *usb2_base = ch->base;
186	u32 val = readl(usb2_base + USB2_OBINTEN);
187
188	if (ch->uses_otg_pins && enable)
189		val |= USB2_OBINT_BITS;
190	else
191		val &= ~USB2_OBINT_BITS;
192	writel(val, usb2_base + USB2_OBINTEN);
193}
194
195static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
196{
197	rcar_gen3_set_linectrl(ch, 1, 1);
198	rcar_gen3_set_host_mode(ch, 1);
199	rcar_gen3_enable_vbus_ctrl(ch, 1);
200
201	ch->extcon_host = true;
202	schedule_work(&ch->work);
203}
204
205static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
206{
207	rcar_gen3_set_linectrl(ch, 0, 1);
208	rcar_gen3_set_host_mode(ch, 0);
209	rcar_gen3_enable_vbus_ctrl(ch, 0);
210
211	ch->extcon_host = false;
212	schedule_work(&ch->work);
213}
214
215static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
216{
217	void __iomem *usb2_base = ch->base;
218	u32 val;
219
220	val = readl(usb2_base + USB2_LINECTRL1);
221	writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
222
223	rcar_gen3_set_linectrl(ch, 1, 1);
224	rcar_gen3_set_host_mode(ch, 1);
225	rcar_gen3_enable_vbus_ctrl(ch, 0);
226
227	val = readl(usb2_base + USB2_LINECTRL1);
228	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
229}
230
231static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
232{
233	rcar_gen3_set_linectrl(ch, 0, 1);
234	rcar_gen3_set_host_mode(ch, 0);
235	rcar_gen3_enable_vbus_ctrl(ch, 1);
236}
237
238static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
239{
240	rcar_gen3_control_otg_irq(ch, 0);
241
242	rcar_gen3_enable_vbus_ctrl(ch, 1);
243	rcar_gen3_init_for_host(ch);
244
245	rcar_gen3_control_otg_irq(ch, 1);
246}
247
248static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
249{
250	if (!ch->uses_otg_pins)
251		return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
252
 
 
 
253	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
254}
255
256static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
257{
258	if (!rcar_gen3_check_id(ch))
259		rcar_gen3_init_for_host(ch);
260	else
261		rcar_gen3_init_for_peri(ch);
262}
263
264static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
265{
266	return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
267}
268
269static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
270{
271	if (rcar_gen3_is_host(ch))
272		return PHY_MODE_USB_HOST;
273
274	return PHY_MODE_USB_DEVICE;
275}
276
277static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
278{
279	int i;
280
281	for (i = 0; i < NUM_OF_PHYS; i++) {
282		if (ch->rphys[i].initialized)
283			return true;
284	}
285
286	return false;
287}
288
289static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch)
290{
291	int i;
292
293	for (i = 0; i < NUM_OF_PHYS; i++) {
294		if (ch->rphys[i].otg_initialized)
295			return false;
296	}
297
298	return true;
299}
300
301static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
302{
303	int i;
304
305	for (i = 0; i < NUM_OF_PHYS; i++) {
306		if (ch->rphys[i].powered)
307			return false;
308	}
309
310	return true;
311}
312
313static ssize_t role_store(struct device *dev, struct device_attribute *attr,
314			  const char *buf, size_t count)
315{
316	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
317	bool is_b_device;
318	enum phy_mode cur_mode, new_mode;
319
320	if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
321		return -EIO;
322
323	if (!strncmp(buf, "host", strlen("host")))
324		new_mode = PHY_MODE_USB_HOST;
325	else if (!strncmp(buf, "peripheral", strlen("peripheral")))
326		new_mode = PHY_MODE_USB_DEVICE;
327	else
328		return -EINVAL;
329
330	/* is_b_device: true is B-Device. false is A-Device. */
331	is_b_device = rcar_gen3_check_id(ch);
332	cur_mode = rcar_gen3_get_phy_mode(ch);
333
334	/* If current and new mode is the same, this returns the error */
335	if (cur_mode == new_mode)
336		return -EINVAL;
337
338	if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
339		if (!is_b_device)	/* A-Peripheral */
340			rcar_gen3_init_from_a_peri_to_a_host(ch);
341		else			/* B-Peripheral */
342			rcar_gen3_init_for_b_host(ch);
343	} else {			/* And is_host must be true */
344		if (!is_b_device)	/* A-Host */
345			rcar_gen3_init_for_a_peri(ch);
346		else			/* B-Host */
347			rcar_gen3_init_for_peri(ch);
348	}
349
350	return count;
351}
352
353static ssize_t role_show(struct device *dev, struct device_attribute *attr,
354			 char *buf)
355{
356	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
357
358	if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
359		return -EIO;
360
361	return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
362							    "peripheral");
363}
364static DEVICE_ATTR_RW(role);
365
366static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
367{
368	void __iomem *usb2_base = ch->base;
369	u32 val;
370
371	/* Should not use functions of read-modify-write a register */
372	val = readl(usb2_base + USB2_LINECTRL1);
373	val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
374	      USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
375	writel(val, usb2_base + USB2_LINECTRL1);
376
377	val = readl(usb2_base + USB2_VBCTRL);
378	val &= ~USB2_VBCTRL_OCCLREN;
379	writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
380	val = readl(usb2_base + USB2_ADPCTRL);
381	writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
382
 
383	msleep(20);
384
385	writel(0xffffffff, usb2_base + USB2_OBINTSTA);
386	writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
387
388	rcar_gen3_device_recognition(ch);
389}
390
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
391static int rcar_gen3_phy_usb2_init(struct phy *p)
392{
393	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
394	struct rcar_gen3_chan *channel = rphy->ch;
395	void __iomem *usb2_base = channel->base;
396	u32 val;
 
 
 
 
 
 
 
 
 
 
 
397
398	/* Initialize USB2 part */
399	val = readl(usb2_base + USB2_INT_ENABLE);
400	val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
401	writel(val, usb2_base + USB2_INT_ENABLE);
402	writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
403	writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
404
405	/* Initialize otg part */
406	if (channel->is_otg_channel) {
407		if (rcar_gen3_needs_init_otg(channel))
408			rcar_gen3_init_otg(channel);
409		rphy->otg_initialized = true;
410	}
411
412	rphy->initialized = true;
413
414	return 0;
415}
416
417static int rcar_gen3_phy_usb2_exit(struct phy *p)
418{
419	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
420	struct rcar_gen3_chan *channel = rphy->ch;
421	void __iomem *usb2_base = channel->base;
422	u32 val;
423
424	rphy->initialized = false;
425
426	if (channel->is_otg_channel)
427		rphy->otg_initialized = false;
428
429	val = readl(usb2_base + USB2_INT_ENABLE);
430	val &= ~rphy->int_enable_bits;
431	if (!rcar_gen3_is_any_rphy_initialized(channel))
432		val &= ~USB2_INT_ENABLE_UCOM_INTEN;
433	writel(val, usb2_base + USB2_INT_ENABLE);
434
 
 
 
435	return 0;
436}
437
438static int rcar_gen3_phy_usb2_power_on(struct phy *p)
439{
440	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
441	struct rcar_gen3_chan *channel = rphy->ch;
442	void __iomem *usb2_base = channel->base;
443	u32 val;
444	int ret = 0;
445
446	mutex_lock(&channel->lock);
447	if (!rcar_gen3_are_all_rphys_power_off(channel))
448		goto out;
449
450	if (channel->vbus) {
451		ret = regulator_enable(channel->vbus);
452		if (ret)
453			goto out;
454	}
455
456	val = readl(usb2_base + USB2_USBCTR);
457	val |= USB2_USBCTR_PLL_RST;
458	writel(val, usb2_base + USB2_USBCTR);
459	val &= ~USB2_USBCTR_PLL_RST;
460	writel(val, usb2_base + USB2_USBCTR);
461
462out:
463	/* The powered flag should be set for any other phys anyway */
464	rphy->powered = true;
465	mutex_unlock(&channel->lock);
466
467	return 0;
468}
469
470static int rcar_gen3_phy_usb2_power_off(struct phy *p)
471{
472	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
473	struct rcar_gen3_chan *channel = rphy->ch;
474	int ret = 0;
475
476	mutex_lock(&channel->lock);
477	rphy->powered = false;
478
479	if (!rcar_gen3_are_all_rphys_power_off(channel))
480		goto out;
481
482	if (channel->vbus)
483		ret = regulator_disable(channel->vbus);
484
485out:
486	mutex_unlock(&channel->lock);
487
488	return ret;
489}
490
491static const struct phy_ops rcar_gen3_phy_usb2_ops = {
492	.init		= rcar_gen3_phy_usb2_init,
493	.exit		= rcar_gen3_phy_usb2_exit,
494	.power_on	= rcar_gen3_phy_usb2_power_on,
495	.power_off	= rcar_gen3_phy_usb2_power_off,
496	.owner		= THIS_MODULE,
497};
498
499static const struct phy_ops rz_g1c_phy_usb2_ops = {
500	.init		= rcar_gen3_phy_usb2_init,
501	.exit		= rcar_gen3_phy_usb2_exit,
502	.owner		= THIS_MODULE,
503};
504
505static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
506{
507	struct rcar_gen3_chan *ch = _ch;
508	void __iomem *usb2_base = ch->base;
509	u32 status = readl(usb2_base + USB2_OBINTSTA);
510	irqreturn_t ret = IRQ_NONE;
511
512	if (status & USB2_OBINT_BITS) {
513		dev_vdbg(ch->dev, "%s: %08x\n", __func__, status);
514		writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
515		rcar_gen3_device_recognition(ch);
516		ret = IRQ_HANDLED;
517	}
518
519	return ret;
520}
 
 
521
522static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
523	{
524		.compatible = "renesas,usb2-phy-r8a77470",
525		.data = &rz_g1c_phy_usb2_ops,
526	},
527	{
528		.compatible = "renesas,usb2-phy-r8a7795",
529		.data = &rcar_gen3_phy_usb2_ops,
530	},
531	{
532		.compatible = "renesas,usb2-phy-r8a7796",
533		.data = &rcar_gen3_phy_usb2_ops,
534	},
535	{
536		.compatible = "renesas,usb2-phy-r8a77965",
537		.data = &rcar_gen3_phy_usb2_ops,
 
 
 
 
538	},
539	{
540		.compatible = "renesas,rcar-gen3-usb2-phy",
541		.data = &rcar_gen3_phy_usb2_ops,
542	},
543	{ /* sentinel */ },
544};
545MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
546
547static const unsigned int rcar_gen3_phy_cable[] = {
548	EXTCON_USB,
549	EXTCON_USB_HOST,
550	EXTCON_NONE,
551};
552
553static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
554					    struct of_phandle_args *args)
555{
556	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
557
558	if (args->args_count == 0)	/* For old version dts */
559		return ch->rphys[PHY_INDEX_BOTH_HC].phy;
560	else if (args->args_count > 1)	/* Prevent invalid args count */
561		return ERR_PTR(-ENODEV);
562
563	if (args->args[0] >= NUM_OF_PHYS)
564		return ERR_PTR(-ENODEV);
565
566	return ch->rphys[args->args[0]].phy;
567}
568
569static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
570{
571	enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
572	int i;
573
574	/*
575	 * If one of device nodes has other dr_mode except UNKNOWN,
576	 * this function returns UNKNOWN. To achieve backward compatibility,
577	 * this loop starts the index as 0.
578	 */
579	for (i = 0; i < NUM_OF_PHYS; i++) {
580		enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
581
582		if (mode != USB_DR_MODE_UNKNOWN) {
583			if (candidate == USB_DR_MODE_UNKNOWN)
584				candidate = mode;
585			else if (candidate != mode)
586				return USB_DR_MODE_UNKNOWN;
587		}
588	}
589
590	return candidate;
591}
592
593static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
594{
 
595	struct device *dev = &pdev->dev;
596	struct rcar_gen3_chan *channel;
597	struct phy_provider *provider;
598	struct resource *res;
599	const struct phy_ops *phy_usb2_ops;
600	int irq, ret = 0, i;
601
602	if (!dev->of_node) {
603		dev_err(dev, "This driver needs device tree\n");
604		return -EINVAL;
605	}
606
607	channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
608	if (!channel)
609		return -ENOMEM;
610
611	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
612	channel->base = devm_ioremap_resource(dev, res);
613	if (IS_ERR(channel->base))
614		return PTR_ERR(channel->base);
615
616	/* call request_irq for OTG */
617	irq = platform_get_irq(pdev, 0);
618	if (irq >= 0) {
619		INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
620		irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
621				       IRQF_SHARED, dev_name(dev), channel);
622		if (irq < 0)
623			dev_err(dev, "No irq handler (%d)\n", irq);
624	}
625
626	channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
627	if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
628		int ret;
629
630		channel->is_otg_channel = true;
631		channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
632							"renesas,no-otg-pins");
633		channel->extcon = devm_extcon_dev_allocate(dev,
634							rcar_gen3_phy_cable);
635		if (IS_ERR(channel->extcon))
636			return PTR_ERR(channel->extcon);
637
638		ret = devm_extcon_dev_register(dev, channel->extcon);
639		if (ret < 0) {
640			dev_err(dev, "Failed to register extcon\n");
641			return ret;
642		}
643	}
644
645	/*
646	 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
647	 * And then, phy-core will manage runtime pm for this device.
648	 */
649	pm_runtime_enable(dev);
650	phy_usb2_ops = of_device_get_match_data(dev);
651	if (!phy_usb2_ops)
652		return -EINVAL;
 
 
 
 
 
 
 
653
654	mutex_init(&channel->lock);
655	for (i = 0; i < NUM_OF_PHYS; i++) {
656		channel->rphys[i].phy = devm_phy_create(dev, NULL,
657							phy_usb2_ops);
658		if (IS_ERR(channel->rphys[i].phy)) {
659			dev_err(dev, "Failed to create USB2 PHY\n");
660			ret = PTR_ERR(channel->rphys[i].phy);
661			goto error;
662		}
663		channel->rphys[i].ch = channel;
664		channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
665		phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
666	}
667
668	channel->vbus = devm_regulator_get_optional(dev, "vbus");
669	if (IS_ERR(channel->vbus)) {
670		if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
671			ret = PTR_ERR(channel->vbus);
672			goto error;
673		}
674		channel->vbus = NULL;
675	}
676
677	platform_set_drvdata(pdev, channel);
678	channel->dev = dev;
679
680	provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
681	if (IS_ERR(provider)) {
682		dev_err(dev, "Failed to register PHY provider\n");
683		ret = PTR_ERR(provider);
684		goto error;
685	} else if (channel->is_otg_channel) {
686		int ret;
687
688		ret = device_create_file(dev, &dev_attr_role);
689		if (ret < 0)
690			goto error;
691	}
692
693	return 0;
694
695error:
696	pm_runtime_disable(dev);
697
698	return ret;
699}
700
701static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
702{
703	struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
704
705	if (channel->is_otg_channel)
706		device_remove_file(&pdev->dev, &dev_attr_role);
707
708	pm_runtime_disable(&pdev->dev);
709
710	return 0;
711};
712
713static struct platform_driver rcar_gen3_phy_usb2_driver = {
714	.driver = {
715		.name		= "phy_rcar_gen3_usb2",
716		.of_match_table	= rcar_gen3_phy_usb2_match_table,
717	},
718	.probe	= rcar_gen3_phy_usb2_probe,
719	.remove = rcar_gen3_phy_usb2_remove,
720};
721module_platform_driver(rcar_gen3_phy_usb2_driver);
722
723MODULE_LICENSE("GPL v2");
724MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
725MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");