1/*
 2 * Copyright 2019 Advanced Micro Devices, Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __AMDGPU_JPEG_H__
25#define __AMDGPU_JPEG_H__
26
27#include "amdgpu_ras.h"
28
29#define AMDGPU_MAX_JPEG_INSTANCES	2
30
31#define AMDGPU_JPEG_HARVEST_JPEG0 (1 << 0)
32#define AMDGPU_JPEG_HARVEST_JPEG1 (1 << 1)
33
34struct amdgpu_jpeg_reg{
35	unsigned jpeg_pitch;
36};
37
38struct amdgpu_jpeg_inst {
39	struct amdgpu_ring ring_dec;
40	struct amdgpu_irq_src irq;
41	struct amdgpu_jpeg_reg external;
42};
43
44struct amdgpu_jpeg_ras {
45	struct amdgpu_ras_block_object ras_block;
46};
47
48struct amdgpu_jpeg {
49	uint8_t	num_jpeg_inst;
50	struct amdgpu_jpeg_inst inst[AMDGPU_MAX_JPEG_INSTANCES];
51	struct amdgpu_jpeg_reg internal;
52	unsigned harvest_config;
53	struct delayed_work idle_work;
54	enum amd_powergating_state cur_state;
55	struct mutex jpeg_pg_lock;
56	atomic_t total_submission_cnt;
57	struct ras_common_if	*ras_if;
58	struct amdgpu_jpeg_ras	*ras;
59};
60
61int amdgpu_jpeg_sw_init(struct amdgpu_device *adev);
62int amdgpu_jpeg_sw_fini(struct amdgpu_device *adev);
63int amdgpu_jpeg_suspend(struct amdgpu_device *adev);
64int amdgpu_jpeg_resume(struct amdgpu_device *adev);
65
66void amdgpu_jpeg_ring_begin_use(struct amdgpu_ring *ring);
67void amdgpu_jpeg_ring_end_use(struct amdgpu_ring *ring);
68
69int amdgpu_jpeg_dec_ring_test_ring(struct amdgpu_ring *ring);
70int amdgpu_jpeg_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout);
71
72int amdgpu_jpeg_process_poison_irq(struct amdgpu_device *adev,
73				struct amdgpu_irq_src *source,
74				struct amdgpu_iv_entry *entry);
75void jpeg_set_ras_funcs(struct amdgpu_device *adev);
76
77#endif /*__AMDGPU_JPEG_H__*/