1// SPDX-License-Identifier: GPL-2.0-or-later
 2/*
 3 * arch/arm/mach-imx/mm-imx27.c
 4 *
 5 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 6 */
 7
 8#include <linux/mm.h>
 9#include <linux/init.h>
10#include <linux/pinctrl/machine.h>
11#include <asm/pgtable.h>
12#include <asm/mach/map.h>
13
14#include "common.h"
15#include "devices/devices-common.h"
16#include "hardware.h"
17#include "iomux-v1.h"
18
19/* MX27 memory map definition */
20static struct map_desc imx27_io_desc[] __initdata = {
21	/*
22	 * this fixed mapping covers:
23	 * - AIPI1
24	 * - AIPI2
25	 * - AITC
26	 * - ROM Patch
27	 * - and some reserved space
28	 */
29	imx_map_entry(MX27, AIPI, MT_DEVICE),
30	/*
31	 * this fixed mapping covers:
32	 * - CSI
33	 * - ATA
34	 */
35	imx_map_entry(MX27, SAHB1, MT_DEVICE),
36	/*
37	 * this fixed mapping covers:
38	 * - EMI
39	 */
40	imx_map_entry(MX27, X_MEMC, MT_DEVICE),
41};
42
43/*
44 * Initialize the memory map. It is called during the
45 * system startup to create static physical to virtual
46 * memory map for the IO modules.
47 */
48void __init mx27_map_io(void)
49{
50	iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc));
51}
52
53void __init imx27_init_early(void)
54{
55	mxc_set_cpu_type(MXC_CPU_MX27);
56	imx_iomuxv1_init(MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR),
57			MX27_NUM_GPIO_PORT);
58}
59
60void __init mx27_init_irq(void)
61{
62	mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
63}
64
65static const struct resource imx27_audmux_res[] __initconst = {
66	DEFINE_RES_MEM(MX27_AUDMUX_BASE_ADDR, SZ_4K),
67};
68
69void __init imx27_soc_init(void)
70{
71	mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR));
72	mxc_device_init();
73
74	/* i.mx27 has the i.mx21 type gpio */
75	mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
76	mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
77	mxc_register_gpio("imx21-gpio", 2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
78	mxc_register_gpio("imx21-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
79	mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
80	mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
81
82	pinctrl_provide_dummies();
83	imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR,
84			MX27_INT_DMACH0, 0); /* No ERR irq */
85	/* imx27 has the imx21 type audmux */
86	platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,
87					ARRAY_SIZE(imx27_audmux_res));
88
89	imx27_pm_init();
90}