1// SPDX-License-Identifier: GPL-2.0+ OR MIT
 2//
 3// Device Tree Source for UniPhier Support Card (Expansion Board)
 4//
 5// Copyright (C) 2015-2017 Socionext Inc.
 6//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 7
 8&system_bus {
 9	status = "okay";
10	ranges = <1 0x00000000 0x42000000 0x02000000>;
11
12	ethsc: ethernet@1,1f00000 {
13		compatible = "smsc,lan9118", "smsc,lan9115";
14		reg = <1 0x01f00000 0x1000>;
15		phy-mode = "mii";
16		reg-io-width = <4>;
17		interrupt-parent = <&gpio>;
18	};
19
20	serialsc: serial@1,1fb0000 {
21		compatible = "ns16550a";
22		reg = <1 0x01fb0000 0x20>;
23		clock-frequency = <12288000>;
24		reg-shift = <1>;
25		interrupt-parent = <&gpio>;
 
 
 
 
 
 
 
26	};
27};

 1// SPDX-License-Identifier: GPL-2.0+ OR MIT
 2//
 3// Device Tree Source for UniPhier Support Card (Expansion Board)
 4//
 5// Copyright (C) 2015-2017 Socionext Inc.
 6//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 7
 8&system_bus {
 9	status = "okay";
10	ranges = <1 0x00000000 0x42000000 0x02000000>;
11
12	support_card: support-card@1,1f00000 {
13		compatible = "simple-bus";
14		#address-cells = <1>;
15		#size-cells = <1>;
16		ranges = <0x00000000 1 0x01f00000 0x00100000>;
17		interrupt-parent = <&gpio>;
 
18
19		ethsc: ethernet@0 {
20			compatible = "smsc,lan9118", "smsc,lan9115";
21			reg = <0x00000000 0x1000>;
22			phy-mode = "mii";
23			reg-io-width = <4>;
24		};
25
26		serialsc: uart@b0000 {
27			compatible = "ns16550a";
28			reg = <0x000b0000 0x20>;
29			clock-frequency = <12288000>;
30			reg-shift = <1>;
31		};
32	};
33};