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1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
5 */
6
7/dts-v1/;
8
9#include "stm32mp157.dtsi"
10#include "stm32mp15-pinctrl.dtsi"
11#include "stm32mp15xxac-pinctrl.dtsi"
12#include "stm32mp15xx-dkx.dtsi"
13
14/ {
15 model = "STMicroelectronics STM32MP157A-DK1 Discovery Board";
16 compatible = "st,stm32mp157a-dk1", "st,stm32mp157";
17
18 aliases {
19 ethernet0 = ðernet0;
20 serial0 = &uart4;
21 serial1 = &usart3;
22 serial2 = &uart7;
23 };
24
25 chosen {
26 stdout-path = "serial0:115200n8";
27 };
28};
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
5 */
6
7/dts-v1/;
8
9#include "stm32mp157c.dtsi"
10#include "stm32mp157xac-pinctrl.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/mfd/st,stpmic1.h>
13
14/ {
15 model = "STMicroelectronics STM32MP157A-DK1 Discovery Board";
16 compatible = "st,stm32mp157a-dk1", "st,stm32mp157";
17
18 aliases {
19 ethernet0 = ðernet0;
20 serial0 = &uart4;
21 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 memory@c0000000 {
28 reg = <0xc0000000 0x20000000>;
29 };
30
31 reserved-memory {
32 #address-cells = <1>;
33 #size-cells = <1>;
34 ranges;
35
36 mcuram2: mcuram2@10000000 {
37 compatible = "shared-dma-pool";
38 reg = <0x10000000 0x40000>;
39 no-map;
40 };
41
42 vdev0vring0: vdev0vring0@10040000 {
43 compatible = "shared-dma-pool";
44 reg = <0x10040000 0x1000>;
45 no-map;
46 };
47
48 vdev0vring1: vdev0vring1@10041000 {
49 compatible = "shared-dma-pool";
50 reg = <0x10041000 0x1000>;
51 no-map;
52 };
53
54 vdev0buffer: vdev0buffer@10042000 {
55 compatible = "shared-dma-pool";
56 reg = <0x10042000 0x4000>;
57 no-map;
58 };
59
60 mcuram: mcuram@30000000 {
61 compatible = "shared-dma-pool";
62 reg = <0x30000000 0x40000>;
63 no-map;
64 };
65
66 retram: retram@38000000 {
67 compatible = "shared-dma-pool";
68 reg = <0x38000000 0x10000>;
69 no-map;
70 };
71
72 gpu_reserved: gpu@d4000000 {
73 reg = <0xd4000000 0x4000000>;
74 no-map;
75 };
76 };
77
78 led {
79 compatible = "gpio-leds";
80 blue {
81 label = "heartbeat";
82 gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
83 linux,default-trigger = "heartbeat";
84 default-state = "off";
85 };
86 };
87
88 sound {
89 compatible = "audio-graph-card";
90 label = "STM32MP1-DK";
91 routing =
92 "Playback" , "MCLK",
93 "Capture" , "MCLK",
94 "MICL" , "Mic Bias";
95 dais = <&sai2a_port &sai2b_port>;
96 status = "okay";
97 };
98};
99
100&cec {
101 pinctrl-names = "default", "sleep";
102 pinctrl-0 = <&cec_pins_b>;
103 pinctrl-1 = <&cec_pins_sleep_b>;
104 status = "okay";
105};
106
107ðernet0 {
108 status = "okay";
109 pinctrl-0 = <ðernet0_rgmii_pins_a>;
110 pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
111 pinctrl-names = "default", "sleep";
112 phy-mode = "rgmii-id";
113 max-speed = <1000>;
114 phy-handle = <&phy0>;
115
116 mdio0 {
117 #address-cells = <1>;
118 #size-cells = <0>;
119 compatible = "snps,dwmac-mdio";
120 phy0: ethernet-phy@0 {
121 reg = <0>;
122 };
123 };
124};
125
126&gpu {
127 contiguous-area = <&gpu_reserved>;
128 status = "okay";
129};
130
131&i2c1 {
132 pinctrl-names = "default", "sleep";
133 pinctrl-0 = <&i2c1_pins_a>;
134 pinctrl-1 = <&i2c1_pins_sleep_a>;
135 i2c-scl-rising-time-ns = <100>;
136 i2c-scl-falling-time-ns = <7>;
137 status = "okay";
138 /delete-property/dmas;
139 /delete-property/dma-names;
140
141 hdmi-transmitter@39 {
142 compatible = "sil,sii9022";
143 reg = <0x39>;
144 iovcc-supply = <&v3v3_hdmi>;
145 cvcc12-supply = <&v1v2_hdmi>;
146 reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
147 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
148 interrupt-parent = <&gpiog>;
149 pinctrl-names = "default", "sleep";
150 pinctrl-0 = <<dc_pins_a>;
151 pinctrl-1 = <<dc_pins_sleep_a>;
152 status = "okay";
153
154 ports {
155 #address-cells = <1>;
156 #size-cells = <0>;
157
158 port@0 {
159 reg = <0>;
160 sii9022_in: endpoint {
161 remote-endpoint = <<dc_ep0_out>;
162 };
163 };
164 };
165 };
166
167 cs42l51: cs42l51@4a {
168 compatible = "cirrus,cs42l51";
169 reg = <0x4a>;
170 #sound-dai-cells = <0>;
171 VL-supply = <&v3v3>;
172 VD-supply = <&v1v8_audio>;
173 VA-supply = <&v1v8_audio>;
174 VAHP-supply = <&v1v8_audio>;
175 reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
176 clocks = <&sai2a>;
177 clock-names = "MCLK";
178 status = "okay";
179
180 cs42l51_port: port {
181 #address-cells = <1>;
182 #size-cells = <0>;
183
184 cs42l51_tx_endpoint: endpoint@0 {
185 reg = <0>;
186 remote-endpoint = <&sai2a_endpoint>;
187 frame-master;
188 bitclock-master;
189 };
190
191 cs42l51_rx_endpoint: endpoint@1 {
192 reg = <1>;
193 remote-endpoint = <&sai2b_endpoint>;
194 frame-master;
195 bitclock-master;
196 };
197 };
198 };
199};
200
201&i2c4 {
202 pinctrl-names = "default";
203 pinctrl-0 = <&i2c4_pins_a>;
204 i2c-scl-rising-time-ns = <185>;
205 i2c-scl-falling-time-ns = <20>;
206 status = "okay";
207 /* spare dmas for other usage */
208 /delete-property/dmas;
209 /delete-property/dma-names;
210
211 pmic: stpmic@33 {
212 compatible = "st,stpmic1";
213 reg = <0x33>;
214 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
215 interrupt-controller;
216 #interrupt-cells = <2>;
217 status = "okay";
218
219 regulators {
220 compatible = "st,stpmic1-regulators";
221 ldo1-supply = <&v3v3>;
222 ldo3-supply = <&vdd_ddr>;
223 ldo6-supply = <&v3v3>;
224 pwr_sw1-supply = <&bst_out>;
225 pwr_sw2-supply = <&bst_out>;
226
227 vddcore: buck1 {
228 regulator-name = "vddcore";
229 regulator-min-microvolt = <800000>;
230 regulator-max-microvolt = <1350000>;
231 regulator-always-on;
232 regulator-initial-mode = <0>;
233 regulator-over-current-protection;
234 };
235
236 vdd_ddr: buck2 {
237 regulator-name = "vdd_ddr";
238 regulator-min-microvolt = <1350000>;
239 regulator-max-microvolt = <1350000>;
240 regulator-always-on;
241 regulator-initial-mode = <0>;
242 regulator-over-current-protection;
243 };
244
245 vdd: buck3 {
246 regulator-name = "vdd";
247 regulator-min-microvolt = <3300000>;
248 regulator-max-microvolt = <3300000>;
249 regulator-always-on;
250 st,mask-reset;
251 regulator-initial-mode = <0>;
252 regulator-over-current-protection;
253 };
254
255 v3v3: buck4 {
256 regulator-name = "v3v3";
257 regulator-min-microvolt = <3300000>;
258 regulator-max-microvolt = <3300000>;
259 regulator-always-on;
260 regulator-over-current-protection;
261 regulator-initial-mode = <0>;
262 };
263
264 v1v8_audio: ldo1 {
265 regulator-name = "v1v8_audio";
266 regulator-min-microvolt = <1800000>;
267 regulator-max-microvolt = <1800000>;
268 regulator-always-on;
269 interrupts = <IT_CURLIM_LDO1 0>;
270 };
271
272 v3v3_hdmi: ldo2 {
273 regulator-name = "v3v3_hdmi";
274 regulator-min-microvolt = <3300000>;
275 regulator-max-microvolt = <3300000>;
276 regulator-always-on;
277 interrupts = <IT_CURLIM_LDO2 0>;
278 };
279
280 vtt_ddr: ldo3 {
281 regulator-name = "vtt_ddr";
282 regulator-min-microvolt = <500000>;
283 regulator-max-microvolt = <750000>;
284 regulator-always-on;
285 regulator-over-current-protection;
286 };
287
288 vdd_usb: ldo4 {
289 regulator-name = "vdd_usb";
290 regulator-min-microvolt = <3300000>;
291 regulator-max-microvolt = <3300000>;
292 interrupts = <IT_CURLIM_LDO4 0>;
293 };
294
295 vdda: ldo5 {
296 regulator-name = "vdda";
297 regulator-min-microvolt = <2900000>;
298 regulator-max-microvolt = <2900000>;
299 interrupts = <IT_CURLIM_LDO5 0>;
300 regulator-boot-on;
301 };
302
303 v1v2_hdmi: ldo6 {
304 regulator-name = "v1v2_hdmi";
305 regulator-min-microvolt = <1200000>;
306 regulator-max-microvolt = <1200000>;
307 regulator-always-on;
308 interrupts = <IT_CURLIM_LDO6 0>;
309 };
310
311 vref_ddr: vref_ddr {
312 regulator-name = "vref_ddr";
313 regulator-always-on;
314 regulator-over-current-protection;
315 };
316
317 bst_out: boost {
318 regulator-name = "bst_out";
319 interrupts = <IT_OCP_BOOST 0>;
320 };
321
322 vbus_otg: pwr_sw1 {
323 regulator-name = "vbus_otg";
324 interrupts = <IT_OCP_OTG 0>;
325 };
326
327 vbus_sw: pwr_sw2 {
328 regulator-name = "vbus_sw";
329 interrupts = <IT_OCP_SWOUT 0>;
330 regulator-active-discharge;
331 };
332 };
333
334 onkey {
335 compatible = "st,stpmic1-onkey";
336 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
337 interrupt-names = "onkey-falling", "onkey-rising";
338 power-off-time-sec = <10>;
339 status = "okay";
340 };
341
342 watchdog {
343 compatible = "st,stpmic1-wdt";
344 status = "disabled";
345 };
346 };
347};
348
349&ipcc {
350 status = "okay";
351};
352
353&iwdg2 {
354 timeout-sec = <32>;
355 status = "okay";
356};
357
358<dc {
359 status = "okay";
360
361 port {
362 #address-cells = <1>;
363 #size-cells = <0>;
364
365 ltdc_ep0_out: endpoint@0 {
366 reg = <0>;
367 remote-endpoint = <&sii9022_in>;
368 };
369 };
370};
371
372&m4_rproc {
373 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
374 <&vdev0vring1>, <&vdev0buffer>;
375 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
376 mbox-names = "vq0", "vq1", "shutdown";
377 interrupt-parent = <&exti>;
378 interrupts = <68 1>;
379 status = "okay";
380};
381
382&rng1 {
383 status = "okay";
384};
385
386&rtc {
387 status = "okay";
388};
389
390&sai2 {
391 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
392 clock-names = "pclk", "x8k", "x11k";
393 pinctrl-names = "default", "sleep";
394 pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
395 pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
396 status = "okay";
397
398 sai2a: audio-controller@4400b004 {
399 #clock-cells = <0>;
400 dma-names = "tx";
401 clocks = <&rcc SAI2_K>;
402 clock-names = "sai_ck";
403 status = "okay";
404
405 sai2a_port: port {
406 sai2a_endpoint: endpoint {
407 remote-endpoint = <&cs42l51_tx_endpoint>;
408 format = "i2s";
409 mclk-fs = <256>;
410 dai-tdm-slot-num = <2>;
411 dai-tdm-slot-width = <32>;
412 };
413 };
414 };
415
416 sai2b: audio-controller@4400b024 {
417 dma-names = "rx";
418 st,sync = <&sai2a 2>;
419 clocks = <&rcc SAI2_K>, <&sai2a>;
420 clock-names = "sai_ck", "MCLK";
421 status = "okay";
422
423 sai2b_port: port {
424 sai2b_endpoint: endpoint {
425 remote-endpoint = <&cs42l51_rx_endpoint>;
426 format = "i2s";
427 mclk-fs = <256>;
428 dai-tdm-slot-num = <2>;
429 dai-tdm-slot-width = <32>;
430 };
431 };
432 };
433};
434
435&sdmmc1 {
436 pinctrl-names = "default", "opendrain", "sleep";
437 pinctrl-0 = <&sdmmc1_b4_pins_a>;
438 pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
439 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
440 broken-cd;
441 st,neg-edge;
442 bus-width = <4>;
443 vmmc-supply = <&v3v3>;
444 status = "okay";
445};
446
447&uart4 {
448 pinctrl-names = "default";
449 pinctrl-0 = <&uart4_pins_a>;
450 status = "okay";
451};