1/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
 2/* Copyright (C) STMicroelectronics 2017 - All Rights Reserved */
 3
 4#include "stm32f429.dtsi"
 5
 6/ {
 7	soc {
 8		dsi: dsi@40016c00 {
 9			compatible = "st,stm32-dsi";
10			reg = <0x40016c00 0x800>;
 
11			resets = <&rcc STM32F4_APB2_RESET(DSI)>;
12			reset-names = "apb";
13			clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
14			clock-names = "pclk", "ref";
15			status = "disabled";
16		};
17	};
18};

 1/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
 2/* Copyright (C) STMicroelectronics 2017 - All Rights Reserved */
 3
 4#include "stm32f429.dtsi"
 5
 6/ {
 7	soc {
 8		dsi: dsi@40016c00 {
 9			compatible = "st,stm32-dsi";
10			reg = <0x40016c00 0x800>;
11			interrupts = <92>;
12			resets = <&rcc STM32F4_APB2_RESET(DSI)>;
13			reset-names = "apb";
14			clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
15			clock-names = "pclk", "ref";
16			status = "disabled";
17		};
18	};
19};