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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung's S5PV210 SoC device tree source
4 *
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
6 *
7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
8 * Tomasz Figa <t.figa@samsung.com>
9 *
10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
11 * based board files can include this file and provide values for board specfic
12 * bindings.
13 *
14 * Note: This file does not include device nodes for all the controllers in
15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
16 * nodes can be added to this file.
17 */
18
19#include <dt-bindings/clock/s5pv210.h>
20#include <dt-bindings/clock/s5pv210-audss.h>
21
22/ {
23 #address-cells = <1>;
24 #size-cells = <1>;
25
26 aliases {
27 csis0 = &csis0;
28 dmc0 = &dmc0;
29 dmc1 = &dmc1;
30 fimc0 = &fimc0;
31 fimc1 = &fimc1;
32 fimc2 = &fimc2;
33 i2c0 = &i2c0;
34 i2c1 = &i2c1;
35 i2c2 = &i2c2;
36 i2s0 = &i2s0;
37 i2s1 = &i2s1;
38 i2s2 = &i2s2;
39 pinctrl0 = &pinctrl0;
40 spi0 = &spi0;
41 spi1 = &spi1;
42 };
43
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
47
48 cpu@0 {
49 device_type = "cpu";
50 compatible = "arm,cortex-a8";
51 reg = <0>;
52 };
53 };
54
55 xxti: oscillator-0 {
56 compatible = "fixed-clock";
57 clock-frequency = <0>;
58 clock-output-names = "xxti";
59 #clock-cells = <0>;
60 };
61
62 xusbxti: oscillator-1 {
63 compatible = "fixed-clock";
64 clock-frequency = <0>;
65 clock-output-names = "xusbxti";
66 #clock-cells = <0>;
67 };
68
69 soc {
70 compatible = "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges;
74
75 onenand: onenand@b0600000 {
76 compatible = "samsung,s5pv210-onenand";
77 reg = <0xb0600000 0x2000>,
78 <0xb0000000 0x20000>,
79 <0xb0040000 0x20000>;
80 interrupt-parent = <&vic1>;
81 interrupts = <31>;
82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
83 clock-names = "bus", "onenand";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 status = "disabled";
87 };
88
89 chipid@e0000000 {
90 compatible = "samsung,s5pv210-chipid";
91 reg = <0xe0000000 0x1000>;
92 };
93
94 clocks: clock-controller@e0100000 {
95 compatible = "samsung,s5pv210-clock";
96 reg = <0xe0100000 0x10000>;
97 clock-names = "xxti", "xusbxti";
98 clocks = <&xxti>, <&xusbxti>;
99 #clock-cells = <1>;
100 };
101
102 pmu_syscon: syscon@e0108000 {
103 compatible = "samsung-s5pv210-pmu", "syscon";
104 reg = <0xe0108000 0x8000>;
105 };
106
107 pinctrl0: pinctrl@e0200000 {
108 compatible = "samsung,s5pv210-pinctrl";
109 reg = <0xe0200000 0x1000>;
110 interrupt-parent = <&vic0>;
111 interrupts = <30>;
112
113 wakeup-interrupt-controller {
114 compatible = "samsung,s5pv210-wakeup-eint";
115 interrupts = <16>;
116 interrupt-parent = <&vic0>;
117 };
118 };
119
120 pdma0: dma-controller@e0900000 {
121 compatible = "arm,pl330", "arm,primecell";
122 reg = <0xe0900000 0x1000>;
123 interrupt-parent = <&vic0>;
124 interrupts = <19>;
125 clocks = <&clocks CLK_PDMA0>;
126 clock-names = "apb_pclk";
127 #dma-cells = <1>;
128 };
129
130 pdma1: dma-controller@e0a00000 {
131 compatible = "arm,pl330", "arm,primecell";
132 reg = <0xe0a00000 0x1000>;
133 interrupt-parent = <&vic0>;
134 interrupts = <20>;
135 clocks = <&clocks CLK_PDMA1>;
136 clock-names = "apb_pclk";
137 #dma-cells = <1>;
138 };
139
140 adc: adc@e1700000 {
141 compatible = "samsung,s5pv210-adc";
142 reg = <0xe1700000 0x1000>;
143 interrupt-parent = <&vic2>;
144 interrupts = <23>, <24>;
145 clocks = <&clocks CLK_TSADC>;
146 clock-names = "adc";
147 #io-channel-cells = <1>;
148 status = "disabled";
149 };
150
151 spi0: spi@e1300000 {
152 compatible = "samsung,s5pv210-spi";
153 reg = <0xe1300000 0x1000>;
154 interrupt-parent = <&vic1>;
155 interrupts = <15>;
156 dmas = <&pdma0 7>, <&pdma0 6>;
157 dma-names = "tx", "rx";
158 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
159 clock-names = "spi", "spi_busclk0";
160 pinctrl-names = "default";
161 pinctrl-0 = <&spi0_bus>;
162 #address-cells = <1>;
163 #size-cells = <0>;
164 status = "disabled";
165 };
166
167 spi1: spi@e1400000 {
168 compatible = "samsung,s5pv210-spi";
169 reg = <0xe1400000 0x1000>;
170 interrupt-parent = <&vic1>;
171 interrupts = <16>;
172 dmas = <&pdma1 7>, <&pdma1 6>;
173 dma-names = "tx", "rx";
174 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
175 clock-names = "spi", "spi_busclk0";
176 pinctrl-names = "default";
177 pinctrl-0 = <&spi1_bus>;
178 #address-cells = <1>;
179 #size-cells = <0>;
180 status = "disabled";
181 };
182
183 keypad: keypad@e1600000 {
184 compatible = "samsung,s5pv210-keypad";
185 reg = <0xe1600000 0x1000>;
186 interrupt-parent = <&vic2>;
187 interrupts = <25>;
188 clocks = <&clocks CLK_KEYIF>;
189 clock-names = "keypad";
190 status = "disabled";
191 };
192
193 i2c0: i2c@e1800000 {
194 compatible = "samsung,s3c2440-i2c";
195 reg = <0xe1800000 0x1000>;
196 interrupt-parent = <&vic1>;
197 interrupts = <14>;
198 clocks = <&clocks CLK_I2C0>;
199 clock-names = "i2c";
200 pinctrl-names = "default";
201 pinctrl-0 = <&i2c0_bus>;
202 #address-cells = <1>;
203 #size-cells = <0>;
204 status = "disabled";
205 };
206
207 i2c2: i2c@e1a00000 {
208 compatible = "samsung,s3c2440-i2c";
209 reg = <0xe1a00000 0x1000>;
210 interrupt-parent = <&vic1>;
211 interrupts = <19>;
212 clocks = <&clocks CLK_I2C2>;
213 clock-names = "i2c";
214 pinctrl-0 = <&i2c2_bus>;
215 pinctrl-names = "default";
216 #address-cells = <1>;
217 #size-cells = <0>;
218 status = "disabled";
219 };
220
221 clk_audss: clock-controller@eee10000 {
222 compatible = "samsung,s5pv210-audss-clock";
223 reg = <0xeee10000 0x1000>;
224 clock-names = "hclk", "xxti",
225 "fout_epll",
226 "sclk_audio0";
227 clocks = <&clocks DOUT_HCLKP>, <&xxti>,
228 <&clocks FOUT_EPLL>,
229 <&clocks SCLK_AUDIO0>;
230 #clock-cells = <1>;
231 };
232
233 i2s0: i2s@eee30000 {
234 compatible = "samsung,s5pv210-i2s";
235 reg = <0xeee30000 0x1000>;
236 interrupt-parent = <&vic2>;
237 interrupts = <16>;
238 dma-names = "tx", "rx", "tx-sec";
239 dmas = <&pdma1 10>, <&pdma1 9>, <&pdma1 11>;
240 clock-names = "iis",
241 "i2s_opclk0",
242 "i2s_opclk1";
243 clocks = <&clk_audss CLK_I2S>,
244 <&clk_audss CLK_I2S>,
245 <&clk_audss CLK_DOUT_AUD_BUS>;
246 samsung,idma-addr = <0xc0010000>;
247 pinctrl-names = "default";
248 pinctrl-0 = <&i2s0_bus>;
249 #sound-dai-cells = <0>;
250 status = "disabled";
251 };
252
253 i2s1: i2s@e2100000 {
254 compatible = "samsung,s3c6410-i2s";
255 reg = <0xe2100000 0x1000>;
256 interrupt-parent = <&vic2>;
257 interrupts = <17>;
258 dma-names = "tx", "rx";
259 dmas = <&pdma1 13>, <&pdma1 12>;
260 clock-names = "iis", "i2s_opclk0";
261 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&i2s1_bus>;
264 #sound-dai-cells = <0>;
265 status = "disabled";
266 };
267
268 i2s2: i2s@e2a00000 {
269 compatible = "samsung,s3c6410-i2s";
270 reg = <0xe2a00000 0x1000>;
271 interrupt-parent = <&vic2>;
272 interrupts = <18>;
273 dma-names = "tx", "rx";
274 dmas = <&pdma1 15>, <&pdma1 14>;
275 clock-names = "iis", "i2s_opclk0";
276 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&i2s2_bus>;
279 #sound-dai-cells = <0>;
280 status = "disabled";
281 };
282
283 pwm: pwm@e2500000 {
284 compatible = "samsung,s5pc100-pwm";
285 reg = <0xe2500000 0x1000>;
286 interrupt-parent = <&vic0>;
287 interrupts = <21>, <22>, <23>, <24>, <25>;
288 clock-names = "timers";
289 clocks = <&clocks CLK_PWM>;
290 #pwm-cells = <3>;
291 };
292
293 watchdog: watchdog@e2700000 {
294 compatible = "samsung,s3c6410-wdt";
295 reg = <0xe2700000 0x1000>;
296 interrupt-parent = <&vic0>;
297 interrupts = <26>;
298 clock-names = "watchdog";
299 clocks = <&clocks CLK_WDT>;
300 };
301
302 rtc: rtc@e2800000 {
303 compatible = "samsung,s3c6410-rtc";
304 reg = <0xe2800000 0x100>;
305 interrupt-parent = <&vic0>;
306 interrupts = <28>, <29>;
307 clocks = <&clocks CLK_RTC>;
308 clock-names = "rtc";
309 status = "disabled";
310 };
311
312 uart0: serial@e2900000 {
313 compatible = "samsung,s5pv210-uart";
314 reg = <0xe2900000 0x400>;
315 interrupt-parent = <&vic1>;
316 interrupts = <10>;
317 clock-names = "uart", "clk_uart_baud0",
318 "clk_uart_baud1";
319 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
320 <&clocks SCLK_UART0>;
321 status = "disabled";
322 };
323
324 uart1: serial@e2900400 {
325 compatible = "samsung,s5pv210-uart";
326 reg = <0xe2900400 0x400>;
327 interrupt-parent = <&vic1>;
328 interrupts = <11>;
329 clock-names = "uart", "clk_uart_baud0",
330 "clk_uart_baud1";
331 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
332 <&clocks SCLK_UART1>;
333 status = "disabled";
334 };
335
336 uart2: serial@e2900800 {
337 compatible = "samsung,s5pv210-uart";
338 reg = <0xe2900800 0x400>;
339 interrupt-parent = <&vic1>;
340 interrupts = <12>;
341 clock-names = "uart", "clk_uart_baud0",
342 "clk_uart_baud1";
343 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
344 <&clocks SCLK_UART2>;
345 status = "disabled";
346 };
347
348 uart3: serial@e2900c00 {
349 compatible = "samsung,s5pv210-uart";
350 reg = <0xe2900c00 0x400>;
351 interrupt-parent = <&vic1>;
352 interrupts = <13>;
353 clock-names = "uart", "clk_uart_baud0",
354 "clk_uart_baud1";
355 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
356 <&clocks SCLK_UART3>;
357 status = "disabled";
358 };
359
360 sdhci0: mmc@eb000000 {
361 compatible = "samsung,s3c6410-sdhci";
362 reg = <0xeb000000 0x100000>;
363 interrupt-parent = <&vic1>;
364 interrupts = <26>;
365 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
366 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
367 <&clocks SCLK_MMC0>;
368 status = "disabled";
369 };
370
371 sdhci1: mmc@eb100000 {
372 compatible = "samsung,s3c6410-sdhci";
373 reg = <0xeb100000 0x100000>;
374 interrupt-parent = <&vic1>;
375 interrupts = <27>;
376 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
377 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
378 <&clocks SCLK_MMC1>;
379 status = "disabled";
380 };
381
382 sdhci2: mmc@eb200000 {
383 compatible = "samsung,s3c6410-sdhci";
384 reg = <0xeb200000 0x100000>;
385 interrupt-parent = <&vic1>;
386 interrupts = <28>;
387 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
388 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
389 <&clocks SCLK_MMC2>;
390 status = "disabled";
391 };
392
393 sdhci3: mmc@eb300000 {
394 compatible = "samsung,s3c6410-sdhci";
395 reg = <0xeb300000 0x100000>;
396 interrupt-parent = <&vic3>;
397 interrupts = <2>;
398 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
399 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
400 <&clocks SCLK_MMC3>;
401 status = "disabled";
402 };
403
404 hsotg: hsotg@ec000000 {
405 compatible = "samsung,s3c6400-hsotg";
406 reg = <0xec000000 0x20000>;
407 interrupt-parent = <&vic1>;
408 interrupts = <24>;
409 clocks = <&clocks CLK_USB_OTG>;
410 clock-names = "otg";
411 phy-names = "usb2-phy";
412 phys = <&usbphy 0>;
413 status = "disabled";
414 };
415
416 usbphy: usbphy@ec100000 {
417 compatible = "samsung,s5pv210-usb2-phy";
418 reg = <0xec100000 0x100>;
419 samsung,pmureg-phandle = <&pmu_syscon>;
420 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
421 clock-names = "phy", "ref";
422 #phy-cells = <1>;
423 status = "disabled";
424 };
425
426 ehci: usb@ec200000 {
427 compatible = "samsung,exynos4210-ehci";
428 reg = <0xec200000 0x100>;
429 interrupts = <23>;
430 interrupt-parent = <&vic1>;
431 clocks = <&clocks CLK_USB_HOST>;
432 clock-names = "usbhost";
433 phys = <&usbphy 1>;
434 phy-names = "host";
435 status = "disabled";
436 };
437
438 ohci: usb@ec300000 {
439 compatible = "samsung,exynos4210-ohci";
440 reg = <0xec300000 0x100>;
441 interrupts = <23>;
442 interrupt-parent = <&vic1>;
443 clocks = <&clocks CLK_USB_HOST>;
444 clock-names = "usbhost";
445 phys = <&usbphy 1>;
446 phy-names = "host";
447 status = "disabled";
448 };
449
450 mfc: codec@f1700000 {
451 compatible = "samsung,mfc-v5";
452 reg = <0xf1700000 0x10000>;
453 interrupt-parent = <&vic2>;
454 interrupts = <14>;
455 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
456 clock-names = "sclk_mfc", "mfc";
457 };
458
459 vic0: interrupt-controller@f2000000 {
460 compatible = "arm,pl192-vic";
461 interrupt-controller;
462 reg = <0xf2000000 0x1000>;
463 #interrupt-cells = <1>;
464 };
465
466 vic1: interrupt-controller@f2100000 {
467 compatible = "arm,pl192-vic";
468 interrupt-controller;
469 reg = <0xf2100000 0x1000>;
470 #interrupt-cells = <1>;
471 };
472
473 vic2: interrupt-controller@f2200000 {
474 compatible = "arm,pl192-vic";
475 interrupt-controller;
476 reg = <0xf2200000 0x1000>;
477 #interrupt-cells = <1>;
478 };
479
480 vic3: interrupt-controller@f2300000 {
481 compatible = "arm,pl192-vic";
482 interrupt-controller;
483 reg = <0xf2300000 0x1000>;
484 #interrupt-cells = <1>;
485 };
486
487 fimd: fimd@f8000000 {
488 compatible = "samsung,s5pv210-fimd";
489 interrupt-parent = <&vic2>;
490 reg = <0xf8000000 0x20000>;
491 interrupt-names = "fifo", "vsync", "lcd_sys";
492 interrupts = <0>, <1>, <2>;
493 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
494 clock-names = "sclk_fimd", "fimd";
495 status = "disabled";
496 };
497
498 dmc0: dmc@f0000000 {
499 compatible = "samsung,s5pv210-dmc";
500 reg = <0xf0000000 0x1000>;
501 };
502
503 dmc1: dmc@f1400000 {
504 compatible = "samsung,s5pv210-dmc";
505 reg = <0xf1400000 0x1000>;
506 };
507
508 g2d: g2d@fa000000 {
509 compatible = "samsung,s5pv210-g2d";
510 reg = <0xfa000000 0x1000>;
511 interrupt-parent = <&vic2>;
512 interrupts = <9>;
513 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
514 clock-names = "sclk_fimg2d", "fimg2d";
515 };
516
517 mdma1: dma-controller@fa200000 {
518 compatible = "arm,pl330", "arm,primecell";
519 reg = <0xfa200000 0x1000>;
520 interrupt-parent = <&vic0>;
521 interrupts = <18>;
522 clocks = <&clocks CLK_MDMA>;
523 clock-names = "apb_pclk";
524 #dma-cells = <1>;
525 };
526
527 rotator: rotator@fa300000 {
528 compatible = "samsung,s5pv210-rotator";
529 reg = <0xfa300000 0x1000>;
530 interrupt-parent = <&vic2>;
531 interrupts = <4>;
532 clocks = <&clocks CLK_ROTATOR>;
533 clock-names = "rotator";
534 };
535
536 i2c1: i2c@fab00000 {
537 compatible = "samsung,s3c2440-i2c";
538 reg = <0xfab00000 0x1000>;
539 interrupt-parent = <&vic2>;
540 interrupts = <13>;
541 clocks = <&clocks CLK_I2C1>;
542 clock-names = "i2c";
543 pinctrl-names = "default";
544 pinctrl-0 = <&i2c1_bus>;
545 #address-cells = <1>;
546 #size-cells = <0>;
547 status = "disabled";
548 };
549
550 camera: camera {
551 compatible = "samsung,fimc", "simple-bus";
552 pinctrl-names = "default";
553 pinctrl-0 = <>;
554 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
555 clock-names = "sclk_cam0", "sclk_cam1";
556 #address-cells = <1>;
557 #size-cells = <1>;
558 #clock-cells = <1>;
559 clock-output-names = "cam_a_clkout", "cam_b_clkout";
560 ranges;
561
562 csis0: csis@fa600000 {
563 compatible = "samsung,s5pv210-csis";
564 reg = <0xfa600000 0x4000>;
565 interrupt-parent = <&vic2>;
566 interrupts = <29>;
567 clocks = <&clocks CLK_CSIS>,
568 <&clocks SCLK_CSIS>;
569 clock-names = "clk_csis",
570 "sclk_csis";
571 bus-width = <4>;
572 status = "disabled";
573 #address-cells = <1>;
574 #size-cells = <0>;
575 };
576
577 fimc0: fimc@fb200000 {
578 compatible = "samsung,s5pv210-fimc";
579 reg = <0xfb200000 0x1000>;
580 interrupts = <5>;
581 interrupt-parent = <&vic2>;
582 clocks = <&clocks CLK_FIMC0>,
583 <&clocks SCLK_FIMC0>;
584 clock-names = "fimc",
585 "sclk_fimc";
586 samsung,pix-limits = <4224 8192 1920 4224>;
587 samsung,min-pix-alignment = <16 8>;
588 samsung,cam-if;
589 };
590
591 fimc1: fimc@fb300000 {
592 compatible = "samsung,s5pv210-fimc";
593 reg = <0xfb300000 0x1000>;
594 interrupt-parent = <&vic2>;
595 interrupts = <6>;
596 clocks = <&clocks CLK_FIMC1>,
597 <&clocks SCLK_FIMC1>;
598 clock-names = "fimc",
599 "sclk_fimc";
600 samsung,pix-limits = <4224 8192 1920 4224>;
601 samsung,min-pix-alignment = <1 1>;
602 samsung,mainscaler-ext;
603 samsung,cam-if;
604 samsung,lcd-wb;
605 };
606
607 fimc2: fimc@fb400000 {
608 compatible = "samsung,s5pv210-fimc";
609 reg = <0xfb400000 0x1000>;
610 interrupt-parent = <&vic2>;
611 interrupts = <7>;
612 clocks = <&clocks CLK_FIMC2>,
613 <&clocks SCLK_FIMC2>;
614 clock-names = "fimc",
615 "sclk_fimc";
616 samsung,pix-limits = <1920 8192 1280 1920>;
617 samsung,min-pix-alignment = <16 8>;
618 samsung,rotators = <0>;
619 samsung,cam-if;
620 };
621 };
622
623 jpeg_codec: jpeg-codec@fb600000 {
624 compatible = "samsung,s5pv210-jpeg";
625 reg = <0xfb600000 0x1000>;
626 interrupt-parent = <&vic2>;
627 interrupts = <8>;
628 clocks = <&clocks CLK_JPEG>;
629 clock-names = "jpeg";
630 };
631 };
632};
633
634#include "s5pv210-pinctrl.dtsi"
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung's S5PV210 SoC device tree source
4 *
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
6 *
7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
8 * Tomasz Figa <t.figa@samsung.com>
9 *
10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
11 * based board files can include this file and provide values for board specfic
12 * bindings.
13 *
14 * Note: This file does not include device nodes for all the controllers in
15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
16 * nodes can be added to this file.
17 */
18
19#include <dt-bindings/clock/s5pv210.h>
20#include <dt-bindings/clock/s5pv210-audss.h>
21
22/ {
23 #address-cells = <1>;
24 #size-cells = <1>;
25
26 aliases {
27 csis0 = &csis0;
28 dmc0 = &dmc0;
29 dmc1 = &dmc1;
30 fimc0 = &fimc0;
31 fimc1 = &fimc1;
32 fimc2 = &fimc2;
33 i2c0 = &i2c0;
34 i2c1 = &i2c1;
35 i2c2 = &i2c2;
36 i2s0 = &i2s0;
37 i2s1 = &i2s1;
38 i2s2 = &i2s2;
39 pinctrl0 = &pinctrl0;
40 spi0 = &spi0;
41 spi1 = &spi1;
42 };
43
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
47
48 cpu@0 {
49 device_type = "cpu";
50 compatible = "arm,cortex-a8";
51 reg = <0>;
52 };
53 };
54
55 soc {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges;
60
61 external-clocks {
62 compatible = "simple-bus";
63 #address-cells = <1>;
64 #size-cells = <0>;
65
66 xxti: oscillator@0 {
67 compatible = "fixed-clock";
68 reg = <0>;
69 clock-frequency = <0>;
70 clock-output-names = "xxti";
71 #clock-cells = <0>;
72 };
73
74 xusbxti: oscillator@1 {
75 compatible = "fixed-clock";
76 reg = <1>;
77 clock-frequency = <0>;
78 clock-output-names = "xusbxti";
79 #clock-cells = <0>;
80 };
81 };
82
83 onenand: onenand@b0600000 {
84 compatible = "samsung,s5pv210-onenand";
85 reg = <0xb0600000 0x2000>,
86 <0xb0000000 0x20000>,
87 <0xb0040000 0x20000>;
88 interrupt-parent = <&vic1>;
89 interrupts = <31>;
90 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
91 clock-names = "bus", "onenand";
92 #address-cells = <1>;
93 #size-cells = <1>;
94 status = "disabled";
95 };
96
97 chipid@e0000000 {
98 compatible = "samsung,s5pv210-chipid";
99 reg = <0xe0000000 0x1000>;
100 };
101
102 clocks: clock-controller@e0100000 {
103 compatible = "samsung,s5pv210-clock", "simple-bus";
104 reg = <0xe0100000 0x10000>;
105 clock-names = "xxti", "xusbxti";
106 clocks = <&xxti>, <&xusbxti>;
107 #clock-cells = <1>;
108 #address-cells = <1>;
109 #size-cells = <1>;
110 ranges;
111
112 pmu_syscon: syscon@e0108000 {
113 compatible = "samsung-s5pv210-pmu", "syscon";
114 reg = <0xe0108000 0x8000>;
115 };
116 };
117
118 pinctrl0: pinctrl@e0200000 {
119 compatible = "samsung,s5pv210-pinctrl";
120 reg = <0xe0200000 0x1000>;
121 interrupt-parent = <&vic0>;
122 interrupts = <30>;
123
124 wakeup-interrupt-controller {
125 compatible = "samsung,s5pv210-wakeup-eint";
126 interrupts = <16>;
127 interrupt-parent = <&vic0>;
128 };
129 };
130
131 amba {
132 #address-cells = <1>;
133 #size-cells = <1>;
134 compatible = "simple-bus";
135 ranges;
136
137 pdma0: dma@e0900000 {
138 compatible = "arm,pl330", "arm,primecell";
139 reg = <0xe0900000 0x1000>;
140 interrupt-parent = <&vic0>;
141 interrupts = <19>;
142 clocks = <&clocks CLK_PDMA0>;
143 clock-names = "apb_pclk";
144 #dma-cells = <1>;
145 #dma-channels = <8>;
146 #dma-requests = <32>;
147 };
148
149 pdma1: dma@e0a00000 {
150 compatible = "arm,pl330", "arm,primecell";
151 reg = <0xe0a00000 0x1000>;
152 interrupt-parent = <&vic0>;
153 interrupts = <20>;
154 clocks = <&clocks CLK_PDMA1>;
155 clock-names = "apb_pclk";
156 #dma-cells = <1>;
157 #dma-channels = <8>;
158 #dma-requests = <32>;
159 };
160 };
161
162 spi0: spi@e1300000 {
163 compatible = "samsung,s5pv210-spi";
164 reg = <0xe1300000 0x1000>;
165 interrupt-parent = <&vic1>;
166 interrupts = <15>;
167 dmas = <&pdma0 7>, <&pdma0 6>;
168 dma-names = "tx", "rx";
169 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
170 clock-names = "spi", "spi_busclk0";
171 pinctrl-names = "default";
172 pinctrl-0 = <&spi0_bus>;
173 #address-cells = <1>;
174 #size-cells = <0>;
175 status = "disabled";
176 };
177
178 spi1: spi@e1400000 {
179 compatible = "samsung,s5pv210-spi";
180 reg = <0xe1400000 0x1000>;
181 interrupt-parent = <&vic1>;
182 interrupts = <16>;
183 dmas = <&pdma1 7>, <&pdma1 6>;
184 dma-names = "tx", "rx";
185 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
186 clock-names = "spi", "spi_busclk0";
187 pinctrl-names = "default";
188 pinctrl-0 = <&spi1_bus>;
189 #address-cells = <1>;
190 #size-cells = <0>;
191 status = "disabled";
192 };
193
194 keypad: keypad@e1600000 {
195 compatible = "samsung,s5pv210-keypad";
196 reg = <0xe1600000 0x1000>;
197 interrupt-parent = <&vic2>;
198 interrupts = <25>;
199 clocks = <&clocks CLK_KEYIF>;
200 clock-names = "keypad";
201 status = "disabled";
202 };
203
204 i2c0: i2c@e1800000 {
205 compatible = "samsung,s3c2440-i2c";
206 reg = <0xe1800000 0x1000>;
207 interrupt-parent = <&vic1>;
208 interrupts = <14>;
209 clocks = <&clocks CLK_I2C0>;
210 clock-names = "i2c";
211 pinctrl-names = "default";
212 pinctrl-0 = <&i2c0_bus>;
213 #address-cells = <1>;
214 #size-cells = <0>;
215 status = "disabled";
216 };
217
218 i2c2: i2c@e1a00000 {
219 compatible = "samsung,s3c2440-i2c";
220 reg = <0xe1a00000 0x1000>;
221 interrupt-parent = <&vic1>;
222 interrupts = <19>;
223 clocks = <&clocks CLK_I2C2>;
224 clock-names = "i2c";
225 pinctrl-0 = <&i2c2_bus>;
226 pinctrl-names = "default";
227 #address-cells = <1>;
228 #size-cells = <0>;
229 status = "disabled";
230 };
231
232 audio-subsystem {
233 compatible = "samsung,s5pv210-audss", "simple-bus";
234 #address-cells = <1>;
235 #size-cells = <1>;
236 ranges;
237
238 clk_audss: clock-controller@eee10000 {
239 compatible = "samsung,s5pv210-audss-clock";
240 reg = <0xeee10000 0x1000>;
241 clock-names = "hclk", "xxti",
242 "fout_epll",
243 "sclk_audio0";
244 clocks = <&clocks DOUT_HCLKP>, <&xxti>,
245 <&clocks FOUT_EPLL>,
246 <&clocks SCLK_AUDIO0>;
247 #clock-cells = <1>;
248 };
249
250 i2s0: i2s@eee30000 {
251 compatible = "samsung,s5pv210-i2s";
252 reg = <0xeee30000 0x1000>;
253 interrupt-parent = <&vic2>;
254 interrupts = <16>;
255 dma-names = "rx", "tx", "tx-sec";
256 dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
257 clock-names = "iis",
258 "i2s_opclk0",
259 "i2s_opclk1";
260 clocks = <&clk_audss CLK_I2S>,
261 <&clk_audss CLK_I2S>,
262 <&clk_audss CLK_DOUT_AUD_BUS>;
263 samsung,idma-addr = <0xc0010000>;
264 pinctrl-names = "default";
265 pinctrl-0 = <&i2s0_bus>;
266 #sound-dai-cells = <0>;
267 status = "disabled";
268 };
269 };
270
271 i2s1: i2s@e2100000 {
272 compatible = "samsung,s3c6410-i2s";
273 reg = <0xe2100000 0x1000>;
274 interrupt-parent = <&vic2>;
275 interrupts = <17>;
276 dma-names = "rx", "tx";
277 dmas = <&pdma1 12>, <&pdma1 13>;
278 clock-names = "iis", "i2s_opclk0";
279 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&i2s1_bus>;
282 #sound-dai-cells = <0>;
283 status = "disabled";
284 };
285
286 i2s2: i2s@e2a00000 {
287 compatible = "samsung,s3c6410-i2s";
288 reg = <0xe2a00000 0x1000>;
289 interrupt-parent = <&vic2>;
290 interrupts = <18>;
291 dma-names = "rx", "tx";
292 dmas = <&pdma1 14>, <&pdma1 15>;
293 clock-names = "iis", "i2s_opclk0";
294 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
295 pinctrl-names = "default";
296 pinctrl-0 = <&i2s2_bus>;
297 #sound-dai-cells = <0>;
298 status = "disabled";
299 };
300
301 pwm: pwm@e2500000 {
302 compatible = "samsung,s5pc100-pwm";
303 reg = <0xe2500000 0x1000>;
304 interrupt-parent = <&vic0>;
305 interrupts = <21>, <22>, <23>, <24>, <25>;
306 clock-names = "timers";
307 clocks = <&clocks CLK_PWM>;
308 #pwm-cells = <3>;
309 };
310
311 watchdog: watchdog@e2700000 {
312 compatible = "samsung,s3c6410-wdt";
313 reg = <0xe2700000 0x1000>;
314 interrupt-parent = <&vic0>;
315 interrupts = <26>;
316 clock-names = "watchdog";
317 clocks = <&clocks CLK_WDT>;
318 };
319
320 rtc: rtc@e2800000 {
321 compatible = "samsung,s3c6410-rtc";
322 reg = <0xe2800000 0x100>;
323 interrupt-parent = <&vic0>;
324 interrupts = <28>, <29>;
325 clocks = <&clocks CLK_RTC>;
326 clock-names = "rtc";
327 status = "disabled";
328 };
329
330 uart0: serial@e2900000 {
331 compatible = "samsung,s5pv210-uart";
332 reg = <0xe2900000 0x400>;
333 interrupt-parent = <&vic1>;
334 interrupts = <10>;
335 clock-names = "uart", "clk_uart_baud0",
336 "clk_uart_baud1";
337 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
338 <&clocks SCLK_UART0>;
339 status = "disabled";
340 };
341
342 uart1: serial@e2900400 {
343 compatible = "samsung,s5pv210-uart";
344 reg = <0xe2900400 0x400>;
345 interrupt-parent = <&vic1>;
346 interrupts = <11>;
347 clock-names = "uart", "clk_uart_baud0",
348 "clk_uart_baud1";
349 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
350 <&clocks SCLK_UART1>;
351 status = "disabled";
352 };
353
354 uart2: serial@e2900800 {
355 compatible = "samsung,s5pv210-uart";
356 reg = <0xe2900800 0x400>;
357 interrupt-parent = <&vic1>;
358 interrupts = <12>;
359 clock-names = "uart", "clk_uart_baud0",
360 "clk_uart_baud1";
361 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
362 <&clocks SCLK_UART2>;
363 status = "disabled";
364 };
365
366 uart3: serial@e2900c00 {
367 compatible = "samsung,s5pv210-uart";
368 reg = <0xe2900c00 0x400>;
369 interrupt-parent = <&vic1>;
370 interrupts = <13>;
371 clock-names = "uart", "clk_uart_baud0",
372 "clk_uart_baud1";
373 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
374 <&clocks SCLK_UART3>;
375 status = "disabled";
376 };
377
378 sdhci0: sdhci@eb000000 {
379 compatible = "samsung,s3c6410-sdhci";
380 reg = <0xeb000000 0x100000>;
381 interrupt-parent = <&vic1>;
382 interrupts = <26>;
383 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
384 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
385 <&clocks SCLK_MMC0>;
386 status = "disabled";
387 };
388
389 sdhci1: sdhci@eb100000 {
390 compatible = "samsung,s3c6410-sdhci";
391 reg = <0xeb100000 0x100000>;
392 interrupt-parent = <&vic1>;
393 interrupts = <27>;
394 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
395 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
396 <&clocks SCLK_MMC1>;
397 status = "disabled";
398 };
399
400 sdhci2: sdhci@eb200000 {
401 compatible = "samsung,s3c6410-sdhci";
402 reg = <0xeb200000 0x100000>;
403 interrupt-parent = <&vic1>;
404 interrupts = <28>;
405 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
406 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
407 <&clocks SCLK_MMC2>;
408 status = "disabled";
409 };
410
411 sdhci3: sdhci@eb300000 {
412 compatible = "samsung,s3c6410-sdhci";
413 reg = <0xeb300000 0x100000>;
414 interrupt-parent = <&vic3>;
415 interrupts = <2>;
416 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
417 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
418 <&clocks SCLK_MMC3>;
419 status = "disabled";
420 };
421
422 hsotg: hsotg@ec000000 {
423 compatible = "samsung,s3c6400-hsotg";
424 reg = <0xec000000 0x20000>;
425 interrupt-parent = <&vic1>;
426 interrupts = <24>;
427 clocks = <&clocks CLK_USB_OTG>;
428 clock-names = "otg";
429 phy-names = "usb2-phy";
430 phys = <&usbphy 0>;
431 status = "disabled";
432 };
433
434 usbphy: usbphy@ec100000 {
435 compatible = "samsung,s5pv210-usb2-phy";
436 reg = <0xec100000 0x100>;
437 samsung,pmureg-phandle = <&pmu_syscon>;
438 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
439 clock-names = "phy", "ref";
440 #phy-cells = <1>;
441 status = "disabled";
442 };
443
444 ehci: ehci@ec200000 {
445 compatible = "samsung,exynos4210-ehci";
446 reg = <0xec200000 0x100>;
447 interrupts = <23>;
448 interrupt-parent = <&vic1>;
449 clocks = <&clocks CLK_USB_HOST>;
450 clock-names = "usbhost";
451 #address-cells = <1>;
452 #size-cells = <0>;
453 status = "disabled";
454
455 port@0 {
456 reg = <0>;
457 phys = <&usbphy 1>;
458 };
459 };
460
461 ohci: ohci@ec300000 {
462 compatible = "samsung,exynos4210-ohci";
463 reg = <0xec300000 0x100>;
464 interrupts = <23>;
465 interrupt-parent = <&vic1>;
466 clocks = <&clocks CLK_USB_HOST>;
467 clock-names = "usbhost";
468 #address-cells = <1>;
469 #size-cells = <0>;
470 status = "disabled";
471
472 port@0 {
473 reg = <0>;
474 phys = <&usbphy 1>;
475 };
476 };
477
478 mfc: codec@f1700000 {
479 compatible = "samsung,mfc-v5";
480 reg = <0xf1700000 0x10000>;
481 interrupt-parent = <&vic2>;
482 interrupts = <14>;
483 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
484 clock-names = "sclk_mfc", "mfc";
485 };
486
487 vic0: interrupt-controller@f2000000 {
488 compatible = "arm,pl192-vic";
489 interrupt-controller;
490 reg = <0xf2000000 0x1000>;
491 #interrupt-cells = <1>;
492 };
493
494 vic1: interrupt-controller@f2100000 {
495 compatible = "arm,pl192-vic";
496 interrupt-controller;
497 reg = <0xf2100000 0x1000>;
498 #interrupt-cells = <1>;
499 };
500
501 vic2: interrupt-controller@f2200000 {
502 compatible = "arm,pl192-vic";
503 interrupt-controller;
504 reg = <0xf2200000 0x1000>;
505 #interrupt-cells = <1>;
506 };
507
508 vic3: interrupt-controller@f2300000 {
509 compatible = "arm,pl192-vic";
510 interrupt-controller;
511 reg = <0xf2300000 0x1000>;
512 #interrupt-cells = <1>;
513 };
514
515 fimd: fimd@f8000000 {
516 compatible = "samsung,s5pv210-fimd";
517 interrupt-parent = <&vic2>;
518 reg = <0xf8000000 0x20000>;
519 interrupt-names = "fifo", "vsync", "lcd_sys";
520 interrupts = <0>, <1>, <2>;
521 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
522 clock-names = "sclk_fimd", "fimd";
523 status = "disabled";
524 };
525
526 dmc0: dmc@f0000000 {
527 compatible = "samsung,s5pv210-dmc";
528 reg = <0xf0000000 0x1000>;
529 };
530
531 dmc1: dmc@f1400000 {
532 compatible = "samsung,s5pv210-dmc";
533 reg = <0xf1400000 0x1000>;
534 };
535
536 g2d: g2d@fa000000 {
537 compatible = "samsung,s5pv210-g2d";
538 reg = <0xfa000000 0x1000>;
539 interrupt-parent = <&vic2>;
540 interrupts = <9>;
541 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
542 clock-names = "sclk_fimg2d", "fimg2d";
543 };
544
545 mdma1: mdma@fa200000 {
546 compatible = "arm,pl330", "arm,primecell";
547 reg = <0xfa200000 0x1000>;
548 interrupt-parent = <&vic0>;
549 interrupts = <18>;
550 clocks = <&clocks CLK_MDMA>;
551 clock-names = "apb_pclk";
552 #dma-cells = <1>;
553 #dma-channels = <8>;
554 #dma-requests = <1>;
555 };
556
557 rotator: rotator@fa300000 {
558 compatible = "samsung,s5pv210-rotator";
559 reg = <0xfa300000 0x1000>;
560 interrupt-parent = <&vic2>;
561 interrupts = <4>;
562 clocks = <&clocks CLK_ROTATOR>;
563 clock-names = "rotator";
564 };
565
566 i2c1: i2c@fab00000 {
567 compatible = "samsung,s3c2440-i2c";
568 reg = <0xfab00000 0x1000>;
569 interrupt-parent = <&vic2>;
570 interrupts = <13>;
571 clocks = <&clocks CLK_I2C1>;
572 clock-names = "i2c";
573 pinctrl-names = "default";
574 pinctrl-0 = <&i2c1_bus>;
575 #address-cells = <1>;
576 #size-cells = <0>;
577 status = "disabled";
578 };
579
580 camera: camera {
581 compatible = "samsung,fimc", "simple-bus";
582 pinctrl-names = "default";
583 pinctrl-0 = <>;
584 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
585 clock-names = "sclk_cam0", "sclk_cam1";
586 #address-cells = <1>;
587 #size-cells = <1>;
588 #clock-cells = <1>;
589 clock-output-names = "cam_a_clkout", "cam_b_clkout";
590 ranges;
591
592 csis0: csis@fa600000 {
593 compatible = "samsung,s5pv210-csis";
594 reg = <0xfa600000 0x4000>;
595 interrupt-parent = <&vic2>;
596 interrupts = <29>;
597 clocks = <&clocks CLK_CSIS>,
598 <&clocks SCLK_CSIS>;
599 clock-names = "clk_csis",
600 "sclk_csis";
601 bus-width = <4>;
602 status = "disabled";
603 #address-cells = <1>;
604 #size-cells = <0>;
605 };
606
607 fimc0: fimc@fb200000 {
608 compatible = "samsung,s5pv210-fimc";
609 reg = <0xfb200000 0x1000>;
610 interrupts = <5>;
611 interrupt-parent = <&vic2>;
612 clocks = <&clocks CLK_FIMC0>,
613 <&clocks SCLK_FIMC0>;
614 clock-names = "fimc",
615 "sclk_fimc";
616 samsung,pix-limits = <4224 8192 1920 4224>;
617 samsung,mainscaler-ext;
618 samsung,cam-if;
619 };
620
621 fimc1: fimc@fb300000 {
622 compatible = "samsung,s5pv210-fimc";
623 reg = <0xfb300000 0x1000>;
624 interrupt-parent = <&vic2>;
625 interrupts = <6>;
626 clocks = <&clocks CLK_FIMC1>,
627 <&clocks SCLK_FIMC1>;
628 clock-names = "fimc",
629 "sclk_fimc";
630 samsung,pix-limits = <4224 8192 1920 4224>;
631 samsung,mainscaler-ext;
632 samsung,cam-if;
633 };
634
635 fimc2: fimc@fb400000 {
636 compatible = "samsung,s5pv210-fimc";
637 reg = <0xfb400000 0x1000>;
638 interrupt-parent = <&vic2>;
639 interrupts = <7>;
640 clocks = <&clocks CLK_FIMC2>,
641 <&clocks SCLK_FIMC2>;
642 clock-names = "fimc",
643 "sclk_fimc";
644 samsung,pix-limits = <4224 8192 1920 4224>;
645 samsung,mainscaler-ext;
646 samsung,lcd-wb;
647 };
648 };
649
650 jpeg_codec: jpeg-codec@fb600000 {
651 compatible = "samsung,s5pv210-jpeg";
652 reg = <0xfb600000 0x1000>;
653 interrupt-parent = <&vic2>;
654 interrupts = <8>;
655 clocks = <&clocks CLK_JPEG>;
656 clock-names = "jpeg";
657 };
658 };
659};
660
661#include "s5pv210-pinctrl.dtsi"