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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/arch/arm/boot/nspire-cx.dts
4 *
5 * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
6 */
7/dts-v1/;
8
9/include/ "nspire.dtsi"
10
11&lcd {
12 port {
13 clcd_pads: endpoint {
14 remote-endpoint = <&panel_in>;
15 };
16 };
17};
18
19&fast_timer {
20 /* compatible = "arm,sp804", "arm,primecell"; */
21};
22
23&uart {
24 compatible = "arm,pl011", "arm,primecell";
25
26 clocks = <&uart_clk>, <&apb_pclk>;
27 clock-names = "uart_clk", "apb_pclk";
28};
29
30&timer0 {
31 compatible = "arm,sp804", "arm,primecell";
32};
33
34&timer1 {
35 compatible = "arm,sp804", "arm,primecell";
36};
37
38&base_clk {
39 compatible = "lsi,nspire-cx-clock";
40};
41
42&ahb_clk {
43 compatible = "lsi,nspire-cx-ahb-divider";
44};
45
46&keypad {
47 linux,keymap = <
48 0x0000001c 0x0001001c 0x00040039
49 0x0005002c 0x00060015 0x0007000b
50 0x0008000f 0x0100002d 0x01010011
51 0x0102002f 0x01030004 0x01040016
52 0x01050014 0x0106001f 0x01070002
53 0x010a006a 0x02000013 0x02010010
54 0x02020019 0x02030007 0x02040018
55 0x02050031 0x02060032 0x02070005
56 0x02080028 0x0209006c 0x03000026
57 0x03010025 0x03020024 0x0303000a
58 0x03040017 0x03050023 0x03060022
59 0x03070008 0x03080035 0x03090069
60 0x04000021 0x04010012 0x04020020
61 0x0404002e 0x04050030 0x0406001e
62 0x0407000d 0x04080037 0x04090067
63 0x05010038 0x0502000c 0x0503001b
64 0x05040034 0x0505001a 0x05060006
65 0x05080027 0x0509000e 0x050a006f
66 0x0600002b 0x0602004e 0x06030068
67 0x06040003 0x0605006d 0x06060009
68 0x06070001 0x0609000f 0x0708002a
69 0x0709001d 0x070a0033 >;
70};
71
72&vbus_reg {
73 gpio = <&gpio 2 0>;
74};
75
76/ {
77 model = "TI-NSPIRE CX";
78 compatible = "ti,nspire-cx";
79
80 memory {
81 device_type = "memory";
82 reg = <0x10000000 0x4000000>; /* 64 MB */
83 };
84
85 uart_clk: uart_clk {
86 #clock-cells = <0>;
87 compatible = "fixed-clock";
88 clock-frequency = <12000000>;
89 };
90
91 ahb {
92 #address-cells = <1>;
93 #size-cells = <1>;
94
95 intc: interrupt-controller@dc000000 {
96 compatible = "arm,pl190-vic";
97 interrupt-controller;
98 reg = <0xdc000000 0x1000>;
99 #interrupt-cells = <1>;
100 };
101
102 apb@90000000 {
103 #address-cells = <1>;
104 #size-cells = <1>;
105
106 i2c@90050000 {
107 compatible = "snps,designware-i2c";
108 reg = <0x90050000 0x1000>;
109 interrupts = <20>;
110 };
111 };
112 };
113
114 panel {
115 compatible = "ti,nspire-cx-lcd-panel";
116 port {
117 panel_in: endpoint {
118 remote-endpoint = <&clcd_pads>;
119 };
120 };
121 };
122 chosen {
123 bootargs = "debug earlyprintk console=tty0 console=ttyAMA0,115200n8 root=/dev/ram0";
124 };
125};
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/arch/arm/boot/nspire-cx.dts
4 *
5 * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
6 */
7/dts-v1/;
8
9/include/ "nspire.dtsi"
10
11&lcd {
12 port {
13 clcd_pads: endpoint {
14 remote-endpoint = <&panel_in>;
15 };
16 };
17};
18
19&fast_timer {
20 /* compatible = "arm,sp804", "arm,primecell"; */
21};
22
23&uart {
24 compatible = "arm,pl011", "arm,primecell";
25
26 clocks = <&uart_clk>, <&apb_pclk>;
27 clock-names = "uart_clk", "apb_pclk";
28};
29
30&timer0 {
31 compatible = "arm,sp804", "arm,primecell";
32};
33
34&timer1 {
35 compatible = "arm,sp804", "arm,primecell";
36};
37
38&base_clk {
39 compatible = "lsi,nspire-cx-clock";
40};
41
42&ahb_clk {
43 compatible = "lsi,nspire-cx-ahb-divider";
44};
45
46&keypad {
47 linux,keymap = <
48 0x0000001c 0x0001001c 0x00040039
49 0x0005002c 0x00060015 0x0007000b
50 0x0008000f 0x0100002d 0x01010011
51 0x0102002f 0x01030004 0x01040016
52 0x01050014 0x0106001f 0x01070002
53 0x010a006a 0x02000013 0x02010010
54 0x02020019 0x02030007 0x02040018
55 0x02050031 0x02060032 0x02070005
56 0x02080028 0x0209006c 0x03000026
57 0x03010025 0x03020024 0x0303000a
58 0x03040017 0x03050023 0x03060022
59 0x03070008 0x03080035 0x03090069
60 0x04000021 0x04010012 0x04020020
61 0x0404002e 0x04050030 0x0406001e
62 0x0407000d 0x04080037 0x04090067
63 0x05010038 0x0502000c 0x0503001b
64 0x05040034 0x0505001a 0x05060006
65 0x05080027 0x0509000e 0x050a006f
66 0x0600002b 0x0602004e 0x06030068
67 0x06040003 0x0605006d 0x06060009
68 0x06070001 0x0609000f 0x0708002a
69 0x0709001d 0x070a0033 >;
70};
71
72&vbus_reg {
73 gpio = <&gpio 2 0>;
74};
75
76/ {
77 model = "TI-NSPIRE CX";
78 compatible = "ti,nspire-cx";
79
80 memory {
81 device_type = "memory";
82 reg = <0x10000000 0x4000000>; /* 64 MB */
83 };
84
85 uart_clk: uart_clk {
86 #clock-cells = <0>;
87 compatible = "fixed-clock";
88 clock-frequency = <12000000>;
89 };
90
91 ahb {
92 #address-cells = <1>;
93 #size-cells = <1>;
94
95 intc: interrupt-controller@DC000000 {
96 compatible = "arm,pl190-vic";
97 interrupt-controller;
98 reg = <0xDC000000 0x1000>;
99 #interrupt-cells = <1>;
100 };
101
102 apb@90000000 {
103 #address-cells = <1>;
104 #size-cells = <1>;
105
106 i2c@90050000 {
107 compatible = "snps,designware-i2c";
108 reg = <0x90050000 0x1000>;
109 interrupts = <20>;
110 };
111 };
112 };
113
114 panel {
115 compatible = "ti,nspire-cx-lcd-panel";
116 port {
117 panel_in: endpoint {
118 remote-endpoint = <&clcd_pads>;
119 };
120 };
121 };
122 chosen {
123 bootargs = "debug earlyprintk console=tty0 console=ttyAMA0,115200n8 root=/dev/ram0";
124 };
125};