1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Common part of the device tree for the Kontron KSwitch D10 MMT
  4 */
  5
  6/dts-v1/;
  7#include "lan966x.dtsi"
  8#include "dt-bindings/phy/phy-lan966x-serdes.h"
  9
 10/ {
 11	aliases {
 12		serial0 = &usart0;
 13	};
 14
 15	chosen {
 16		stdout-path = "serial0:115200n8";
 17	};
 18
 19	gpio-restart {
 20		compatible = "gpio-restart";
 21		gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
 22		priority = <200>;
 23	};
 24};
 25
 26&flx0 {
 27	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
 28	status = "okay";
 29
 30	usart0: serial@200 {
 31		pinctrl-0 = <&usart0_pins>;
 32		pinctrl-names = "default";
 33		status = "okay";
 34	};
 35};
 36
 37&flx3 {
 38	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
 39	status = "okay";
 40
 41	spi3: spi@400 {
 42		pinctrl-0 = <&fc3_b_pins>;
 43		pinctrl-names = "default";
 44		status = "okay";
 45		cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 46	};
 47};
 48
 49&gpio {
 50	fc3_b_pins: fc3-b-pins {
 51		/* SCK, MISO, MOSI */
 52		pins = "GPIO_51", "GPIO_52", "GPIO_53";
 53		function = "fc3_b";
 54	};
 55
 56	miim_c_pins: miim-c-pins {
 57		/* MDC, MDIO */
 58		pins = "GPIO_59", "GPIO_60";
 59		function = "miim_c";
 60	};
 61
 62	sgpio_a_pins: sgpio-a-pins {
 63		/* SCK, D0, D1 */
 64		pins = "GPIO_32", "GPIO_33", "GPIO_34";
 65		function = "sgpio_a";
 66	};
 67
 68	sgpio_b_pins: sgpio-b-pins {
 69		/* LD */
 70		pins = "GPIO_64";
 71		function = "sgpio_b";
 72	};
 73
 74	usart0_pins: usart0-pins {
 75		/* RXD, TXD */
 76		pins = "GPIO_25", "GPIO_26";
 77		function = "fc0_b";
 78	};
 79
 80	usbs_a_pins: usbs-a-pins {
 81		/* VBUS_DET */
 82		pins = "GPIO_66";
 83		function = "gpio";
 84	};
 85};
 86
 87&mdio0 {
 88	pinctrl-0 = <&miim_c_pins>;
 89	pinctrl-names = "default";
 90	reset-gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
 91	clock-frequency = <2500000>;
 92	status = "okay";
 93
 94	phy4: ethernet-phy@5 {
 95		reg = <5>;
 96		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
 97	};
 98
 99	phy5: ethernet-phy@6 {
100		reg = <6>;
101		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
102	};
103
104	phy6: ethernet-phy@7 {
105		reg = <7>;
106		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
107	};
108
109	phy7: ethernet-phy@8 {
110		reg = <8>;
111		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
112	};
113};
114
115&mdio1 {
116	status = "okay";
117};
118
119&phy0 {
120	status = "okay";
121};
122
123&phy1 {
124	status = "okay";
125};
126
127&port0 {
128	phys = <&serdes 0 CU(0)>;
129	phy-handle = <&phy0>;
130	phy-mode = "gmii";
131	status = "okay";
132};
133
134&port1 {
135	phys = <&serdes 1 CU(1)>;
136	phy-handle = <&phy1>;
137	phy-mode = "gmii";
138	status = "okay";
139};
140
141&port4 {
142	phys = <&serdes 4 SERDES6G(2)>;
143	phy-handle = <&phy4>;
144	phy-mode = "qsgmii";
145	status = "okay";
146};
147
148&port5 {
149	phys = <&serdes 5 SERDES6G(2)>;
150	phy-handle = <&phy5>;
151	phy-mode = "qsgmii";
152	status = "okay";
153};
154
155&port6 {
156	phys = <&serdes 6 SERDES6G(2)>;
157	phy-handle = <&phy6>;
158	phy-mode = "qsgmii";
159	status = "okay";
160};
161
162&port7 {
163	phys = <&serdes 7 SERDES6G(2)>;
164	phy-handle = <&phy7>;
165	phy-mode = "qsgmii";
166	status = "okay";
167};
168
169&serdes {
170	status = "okay";
171};
172
173&sgpio {
174	pinctrl-0 = <&sgpio_a_pins>, <&sgpio_b_pins>;
175	pinctrl-names = "default";
176	bus-frequency = <8000000>;
177	/* arbitrary range because all GPIOs are in software mode */
178	microchip,sgpio-port-ranges = <0 11>;
179	status = "okay";
180
181	sgpio_in: gpio@0 {
182		ngpios = <128>;
183	};
184
185	sgpio_out: gpio@1 {
186		ngpios = <128>;
187	};
188};
189
190&switch {
191	status = "okay";
192};
193
194&udc {
195	pinctrl-0 = <&usbs_a_pins>;
196	pinctrl-names = "default";
197	atmel,vbus-gpio = <&gpio 66 GPIO_ACTIVE_HIGH>;
198	status = "okay";
199};
200
201&watchdog {
202	status = "okay";
203};