Loading...
1// SPDX-License-Identifier: GPL-2.0
2/ {
3 mbus@f1000000 {
4 pciec: pcie@82000000 {
5 compatible = "marvell,kirkwood-pcie";
6 status = "disabled";
7 device_type = "pci";
8
9 #address-cells = <3>;
10 #size-cells = <2>;
11
12 bus-range = <0x00 0xff>;
13
14 ranges =
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
18
19 pcie0: pcie@1,0 {
20 device_type = "pci";
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
22 reg = <0x0800 0 0 0 0>;
23 #address-cells = <3>;
24 #size-cells = <2>;
25 #interrupt-cells = <1>;
26 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
27 0x81000000 0 0 0x81000000 0x1 0 1 0>;
28 bus-range = <0x00 0xff>;
29 interrupt-names = "intx", "error";
30 interrupts = <9>, <44>;
31 interrupt-map-mask = <0 0 0 7>;
32 interrupt-map = <0 0 0 1 &pcie_intc 0>,
33 <0 0 0 2 &pcie_intc 1>,
34 <0 0 0 3 &pcie_intc 2>,
35 <0 0 0 4 &pcie_intc 3>;
36 marvell,pcie-port = <0>;
37 marvell,pcie-lane = <0>;
38 clocks = <&gate_clk 2>;
39 status = "disabled";
40
41 pcie_intc: interrupt-controller {
42 interrupt-controller;
43 #interrupt-cells = <1>;
44 };
45 };
46 };
47 };
48
49 ocp@f1000000 {
50 pinctrl: pin-controller@10000 {
51 compatible = "marvell,88f6281-pinctrl";
52
53 pmx_sata0: pmx-sata0 {
54 marvell,pins = "mpp5", "mpp21", "mpp23";
55 marvell,function = "sata0";
56 };
57 pmx_sata1: pmx-sata1 {
58 marvell,pins = "mpp4", "mpp20", "mpp22";
59 marvell,function = "sata1";
60 };
61 pmx_sdio: pmx-sdio {
62 marvell,pins = "mpp12", "mpp13", "mpp14",
63 "mpp15", "mpp16", "mpp17";
64 marvell,function = "sdio";
65 };
66 };
67
68 rtc: rtc@10300 {
69 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
70 reg = <0x10300 0x20>;
71 interrupts = <53>;
72 clocks = <&gate_clk 7>;
73 };
74
75 sata: sata@80000 {
76 compatible = "marvell,orion-sata";
77 reg = <0x80000 0x5000>;
78 interrupts = <21>;
79 clocks = <&gate_clk 14>, <&gate_clk 15>;
80 clock-names = "0", "1";
81 phys = <&sata_phy0>, <&sata_phy1>;
82 phy-names = "port0", "port1";
83 status = "disabled";
84 };
85
86 sdio: mvsdio@90000 {
87 compatible = "marvell,orion-sdio";
88 reg = <0x90000 0x200>;
89 interrupts = <28>;
90 clocks = <&gate_clk 4>;
91 pinctrl-0 = <&pmx_sdio>;
92 pinctrl-names = "default";
93 bus-width = <4>;
94 cap-sdio-irq;
95 cap-sd-highspeed;
96 cap-mmc-highspeed;
97 status = "disabled";
98 };
99 };
100};
1// SPDX-License-Identifier: GPL-2.0
2/ {
3 mbus@f1000000 {
4 pciec: pcie@82000000 {
5 compatible = "marvell,kirkwood-pcie";
6 status = "disabled";
7 device_type = "pci";
8
9 #address-cells = <3>;
10 #size-cells = <2>;
11
12 bus-range = <0x00 0xff>;
13
14 ranges =
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
18
19 pcie0: pcie@1,0 {
20 device_type = "pci";
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
22 reg = <0x0800 0 0 0 0>;
23 #address-cells = <3>;
24 #size-cells = <2>;
25 #interrupt-cells = <1>;
26 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
27 0x81000000 0 0 0x81000000 0x1 0 1 0>;
28 bus-range = <0x00 0xff>;
29 interrupt-map-mask = <0 0 0 0>;
30 interrupt-map = <0 0 0 0 &intc 9>;
31 marvell,pcie-port = <0>;
32 marvell,pcie-lane = <0>;
33 clocks = <&gate_clk 2>;
34 status = "disabled";
35 };
36 };
37 };
38
39 ocp@f1000000 {
40 pinctrl: pin-controller@10000 {
41 compatible = "marvell,88f6281-pinctrl";
42
43 pmx_sata0: pmx-sata0 {
44 marvell,pins = "mpp5", "mpp21", "mpp23";
45 marvell,function = "sata0";
46 };
47 pmx_sata1: pmx-sata1 {
48 marvell,pins = "mpp4", "mpp20", "mpp22";
49 marvell,function = "sata1";
50 };
51 pmx_sdio: pmx-sdio {
52 marvell,pins = "mpp12", "mpp13", "mpp14",
53 "mpp15", "mpp16", "mpp17";
54 marvell,function = "sdio";
55 };
56 };
57
58 rtc: rtc@10300 {
59 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
60 reg = <0x10300 0x20>;
61 interrupts = <53>;
62 clocks = <&gate_clk 7>;
63 };
64
65 sata: sata@80000 {
66 compatible = "marvell,orion-sata";
67 reg = <0x80000 0x5000>;
68 interrupts = <21>;
69 clocks = <&gate_clk 14>, <&gate_clk 15>;
70 clock-names = "0", "1";
71 phys = <&sata_phy0>, <&sata_phy1>;
72 phy-names = "port0", "port1";
73 status = "disabled";
74 };
75
76 sdio: mvsdio@90000 {
77 compatible = "marvell,orion-sdio";
78 reg = <0x90000 0x200>;
79 interrupts = <28>;
80 clocks = <&gate_clk 4>;
81 pinctrl-0 = <&pmx_sdio>;
82 pinctrl-names = "default";
83 bus-width = <4>;
84 cap-sdio-irq;
85 cap-sd-highspeed;
86 cap-mmc-highspeed;
87 status = "disabled";
88 };
89 };
90};