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1// SPDX-License-Identifier: GPL-2.0+
2/dts-v1/;
3#include "aspeed-g5.dtsi"
4#include <dt-bindings/gpio/aspeed-gpio.h>
5#include <dt-bindings/leds/leds-pca955x.h>
6
7/ {
8 model = "Mihawk BMC";
9 compatible = "ibm,mihawk-bmc", "aspeed,ast2500";
10
11
12 chosen {
13 stdout-path = &uart5;
14 bootargs = "console=ttyS4,115200 earlyprintk";
15 };
16
17 memory@80000000 {
18 reg = <0x80000000 0x20000000>;
19 };
20
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 ranges;
25
26 flash_memory: region@98000000 {
27 no-map;
28 reg = <0x98000000 0x04000000>; /* 64M */
29 };
30
31 gfx_memory: framebuffer {
32 size = <0x01000000>;
33 alignment = <0x01000000>;
34 compatible = "shared-dma-pool";
35 reusable;
36 };
37
38 video_engine_memory: jpegbuffer {
39 size = <0x02000000>;
40 alignment = <0x01000000>;
41 compatible = "shared-dma-pool";
42 reusable;
43 };
44 };
45
46 gpio-keys {
47 compatible = "gpio-keys";
48
49 air-water {
50 label = "air-water";
51 gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
52 linux,code = <ASPEED_GPIO(F, 6)>;
53 };
54
55 checkstop {
56 label = "checkstop";
57 gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
58 linux,code = <ASPEED_GPIO(J, 2)>;
59 };
60
61 ps0-presence {
62 label = "ps0-presence";
63 gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
64 linux,code = <ASPEED_GPIO(Z, 2)>;
65 };
66
67 ps1-presence {
68 label = "ps1-presence";
69 gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
70 linux,code = <ASPEED_GPIO(Z, 0)>;
71 };
72 id-button {
73 label = "id-button";
74 gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
75 linux,code = <ASPEED_GPIO(F, 1)>;
76 };
77 };
78
79 gpio-keys-polled {
80 compatible = "gpio-keys-polled";
81 poll-interval = <1000>;
82
83 fan0-presence {
84 label = "fan0-presence";
85 gpios = <&pca9552 9 GPIO_ACTIVE_LOW>;
86 linux,code = <9>;
87 };
88
89 fan1-presence {
90 label = "fan1-presence";
91 gpios = <&pca9552 10 GPIO_ACTIVE_LOW>;
92 linux,code = <10>;
93 };
94
95 fan2-presence {
96 label = "fan2-presence";
97 gpios = <&pca9552 11 GPIO_ACTIVE_LOW>;
98 linux,code = <11>;
99 };
100
101 fan3-presence {
102 label = "fan3-presence";
103 gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
104 linux,code = <12>;
105 };
106
107 fan4-presence {
108 label = "fan4-presence";
109 gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
110 linux,code = <13>;
111 };
112
113 fan5-presence {
114 label = "fan5-presence";
115 gpios = <&pca9552 14 GPIO_ACTIVE_LOW>;
116 linux,code = <14>;
117 };
118 };
119
120 leds {
121 compatible = "gpio-leds";
122
123 fault {
124 retain-state-shutdown;
125 default-state = "keep";
126 gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
127 };
128
129 power {
130 retain-state-shutdown;
131 default-state = "keep";
132 gpios = <&gpio ASPEED_GPIO(AA, 1) GPIO_ACTIVE_LOW>;
133 };
134
135 rear-id {
136 retain-state-shutdown;
137 default-state = "keep";
138 gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
139 };
140
141 rear-g {
142 retain-state-shutdown;
143 default-state = "keep";
144 gpios = <&gpio ASPEED_GPIO(AA, 4) GPIO_ACTIVE_LOW>;
145 };
146
147 rear-ok {
148 retain-state-shutdown;
149 default-state = "keep";
150 gpios = <&gpio ASPEED_GPIO(Y, 0) GPIO_ACTIVE_LOW>;
151 };
152
153 fan0 {
154 retain-state-shutdown;
155 default-state = "keep";
156 gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
157 };
158
159 fan1 {
160 retain-state-shutdown;
161 default-state = "keep";
162 gpios = <&pca9552 1 GPIO_ACTIVE_LOW>;
163 };
164
165 fan2 {
166 retain-state-shutdown;
167 default-state = "keep";
168 gpios = <&pca9552 2 GPIO_ACTIVE_LOW>;
169 };
170
171 fan3 {
172 retain-state-shutdown;
173 default-state = "keep";
174 gpios = <&pca9552 3 GPIO_ACTIVE_LOW>;
175 };
176
177 fan4 {
178 retain-state-shutdown;
179 default-state = "keep";
180 gpios = <&pca9552 4 GPIO_ACTIVE_LOW>;
181 };
182
183 fan5 {
184 retain-state-shutdown;
185 default-state = "keep";
186 gpios = <&pca9552 5 GPIO_ACTIVE_LOW>;
187 };
188 };
189
190 fsi: gpio-fsi {
191 compatible = "fsi-master-gpio", "fsi-master";
192 #address-cells = <2>;
193 #size-cells = <0>;
194 no-gpio-delays;
195
196 clock-gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>;
197 data-gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_HIGH>;
198 mux-gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
199 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
200 trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
201 };
202 iio-hwmon-12v {
203 compatible = "iio-hwmon";
204 io-channels = <&adc 0>;
205 };
206
207 iio-hwmon-5v {
208 compatible = "iio-hwmon";
209 io-channels = <&adc 1>;
210 };
211
212 iio-hwmon-3v {
213 compatible = "iio-hwmon";
214 io-channels = <&adc 2>;
215 };
216
217 iio-hwmon-vdd0 {
218 compatible = "iio-hwmon";
219 io-channels = <&adc 3>;
220 };
221
222 iio-hwmon-vdd1 {
223 compatible = "iio-hwmon";
224 io-channels = <&adc 4>;
225 };
226
227 iio-hwmon-vcs0 {
228 compatible = "iio-hwmon";
229 io-channels = <&adc 5>;
230 };
231
232 iio-hwmon-vcs1 {
233 compatible = "iio-hwmon";
234 io-channels = <&adc 6>;
235 };
236
237 iio-hwmon-vdn0 {
238 compatible = "iio-hwmon";
239 io-channels = <&adc 7>;
240 };
241
242 iio-hwmon-vdn1 {
243 compatible = "iio-hwmon";
244 io-channels = <&adc 8>;
245 };
246
247 iio-hwmon-vio0 {
248 compatible = "iio-hwmon";
249 io-channels = <&adc 9>;
250 };
251
252 iio-hwmon-vio1 {
253 compatible = "iio-hwmon";
254 io-channels = <&adc 10>;
255 };
256
257 iio-hwmon-vddra {
258 compatible = "iio-hwmon";
259 io-channels = <&adc 11>;
260 };
261
262 iio-hwmon-battery {
263 compatible = "iio-hwmon";
264 io-channels = <&adc 12>;
265 };
266
267 iio-hwmon-vddrb {
268 compatible = "iio-hwmon";
269 io-channels = <&adc 13>;
270 };
271
272 iio-hwmon-vddrc {
273 compatible = "iio-hwmon";
274 io-channels = <&adc 14>;
275 };
276
277 iio-hwmon-vddrd {
278 compatible = "iio-hwmon";
279 io-channels = <&adc 15>;
280 };
281};
282
283&pwm_tacho {
284 status = "okay";
285 pinctrl-names = "default";
286 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
287 &pinctrl_pwm2_default &pinctrl_pwm3_default
288 &pinctrl_pwm4_default &pinctrl_pwm5_default>;
289
290 fan@0 {
291 reg = <0x00>;
292 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
293 };
294
295 fan@1 {
296 reg = <0x01>;
297 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
298 };
299
300 fan@2 {
301 reg = <0x02>;
302 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
303 };
304
305 fan@3 {
306 reg = <0x03>;
307 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
308 };
309
310 fan@4 {
311 reg = <0x04>;
312 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
313 };
314
315 fan@5 {
316 reg = <0x05>;
317 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
318 };
319
320 fan@6 {
321 reg = <0x00>;
322 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
323 };
324
325 fan@7 {
326 reg = <0x01>;
327 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
328 };
329
330 fan@8 {
331 reg = <0x02>;
332 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
333 };
334
335 fan@9 {
336 reg = <0x03>;
337 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
338 };
339
340 fan@10 {
341 reg = <0x04>;
342 aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
343 };
344
345 fan@11 {
346 reg = <0x05>;
347 aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
348 };
349};
350
351&fmc {
352 status = "okay";
353 flash@0 {
354 status = "okay";
355 label = "bmc";
356 m25p,fast-read;
357 spi-max-frequency = <50000000>;
358 partitions {
359 #address-cells = < 1 >;
360 #size-cells = < 1 >;
361 compatible = "fixed-partitions";
362 u-boot@0 {
363 reg = < 0 0x60000 >;
364 label = "u-boot";
365 };
366 u-boot-env@60000 {
367 reg = < 0x60000 0x20000 >;
368 label = "u-boot-env";
369 };
370 obmc-ubi@80000 {
371 reg = < 0x80000 0x1F80000 >;
372 label = "obmc-ubi";
373 };
374 };
375 };
376 flash@1 {
377 status = "okay";
378 label = "alt-bmc";
379 m25p,fast-read;
380 spi-max-frequency = <50000000>;
381 partitions {
382 #address-cells = < 1 >;
383 #size-cells = < 1 >;
384 compatible = "fixed-partitions";
385 u-boot@0 {
386 reg = < 0 0x60000 >;
387 label = "alt-u-boot";
388 };
389 u-boot-env@60000 {
390 reg = < 0x60000 0x20000 >;
391 label = "alt-u-boot-env";
392 };
393 obmc-ubi@80000 {
394 reg = < 0x80000 0x1F80000 >;
395 label = "alt-obmc-ubi";
396 };
397 };
398 };
399};
400
401&spi1 {
402 status = "okay";
403 pinctrl-names = "default";
404 pinctrl-0 = <&pinctrl_spi1_default>;
405
406 flash@0 {
407 status = "okay";
408 label = "pnor";
409 m25p,fast-read;
410 spi-max-frequency = <100000000>;
411 };
412};
413
414&lpc_ctrl {
415 status = "okay";
416 memory-region = <&flash_memory>;
417 flash = <&spi1>;
418};
419
420&uart1 {
421 /* Rear RS-232 connector */
422 status = "okay";
423
424 pinctrl-names = "default";
425 pinctrl-0 = <&pinctrl_txd1_default
426 &pinctrl_rxd1_default
427 &pinctrl_nrts1_default
428 &pinctrl_ndtr1_default
429 &pinctrl_ndsr1_default
430 &pinctrl_ncts1_default
431 &pinctrl_ndcd1_default
432 &pinctrl_nri1_default>;
433};
434
435&uart2 {
436 /* APSS */
437 status = "okay";
438
439 pinctrl-names = "default";
440 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
441};
442
443&uart5 {
444 status = "okay";
445};
446
447&mac0 {
448 status = "okay";
449
450 pinctrl-names = "default";
451 pinctrl-0 = <&pinctrl_rmii1_default>;
452 use-ncsi;
453};
454
455&mac1 {
456 status = "okay";
457
458 pinctrl-names = "default";
459 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
460};
461
462&i2c0 {
463 status = "disabled";
464};
465
466&i2c1 {
467 status = "disabled";
468};
469
470&i2c2 {
471 status = "okay";
472
473 /* SAMTEC P0 */
474 /* SAMTEC P1 */
475
476};
477
478&i2c3 {
479 status = "okay";
480
481 /* APSS */
482 /* CPLD */
483
484 /* PCA9516 (repeater) ->
485 * CLK Buffer 9FGS9092
486 * CLK Buffer 9DBL0651BKILFT
487 * CLK Buffer 9DBL0651BKILFT
488 * Power Supply 0
489 * Power Supply 1
490 * PCA 9552 LED
491 */
492
493 power-supply@58 {
494 compatible = "ibm,cffps1";
495 reg = <0x58>;
496 };
497
498 power-supply@5b {
499 compatible = "ibm,cffps1";
500 reg = <0x5b>;
501 };
502
503 pca9552: pca9552@60 {
504 compatible = "nxp,pca9552";
505 reg = <0x60>;
506 #address-cells = <1>;
507 #size-cells = <0>;
508 gpio-controller;
509 #gpio-cells = <2>;
510
511 gpio@0 {
512 reg = <0>;
513 type = <PCA955X_TYPE_GPIO>;
514 };
515 gpio@1 {
516 reg = <1>;
517 type = <PCA955X_TYPE_GPIO>;
518 };
519 gpio@2 {
520 reg = <2>;
521 type = <PCA955X_TYPE_GPIO>;
522 };
523 gpio@3 {
524 reg = <3>;
525 type = <PCA955X_TYPE_GPIO>;
526 };
527 gpio@4 {
528 reg = <4>;
529 type = <PCA955X_TYPE_GPIO>;
530 };
531 gpio@5 {
532 reg = <5>;
533 type = <PCA955X_TYPE_GPIO>;
534 };
535 gpio@6 {
536 reg = <6>;
537 type = <PCA955X_TYPE_GPIO>;
538 };
539 gpio@7 {
540 reg = <7>;
541 type = <PCA955X_TYPE_GPIO>;
542 };
543 gpio@8 {
544 reg = <8>;
545 type = <PCA955X_TYPE_GPIO>;
546 };
547 gpio@9 {
548 reg = <9>;
549 type = <PCA955X_TYPE_GPIO>;
550 };
551 gpio@10 {
552 reg = <10>;
553 type = <PCA955X_TYPE_GPIO>;
554 };
555 gpio@11 {
556 reg = <11>;
557 type = <PCA955X_TYPE_GPIO>;
558 };
559 gpio@12 {
560 reg = <12>;
561 type = <PCA955X_TYPE_GPIO>;
562 };
563 gpio@13 {
564 reg = <13>;
565 type = <PCA955X_TYPE_GPIO>;
566 };
567 gpio@14 {
568 reg = <14>;
569 type = <PCA955X_TYPE_GPIO>;
570 };
571 gpio@15 {
572 reg = <15>;
573 type = <PCA955X_TYPE_GPIO>;
574 };
575
576 };
577
578};
579
580&i2c4 {
581 status = "okay";
582
583 /* CP0 VDD & VCS : IR35221 */
584 /* CP0 VDN : IR35221 */
585 /* CP0 VIO : IR38064 */
586 /* CP0 VDDR : PXM1330 */
587
588 ir35221@70 {
589 compatible = "infineon,ir35221";
590 reg = <0x70>;
591 };
592
593 ir35221@72 {
594 compatible = "infineon,ir35221";
595 reg = <0x72>;
596 };
597
598};
599
600&i2c5 {
601 status = "okay";
602
603 /* CP0 VDD & VCS : IR35221 */
604 /* CP0 VDN : IR35221 */
605 /* CP0 VIO : IR38064 */
606 /* CP0 VDDR : PXM1330 */
607
608 ir35221@70 {
609 compatible = "infineon,ir35221";
610 reg = <0x70>;
611 };
612
613 ir35221@72 {
614 compatible = "infineon,ir35221";
615 reg = <0x72>;
616 };
617
618};
619
620&i2c6 {
621 status = "okay";
622
623 /* pca9548 -> NVMe1 to 8 */
624
625 pca9548@70 {
626 compatible = "nxp,pca9548";
627 #address-cells = <1>;
628 #size-cells = <0>;
629 reg = <0x70>;
630 };
631
632};
633
634&i2c7 {
635 status = "okay";
636
637 /* pca9548 -> NVMe9 to 16 */
638
639 pca9548@70 {
640 compatible = "nxp,pca9548";
641 #address-cells = <1>;
642 #size-cells = <0>;
643 reg = <0x70>;
644 };
645
646};
647
648&i2c8 {
649 status = "okay";
650
651 eeprom@50 {
652 compatible = "atmel,24c64";
653 reg = <0x50>;
654 };
655};
656
657&i2c9 {
658 status = "okay";
659
660 /* pca9545 Riser ->
661 * PCIe x8 Slot3
662 * PCIe x16 slot4
663 * PCIe x8 slot5
664 * I2C BMC RISER PCA9554
665 * BMC SCL/SDA PCA9554
666 * PCA9554
667 */
668
669 /* pca9545 ->
670 * PCIe x16 Slot1
671 * PCIe x8 slot2
672 * PEX8748
673 */
674
675 pca9545riser@70 {
676 compatible = "nxp,pca9545";
677 #address-cells = <1>;
678 #size-cells = <0>;
679 reg = <0x70>;
680
681 i2c-mux-idle-disconnect;
682 interrupt-controller;
683 #interrupt-cells = <2>;
684 };
685
686 pca9545@71 {
687 compatible = "nxp,pca9545";
688 #address-cells = <1>;
689 #size-cells = <0>;
690 reg = <0x71>;
691
692 i2c-mux-idle-disconnect;
693 interrupt-controller;
694 #interrupt-cells = <2>;
695 };
696};
697
698&i2c10 {
699 status = "okay";
700
701 /* pca9545 Riser ->
702 * PCIe x8 Slot8
703 * PCIe x16 slot9
704 * PCIe x8 slot10
705 * I2C BMC RISER PCA9554
706 * BMC SCL/SDA PCA9554
707 * PCA9554
708 */
709
710 /* pca9545 ->
711 * PCIe x16 Slot1
712 * PCIe x8 slot2
713 * PEX8748
714 */
715
716 pca9545riser@70 {
717 compatible = "nxp,pca9545";
718 #address-cells = <1>;
719 #size-cells = <0>;
720 reg = <0x70>;
721
722 i2c-mux-idle-disconnect;
723 interrupt-controller;
724 #interrupt-cells = <2>;
725 };
726
727 pca9545@71 {
728 compatible = "nxp,pca9545";
729 #address-cells = <1>;
730 #size-cells = <0>;
731 reg = <0x71>;
732
733 i2c-mux-idle-disconnect;
734 interrupt-controller;
735 #interrupt-cells = <2>;
736 };
737};
738
739&i2c11 {
740 status = "okay";
741
742 /* TPM */
743 /* RTC RX8900CE */
744 /* FPGA for power sequence */
745 /* TMP275A */
746 /* TMP275A */
747 /* EMC1462 */
748
749 tpm@57 {
750 compatible = "infineon,slb9645tt";
751 reg = <0x57>;
752 };
753
754 rtc@32 {
755 compatible = "epson,rx8900";
756 reg = <0x32>;
757 };
758
759 tmp275@48 {
760 compatible = "ti,tmp275";
761 reg = <0x48>;
762 };
763
764 tmp275@49 {
765 compatible = "ti,tmp275";
766 reg = <0x49>;
767 };
768
769 /* chip emc1462 use emc1403 driver */
770 emc1403@4c {
771 compatible = "smsc,emc1403";
772 reg = <0x4c>;
773 };
774
775};
776
777&i2c12 {
778 status = "okay";
779
780 /* pca9545 ->
781 * SAS BP1
782 * SAS BP2
783 * NVMe BP
784 * M.2 riser
785 */
786
787 pca9545@70 {
788 compatible = "nxp,pca9545";
789 #address-cells = <1>;
790 #size-cells = <0>;
791 reg = <0x70>;
792
793 interrupt-controller;
794 #interrupt-cells = <2>;
795
796 i2c@0 {
797 #address-cells = <1>;
798 #size-cells = <0>;
799 reg = <0>;
800
801 eeprom@50 {
802 compatible = "atmel,24c64";
803 reg = <0x50>;
804 };
805 };
806
807 i2c@1 {
808 #address-cells = <1>;
809 #size-cells = <0>;
810 reg = <1>;
811
812 eeprom@50 {
813 compatible = "atmel,24c64";
814 reg = <0x50>;
815 };
816 };
817
818 i2c@2 {
819 #address-cells = <1>;
820 #size-cells = <0>;
821 reg = <2>;
822
823 eeprom@50 {
824 compatible = "atmel,24c64";
825 reg = <0x50>;
826 };
827 };
828
829 i2c@3 {
830 #address-cells = <1>;
831 #size-cells = <0>;
832 reg = <3>;
833
834 tmp275@48 {
835 compatible = "ti,tmp275";
836 reg = <0x48>;
837 };
838 };
839
840 };
841
842};
843
844&i2c13 {
845 status = "okay";
846
847 /* pca9548 ->
848 * NVMe BP
849 * NVMe HDD17 to 24
850 */
851
852 pca9548@70 {
853 compatible = "nxp,pca9548";
854 #address-cells = <1>;
855 #size-cells = <0>;
856 reg = <0x70>;
857 };
858};
859
860&vuart {
861 status = "okay";
862};
863
864&gfx {
865 status = "okay";
866 memory-region = <&gfx_memory>;
867};
868
869&adc {
870 status = "okay";
871 pinctrl-names = "default";
872 pinctrl-0 = <&pinctrl_adc0_default
873 &pinctrl_adc1_default
874 &pinctrl_adc2_default
875 &pinctrl_adc3_default
876 &pinctrl_adc4_default
877 &pinctrl_adc5_default
878 &pinctrl_adc6_default
879 &pinctrl_adc7_default
880 &pinctrl_adc8_default
881 &pinctrl_adc9_default
882 &pinctrl_adc10_default
883 &pinctrl_adc11_default
884 &pinctrl_adc12_default
885 &pinctrl_adc13_default
886 &pinctrl_adc14_default
887 &pinctrl_adc15_default>;
888};
889
890&wdt1 {
891 aspeed,reset-type = "none";
892 aspeed,external-signal;
893 aspeed,ext-push-pull;
894 aspeed,ext-active-high;
895
896 pinctrl-names = "default";
897 pinctrl-0 = <&pinctrl_wdtrst1_default>;
898};
899
900&wdt2 {
901 aspeed,alt-boot;
902};
903
904&ibt {
905 status = "okay";
906};
907
908&vhub {
909 status = "okay";
910};
911
912&video {
913 status = "okay";
914 memory-region = <&video_engine_memory>;
915};
916
917#include "ibm-power9-dual.dtsi"
918