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1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Device Tree file for Marvell Armada 390 Development Board
4 * (DB-88F6920)
5 *
6 * Copyright (C) 2016 Marvell
7 *
8 * Grzegorz Jaszczyk <jaz@semihalf.com>
9 */
10
11/dts-v1/;
12#include "armada-390.dtsi"
13
14/ {
15 model = "Marvell Armada 390 Development Board";
16 compatible = "marvell,a390-db", "marvell,armada390";
17
18 chosen {
19 stdout-path = "serial0:115200n8";
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0x00000000 0x80000000>; /* 2 GB */
25 };
26
27 soc {
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
30
31 internal-regs {
32 i2c@11000 {
33 status = "okay";
34 clock-frequency = <100000>;
35
36 eeprom@50 {
37 compatible = "atmel,24c64";
38 reg = <0x50>;
39 };
40 };
41
42 /* CON104 */
43 serial@12000 {
44 status = "okay";
45 };
46
47 /* CON97 */
48 usb@58000 {
49 status = "okay";
50 };
51
52 /* CON98 */
53 usb3@f8000 {
54 status = "okay";
55 };
56 };
57
58 pcie {
59 status = "okay";
60
61 /* CON30 */
62 pcie@1,0 {
63 status = "okay";
64 };
65
66 /* CON44 */
67 pcie@2,0 {
68 status = "okay";
69 };
70
71 /* CON61 */
72 pcie@3,0 {
73 status = "okay";
74 };
75 };
76 };
77};
78
79&spi1 {
80 status = "okay";
81 pinctrl-0 = <&spi1_pins>;
82 pinctrl-names = "default";
83
84 flash@1 {
85 #address-cells = <1>;
86 #size-cells = <1>;
87 compatible = "n25q128a13",
88 "jedec,spi-nor";
89 reg = <0>; /* Chip select 0 */
90 spi-max-frequency = <108000000>;
91
92 partitions {
93 compatible = "fixed-partitions";
94 #address-cells = <1>;
95 #size-cells = <1>;
96
97 partition@0 {
98 label = "U-Boot";
99 reg = <0 0x400000>;
100 };
101 partition@400000 {
102 label = "Filesystem";
103 reg = <0x400000 0xc00000>;
104 };
105 };
106 };
107};
108
109&nand_controller {
110 status = "okay";
111 pinctrl-0 = <&nand_pins>;
112 pinctrl-names = "default";
113
114 nand@0 {
115 reg = <0>;
116 label = "pxa3xx_nand-0";
117 nand-rb = <0>;
118 marvell,nand-keep-config;
119 nand-on-flash-bbt;
120 nand-ecc-strength = <8>;
121 nand-ecc-step-size = <512>;
122
123 partitions {
124 compatible = "fixed-partitions";
125 #address-cells = <1>;
126 #size-cells = <1>;
127
128 partition@0 {
129 label = "U-Boot";
130 reg = <0 0x800000>;
131 };
132 partition@800000 {
133 label = "Linux";
134 reg = <0x800000 0x800000>;
135 };
136 partition@1000000 {
137 label = "Filesystem";
138 reg = <0x1000000 0x3f000000>;
139 };
140 };
141 };
142};
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Device Tree file for Marvell Armada 390 Development Board
4 * (DB-88F6920)
5 *
6 * Copyright (C) 2016 Marvell
7 *
8 * Grzegorz Jaszczyk <jaz@semihalf.com>
9 */
10
11/dts-v1/;
12#include "armada-390.dtsi"
13
14/ {
15 model = "Marvell Armada 390 Development Board";
16 compatible = "marvell,a390-db", "marvell,armada390";
17
18 chosen {
19 stdout-path = "serial0:115200n8";
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0x00000000 0x80000000>; /* 2 GB */
25 };
26
27 soc {
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
30
31 internal-regs {
32 i2c@11000 {
33 status = "okay";
34 clock-frequency = <100000>;
35
36 eeprom@50 {
37 compatible = "atmel,24c64";
38 reg = <0x50>;
39 };
40 };
41
42 /* CON104 */
43 serial@12000 {
44 status = "okay";
45 };
46
47 /* CON97 */
48 usb@58000 {
49 status = "okay";
50 };
51
52 /* CON98 */
53 usb3@f8000 {
54 status = "okay";
55 };
56 };
57
58 pcie {
59 status = "okay";
60
61 /* CON30 */
62 pcie@1,0 {
63 status = "okay";
64 };
65
66 /* CON44 */
67 pcie@2,0 {
68 status = "okay";
69 };
70
71 /* CON61 */
72 pcie@3,0 {
73 status = "okay";
74 };
75 };
76 };
77};
78
79&spi1 {
80 status = "okay";
81 pinctrl-0 = <&spi1_pins>;
82 pinctrl-names = "default";
83
84 spi-flash@1 {
85 #address-cells = <1>;
86 #size-cells = <1>;
87 compatible = "n25q128a13",
88 "jedec,spi-nor";
89 reg = <0>; /* Chip select 0 */
90 spi-max-frequency = <108000000>;
91
92 partitions {
93 compatible = "fixed-partitions";
94 #address-cells = <1>;
95 #size-cells = <1>;
96
97 partition@0 {
98 label = "U-Boot";
99 reg = <0 0x400000>;
100 };
101 partition@400000 {
102 label = "Filesystem";
103 reg = <0x400000 0xc00000>;
104 };
105 };
106 };
107};
108
109&nand_controller {
110 status = "okay";
111 pinctrl-0 = <&nand_pins>;
112 pinctrl-names = "default";
113
114 nand@0 {
115 reg = <0>;
116 label = "pxa3xx_nand-0";
117 nand-rb = <0>;
118 marvell,nand-keep-config;
119 nand-on-flash-bbt;
120 nand-ecc-strength = <8>;
121 nand-ecc-step-size = <512>;
122
123 partitions {
124 compatible = "fixed-partitions";
125 #address-cells = <1>;
126 #size-cells = <1>;
127
128 partition@0 {
129 label = "U-Boot";
130 reg = <0 0x800000>;
131 };
132 partition@800000 {
133 label = "Linux";
134 reg = <0x800000 0x800000>;
135 };
136 partition@1000000 {
137 label = "Filesystem";
138 reg = <0x1000000 0x3f000000>;
139 };
140 };
141 };
142};