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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
4 */
5
6#ifndef __TEGRA_IVC_H
7#define __TEGRA_IVC_H
8
9#include <linux/device.h>
10#include <linux/dma-mapping.h>
11#include <linux/iosys-map.h>
12#include <linux/types.h>
13
14struct tegra_ivc_header;
15
16struct tegra_ivc {
17 struct device *peer;
18
19 struct {
20 struct iosys_map map;
21 unsigned int position;
22 dma_addr_t phys;
23 } rx, tx;
24
25 void (*notify)(struct tegra_ivc *ivc, void *data);
26 void *notify_data;
27
28 unsigned int num_frames;
29 size_t frame_size;
30};
31
32/**
33 * tegra_ivc_read_get_next_frame - Peek at the next frame to receive
34 * @ivc pointer of the IVC channel
35 *
36 * Peek at the next frame to be received, without removing it from
37 * the queue.
38 *
39 * Returns a pointer to the frame, or an error encoded pointer.
40 */
41int tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc, struct iosys_map *map);
42
43/**
44 * tegra_ivc_read_advance - Advance the read queue
45 * @ivc pointer of the IVC channel
46 *
47 * Advance the read queue
48 *
49 * Returns 0, or a negative error value if failed.
50 */
51int tegra_ivc_read_advance(struct tegra_ivc *ivc);
52
53/**
54 * tegra_ivc_write_get_next_frame - Poke at the next frame to transmit
55 * @ivc pointer of the IVC channel
56 *
57 * Get access to the next frame.
58 *
59 * Returns a pointer to the frame, or an error encoded pointer.
60 */
61int tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc, struct iosys_map *map);
62
63/**
64 * tegra_ivc_write_advance - Advance the write queue
65 * @ivc pointer of the IVC channel
66 *
67 * Advance the write queue
68 *
69 * Returns 0, or a negative error value if failed.
70 */
71int tegra_ivc_write_advance(struct tegra_ivc *ivc);
72
73/**
74 * tegra_ivc_notified - handle internal messages
75 * @ivc pointer of the IVC channel
76 *
77 * This function must be called following every notification.
78 *
79 * Returns 0 if the channel is ready for communication, or -EAGAIN if a channel
80 * reset is in progress.
81 */
82int tegra_ivc_notified(struct tegra_ivc *ivc);
83
84/**
85 * tegra_ivc_reset - initiates a reset of the shared memory state
86 * @ivc pointer of the IVC channel
87 *
88 * This function must be called after a channel is reserved before it is used
89 * for communication. The channel will be ready for use when a subsequent call
90 * to notify the remote of the channel reset.
91 */
92void tegra_ivc_reset(struct tegra_ivc *ivc);
93
94size_t tegra_ivc_align(size_t size);
95unsigned tegra_ivc_total_queue_size(unsigned queue_size);
96int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, const struct iosys_map *rx,
97 dma_addr_t rx_phys, const struct iosys_map *tx, dma_addr_t tx_phys,
98 unsigned int num_frames, size_t frame_size,
99 void (*notify)(struct tegra_ivc *ivc, void *data),
100 void *data);
101void tegra_ivc_cleanup(struct tegra_ivc *ivc);
102
103#endif /* __TEGRA_IVC_H */
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
4 */
5
6#ifndef __TEGRA_IVC_H
7
8#include <linux/device.h>
9#include <linux/dma-mapping.h>
10#include <linux/types.h>
11
12struct tegra_ivc_header;
13
14struct tegra_ivc {
15 struct device *peer;
16
17 struct {
18 struct tegra_ivc_header *channel;
19 unsigned int position;
20 dma_addr_t phys;
21 } rx, tx;
22
23 void (*notify)(struct tegra_ivc *ivc, void *data);
24 void *notify_data;
25
26 unsigned int num_frames;
27 size_t frame_size;
28};
29
30/**
31 * tegra_ivc_read_get_next_frame - Peek at the next frame to receive
32 * @ivc pointer of the IVC channel
33 *
34 * Peek at the next frame to be received, without removing it from
35 * the queue.
36 *
37 * Returns a pointer to the frame, or an error encoded pointer.
38 */
39void *tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc);
40
41/**
42 * tegra_ivc_read_advance - Advance the read queue
43 * @ivc pointer of the IVC channel
44 *
45 * Advance the read queue
46 *
47 * Returns 0, or a negative error value if failed.
48 */
49int tegra_ivc_read_advance(struct tegra_ivc *ivc);
50
51/**
52 * tegra_ivc_write_get_next_frame - Poke at the next frame to transmit
53 * @ivc pointer of the IVC channel
54 *
55 * Get access to the next frame.
56 *
57 * Returns a pointer to the frame, or an error encoded pointer.
58 */
59void *tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc);
60
61/**
62 * tegra_ivc_write_advance - Advance the write queue
63 * @ivc pointer of the IVC channel
64 *
65 * Advance the write queue
66 *
67 * Returns 0, or a negative error value if failed.
68 */
69int tegra_ivc_write_advance(struct tegra_ivc *ivc);
70
71/**
72 * tegra_ivc_notified - handle internal messages
73 * @ivc pointer of the IVC channel
74 *
75 * This function must be called following every notification.
76 *
77 * Returns 0 if the channel is ready for communication, or -EAGAIN if a channel
78 * reset is in progress.
79 */
80int tegra_ivc_notified(struct tegra_ivc *ivc);
81
82/**
83 * tegra_ivc_reset - initiates a reset of the shared memory state
84 * @ivc pointer of the IVC channel
85 *
86 * This function must be called after a channel is reserved before it is used
87 * for communication. The channel will be ready for use when a subsequent call
88 * to notify the remote of the channel reset.
89 */
90void tegra_ivc_reset(struct tegra_ivc *ivc);
91
92size_t tegra_ivc_align(size_t size);
93unsigned tegra_ivc_total_queue_size(unsigned queue_size);
94int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx,
95 dma_addr_t rx_phys, void *tx, dma_addr_t tx_phys,
96 unsigned int num_frames, size_t frame_size,
97 void (*notify)(struct tegra_ivc *ivc, void *data),
98 void *data);
99void tegra_ivc_cleanup(struct tegra_ivc *ivc);
100
101#endif /* __TEGRA_IVC_H */