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v6.2
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * rtc-tps6586x.c: RTC driver for TI PMIC TPS6586X
  4 *
  5 * Copyright (c) 2012, NVIDIA Corporation.
  6 *
  7 * Author: Laxman Dewangan <ldewangan@nvidia.com>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  8 */
  9
 10#include <linux/device.h>
 11#include <linux/err.h>
 12#include <linux/init.h>
 13#include <linux/irq.h>
 14#include <linux/kernel.h>
 15#include <linux/mfd/tps6586x.h>
 16#include <linux/module.h>
 17#include <linux/platform_device.h>
 18#include <linux/pm_runtime.h>
 19#include <linux/rtc.h>
 20#include <linux/slab.h>
 21
 22#define RTC_CTRL			0xc0
 23#define POR_RESET_N			BIT(7)
 24#define OSC_SRC_SEL			BIT(6)
 25#define RTC_ENABLE			BIT(5)	/* enables alarm */
 26#define RTC_BUF_ENABLE			BIT(4)	/* 32 KHz buffer enable */
 27#define PRE_BYPASS			BIT(3)	/* 0=1KHz or 1=32KHz updates */
 28#define CL_SEL_MASK			(BIT(2)|BIT(1))
 29#define CL_SEL_POS			1
 30#define RTC_ALARM1_HI			0xc1
 31#define RTC_COUNT4			0xc6
 32
 33/* start a PMU RTC access by reading the register prior to the RTC_COUNT4 */
 34#define RTC_COUNT4_DUMMYREAD		0xc5
 35
 36/*only 14-bits width in second*/
 37#define ALM1_VALID_RANGE_IN_SEC		0x3FFF
 38
 39#define TPS6586X_RTC_CL_SEL_1_5PF	0x0
 40#define TPS6586X_RTC_CL_SEL_6_5PF	0x1
 41#define TPS6586X_RTC_CL_SEL_7_5PF	0x2
 42#define TPS6586X_RTC_CL_SEL_12_5PF	0x3
 43
 44struct tps6586x_rtc {
 45	struct device		*dev;
 46	struct rtc_device	*rtc;
 47	int			irq;
 48	bool			irq_en;
 49};
 50
 51static inline struct device *to_tps6586x_dev(struct device *dev)
 52{
 53	return dev->parent;
 54}
 55
 56static int tps6586x_rtc_read_time(struct device *dev, struct rtc_time *tm)
 57{
 58	struct device *tps_dev = to_tps6586x_dev(dev);
 59	unsigned long long ticks = 0;
 60	time64_t seconds;
 61	u8 buff[6];
 62	int ret;
 63	int i;
 64
 65	ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, sizeof(buff), buff);
 66	if (ret < 0) {
 67		dev_err(dev, "read counter failed with err %d\n", ret);
 68		return ret;
 69	}
 70
 71	for (i = 1; i < sizeof(buff); i++) {
 72		ticks <<= 8;
 73		ticks |= buff[i];
 74	}
 75
 76	seconds = ticks >> 10;
 77	rtc_time64_to_tm(seconds, tm);
 78
 79	return 0;
 80}
 81
 82static int tps6586x_rtc_set_time(struct device *dev, struct rtc_time *tm)
 83{
 84	struct device *tps_dev = to_tps6586x_dev(dev);
 85	unsigned long long ticks;
 86	time64_t seconds;
 87	u8 buff[5];
 88	int ret;
 89
 90	seconds = rtc_tm_to_time64(tm);
 91
 92	ticks = (unsigned long long)seconds << 10;
 93	buff[0] = (ticks >> 32) & 0xff;
 94	buff[1] = (ticks >> 24) & 0xff;
 95	buff[2] = (ticks >> 16) & 0xff;
 96	buff[3] = (ticks >> 8) & 0xff;
 97	buff[4] = ticks & 0xff;
 98
 99	/* Disable RTC before changing time */
100	ret = tps6586x_clr_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
101	if (ret < 0) {
102		dev_err(dev, "failed to clear RTC_ENABLE\n");
103		return ret;
104	}
105
106	ret = tps6586x_writes(tps_dev, RTC_COUNT4, sizeof(buff), buff);
107	if (ret < 0) {
108		dev_err(dev, "failed to program new time\n");
109		return ret;
110	}
111
112	/* Enable RTC */
113	ret = tps6586x_set_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
114	if (ret < 0) {
115		dev_err(dev, "failed to set RTC_ENABLE\n");
116		return ret;
117	}
118	return 0;
119}
120
121static int tps6586x_rtc_alarm_irq_enable(struct device *dev,
122			 unsigned int enabled)
123{
124	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
125
126	if (enabled && !rtc->irq_en) {
127		enable_irq(rtc->irq);
128		rtc->irq_en = true;
129	} else if (!enabled && rtc->irq_en)  {
130		disable_irq(rtc->irq);
131		rtc->irq_en = false;
132	}
133	return 0;
134}
135
136static int tps6586x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
137{
138	struct device *tps_dev = to_tps6586x_dev(dev);
139	time64_t seconds;
140	unsigned long ticks;
141	unsigned long rtc_current_time;
142	unsigned long long rticks = 0;
143	u8 buff[3];
144	u8 rbuff[6];
145	int ret;
146	int i;
147
148	seconds = rtc_tm_to_time64(&alrm->time);
149
150	ret = tps6586x_rtc_alarm_irq_enable(dev, alrm->enabled);
151	if (ret < 0) {
152		dev_err(dev, "can't set alarm irq, err %d\n", ret);
153		return ret;
154	}
155
156	ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD,
157			sizeof(rbuff), rbuff);
158	if (ret < 0) {
159		dev_err(dev, "read counter failed with err %d\n", ret);
160		return ret;
161	}
162
163	for (i = 1; i < sizeof(rbuff); i++) {
164		rticks <<= 8;
165		rticks |= rbuff[i];
166	}
167
168	rtc_current_time = rticks >> 10;
169	if ((seconds - rtc_current_time) > ALM1_VALID_RANGE_IN_SEC)
170		seconds = rtc_current_time - 1;
171
172	ticks = (unsigned long long)seconds << 10;
173	buff[0] = (ticks >> 16) & 0xff;
174	buff[1] = (ticks >> 8) & 0xff;
175	buff[2] = ticks & 0xff;
176
177	ret = tps6586x_writes(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
178	if (ret)
179		dev_err(dev, "programming alarm failed with err %d\n", ret);
180
181	return ret;
182}
183
184static int tps6586x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
185{
186	struct device *tps_dev = to_tps6586x_dev(dev);
187	unsigned long ticks;
188	time64_t seconds;
189	u8 buff[3];
190	int ret;
191
192	ret = tps6586x_reads(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
193	if (ret) {
194		dev_err(dev, "read RTC_ALARM1_HI failed with err %d\n", ret);
195		return ret;
196	}
197
198	ticks = (buff[0] << 16) | (buff[1] << 8) | buff[2];
199	seconds = ticks >> 10;
200
201	rtc_time64_to_tm(seconds, &alrm->time);
202	return 0;
203}
204
205static const struct rtc_class_ops tps6586x_rtc_ops = {
206	.read_time	= tps6586x_rtc_read_time,
207	.set_time	= tps6586x_rtc_set_time,
208	.set_alarm	= tps6586x_rtc_set_alarm,
209	.read_alarm	= tps6586x_rtc_read_alarm,
210	.alarm_irq_enable = tps6586x_rtc_alarm_irq_enable,
211};
212
213static irqreturn_t tps6586x_rtc_irq(int irq, void *data)
214{
215	struct tps6586x_rtc *rtc = data;
216
217	rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
218	return IRQ_HANDLED;
219}
220
221static int tps6586x_rtc_probe(struct platform_device *pdev)
222{
223	struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
224	struct tps6586x_rtc *rtc;
225	int ret;
226
227	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
228	if (!rtc)
229		return -ENOMEM;
230
231	rtc->dev = &pdev->dev;
232	rtc->irq = platform_get_irq(pdev, 0);
233
234	/* 1 kHz tick mode, enable tick counting */
235	ret = tps6586x_update(tps_dev, RTC_CTRL,
236		RTC_ENABLE | OSC_SRC_SEL |
237		((TPS6586X_RTC_CL_SEL_1_5PF << CL_SEL_POS) & CL_SEL_MASK),
238		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
239	if (ret < 0) {
240		dev_err(&pdev->dev, "unable to start counter\n");
241		return ret;
242	}
243
244	device_init_wakeup(&pdev->dev, 1);
245
246	platform_set_drvdata(pdev, rtc);
247	rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
248	if (IS_ERR(rtc->rtc)) {
249		ret = PTR_ERR(rtc->rtc);
250		goto fail_rtc_register;
251	}
252
253	rtc->rtc->ops = &tps6586x_rtc_ops;
254	rtc->rtc->range_max = (1ULL << 30) - 1; /* 30-bit seconds */
255	rtc->rtc->start_secs = mktime64(2009, 1, 1, 0, 0, 0);
256	rtc->rtc->set_start_time = true;
257
258	irq_set_status_flags(rtc->irq, IRQ_NOAUTOEN);
259
260	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
261				tps6586x_rtc_irq,
262				IRQF_ONESHOT,
263				dev_name(&pdev->dev), rtc);
264	if (ret < 0) {
265		dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n",
266				rtc->irq, ret);
267		goto fail_rtc_register;
268	}
 
269
270	ret = devm_rtc_register_device(rtc->rtc);
271	if (ret)
272		goto fail_rtc_register;
273
274	return 0;
275
276fail_rtc_register:
277	tps6586x_update(tps_dev, RTC_CTRL, 0,
278		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
279	return ret;
280};
281
282static int tps6586x_rtc_remove(struct platform_device *pdev)
283{
284	struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
285
286	tps6586x_update(tps_dev, RTC_CTRL, 0,
287		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
288	return 0;
289}
290
291#ifdef CONFIG_PM_SLEEP
292static int tps6586x_rtc_suspend(struct device *dev)
293{
294	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
295
296	if (device_may_wakeup(dev))
297		enable_irq_wake(rtc->irq);
298	return 0;
299}
300
301static int tps6586x_rtc_resume(struct device *dev)
302{
303	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
304
305	if (device_may_wakeup(dev))
306		disable_irq_wake(rtc->irq);
307	return 0;
308}
309#endif
310
311static SIMPLE_DEV_PM_OPS(tps6586x_pm_ops, tps6586x_rtc_suspend,
312			tps6586x_rtc_resume);
313
314static struct platform_driver tps6586x_rtc_driver = {
315	.driver	= {
316		.name	= "tps6586x-rtc",
317		.pm	= &tps6586x_pm_ops,
318	},
319	.probe	= tps6586x_rtc_probe,
320	.remove	= tps6586x_rtc_remove,
321};
322module_platform_driver(tps6586x_rtc_driver);
323
324MODULE_ALIAS("platform:tps6586x-rtc");
325MODULE_DESCRIPTION("TI TPS6586x RTC driver");
326MODULE_AUTHOR("Laxman dewangan <ldewangan@nvidia.com>");
327MODULE_LICENSE("GPL v2");
v5.4
 
  1/*
  2 * rtc-tps6586x.c: RTC driver for TI PMIC TPS6586X
  3 *
  4 * Copyright (c) 2012, NVIDIA Corporation.
  5 *
  6 * Author: Laxman Dewangan <ldewangan@nvidia.com>
  7 *
  8 * This program is free software; you can redistribute it and/or
  9 * modify it under the terms of the GNU General Public License as
 10 * published by the Free Software Foundation version 2.
 11 *
 12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
 13 * whether express or implied; without even the implied warranty of
 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 15 * General Public License for more details.
 16 *
 17 * You should have received a copy of the GNU General Public License
 18 * along with this program; if not, write to the Free Software
 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
 20 * 02111-1307, USA
 21 */
 22
 23#include <linux/device.h>
 24#include <linux/err.h>
 25#include <linux/init.h>
 
 26#include <linux/kernel.h>
 27#include <linux/mfd/tps6586x.h>
 28#include <linux/module.h>
 29#include <linux/platform_device.h>
 30#include <linux/pm_runtime.h>
 31#include <linux/rtc.h>
 32#include <linux/slab.h>
 33
 34#define RTC_CTRL			0xc0
 35#define POR_RESET_N			BIT(7)
 36#define OSC_SRC_SEL			BIT(6)
 37#define RTC_ENABLE			BIT(5)	/* enables alarm */
 38#define RTC_BUF_ENABLE			BIT(4)	/* 32 KHz buffer enable */
 39#define PRE_BYPASS			BIT(3)	/* 0=1KHz or 1=32KHz updates */
 40#define CL_SEL_MASK			(BIT(2)|BIT(1))
 41#define CL_SEL_POS			1
 42#define RTC_ALARM1_HI			0xc1
 43#define RTC_COUNT4			0xc6
 44
 45/* start a PMU RTC access by reading the register prior to the RTC_COUNT4 */
 46#define RTC_COUNT4_DUMMYREAD		0xc5
 47
 48/*only 14-bits width in second*/
 49#define ALM1_VALID_RANGE_IN_SEC		0x3FFF
 50
 51#define TPS6586X_RTC_CL_SEL_1_5PF	0x0
 52#define TPS6586X_RTC_CL_SEL_6_5PF	0x1
 53#define TPS6586X_RTC_CL_SEL_7_5PF	0x2
 54#define TPS6586X_RTC_CL_SEL_12_5PF	0x3
 55
 56struct tps6586x_rtc {
 57	struct device		*dev;
 58	struct rtc_device	*rtc;
 59	int			irq;
 60	bool			irq_en;
 61};
 62
 63static inline struct device *to_tps6586x_dev(struct device *dev)
 64{
 65	return dev->parent;
 66}
 67
 68static int tps6586x_rtc_read_time(struct device *dev, struct rtc_time *tm)
 69{
 70	struct device *tps_dev = to_tps6586x_dev(dev);
 71	unsigned long long ticks = 0;
 72	time64_t seconds;
 73	u8 buff[6];
 74	int ret;
 75	int i;
 76
 77	ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, sizeof(buff), buff);
 78	if (ret < 0) {
 79		dev_err(dev, "read counter failed with err %d\n", ret);
 80		return ret;
 81	}
 82
 83	for (i = 1; i < sizeof(buff); i++) {
 84		ticks <<= 8;
 85		ticks |= buff[i];
 86	}
 87
 88	seconds = ticks >> 10;
 89	rtc_time64_to_tm(seconds, tm);
 90
 91	return 0;
 92}
 93
 94static int tps6586x_rtc_set_time(struct device *dev, struct rtc_time *tm)
 95{
 96	struct device *tps_dev = to_tps6586x_dev(dev);
 97	unsigned long long ticks;
 98	time64_t seconds;
 99	u8 buff[5];
100	int ret;
101
102	seconds = rtc_tm_to_time64(tm);
103
104	ticks = (unsigned long long)seconds << 10;
105	buff[0] = (ticks >> 32) & 0xff;
106	buff[1] = (ticks >> 24) & 0xff;
107	buff[2] = (ticks >> 16) & 0xff;
108	buff[3] = (ticks >> 8) & 0xff;
109	buff[4] = ticks & 0xff;
110
111	/* Disable RTC before changing time */
112	ret = tps6586x_clr_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
113	if (ret < 0) {
114		dev_err(dev, "failed to clear RTC_ENABLE\n");
115		return ret;
116	}
117
118	ret = tps6586x_writes(tps_dev, RTC_COUNT4, sizeof(buff), buff);
119	if (ret < 0) {
120		dev_err(dev, "failed to program new time\n");
121		return ret;
122	}
123
124	/* Enable RTC */
125	ret = tps6586x_set_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
126	if (ret < 0) {
127		dev_err(dev, "failed to set RTC_ENABLE\n");
128		return ret;
129	}
130	return 0;
131}
132
133static int tps6586x_rtc_alarm_irq_enable(struct device *dev,
134			 unsigned int enabled)
135{
136	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
137
138	if (enabled && !rtc->irq_en) {
139		enable_irq(rtc->irq);
140		rtc->irq_en = true;
141	} else if (!enabled && rtc->irq_en)  {
142		disable_irq(rtc->irq);
143		rtc->irq_en = false;
144	}
145	return 0;
146}
147
148static int tps6586x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
149{
150	struct device *tps_dev = to_tps6586x_dev(dev);
151	time64_t seconds;
152	unsigned long ticks;
153	unsigned long rtc_current_time;
154	unsigned long long rticks = 0;
155	u8 buff[3];
156	u8 rbuff[6];
157	int ret;
158	int i;
159
160	seconds = rtc_tm_to_time64(&alrm->time);
161
162	ret = tps6586x_rtc_alarm_irq_enable(dev, alrm->enabled);
163	if (ret < 0) {
164		dev_err(dev, "can't set alarm irq, err %d\n", ret);
165		return ret;
166	}
167
168	ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD,
169			sizeof(rbuff), rbuff);
170	if (ret < 0) {
171		dev_err(dev, "read counter failed with err %d\n", ret);
172		return ret;
173	}
174
175	for (i = 1; i < sizeof(rbuff); i++) {
176		rticks <<= 8;
177		rticks |= rbuff[i];
178	}
179
180	rtc_current_time = rticks >> 10;
181	if ((seconds - rtc_current_time) > ALM1_VALID_RANGE_IN_SEC)
182		seconds = rtc_current_time - 1;
183
184	ticks = (unsigned long long)seconds << 10;
185	buff[0] = (ticks >> 16) & 0xff;
186	buff[1] = (ticks >> 8) & 0xff;
187	buff[2] = ticks & 0xff;
188
189	ret = tps6586x_writes(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
190	if (ret)
191		dev_err(dev, "programming alarm failed with err %d\n", ret);
192
193	return ret;
194}
195
196static int tps6586x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
197{
198	struct device *tps_dev = to_tps6586x_dev(dev);
199	unsigned long ticks;
200	time64_t seconds;
201	u8 buff[3];
202	int ret;
203
204	ret = tps6586x_reads(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
205	if (ret) {
206		dev_err(dev, "read RTC_ALARM1_HI failed with err %d\n", ret);
207		return ret;
208	}
209
210	ticks = (buff[0] << 16) | (buff[1] << 8) | buff[2];
211	seconds = ticks >> 10;
212
213	rtc_time64_to_tm(seconds, &alrm->time);
214	return 0;
215}
216
217static const struct rtc_class_ops tps6586x_rtc_ops = {
218	.read_time	= tps6586x_rtc_read_time,
219	.set_time	= tps6586x_rtc_set_time,
220	.set_alarm	= tps6586x_rtc_set_alarm,
221	.read_alarm	= tps6586x_rtc_read_alarm,
222	.alarm_irq_enable = tps6586x_rtc_alarm_irq_enable,
223};
224
225static irqreturn_t tps6586x_rtc_irq(int irq, void *data)
226{
227	struct tps6586x_rtc *rtc = data;
228
229	rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
230	return IRQ_HANDLED;
231}
232
233static int tps6586x_rtc_probe(struct platform_device *pdev)
234{
235	struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
236	struct tps6586x_rtc *rtc;
237	int ret;
238
239	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
240	if (!rtc)
241		return -ENOMEM;
242
243	rtc->dev = &pdev->dev;
244	rtc->irq = platform_get_irq(pdev, 0);
245
246	/* 1 kHz tick mode, enable tick counting */
247	ret = tps6586x_update(tps_dev, RTC_CTRL,
248		RTC_ENABLE | OSC_SRC_SEL |
249		((TPS6586X_RTC_CL_SEL_1_5PF << CL_SEL_POS) & CL_SEL_MASK),
250		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
251	if (ret < 0) {
252		dev_err(&pdev->dev, "unable to start counter\n");
253		return ret;
254	}
255
256	device_init_wakeup(&pdev->dev, 1);
257
258	platform_set_drvdata(pdev, rtc);
259	rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
260	if (IS_ERR(rtc->rtc)) {
261		ret = PTR_ERR(rtc->rtc);
262		goto fail_rtc_register;
263	}
264
265	rtc->rtc->ops = &tps6586x_rtc_ops;
266	rtc->rtc->range_max = (1ULL << 30) - 1; /* 30-bit seconds */
267	rtc->rtc->start_secs = mktime64(2009, 1, 1, 0, 0, 0);
268	rtc->rtc->set_start_time = true;
269
 
 
270	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
271				tps6586x_rtc_irq,
272				IRQF_ONESHOT,
273				dev_name(&pdev->dev), rtc);
274	if (ret < 0) {
275		dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n",
276				rtc->irq, ret);
277		goto fail_rtc_register;
278	}
279	disable_irq(rtc->irq);
280
281	ret = rtc_register_device(rtc->rtc);
282	if (ret)
283		goto fail_rtc_register;
284
285	return 0;
286
287fail_rtc_register:
288	tps6586x_update(tps_dev, RTC_CTRL, 0,
289		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
290	return ret;
291};
292
293static int tps6586x_rtc_remove(struct platform_device *pdev)
294{
295	struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
296
297	tps6586x_update(tps_dev, RTC_CTRL, 0,
298		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
299	return 0;
300}
301
302#ifdef CONFIG_PM_SLEEP
303static int tps6586x_rtc_suspend(struct device *dev)
304{
305	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
306
307	if (device_may_wakeup(dev))
308		enable_irq_wake(rtc->irq);
309	return 0;
310}
311
312static int tps6586x_rtc_resume(struct device *dev)
313{
314	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
315
316	if (device_may_wakeup(dev))
317		disable_irq_wake(rtc->irq);
318	return 0;
319}
320#endif
321
322static SIMPLE_DEV_PM_OPS(tps6586x_pm_ops, tps6586x_rtc_suspend,
323			tps6586x_rtc_resume);
324
325static struct platform_driver tps6586x_rtc_driver = {
326	.driver	= {
327		.name	= "tps6586x-rtc",
328		.pm	= &tps6586x_pm_ops,
329	},
330	.probe	= tps6586x_rtc_probe,
331	.remove	= tps6586x_rtc_remove,
332};
333module_platform_driver(tps6586x_rtc_driver);
334
335MODULE_ALIAS("platform:tps6586x-rtc");
336MODULE_DESCRIPTION("TI TPS6586x RTC driver");
337MODULE_AUTHOR("Laxman dewangan <ldewangan@nvidia.com>");
338MODULE_LICENSE("GPL v2");