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1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2/*
3 * Copyright (C) 2005-2014 Intel Corporation
4 */
5/*
6 * Please use this file (commands.h) only for uCode API definitions.
7 * Please use iwl-xxxx-hw.h for hardware-related definitions.
8 * Please use dev.h for driver implementation definitions.
9 */
10
11#ifndef __iwl_commands_h__
12#define __iwl_commands_h__
13
14#include <linux/ieee80211.h>
15#include <linux/types.h>
16
17
18enum {
19 REPLY_ALIVE = 0x1,
20 REPLY_ERROR = 0x2,
21 REPLY_ECHO = 0x3, /* test command */
22
23 /* RXON and QOS commands */
24 REPLY_RXON = 0x10,
25 REPLY_RXON_ASSOC = 0x11,
26 REPLY_QOS_PARAM = 0x13,
27 REPLY_RXON_TIMING = 0x14,
28
29 /* Multi-Station support */
30 REPLY_ADD_STA = 0x18,
31 REPLY_REMOVE_STA = 0x19,
32 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
33 REPLY_TXFIFO_FLUSH = 0x1e,
34
35 /* Security */
36 REPLY_WEPKEY = 0x20,
37
38 /* RX, TX, LEDs */
39 REPLY_TX = 0x1c,
40 REPLY_LEDS_CMD = 0x48,
41 REPLY_TX_LINK_QUALITY_CMD = 0x4e,
42
43 /* WiMAX coexistence */
44 COEX_PRIORITY_TABLE_CMD = 0x5a,
45 COEX_MEDIUM_NOTIFICATION = 0x5b,
46 COEX_EVENT_CMD = 0x5c,
47
48 /* Calibration */
49 TEMPERATURE_NOTIFICATION = 0x62,
50 CALIBRATION_CFG_CMD = 0x65,
51 CALIBRATION_RES_NOTIFICATION = 0x66,
52 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
53
54 /* 802.11h related */
55 REPLY_QUIET_CMD = 0x71, /* not used */
56 REPLY_CHANNEL_SWITCH = 0x72,
57 CHANNEL_SWITCH_NOTIFICATION = 0x73,
58 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
59 SPECTRUM_MEASURE_NOTIFICATION = 0x75,
60
61 /* Power Management */
62 POWER_TABLE_CMD = 0x77,
63 PM_SLEEP_NOTIFICATION = 0x7A,
64 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
65
66 /* Scan commands and notifications */
67 REPLY_SCAN_CMD = 0x80,
68 REPLY_SCAN_ABORT_CMD = 0x81,
69 SCAN_START_NOTIFICATION = 0x82,
70 SCAN_RESULTS_NOTIFICATION = 0x83,
71 SCAN_COMPLETE_NOTIFICATION = 0x84,
72
73 /* IBSS/AP commands */
74 BEACON_NOTIFICATION = 0x90,
75 REPLY_TX_BEACON = 0x91,
76 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
77
78 /* Miscellaneous commands */
79 REPLY_TX_POWER_DBM_CMD = 0x95,
80 QUIET_NOTIFICATION = 0x96, /* not used */
81 REPLY_TX_PWR_TABLE_CMD = 0x97,
82 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
83 TX_ANT_CONFIGURATION_CMD = 0x98,
84 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
85
86 /* Bluetooth device coexistence config command */
87 REPLY_BT_CONFIG = 0x9b,
88
89 /* Statistics */
90 REPLY_STATISTICS_CMD = 0x9c,
91 STATISTICS_NOTIFICATION = 0x9d,
92
93 /* RF-KILL commands and notifications */
94 REPLY_CARD_STATE_CMD = 0xa0,
95 CARD_STATE_NOTIFICATION = 0xa1,
96
97 /* Missed beacons notification */
98 MISSED_BEACONS_NOTIFICATION = 0xa2,
99
100 REPLY_CT_KILL_CONFIG_CMD = 0xa4,
101 SENSITIVITY_CMD = 0xa8,
102 REPLY_PHY_CALIBRATION_CMD = 0xb0,
103 REPLY_RX_PHY_CMD = 0xc0,
104 REPLY_RX_MPDU_CMD = 0xc1,
105 REPLY_RX = 0xc3,
106 REPLY_COMPRESSED_BA = 0xc5,
107
108 /* BT Coex */
109 REPLY_BT_COEX_PRIO_TABLE = 0xcc,
110 REPLY_BT_COEX_PROT_ENV = 0xcd,
111 REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
112
113 /* PAN commands */
114 REPLY_WIPAN_PARAMS = 0xb2,
115 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */
116 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
117 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */
118 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */
119 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */
120 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
121 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
122 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
123
124 REPLY_WOWLAN_PATTERNS = 0xe0,
125 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1,
126 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2,
127 REPLY_WOWLAN_TKIP_PARAMS = 0xe3,
128 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4,
129 REPLY_WOWLAN_GET_STATUS = 0xe5,
130 REPLY_D3_CONFIG = 0xd3,
131
132 REPLY_MAX = 0xff
133};
134
135/*
136 * Minimum number of queues. MAX_NUM is defined in hw specific files.
137 * Set the minimum to accommodate
138 * - 4 standard TX queues
139 * - the command queue
140 * - 4 PAN TX queues
141 * - the PAN multicast queue, and
142 * - the AUX (TX during scan dwell) queue.
143 */
144#define IWL_MIN_NUM_QUEUES 11
145
146/*
147 * Command queue depends on iPAN support.
148 */
149#define IWL_DEFAULT_CMD_QUEUE_NUM 4
150#define IWL_IPAN_CMD_QUEUE_NUM 9
151
152#define IWL_TX_FIFO_BK 0 /* shared */
153#define IWL_TX_FIFO_BE 1
154#define IWL_TX_FIFO_VI 2 /* shared */
155#define IWL_TX_FIFO_VO 3
156#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK
157#define IWL_TX_FIFO_BE_IPAN 4
158#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI
159#define IWL_TX_FIFO_VO_IPAN 5
160/* re-uses the VO FIFO, uCode will properly flush/schedule */
161#define IWL_TX_FIFO_AUX 5
162#define IWL_TX_FIFO_UNUSED 255
163
164#define IWLAGN_CMD_FIFO_NUM 7
165
166/*
167 * This queue number is required for proper operation
168 * because the ucode will stop/start the scheduler as
169 * required.
170 */
171#define IWL_IPAN_MCAST_QUEUE 8
172
173/******************************************************************************
174 * (0)
175 * Commonly used structures and definitions:
176 * Command header, rate_n_flags, txpower
177 *
178 *****************************************************************************/
179
180/**
181 * iwlagn rate_n_flags bit fields
182 *
183 * rate_n_flags format is used in following iwlagn commands:
184 * REPLY_RX (response only)
185 * REPLY_RX_MPDU (response only)
186 * REPLY_TX (both command and response)
187 * REPLY_TX_LINK_QUALITY_CMD
188 *
189 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
190 * 2-0: 0) 6 Mbps
191 * 1) 12 Mbps
192 * 2) 18 Mbps
193 * 3) 24 Mbps
194 * 4) 36 Mbps
195 * 5) 48 Mbps
196 * 6) 54 Mbps
197 * 7) 60 Mbps
198 *
199 * 4-3: 0) Single stream (SISO)
200 * 1) Dual stream (MIMO)
201 * 2) Triple stream (MIMO)
202 *
203 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
204 *
205 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
206 * 3-0: 0xD) 6 Mbps
207 * 0xF) 9 Mbps
208 * 0x5) 12 Mbps
209 * 0x7) 18 Mbps
210 * 0x9) 24 Mbps
211 * 0xB) 36 Mbps
212 * 0x1) 48 Mbps
213 * 0x3) 54 Mbps
214 *
215 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
216 * 6-0: 10) 1 Mbps
217 * 20) 2 Mbps
218 * 55) 5.5 Mbps
219 * 110) 11 Mbps
220 */
221#define RATE_MCS_CODE_MSK 0x7
222#define RATE_MCS_SPATIAL_POS 3
223#define RATE_MCS_SPATIAL_MSK 0x18
224#define RATE_MCS_HT_DUP_POS 5
225#define RATE_MCS_HT_DUP_MSK 0x20
226/* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
227#define RATE_MCS_RATE_MSK 0xff
228
229/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
230#define RATE_MCS_FLAGS_POS 8
231#define RATE_MCS_HT_POS 8
232#define RATE_MCS_HT_MSK 0x100
233
234/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
235#define RATE_MCS_CCK_POS 9
236#define RATE_MCS_CCK_MSK 0x200
237
238/* Bit 10: (1) Use Green Field preamble */
239#define RATE_MCS_GF_POS 10
240#define RATE_MCS_GF_MSK 0x400
241
242/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
243#define RATE_MCS_HT40_POS 11
244#define RATE_MCS_HT40_MSK 0x800
245
246/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
247#define RATE_MCS_DUP_POS 12
248#define RATE_MCS_DUP_MSK 0x1000
249
250/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
251#define RATE_MCS_SGI_POS 13
252#define RATE_MCS_SGI_MSK 0x2000
253
254/**
255 * rate_n_flags Tx antenna masks
256 * bit14:16
257 */
258#define RATE_MCS_ANT_POS 14
259#define RATE_MCS_ANT_A_MSK 0x04000
260#define RATE_MCS_ANT_B_MSK 0x08000
261#define RATE_MCS_ANT_C_MSK 0x10000
262#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
263#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
264#define RATE_ANT_NUM 3
265
266#define POWER_TABLE_NUM_ENTRIES 33
267#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
268#define POWER_TABLE_CCK_ENTRY 32
269
270#define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
271#define IWL_PWR_CCK_ENTRIES 2
272
273/**
274 * struct tx_power_dual_stream
275 *
276 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
277 *
278 * Same format as iwl_tx_power_dual_stream, but __le32
279 */
280struct tx_power_dual_stream {
281 __le32 dw;
282} __packed;
283
284/**
285 * Command REPLY_TX_POWER_DBM_CMD = 0x98
286 * struct iwlagn_tx_power_dbm_cmd
287 */
288#define IWLAGN_TX_POWER_AUTO 0x7f
289#define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
290
291struct iwlagn_tx_power_dbm_cmd {
292 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
293 u8 flags;
294 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
295 u8 reserved;
296} __packed;
297
298/**
299 * Command TX_ANT_CONFIGURATION_CMD = 0x98
300 * This command is used to configure valid Tx antenna.
301 * By default uCode concludes the valid antenna according to the radio flavor.
302 * This command enables the driver to override/modify this conclusion.
303 */
304struct iwl_tx_ant_config_cmd {
305 __le32 valid;
306} __packed;
307
308/******************************************************************************
309 * (0a)
310 * Alive and Error Commands & Responses:
311 *
312 *****************************************************************************/
313
314#define UCODE_VALID_OK cpu_to_le32(0x1)
315
316/**
317 * REPLY_ALIVE = 0x1 (response only, not a command)
318 *
319 * uCode issues this "alive" notification once the runtime image is ready
320 * to receive commands from the driver. This is the *second* "alive"
321 * notification that the driver will receive after rebooting uCode;
322 * this "alive" is indicated by subtype field != 9.
323 *
324 * See comments documenting "BSM" (bootstrap state machine).
325 *
326 * This response includes two pointers to structures within the device's
327 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
328 *
329 * 1) log_event_table_ptr indicates base of the event log. This traces
330 * a 256-entry history of uCode execution within a circular buffer.
331 * Its header format is:
332 *
333 * __le32 log_size; log capacity (in number of entries)
334 * __le32 type; (1) timestamp with each entry, (0) no timestamp
335 * __le32 wraps; # times uCode has wrapped to top of circular buffer
336 * __le32 write_index; next circular buffer entry that uCode would fill
337 *
338 * The header is followed by the circular buffer of log entries. Entries
339 * with timestamps have the following format:
340 *
341 * __le32 event_id; range 0 - 1500
342 * __le32 timestamp; low 32 bits of TSF (of network, if associated)
343 * __le32 data; event_id-specific data value
344 *
345 * Entries without timestamps contain only event_id and data.
346 *
347 *
348 * 2) error_event_table_ptr indicates base of the error log. This contains
349 * information about any uCode error that occurs. For agn, the format
350 * of the error log is defined by struct iwl_error_event_table.
351 *
352 * The Linux driver can print both logs to the system log when a uCode error
353 * occurs.
354 */
355
356/*
357 * Note: This structure is read from the device with IO accesses,
358 * and the reading already does the endian conversion. As it is
359 * read with u32-sized accesses, any members with a different size
360 * need to be ordered correctly though!
361 */
362struct iwl_error_event_table {
363 u32 valid; /* (nonzero) valid, (0) log is empty */
364 u32 error_id; /* type of error */
365 u32 pc; /* program counter */
366 u32 blink1; /* branch link */
367 u32 blink2; /* branch link */
368 u32 ilink1; /* interrupt link */
369 u32 ilink2; /* interrupt link */
370 u32 data1; /* error-specific data */
371 u32 data2; /* error-specific data */
372 u32 line; /* source code line of error */
373 u32 bcon_time; /* beacon timer */
374 u32 tsf_low; /* network timestamp function timer */
375 u32 tsf_hi; /* network timestamp function timer */
376 u32 gp1; /* GP1 timer register */
377 u32 gp2; /* GP2 timer register */
378 u32 gp3; /* GP3 timer register */
379 u32 ucode_ver; /* uCode version */
380 u32 hw_ver; /* HW Silicon version */
381 u32 brd_ver; /* HW board version */
382 u32 log_pc; /* log program counter */
383 u32 frame_ptr; /* frame pointer */
384 u32 stack_ptr; /* stack pointer */
385 u32 hcmd; /* last host command header */
386 u32 isr0; /* isr status register LMPM_NIC_ISR0:
387 * rxtx_flag */
388 u32 isr1; /* isr status register LMPM_NIC_ISR1:
389 * host_flag */
390 u32 isr2; /* isr status register LMPM_NIC_ISR2:
391 * enc_flag */
392 u32 isr3; /* isr status register LMPM_NIC_ISR3:
393 * time_flag */
394 u32 isr4; /* isr status register LMPM_NIC_ISR4:
395 * wico interrupt */
396 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
397 u32 wait_event; /* wait event() caller address */
398 u32 l2p_control; /* L2pControlField */
399 u32 l2p_duration; /* L2pDurationField */
400 u32 l2p_mhvalid; /* L2pMhValidBits */
401 u32 l2p_addr_match; /* L2pAddrMatchStat */
402 u32 lmpm_pmg_sel; /* indicate which clocks are turned on
403 * (LMPM_PMG_SEL) */
404 u32 u_timestamp; /* indicate when the date and time of the
405 * compilation */
406 u32 flow_handler; /* FH read/write pointers, RX credit */
407} __packed;
408
409struct iwl_alive_resp {
410 u8 ucode_minor;
411 u8 ucode_major;
412 __le16 reserved1;
413 u8 sw_rev[8];
414 u8 ver_type;
415 u8 ver_subtype; /* not "9" for runtime alive */
416 __le16 reserved2;
417 __le32 log_event_table_ptr; /* SRAM address for event log */
418 __le32 error_event_table_ptr; /* SRAM address for error log */
419 __le32 timestamp;
420 __le32 is_valid;
421} __packed;
422
423/*
424 * REPLY_ERROR = 0x2 (response only, not a command)
425 */
426struct iwl_error_resp {
427 __le32 error_type;
428 u8 cmd_id;
429 u8 reserved1;
430 __le16 bad_cmd_seq_num;
431 __le32 error_info;
432 __le64 timestamp;
433} __packed;
434
435/******************************************************************************
436 * (1)
437 * RXON Commands & Responses:
438 *
439 *****************************************************************************/
440
441/*
442 * Rx config defines & structure
443 */
444/* rx_config device types */
445enum {
446 RXON_DEV_TYPE_AP = 1,
447 RXON_DEV_TYPE_ESS = 3,
448 RXON_DEV_TYPE_IBSS = 4,
449 RXON_DEV_TYPE_SNIFFER = 6,
450 RXON_DEV_TYPE_CP = 7,
451 RXON_DEV_TYPE_2STA = 8,
452 RXON_DEV_TYPE_P2P = 9,
453};
454
455
456#define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
457#define RXON_RX_CHAIN_DRIVER_FORCE_POS (0)
458#define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
459#define RXON_RX_CHAIN_VALID_POS (1)
460#define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
461#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
462#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
463#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
464#define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
465#define RXON_RX_CHAIN_CNT_POS (10)
466#define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
467#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
468#define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
469#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
470
471/* rx_config flags */
472/* band & modulation selection */
473#define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
474#define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
475/* auto detection enable */
476#define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
477/* TGg protection when tx */
478#define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
479/* cck short slot & preamble */
480#define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
481#define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
482/* antenna selection */
483#define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
484#define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
485#define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
486#define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
487/* radar detection enable */
488#define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
489#define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
490/* rx response to host with 8-byte TSF
491* (according to ON_AIR deassertion) */
492#define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
493
494
495/* HT flags */
496#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
497#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
498
499#define RXON_FLG_HT_OPERATING_MODE_POS (23)
500
501#define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
502#define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23)
503
504#define RXON_FLG_CHANNEL_MODE_POS (25)
505#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
506
507/* channel mode */
508enum {
509 CHANNEL_MODE_LEGACY = 0,
510 CHANNEL_MODE_PURE_40 = 1,
511 CHANNEL_MODE_MIXED = 2,
512 CHANNEL_MODE_RESERVED = 3,
513};
514#define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
515#define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
516#define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
517
518/* CTS to self (if spec allows) flag */
519#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
520
521/* rx_config filter flags */
522/* accept all data frames */
523#define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
524/* pass control & management to host */
525#define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
526/* accept multi-cast */
527#define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
528/* don't decrypt uni-cast frames */
529#define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
530/* don't decrypt multi-cast frames */
531#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
532/* STA is associated */
533#define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
534/* transfer to host non bssid beacons in associated state */
535#define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
536
537/**
538 * REPLY_RXON = 0x10 (command, has simple generic response)
539 *
540 * RXON tunes the radio tuner to a service channel, and sets up a number
541 * of parameters that are used primarily for Rx, but also for Tx operations.
542 *
543 * NOTE: When tuning to a new channel, driver must set the
544 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent
545 * info within the device, including the station tables, tx retry
546 * rate tables, and txpower tables. Driver must build a new station
547 * table and txpower table before transmitting anything on the RXON
548 * channel.
549 *
550 * NOTE: All RXONs wipe clean the internal txpower table. Driver must
551 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
552 * regardless of whether RXON_FILTER_ASSOC_MSK is set.
553 */
554
555struct iwl_rxon_cmd {
556 u8 node_addr[6];
557 __le16 reserved1;
558 u8 bssid_addr[6];
559 __le16 reserved2;
560 u8 wlap_bssid_addr[6];
561 __le16 reserved3;
562 u8 dev_type;
563 u8 air_propagation;
564 __le16 rx_chain;
565 u8 ofdm_basic_rates;
566 u8 cck_basic_rates;
567 __le16 assoc_id;
568 __le32 flags;
569 __le32 filter_flags;
570 __le16 channel;
571 u8 ofdm_ht_single_stream_basic_rates;
572 u8 ofdm_ht_dual_stream_basic_rates;
573 u8 ofdm_ht_triple_stream_basic_rates;
574 u8 reserved5;
575 __le16 acquisition_data;
576 __le16 reserved6;
577} __packed;
578
579/*
580 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
581 */
582struct iwl_rxon_assoc_cmd {
583 __le32 flags;
584 __le32 filter_flags;
585 u8 ofdm_basic_rates;
586 u8 cck_basic_rates;
587 __le16 reserved1;
588 u8 ofdm_ht_single_stream_basic_rates;
589 u8 ofdm_ht_dual_stream_basic_rates;
590 u8 ofdm_ht_triple_stream_basic_rates;
591 u8 reserved2;
592 __le16 rx_chain_select_flags;
593 __le16 acquisition_data;
594 __le32 reserved3;
595} __packed;
596
597#define IWL_CONN_MAX_LISTEN_INTERVAL 10
598#define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */
599
600/*
601 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
602 */
603struct iwl_rxon_time_cmd {
604 __le64 timestamp;
605 __le16 beacon_interval;
606 __le16 atim_window;
607 __le32 beacon_init_val;
608 __le16 listen_interval;
609 u8 dtim_period;
610 u8 delta_cp_bss_tbtts;
611} __packed;
612
613/*
614 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
615 */
616/**
617 * struct iwl5000_channel_switch_cmd
618 * @band: 0- 5.2GHz, 1- 2.4GHz
619 * @expect_beacon: 0- resume transmits after channel switch
620 * 1- wait for beacon to resume transmits
621 * @channel: new channel number
622 * @rxon_flags: Rx on flags
623 * @rxon_filter_flags: filtering parameters
624 * @switch_time: switch time in extended beacon format
625 * @reserved: reserved bytes
626 */
627struct iwl5000_channel_switch_cmd {
628 u8 band;
629 u8 expect_beacon;
630 __le16 channel;
631 __le32 rxon_flags;
632 __le32 rxon_filter_flags;
633 __le32 switch_time;
634 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
635} __packed;
636
637/**
638 * struct iwl6000_channel_switch_cmd
639 * @band: 0- 5.2GHz, 1- 2.4GHz
640 * @expect_beacon: 0- resume transmits after channel switch
641 * 1- wait for beacon to resume transmits
642 * @channel: new channel number
643 * @rxon_flags: Rx on flags
644 * @rxon_filter_flags: filtering parameters
645 * @switch_time: switch time in extended beacon format
646 * @reserved: reserved bytes
647 */
648struct iwl6000_channel_switch_cmd {
649 u8 band;
650 u8 expect_beacon;
651 __le16 channel;
652 __le32 rxon_flags;
653 __le32 rxon_filter_flags;
654 __le32 switch_time;
655 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
656} __packed;
657
658/*
659 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
660 */
661struct iwl_csa_notification {
662 __le16 band;
663 __le16 channel;
664 __le32 status; /* 0 - OK, 1 - fail */
665} __packed;
666
667/******************************************************************************
668 * (2)
669 * Quality-of-Service (QOS) Commands & Responses:
670 *
671 *****************************************************************************/
672
673/**
674 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
675 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
676 *
677 * @cw_min: Contention window, start value in numbers of slots.
678 * Should be a power-of-2, minus 1. Device's default is 0x0f.
679 * @cw_max: Contention window, max value in numbers of slots.
680 * Should be a power-of-2, minus 1. Device's default is 0x3f.
681 * @aifsn: Number of slots in Arbitration Interframe Space (before
682 * performing random backoff timing prior to Tx). Device default 1.
683 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0.
684 *
685 * Device will automatically increase contention window by (2*CW) + 1 for each
686 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW
687 * value, to cap the CW value.
688 */
689struct iwl_ac_qos {
690 __le16 cw_min;
691 __le16 cw_max;
692 u8 aifsn;
693 u8 reserved1;
694 __le16 edca_txop;
695} __packed;
696
697/* QoS flags defines */
698#define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
699#define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
700#define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
701
702/* Number of Access Categories (AC) (EDCA), queues 0..3 */
703#define AC_NUM 4
704
705/*
706 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
707 *
708 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
709 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
710 */
711struct iwl_qosparam_cmd {
712 __le32 qos_flags;
713 struct iwl_ac_qos ac[AC_NUM];
714} __packed;
715
716/******************************************************************************
717 * (3)
718 * Add/Modify Stations Commands & Responses:
719 *
720 *****************************************************************************/
721/*
722 * Multi station support
723 */
724
725/* Special, dedicated locations within device's station table */
726#define IWL_AP_ID 0
727#define IWL_AP_ID_PAN 1
728#define IWL_STA_ID 2
729#define IWLAGN_PAN_BCAST_ID 14
730#define IWLAGN_BROADCAST_ID 15
731#define IWLAGN_STATION_COUNT 16
732
733#define IWL_TID_NON_QOS IWL_MAX_TID_COUNT
734
735#define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2)
736#define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8)
737#define STA_FLG_PAN_STATION cpu_to_le32(1 << 13)
738#define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
739#define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
740#define STA_FLG_MAX_AGG_SIZE_POS (19)
741#define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
742#define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21)
743#define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
744#define STA_FLG_AGG_MPDU_DENSITY_POS (23)
745#define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
746
747/* Use in mode field. 1: modify existing entry, 0: add new station entry */
748#define STA_CONTROL_MODIFY_MSK 0x01
749
750/* key flags __le16*/
751#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
752#define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
753#define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
754#define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
755#define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
756
757#define STA_KEY_FLG_KEYID_POS 8
758#define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
759/* wep key is either from global key (0) or from station info array (1) */
760#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
761
762/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
763#define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
764#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
765#define STA_KEY_MAX_NUM 8
766#define STA_KEY_MAX_NUM_PAN 16
767/* must not match WEP_INVALID_OFFSET */
768#define IWLAGN_HW_KEY_DEFAULT 0xfe
769
770/* Flags indicate whether to modify vs. don't change various station params */
771#define STA_MODIFY_KEY_MASK 0x01
772#define STA_MODIFY_TID_DISABLE_TX 0x02
773#define STA_MODIFY_TX_RATE_MSK 0x04
774#define STA_MODIFY_ADDBA_TID_MSK 0x08
775#define STA_MODIFY_DELBA_TID_MSK 0x10
776#define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
777
778/* agn */
779struct iwl_keyinfo {
780 __le16 key_flags;
781 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
782 u8 reserved1;
783 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
784 u8 key_offset;
785 u8 reserved2;
786 u8 key[16]; /* 16-byte unicast decryption key */
787 __le64 tx_secur_seq_cnt;
788 __le64 hw_tkip_mic_rx_key;
789 __le64 hw_tkip_mic_tx_key;
790} __packed;
791
792/**
793 * struct sta_id_modify
794 * @addr[ETH_ALEN]: station's MAC address
795 * @sta_id: index of station in uCode's station table
796 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
797 *
798 * Driver selects unused table index when adding new station,
799 * or the index to a pre-existing station entry when modifying that station.
800 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
801 *
802 * modify_mask flags select which parameters to modify vs. leave alone.
803 */
804struct sta_id_modify {
805 u8 addr[ETH_ALEN];
806 __le16 reserved1;
807 u8 sta_id;
808 u8 modify_mask;
809 __le16 reserved2;
810} __packed;
811
812/*
813 * REPLY_ADD_STA = 0x18 (command)
814 *
815 * The device contains an internal table of per-station information,
816 * with info on security keys, aggregation parameters, and Tx rates for
817 * initial Tx attempt and any retries (agn devices uses
818 * REPLY_TX_LINK_QUALITY_CMD,
819 *
820 * REPLY_ADD_STA sets up the table entry for one station, either creating
821 * a new entry, or modifying a pre-existing one.
822 *
823 * NOTE: RXON command (without "associated" bit set) wipes the station table
824 * clean. Moving into RF_KILL state does this also. Driver must set up
825 * new station table before transmitting anything on the RXON channel
826 * (except active scans or active measurements; those commands carry
827 * their own txpower/rate setup data).
828 *
829 * When getting started on a new channel, driver must set up the
830 * IWL_BROADCAST_ID entry (last entry in the table). For a client
831 * station in a BSS, once an AP is selected, driver sets up the AP STA
832 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP
833 * are all that are needed for a BSS client station. If the device is
834 * used as AP, or in an IBSS network, driver must set up station table
835 * entries for all STAs in network, starting with index IWL_STA_ID.
836 */
837
838struct iwl_addsta_cmd {
839 u8 mode; /* 1: modify existing, 0: add new station */
840 u8 reserved[3];
841 struct sta_id_modify sta;
842 struct iwl_keyinfo key;
843 __le32 station_flags; /* STA_FLG_* */
844 __le32 station_flags_msk; /* STA_FLG_* */
845
846 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
847 * corresponding to bit (e.g. bit 5 controls TID 5).
848 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
849 __le16 tid_disable_tx;
850 __le16 legacy_reserved;
851
852 /* TID for which to add block-ack support.
853 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
854 u8 add_immediate_ba_tid;
855
856 /* TID for which to remove block-ack support.
857 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
858 u8 remove_immediate_ba_tid;
859
860 /* Starting Sequence Number for added block-ack support.
861 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
862 __le16 add_immediate_ba_ssn;
863
864 /*
865 * Number of packets OK to transmit to station even though
866 * it is asleep -- used to synchronise PS-poll and u-APSD
867 * responses while ucode keeps track of STA sleep state.
868 */
869 __le16 sleep_tx_count;
870
871 __le16 reserved2;
872} __packed;
873
874
875#define ADD_STA_SUCCESS_MSK 0x1
876#define ADD_STA_NO_ROOM_IN_TABLE 0x2
877#define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4
878#define ADD_STA_MODIFY_NON_EXIST_STA 0x8
879/*
880 * REPLY_ADD_STA = 0x18 (response)
881 */
882struct iwl_add_sta_resp {
883 u8 status; /* ADD_STA_* */
884} __packed;
885
886#define REM_STA_SUCCESS_MSK 0x1
887/*
888 * REPLY_REM_STA = 0x19 (response)
889 */
890struct iwl_rem_sta_resp {
891 u8 status;
892} __packed;
893
894/*
895 * REPLY_REM_STA = 0x19 (command)
896 */
897struct iwl_rem_sta_cmd {
898 u8 num_sta; /* number of removed stations */
899 u8 reserved[3];
900 u8 addr[ETH_ALEN]; /* MAC addr of the first station */
901 u8 reserved2[2];
902} __packed;
903
904
905/* WiFi queues mask */
906#define IWL_SCD_BK_MSK BIT(0)
907#define IWL_SCD_BE_MSK BIT(1)
908#define IWL_SCD_VI_MSK BIT(2)
909#define IWL_SCD_VO_MSK BIT(3)
910#define IWL_SCD_MGMT_MSK BIT(3)
911
912/* PAN queues mask */
913#define IWL_PAN_SCD_BK_MSK BIT(4)
914#define IWL_PAN_SCD_BE_MSK BIT(5)
915#define IWL_PAN_SCD_VI_MSK BIT(6)
916#define IWL_PAN_SCD_VO_MSK BIT(7)
917#define IWL_PAN_SCD_MGMT_MSK BIT(7)
918#define IWL_PAN_SCD_MULTICAST_MSK BIT(8)
919
920#define IWL_AGG_TX_QUEUE_MSK 0xffc00
921
922#define IWL_DROP_ALL BIT(1)
923
924/*
925 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
926 *
927 * When using full FIFO flush this command checks the scheduler HW block WR/RD
928 * pointers to check if all the frames were transferred by DMA into the
929 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
930 * empty the command can finish.
931 * This command is used to flush the TXFIFO from transmit commands, it may
932 * operate on single or multiple queues, the command queue can't be flushed by
933 * this command. The command response is returned when all the queue flush
934 * operations are done. Each TX command flushed return response with the FLUSH
935 * status set in the TX response status. When FIFO flush operation is used,
936 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
937 * are set.
938 *
939 * @queue_control: bit mask for which queues to flush
940 * @flush_control: flush controls
941 * 0: Dump single MSDU
942 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
943 * 2: Dump all FIFO
944 */
945struct iwl_txfifo_flush_cmd_v3 {
946 __le32 queue_control;
947 __le16 flush_control;
948 __le16 reserved;
949} __packed;
950
951struct iwl_txfifo_flush_cmd_v2 {
952 __le16 queue_control;
953 __le16 flush_control;
954} __packed;
955
956/*
957 * REPLY_WEP_KEY = 0x20
958 */
959struct iwl_wep_key {
960 u8 key_index;
961 u8 key_offset;
962 u8 reserved1[2];
963 u8 key_size;
964 u8 reserved2[3];
965 u8 key[16];
966} __packed;
967
968struct iwl_wep_cmd {
969 u8 num_keys;
970 u8 global_key_type;
971 u8 flags;
972 u8 reserved;
973 struct iwl_wep_key key[];
974} __packed;
975
976#define WEP_KEY_WEP_TYPE 1
977#define WEP_KEYS_MAX 4
978#define WEP_INVALID_OFFSET 0xff
979#define WEP_KEY_LEN_64 5
980#define WEP_KEY_LEN_128 13
981
982/******************************************************************************
983 * (4)
984 * Rx Responses:
985 *
986 *****************************************************************************/
987
988#define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
989#define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
990
991#define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
992#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
993#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
994#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
995#define RX_RES_PHY_FLAGS_ANTENNA_MSK 0x70
996#define RX_RES_PHY_FLAGS_ANTENNA_POS 4
997#define RX_RES_PHY_FLAGS_AGG_MSK cpu_to_le16(1 << 7)
998
999#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
1000#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
1001#define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
1002#define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
1003#define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
1004#define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8)
1005
1006#define RX_RES_STATUS_STATION_FOUND (1<<6)
1007#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7)
1008
1009#define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
1010#define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
1011#define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
1012#define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
1013#define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
1014
1015#define RX_MPDU_RES_STATUS_ICV_OK (0x20)
1016#define RX_MPDU_RES_STATUS_MIC_OK (0x40)
1017#define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7)
1018#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1019
1020
1021#define IWLAGN_RX_RES_PHY_CNT 8
1022#define IWLAGN_RX_RES_AGC_IDX 1
1023#define IWLAGN_RX_RES_RSSI_AB_IDX 2
1024#define IWLAGN_RX_RES_RSSI_C_IDX 3
1025#define IWLAGN_OFDM_AGC_MSK 0xfe00
1026#define IWLAGN_OFDM_AGC_BIT_POS 9
1027#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1028#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1029#define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1030#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1031#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1032#define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1033#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1034#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1035#define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1036
1037struct iwlagn_non_cfg_phy {
1038 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */
1039} __packed;
1040
1041
1042/*
1043 * REPLY_RX = 0xc3 (response only, not a command)
1044 * Used only for legacy (non 11n) frames.
1045 */
1046struct iwl_rx_phy_res {
1047 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
1048 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
1049 u8 stat_id; /* configurable DSP phy data set ID */
1050 u8 reserved1;
1051 __le64 timestamp; /* TSF at on air rise */
1052 __le32 beacon_time_stamp; /* beacon at on-air rise */
1053 __le16 phy_flags; /* general phy flags: band, modulation, ... */
1054 __le16 channel; /* channel number */
1055 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
1056 __le32 rate_n_flags; /* RATE_MCS_* */
1057 __le16 byte_count; /* frame's byte-count */
1058 __le16 frame_time; /* frame's time on the air */
1059} __packed;
1060
1061struct iwl_rx_mpdu_res_start {
1062 __le16 byte_count;
1063 __le16 reserved;
1064} __packed;
1065
1066
1067/******************************************************************************
1068 * (5)
1069 * Tx Commands & Responses:
1070 *
1071 * Driver must place each REPLY_TX command into one of the prioritized Tx
1072 * queues in host DRAM, shared between driver and device (see comments for
1073 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode
1074 * are preparing to transmit, the device pulls the Tx command over the PCI
1075 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1076 * from which data will be transmitted.
1077 *
1078 * uCode handles all timing and protocol related to control frames
1079 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler
1080 * handle reception of block-acks; uCode updates the host driver via
1081 * REPLY_COMPRESSED_BA.
1082 *
1083 * uCode handles retrying Tx when an ACK is expected but not received.
1084 * This includes trying lower data rates than the one requested in the Tx
1085 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn).
1086 *
1087 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1088 * This command must be executed after every RXON command, before Tx can occur.
1089 *****************************************************************************/
1090
1091/* REPLY_TX Tx flags field */
1092
1093/*
1094 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
1095 * before this frame. if CTS-to-self required check
1096 * RXON_FLG_SELF_CTS_EN status.
1097 */
1098#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
1099
1100/* 1: Expect ACK from receiving station
1101 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1102 * Set this for unicast frames, but not broadcast/multicast. */
1103#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
1104
1105/* For agn devices:
1106 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1107 * Tx command's initial_rate_index indicates first rate to try;
1108 * uCode walks through table for additional Tx attempts.
1109 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1110 * This rate will be used for all Tx attempts; it will not be scaled. */
1111#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
1112
1113/* 1: Expect immediate block-ack.
1114 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
1115#define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
1116
1117/* Tx antenna selection field; reserved (0) for agn devices. */
1118#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1119
1120/* 1: Ignore Bluetooth priority for this frame.
1121 * 0: Delay Tx until Bluetooth device is done (normal usage). */
1122#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
1123
1124/* 1: uCode overrides sequence control field in MAC header.
1125 * 0: Driver provides sequence control field in MAC header.
1126 * Set this for management frames, non-QOS data frames, non-unicast frames,
1127 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
1128#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
1129
1130/* 1: This frame is non-last MPDU; more fragments are coming.
1131 * 0: Last fragment, or not using fragmentation. */
1132#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
1133
1134/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1135 * 0: No TSF required in outgoing frame.
1136 * Set this for transmitting beacons and probe responses. */
1137#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
1138
1139/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1140 * alignment of frame's payload data field.
1141 * 0: No pad
1142 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1143 * field (but not both). Driver must align frame data (i.e. data following
1144 * MAC header) to DWORD boundary. */
1145#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
1146
1147/* accelerate aggregation support
1148 * 0 - no CCMP encryption; 1 - CCMP encryption */
1149#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
1150
1151/* HCCA-AP - disable duration overwriting. */
1152#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
1153
1154
1155/*
1156 * TX command security control
1157 */
1158#define TX_CMD_SEC_WEP 0x01
1159#define TX_CMD_SEC_CCM 0x02
1160#define TX_CMD_SEC_TKIP 0x03
1161#define TX_CMD_SEC_MSK 0x03
1162#define TX_CMD_SEC_SHIFT 6
1163#define TX_CMD_SEC_KEY128 0x08
1164
1165/*
1166 * REPLY_TX = 0x1c (command)
1167 */
1168
1169/*
1170 * Used for managing Tx retries when expecting block-acks.
1171 * Driver should set these fields to 0.
1172 */
1173struct iwl_dram_scratch {
1174 u8 try_cnt; /* Tx attempts */
1175 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */
1176 __le16 reserved;
1177} __packed;
1178
1179struct iwl_tx_cmd {
1180 /*
1181 * MPDU byte count:
1182 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1183 * + 8 byte IV for CCM or TKIP (not used for WEP)
1184 * + Data payload
1185 * + 8-byte MIC (not used for CCM/WEP)
1186 * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1187 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1188 * Range: 14-2342 bytes.
1189 */
1190 __le16 len;
1191
1192 /*
1193 * MPDU or MSDU byte count for next frame.
1194 * Used for fragmentation and bursting, but not 11n aggregation.
1195 * Same as "len", but for next frame. Set to 0 if not applicable.
1196 */
1197 __le16 next_frame_len;
1198
1199 __le32 tx_flags; /* TX_CMD_FLG_* */
1200
1201 /* uCode may modify this field of the Tx command (in host DRAM!).
1202 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
1203 struct iwl_dram_scratch scratch;
1204
1205 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1206 __le32 rate_n_flags; /* RATE_MCS_* */
1207
1208 /* Index of destination station in uCode's station table */
1209 u8 sta_id;
1210
1211 /* Type of security encryption: CCM or TKIP */
1212 u8 sec_ctl; /* TX_CMD_SEC_* */
1213
1214 /*
1215 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1216 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for
1217 * data frames, this field may be used to selectively reduce initial
1218 * rate (via non-0 value) for special frames (e.g. management), while
1219 * still supporting rate scaling for all frames.
1220 */
1221 u8 initial_rate_index;
1222 u8 reserved;
1223 u8 key[16];
1224 __le16 next_frame_flags;
1225 __le16 reserved2;
1226 union {
1227 __le32 life_time;
1228 __le32 attempt;
1229 } stop_time;
1230
1231 /* Host DRAM physical address pointer to "scratch" in this command.
1232 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */
1233 __le32 dram_lsb_ptr;
1234 u8 dram_msb_ptr;
1235
1236 u8 rts_retry_limit; /*byte 50 */
1237 u8 data_retry_limit; /*byte 51 */
1238 u8 tid_tspec;
1239 union {
1240 __le16 pm_frame_timeout;
1241 __le16 attempt_duration;
1242 } timeout;
1243
1244 /*
1245 * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1246 * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1247 */
1248 __le16 driver_txop;
1249
1250 /*
1251 * MAC header goes here, followed by 2 bytes padding if MAC header
1252 * length is 26 or 30 bytes, followed by payload data
1253 */
1254 union {
1255 DECLARE_FLEX_ARRAY(u8, payload);
1256 DECLARE_FLEX_ARRAY(struct ieee80211_hdr, hdr);
1257 };
1258} __packed;
1259
1260/*
1261 * TX command response is sent after *agn* transmission attempts.
1262 *
1263 * both postpone and abort status are expected behavior from uCode. there is
1264 * no special operation required from driver; except for RFKILL_FLUSH,
1265 * which required tx flush host command to flush all the tx frames in queues
1266 */
1267enum {
1268 TX_STATUS_SUCCESS = 0x01,
1269 TX_STATUS_DIRECT_DONE = 0x02,
1270 /* postpone TX */
1271 TX_STATUS_POSTPONE_DELAY = 0x40,
1272 TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1273 TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1274 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1275 TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1276 /* abort TX */
1277 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
1278 TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1279 TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1280 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
1281 TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1282 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
1283 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1284 TX_STATUS_FAIL_DEST_PS = 0x88,
1285 TX_STATUS_FAIL_HOST_ABORTED = 0x89,
1286 TX_STATUS_FAIL_BT_RETRY = 0x8a,
1287 TX_STATUS_FAIL_STA_INVALID = 0x8b,
1288 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1289 TX_STATUS_FAIL_TID_DISABLE = 0x8d,
1290 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
1291 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1292 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1293 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
1294};
1295
1296#define TX_PACKET_MODE_REGULAR 0x0000
1297#define TX_PACKET_MODE_BURST_SEQ 0x0100
1298#define TX_PACKET_MODE_BURST_FIRST 0x0200
1299
1300enum {
1301 TX_POWER_PA_NOT_ACTIVE = 0x0,
1302};
1303
1304enum {
1305 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
1306 TX_STATUS_DELAY_MSK = 0x00000040,
1307 TX_STATUS_ABORT_MSK = 0x00000080,
1308 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
1309 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
1310 TX_RESERVED = 0x00780000, /* bits 19:22 */
1311 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
1312 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1313};
1314
1315/* *******************************
1316 * TX aggregation status
1317 ******************************* */
1318
1319enum {
1320 AGG_TX_STATE_TRANSMITTED = 0x00,
1321 AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1322 AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1323 AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1324 AGG_TX_STATE_ABORT_MSK = 0x08,
1325 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1326 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1327 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1328 AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1329 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1330 AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1331 AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1332 AGG_TX_STATE_DELAY_TX_MSK = 0x400
1333};
1334
1335#define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */
1336#define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */
1337#define AGG_TX_TRY_POS 12
1338
1339#define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1340 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1341 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
1342
1343/* # tx attempts for first frame in aggregation */
1344#define AGG_TX_STATE_TRY_CNT_POS 12
1345#define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1346
1347/* Command ID and sequence number of Tx command for this frame */
1348#define AGG_TX_STATE_SEQ_NUM_POS 16
1349#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1350
1351/*
1352 * REPLY_TX = 0x1c (response)
1353 *
1354 * This response may be in one of two slightly different formats, indicated
1355 * by the frame_count field:
1356 *
1357 * 1) No aggregation (frame_count == 1). This reports Tx results for
1358 * a single frame. Multiple attempts, at various bit rates, may have
1359 * been made for this frame.
1360 *
1361 * 2) Aggregation (frame_count > 1). This reports Tx results for
1362 * 2 or more frames that used block-acknowledge. All frames were
1363 * transmitted at same rate. Rate scaling may have been used if first
1364 * frame in this new agg block failed in previous agg block(s).
1365 *
1366 * Note that, for aggregation, ACK (block-ack) status is not delivered here;
1367 * block-ack has not been received by the time the agn device records
1368 * this status.
1369 * This status relates to reasons the tx might have been blocked or aborted
1370 * within the sending station (this agn device), rather than whether it was
1371 * received successfully by the destination station.
1372 */
1373struct agg_tx_status {
1374 __le16 status;
1375 __le16 sequence;
1376} __packed;
1377
1378/* refer to ra_tid */
1379#define IWLAGN_TX_RES_TID_POS 0
1380#define IWLAGN_TX_RES_TID_MSK 0x0f
1381#define IWLAGN_TX_RES_RA_POS 4
1382#define IWLAGN_TX_RES_RA_MSK 0xf0
1383
1384struct iwlagn_tx_resp {
1385 u8 frame_count; /* 1 no aggregation, >1 aggregation */
1386 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1387 u8 failure_rts; /* # failures due to unsuccessful RTS */
1388 u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1389
1390 /* For non-agg: Rate at which frame was successful.
1391 * For agg: Rate at which all frames were transmitted. */
1392 __le32 rate_n_flags; /* RATE_MCS_* */
1393
1394 /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1395 * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1396 __le16 wireless_media_time; /* uSecs */
1397
1398 u8 pa_status; /* RF power amplifier measurement (not used) */
1399 u8 pa_integ_res_a[3];
1400 u8 pa_integ_res_b[3];
1401 u8 pa_integ_res_C[3];
1402
1403 __le32 tfd_info;
1404 __le16 seq_ctl;
1405 __le16 byte_cnt;
1406 u8 tlc_info;
1407 u8 ra_tid; /* tid (0:3), sta_id (4:7) */
1408 __le16 frame_ctrl;
1409 /*
1410 * For non-agg: frame status TX_STATUS_*
1411 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1412 * fields follow this one, up to frame_count.
1413 * Bit fields:
1414 * 11- 0: AGG_TX_STATE_* status code
1415 * 15-12: Retry count for 1st frame in aggregation (retries
1416 * occur if tx failed for this frame when it was a
1417 * member of a previous aggregation block). If rate
1418 * scaling is used, retry count indicates the rate
1419 * table entry used for all frames in the new agg.
1420 * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1421 */
1422 struct agg_tx_status status; /* TX status (in aggregation -
1423 * status of 1st frame) */
1424} __packed;
1425/*
1426 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
1427 *
1428 * Reports Block-Acknowledge from recipient station
1429 */
1430struct iwl_compressed_ba_resp {
1431 __le32 sta_addr_lo32;
1432 __le16 sta_addr_hi16;
1433 __le16 reserved;
1434
1435 /* Index of recipient (BA-sending) station in uCode's station table */
1436 u8 sta_id;
1437 u8 tid;
1438 __le16 seq_ctl;
1439 __le64 bitmap;
1440 __le16 scd_flow;
1441 __le16 scd_ssn;
1442 u8 txed; /* number of frames sent */
1443 u8 txed_2_done; /* number of frames acked */
1444 __le16 reserved1;
1445} __packed;
1446
1447/*
1448 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
1449 *
1450 */
1451
1452/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
1453#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
1454
1455/* # of EDCA prioritized tx fifos */
1456#define LINK_QUAL_AC_NUM AC_NUM
1457
1458/* # entries in rate scale table to support Tx retries */
1459#define LINK_QUAL_MAX_RETRY_NUM 16
1460
1461/* Tx antenna selection values */
1462#define LINK_QUAL_ANT_A_MSK (1 << 0)
1463#define LINK_QUAL_ANT_B_MSK (1 << 1)
1464#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1465
1466
1467/**
1468 * struct iwl_link_qual_general_params
1469 *
1470 * Used in REPLY_TX_LINK_QUALITY_CMD
1471 */
1472struct iwl_link_qual_general_params {
1473 u8 flags;
1474
1475 /* No entries at or above this (driver chosen) index contain MIMO */
1476 u8 mimo_delimiter;
1477
1478 /* Best single antenna to use for single stream (legacy, SISO). */
1479 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */
1480
1481 /* Best antennas to use for MIMO */
1482 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */
1483
1484 /*
1485 * If driver needs to use different initial rates for different
1486 * EDCA QOS access categories (as implemented by tx fifos 0-3),
1487 * this table will set that up, by indicating the indexes in the
1488 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1489 * Otherwise, driver should set all entries to 0.
1490 *
1491 * Entry usage:
1492 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1493 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1494 */
1495 u8 start_rate_index[LINK_QUAL_AC_NUM];
1496} __packed;
1497
1498#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
1499#define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
1500#define LINK_QUAL_AGG_TIME_LIMIT_MIN (100)
1501
1502#define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1503#define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1504#define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1505
1506#define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63)
1507#define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
1508#define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
1509
1510/**
1511 * struct iwl_link_qual_agg_params
1512 *
1513 * Used in REPLY_TX_LINK_QUALITY_CMD
1514 */
1515struct iwl_link_qual_agg_params {
1516
1517 /*
1518 *Maximum number of uSec in aggregation.
1519 * default set to 4000 (4 milliseconds) if not configured in .cfg
1520 */
1521 __le16 agg_time_limit;
1522
1523 /*
1524 * Number of Tx retries allowed for a frame, before that frame will
1525 * no longer be considered for the start of an aggregation sequence
1526 * (scheduler will then try to tx it as single frame).
1527 * Driver should set this to 3.
1528 */
1529 u8 agg_dis_start_th;
1530
1531 /*
1532 * Maximum number of frames in aggregation.
1533 * 0 = no limit (default). 1 = no aggregation.
1534 * Other values = max # frames in aggregation.
1535 */
1536 u8 agg_frame_cnt_limit;
1537
1538 __le32 reserved;
1539} __packed;
1540
1541/*
1542 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
1543 *
1544 * For agn devices
1545 *
1546 * Each station in the agn device's internal station table has its own table
1547 * of 16
1548 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1549 * an ACK is not received. This command replaces the entire table for
1550 * one station.
1551 *
1552 * NOTE: Station must already be in agn device's station table.
1553 * Use REPLY_ADD_STA.
1554 *
1555 * The rate scaling procedures described below work well. Of course, other
1556 * procedures are possible, and may work better for particular environments.
1557 *
1558 *
1559 * FILLING THE RATE TABLE
1560 *
1561 * Given a particular initial rate and mode, as determined by the rate
1562 * scaling algorithm described below, the Linux driver uses the following
1563 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1564 * Link Quality command:
1565 *
1566 *
1567 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate:
1568 * a) Use this same initial rate for first 3 entries.
1569 * b) Find next lower available rate using same mode (SISO or MIMO),
1570 * use for next 3 entries. If no lower rate available, switch to
1571 * legacy mode (no HT40 channel, no MIMO, no short guard interval).
1572 * c) If using MIMO, set command's mimo_delimiter to number of entries
1573 * using MIMO (3 or 6).
1574 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
1575 * no MIMO, no short guard interval), at the next lower bit rate
1576 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1577 * legacy procedure for remaining table entries.
1578 *
1579 * 2) If using legacy initial rate:
1580 * a) Use the initial rate for only one entry.
1581 * b) For each following entry, reduce the rate to next lower available
1582 * rate, until reaching the lowest available rate.
1583 * c) When reducing rate, also switch antenna selection.
1584 * d) Once lowest available rate is reached, repeat this rate until
1585 * rate table is filled (16 entries), switching antenna each entry.
1586 *
1587 *
1588 * ACCUMULATING HISTORY
1589 *
1590 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1591 * uses two sets of frame Tx success history: One for the current/active
1592 * modulation mode, and one for a speculative/search mode that is being
1593 * attempted. If the speculative mode turns out to be more effective (i.e.
1594 * actual transfer rate is better), then the driver continues to use the
1595 * speculative mode as the new current active mode.
1596 *
1597 * Each history set contains, separately for each possible rate, data for a
1598 * sliding window of the 62 most recent tx attempts at that rate. The data
1599 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1600 * and attempted frames, from which the driver can additionally calculate a
1601 * success ratio (success / attempted) and number of failures
1602 * (attempted - success), and control the size of the window (attempted).
1603 * The driver uses the bit map to remove successes from the success sum, as
1604 * the oldest tx attempts fall out of the window.
1605 *
1606 * When the agn device makes multiple tx attempts for a given frame, each
1607 * attempt might be at a different rate, and have different modulation
1608 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1609 * up in the rate scaling table in the Link Quality command. The driver must
1610 * determine which rate table entry was used for each tx attempt, to determine
1611 * which rate-specific history to update, and record only those attempts that
1612 * match the modulation characteristics of the history set.
1613 *
1614 * When using block-ack (aggregation), all frames are transmitted at the same
1615 * rate, since there is no per-attempt acknowledgment from the destination
1616 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in
1617 * rate_n_flags field. After receiving a block-ack, the driver can update
1618 * history for the entire block all at once.
1619 *
1620 *
1621 * FINDING BEST STARTING RATE:
1622 *
1623 * When working with a selected initial modulation mode (see below), the
1624 * driver attempts to find a best initial rate. The initial rate is the
1625 * first entry in the Link Quality command's rate table.
1626 *
1627 * 1) Calculate actual throughput (success ratio * expected throughput, see
1628 * table below) for current initial rate. Do this only if enough frames
1629 * have been attempted to make the value meaningful: at least 6 failed
1630 * tx attempts, or at least 8 successes. If not enough, don't try rate
1631 * scaling yet.
1632 *
1633 * 2) Find available rates adjacent to current initial rate. Available means:
1634 * a) supported by hardware &&
1635 * b) supported by association &&
1636 * c) within any constraints selected by user
1637 *
1638 * 3) Gather measured throughputs for adjacent rates. These might not have
1639 * enough history to calculate a throughput. That's okay, we might try
1640 * using one of them anyway!
1641 *
1642 * 4) Try decreasing rate if, for current rate:
1643 * a) success ratio is < 15% ||
1644 * b) lower adjacent rate has better measured throughput ||
1645 * c) higher adjacent rate has worse throughput, and lower is unmeasured
1646 *
1647 * As a sanity check, if decrease was determined above, leave rate
1648 * unchanged if:
1649 * a) lower rate unavailable
1650 * b) success ratio at current rate > 85% (very good)
1651 * c) current measured throughput is better than expected throughput
1652 * of lower rate (under perfect 100% tx conditions, see table below)
1653 *
1654 * 5) Try increasing rate if, for current rate:
1655 * a) success ratio is < 15% ||
1656 * b) both adjacent rates' throughputs are unmeasured (try it!) ||
1657 * b) higher adjacent rate has better measured throughput ||
1658 * c) lower adjacent rate has worse throughput, and higher is unmeasured
1659 *
1660 * As a sanity check, if increase was determined above, leave rate
1661 * unchanged if:
1662 * a) success ratio at current rate < 70%. This is not particularly
1663 * good performance; higher rate is sure to have poorer success.
1664 *
1665 * 6) Re-evaluate the rate after each tx frame. If working with block-
1666 * acknowledge, history and statistics may be calculated for the entire
1667 * block (including prior history that fits within the history windows),
1668 * before re-evaluation.
1669 *
1670 * FINDING BEST STARTING MODULATION MODE:
1671 *
1672 * After working with a modulation mode for a "while" (and doing rate scaling),
1673 * the driver searches for a new initial mode in an attempt to improve
1674 * throughput. The "while" is measured by numbers of attempted frames:
1675 *
1676 * For legacy mode, search for new mode after:
1677 * 480 successful frames, or 160 failed frames
1678 * For high-throughput modes (SISO or MIMO), search for new mode after:
1679 * 4500 successful frames, or 400 failed frames
1680 *
1681 * Mode switch possibilities are (3 for each mode):
1682 *
1683 * For legacy:
1684 * Change antenna, try SISO (if HT association), try MIMO (if HT association)
1685 * For SISO:
1686 * Change antenna, try MIMO, try shortened guard interval (SGI)
1687 * For MIMO:
1688 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1689 *
1690 * When trying a new mode, use the same bit rate as the old/current mode when
1691 * trying antenna switches and shortened guard interval. When switching to
1692 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1693 * for which the expected throughput (under perfect conditions) is about the
1694 * same or slightly better than the actual measured throughput delivered by
1695 * the old/current mode.
1696 *
1697 * Actual throughput can be estimated by multiplying the expected throughput
1698 * by the success ratio (successful / attempted tx frames). Frame size is
1699 * not considered in this calculation; it assumes that frame size will average
1700 * out to be fairly consistent over several samples. The following are
1701 * metric values for expected throughput assuming 100% success ratio.
1702 * Only G band has support for CCK rates:
1703 *
1704 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60
1705 *
1706 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186
1707 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186
1708 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202
1709 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211
1710 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251
1711 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257
1712 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257
1713 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264
1714 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289
1715 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293
1716 *
1717 * After the new mode has been tried for a short while (minimum of 6 failed
1718 * frames or 8 successful frames), compare success ratio and actual throughput
1719 * estimate of the new mode with the old. If either is better with the new
1720 * mode, continue to use the new mode.
1721 *
1722 * Continue comparing modes until all 3 possibilities have been tried.
1723 * If moving from legacy to HT, try all 3 possibilities from the new HT
1724 * mode. After trying all 3, a best mode is found. Continue to use this mode
1725 * for the longer "while" described above (e.g. 480 successful frames for
1726 * legacy), and then repeat the search process.
1727 *
1728 */
1729struct iwl_link_quality_cmd {
1730
1731 /* Index of destination/recipient station in uCode's station table */
1732 u8 sta_id;
1733 u8 reserved1;
1734 __le16 control; /* not used */
1735 struct iwl_link_qual_general_params general_params;
1736 struct iwl_link_qual_agg_params agg_params;
1737
1738 /*
1739 * Rate info; when using rate-scaling, Tx command's initial_rate_index
1740 * specifies 1st Tx rate attempted, via index into this table.
1741 * agn devices works its way through table when retrying Tx.
1742 */
1743 struct {
1744 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */
1745 } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1746 __le32 reserved2;
1747} __packed;
1748
1749/*
1750 * BT configuration enable flags:
1751 * bit 0 - 1: BT channel announcement enabled
1752 * 0: disable
1753 * bit 1 - 1: priority of BT device enabled
1754 * 0: disable
1755 * bit 2 - 1: BT 2 wire support enabled
1756 * 0: disable
1757 */
1758#define BT_COEX_DISABLE (0x0)
1759#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1760#define BT_ENABLE_PRIORITY BIT(1)
1761#define BT_ENABLE_2_WIRE BIT(2)
1762
1763#define BT_COEX_DISABLE (0x0)
1764#define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1765
1766#define BT_LEAD_TIME_MIN (0x0)
1767#define BT_LEAD_TIME_DEF (0x1E)
1768#define BT_LEAD_TIME_MAX (0xFF)
1769
1770#define BT_MAX_KILL_MIN (0x1)
1771#define BT_MAX_KILL_DEF (0x5)
1772#define BT_MAX_KILL_MAX (0xFF)
1773
1774#define BT_DURATION_LIMIT_DEF 625
1775#define BT_DURATION_LIMIT_MAX 1250
1776#define BT_DURATION_LIMIT_MIN 625
1777
1778#define BT_ON_THRESHOLD_DEF 4
1779#define BT_ON_THRESHOLD_MAX 1000
1780#define BT_ON_THRESHOLD_MIN 1
1781
1782#define BT_FRAG_THRESHOLD_DEF 0
1783#define BT_FRAG_THRESHOLD_MAX 0
1784#define BT_FRAG_THRESHOLD_MIN 0
1785
1786#define BT_AGG_THRESHOLD_DEF 1200
1787#define BT_AGG_THRESHOLD_MAX 8000
1788#define BT_AGG_THRESHOLD_MIN 400
1789
1790/*
1791 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
1792 *
1793 * agn devices support hardware handshake with Bluetooth device on
1794 * same platform. Bluetooth device alerts wireless device when it will Tx;
1795 * wireless device can delay or kill its own Tx to accommodate.
1796 */
1797struct iwl_bt_cmd {
1798 u8 flags;
1799 u8 lead_time;
1800 u8 max_kill;
1801 u8 reserved;
1802 __le32 kill_ack_mask;
1803 __le32 kill_cts_mask;
1804} __packed;
1805
1806#define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0)
1807
1808#define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5))
1809#define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3
1810#define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0
1811#define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1
1812#define IWLAGN_BT_FLAG_COEX_MODE_3W 2
1813#define IWLAGN_BT_FLAG_COEX_MODE_4W 3
1814
1815#define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6)
1816/* Disable Sync PSPoll on SCO/eSCO */
1817#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7)
1818
1819#define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */
1820#define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */
1821
1822#define IWLAGN_BT_PRIO_BOOST_MAX 0xFF
1823#define IWLAGN_BT_PRIO_BOOST_MIN 0x00
1824#define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0
1825#define IWLAGN_BT_PRIO_BOOST_DEFAULT32 0xF0F0F0F0
1826
1827#define IWLAGN_BT_MAX_KILL_DEFAULT 5
1828
1829#define IWLAGN_BT3_T7_DEFAULT 1
1830
1831enum iwl_bt_kill_idx {
1832 IWL_BT_KILL_DEFAULT = 0,
1833 IWL_BT_KILL_OVERRIDE = 1,
1834 IWL_BT_KILL_REDUCE = 2,
1835};
1836
1837#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1838#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
1839#define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
1840#define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE cpu_to_le32(0)
1841
1842#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2
1843
1844#define IWLAGN_BT3_T2_DEFAULT 0xc
1845
1846#define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0))
1847#define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1))
1848#define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2))
1849#define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3))
1850#define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4))
1851#define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5))
1852#define IWLAGN_BT_VALID_REDUCED_TX_PWR cpu_to_le16(BIT(6))
1853#define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7))
1854
1855#define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1856 IWLAGN_BT_VALID_BOOST | \
1857 IWLAGN_BT_VALID_MAX_KILL | \
1858 IWLAGN_BT_VALID_3W_TIMERS | \
1859 IWLAGN_BT_VALID_KILL_ACK_MASK | \
1860 IWLAGN_BT_VALID_KILL_CTS_MASK | \
1861 IWLAGN_BT_VALID_REDUCED_TX_PWR | \
1862 IWLAGN_BT_VALID_3W_LUT)
1863
1864#define IWLAGN_BT_REDUCED_TX_PWR BIT(0)
1865
1866#define IWLAGN_BT_DECISION_LUT_SIZE 12
1867
1868struct iwl_basic_bt_cmd {
1869 u8 flags;
1870 u8 ledtime; /* unused */
1871 u8 max_kill;
1872 u8 bt3_timer_t7_value;
1873 __le32 kill_ack_mask;
1874 __le32 kill_cts_mask;
1875 u8 bt3_prio_sample_time;
1876 u8 bt3_timer_t2_value;
1877 __le16 bt4_reaction_time; /* unused */
1878 __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE];
1879 /*
1880 * bit 0: use reduced tx power for control frame
1881 * bit 1 - 7: reserved
1882 */
1883 u8 reduce_txpower;
1884 u8 reserved;
1885 __le16 valid;
1886};
1887
1888struct iwl_bt_cmd_v1 {
1889 struct iwl_basic_bt_cmd basic;
1890 u8 prio_boost;
1891 /*
1892 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1893 * if configure the following patterns
1894 */
1895 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1896 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1897};
1898
1899struct iwl_bt_cmd_v2 {
1900 struct iwl_basic_bt_cmd basic;
1901 __le32 prio_boost;
1902 /*
1903 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1904 * if configure the following patterns
1905 */
1906 u8 reserved;
1907 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1908 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1909};
1910
1911#define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0))
1912
1913struct iwlagn_bt_sco_cmd {
1914 __le32 flags;
1915};
1916
1917/******************************************************************************
1918 * (6)
1919 * Spectrum Management (802.11h) Commands, Responses, Notifications:
1920 *
1921 *****************************************************************************/
1922
1923/*
1924 * Spectrum Management
1925 */
1926#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
1927 RXON_FILTER_CTL2HOST_MSK | \
1928 RXON_FILTER_ACCEPT_GRP_MSK | \
1929 RXON_FILTER_DIS_DECRYPT_MSK | \
1930 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
1931 RXON_FILTER_ASSOC_MSK | \
1932 RXON_FILTER_BCON_AWARE_MSK)
1933
1934struct iwl_measure_channel {
1935 __le32 duration; /* measurement duration in extended beacon
1936 * format */
1937 u8 channel; /* channel to measure */
1938 u8 type; /* see enum iwl_measure_type */
1939 __le16 reserved;
1940} __packed;
1941
1942/*
1943 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
1944 */
1945struct iwl_spectrum_cmd {
1946 __le16 len; /* number of bytes starting from token */
1947 u8 token; /* token id */
1948 u8 id; /* measurement id -- 0 or 1 */
1949 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
1950 u8 periodic; /* 1 = periodic */
1951 __le16 path_loss_timeout;
1952 __le32 start_time; /* start time in extended beacon format */
1953 __le32 reserved2;
1954 __le32 flags; /* rxon flags */
1955 __le32 filter_flags; /* rxon filter flags */
1956 __le16 channel_count; /* minimum 1, maximum 10 */
1957 __le16 reserved3;
1958 struct iwl_measure_channel channels[10];
1959} __packed;
1960
1961/*
1962 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
1963 */
1964struct iwl_spectrum_resp {
1965 u8 token;
1966 u8 id; /* id of the prior command replaced, or 0xff */
1967 __le16 status; /* 0 - command will be handled
1968 * 1 - cannot handle (conflicts with another
1969 * measurement) */
1970} __packed;
1971
1972enum iwl_measurement_state {
1973 IWL_MEASUREMENT_START = 0,
1974 IWL_MEASUREMENT_STOP = 1,
1975};
1976
1977enum iwl_measurement_status {
1978 IWL_MEASUREMENT_OK = 0,
1979 IWL_MEASUREMENT_CONCURRENT = 1,
1980 IWL_MEASUREMENT_CSA_CONFLICT = 2,
1981 IWL_MEASUREMENT_TGH_CONFLICT = 3,
1982 /* 4-5 reserved */
1983 IWL_MEASUREMENT_STOPPED = 6,
1984 IWL_MEASUREMENT_TIMEOUT = 7,
1985 IWL_MEASUREMENT_PERIODIC_FAILED = 8,
1986};
1987
1988#define NUM_ELEMENTS_IN_HISTOGRAM 8
1989
1990struct iwl_measurement_histogram {
1991 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
1992 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
1993} __packed;
1994
1995/* clear channel availability counters */
1996struct iwl_measurement_cca_counters {
1997 __le32 ofdm;
1998 __le32 cck;
1999} __packed;
2000
2001enum iwl_measure_type {
2002 IWL_MEASURE_BASIC = (1 << 0),
2003 IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2004 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2005 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2006 IWL_MEASURE_FRAME = (1 << 4),
2007 /* bits 5:6 are reserved */
2008 IWL_MEASURE_IDLE = (1 << 7),
2009};
2010
2011/*
2012 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2013 */
2014struct iwl_spectrum_notification {
2015 u8 id; /* measurement id -- 0 or 1 */
2016 u8 token;
2017 u8 channel_index; /* index in measurement channel list */
2018 u8 state; /* 0 - start, 1 - stop */
2019 __le32 start_time; /* lower 32-bits of TSF */
2020 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
2021 u8 channel;
2022 u8 type; /* see enum iwl_measurement_type */
2023 u8 reserved1;
2024 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
2025 * valid if applicable for measurement type requested. */
2026 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
2027 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
2028 __le32 cca_time; /* channel load time in usecs */
2029 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
2030 * unidentified */
2031 u8 reserved2[3];
2032 struct iwl_measurement_histogram histogram;
2033 __le32 stop_time; /* lower 32-bits of TSF */
2034 __le32 status; /* see iwl_measurement_status */
2035} __packed;
2036
2037/******************************************************************************
2038 * (7)
2039 * Power Management Commands, Responses, Notifications:
2040 *
2041 *****************************************************************************/
2042
2043/**
2044 * struct iwl_powertable_cmd - Power Table Command
2045 * @flags: See below:
2046 *
2047 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2048 *
2049 * PM allow:
2050 * bit 0 - '0' Driver not allow power management
2051 * '1' Driver allow PM (use rest of parameters)
2052 *
2053 * uCode send sleep notifications:
2054 * bit 1 - '0' Don't send sleep notification
2055 * '1' send sleep notification (SEND_PM_NOTIFICATION)
2056 *
2057 * Sleep over DTIM
2058 * bit 2 - '0' PM have to walk up every DTIM
2059 * '1' PM could sleep over DTIM till listen Interval.
2060 *
2061 * PCI power managed
2062 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2063 * '1' !(PCI_CFG_LINK_CTRL & 0x1)
2064 *
2065 * Fast PD
2066 * bit 4 - '1' Put radio to sleep when receiving frame for others
2067 *
2068 * Force sleep Modes
2069 * bit 31/30- '00' use both mac/xtal sleeps
2070 * '01' force Mac sleep
2071 * '10' force xtal sleep
2072 * '11' Illegal set
2073 *
2074 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
2075 * ucode assume sleep over DTIM is allowed and we don't need to wake up
2076 * for every DTIM.
2077 */
2078#define IWL_POWER_VEC_SIZE 5
2079
2080#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
2081#define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0))
2082#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1))
2083#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
2084#define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
2085#define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
2086#define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5))
2087#define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6))
2088#define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7))
2089#define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8))
2090#define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9))
2091
2092struct iwl_powertable_cmd {
2093 __le16 flags;
2094 u8 keep_alive_seconds;
2095 u8 debug_flags;
2096 __le32 rx_data_timeout;
2097 __le32 tx_data_timeout;
2098 __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2099 __le32 keep_alive_beacons;
2100} __packed;
2101
2102/*
2103 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
2104 * all devices identical.
2105 */
2106struct iwl_sleep_notification {
2107 u8 pm_sleep_mode;
2108 u8 pm_wakeup_src;
2109 __le16 reserved;
2110 __le32 sleep_time;
2111 __le32 tsf_low;
2112 __le32 bcon_timer;
2113} __packed;
2114
2115/* Sleep states. all devices identical. */
2116enum {
2117 IWL_PM_NO_SLEEP = 0,
2118 IWL_PM_SLP_MAC = 1,
2119 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2120 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2121 IWL_PM_SLP_PHY = 4,
2122 IWL_PM_SLP_REPENT = 5,
2123 IWL_PM_WAKEUP_BY_TIMER = 6,
2124 IWL_PM_WAKEUP_BY_DRIVER = 7,
2125 IWL_PM_WAKEUP_BY_RFKILL = 8,
2126 /* 3 reserved */
2127 IWL_PM_NUM_OF_MODES = 12,
2128};
2129
2130/*
2131 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2132 */
2133#define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
2134#define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
2135#define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
2136struct iwl_card_state_cmd {
2137 __le32 status; /* CARD_STATE_CMD_* request new power state */
2138} __packed;
2139
2140/*
2141 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2142 */
2143struct iwl_card_state_notif {
2144 __le32 flags;
2145} __packed;
2146
2147#define HW_CARD_DISABLED 0x01
2148#define SW_CARD_DISABLED 0x02
2149#define CT_CARD_DISABLED 0x04
2150#define RXON_CARD_DISABLED 0x10
2151
2152struct iwl_ct_kill_config {
2153 __le32 reserved;
2154 __le32 critical_temperature_M;
2155 __le32 critical_temperature_R;
2156} __packed;
2157
2158/* 1000, and 6x00 */
2159struct iwl_ct_kill_throttling_config {
2160 __le32 critical_temperature_exit;
2161 __le32 reserved;
2162 __le32 critical_temperature_enter;
2163} __packed;
2164
2165/******************************************************************************
2166 * (8)
2167 * Scan Commands, Responses, Notifications:
2168 *
2169 *****************************************************************************/
2170
2171#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2172#define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
2173
2174/**
2175 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
2176 *
2177 * One for each channel in the scan list.
2178 * Each channel can independently select:
2179 * 1) SSID for directed active scans
2180 * 2) Txpower setting (for rate specified within Tx command)
2181 * 3) How long to stay on-channel (behavior may be modified by quiet_time,
2182 * quiet_plcp_th, good_CRC_th)
2183 *
2184 * To avoid uCode errors, make sure the following are true (see comments
2185 * under struct iwl_scan_cmd about max_out_time and quiet_time):
2186 * 1) If using passive_dwell (i.e. passive_dwell != 0):
2187 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2188 * 2) quiet_time <= active_dwell
2189 * 3) If restricting off-channel time (i.e. max_out_time !=0):
2190 * passive_dwell < max_out_time
2191 * active_dwell < max_out_time
2192 */
2193
2194struct iwl_scan_channel {
2195 /*
2196 * type is defined as:
2197 * 0:0 1 = active, 0 = passive
2198 * 1:20 SSID direct bit map; if a bit is set, then corresponding
2199 * SSID IE is transmitted in probe request.
2200 * 21:31 reserved
2201 */
2202 __le32 type;
2203 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
2204 u8 tx_gain; /* gain for analog radio */
2205 u8 dsp_atten; /* gain for DSP */
2206 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2207 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
2208} __packed;
2209
2210/* set number of direct probes __le32 type */
2211#define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2212
2213/**
2214 * struct iwl_ssid_ie - directed scan network information element
2215 *
2216 * Up to 20 of these may appear in REPLY_SCAN_CMD,
2217 * selected by "type" bit field in struct iwl_scan_channel;
2218 * each channel may select different ssids from among the 20 entries.
2219 * SSID IEs get transmitted in reverse order of entry.
2220 */
2221struct iwl_ssid_ie {
2222 u8 id;
2223 u8 len;
2224 u8 ssid[32];
2225} __packed;
2226
2227#define PROBE_OPTION_MAX 20
2228#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
2229#define IWL_GOOD_CRC_TH_DISABLED 0
2230#define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2231#define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
2232#define IWL_MAX_CMD_SIZE 4096
2233
2234/*
2235 * REPLY_SCAN_CMD = 0x80 (command)
2236 *
2237 * The hardware scan command is very powerful; the driver can set it up to
2238 * maintain (relatively) normal network traffic while doing a scan in the
2239 * background. The max_out_time and suspend_time control the ratio of how
2240 * long the device stays on an associated network channel ("service channel")
2241 * vs. how long it's away from the service channel, i.e. tuned to other channels
2242 * for scanning.
2243 *
2244 * max_out_time is the max time off-channel (in usec), and suspend_time
2245 * is how long (in "extended beacon" format) that the scan is "suspended"
2246 * after returning to the service channel. That is, suspend_time is the
2247 * time that we stay on the service channel, doing normal work, between
2248 * scan segments. The driver may set these parameters differently to support
2249 * scanning when associated vs. not associated, and light vs. heavy traffic
2250 * loads when associated.
2251 *
2252 * After receiving this command, the device's scan engine does the following;
2253 *
2254 * 1) Sends SCAN_START notification to driver
2255 * 2) Checks to see if it has time to do scan for one channel
2256 * 3) Sends NULL packet, with power-save (PS) bit set to 1,
2257 * to tell AP that we're going off-channel
2258 * 4) Tunes to first channel in scan list, does active or passive scan
2259 * 5) Sends SCAN_RESULT notification to driver
2260 * 6) Checks to see if it has time to do scan on *next* channel in list
2261 * 7) Repeats 4-6 until it no longer has time to scan the next channel
2262 * before max_out_time expires
2263 * 8) Returns to service channel
2264 * 9) Sends NULL packet with PS=0 to tell AP that we're back
2265 * 10) Stays on service channel until suspend_time expires
2266 * 11) Repeats entire process 2-10 until list is complete
2267 * 12) Sends SCAN_COMPLETE notification
2268 *
2269 * For fast, efficient scans, the scan command also has support for staying on
2270 * a channel for just a short time, if doing active scanning and getting no
2271 * responses to the transmitted probe request. This time is controlled by
2272 * quiet_time, and the number of received packets below which a channel is
2273 * considered "quiet" is controlled by quiet_plcp_threshold.
2274 *
2275 * For active scanning on channels that have regulatory restrictions against
2276 * blindly transmitting, the scan can listen before transmitting, to make sure
2277 * that there is already legitimate activity on the channel. If enough
2278 * packets are cleanly received on the channel (controlled by good_CRC_th,
2279 * typical value 1), the scan engine starts transmitting probe requests.
2280 *
2281 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2282 *
2283 * To avoid uCode errors, see timing restrictions described under
2284 * struct iwl_scan_channel.
2285 */
2286
2287enum iwl_scan_flags {
2288 /* BIT(0) currently unused */
2289 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1),
2290 /* bits 2-7 reserved */
2291};
2292
2293struct iwl_scan_cmd {
2294 __le16 len;
2295 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */
2296 u8 channel_count; /* # channels in channel list */
2297 __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2298 * (only for active scan) */
2299 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2300 __le16 good_CRC_th; /* passive -> active promotion threshold */
2301 __le16 rx_chain; /* RXON_RX_CHAIN_* */
2302 __le32 max_out_time; /* max usec to be away from associated (service)
2303 * channel */
2304 __le32 suspend_time; /* pause scan this long (in "extended beacon
2305 * format") when returning to service chnl:
2306 */
2307 __le32 flags; /* RXON_FLG_* */
2308 __le32 filter_flags; /* RXON_FILTER_* */
2309
2310 /* For active scans (set to all-0s for passive scans).
2311 * Does not include payload. Must specify Tx rate; no rate scaling. */
2312 struct iwl_tx_cmd tx_cmd;
2313
2314 /* For directed active scans (set to all-0s otherwise) */
2315 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
2316
2317 /*
2318 * Probe request frame, followed by channel list.
2319 *
2320 * Size of probe request frame is specified by byte count in tx_cmd.
2321 * Channel list follows immediately after probe request frame.
2322 * Number of channels in list is specified by channel_count.
2323 * Each channel in list is of type:
2324 *
2325 * struct iwl_scan_channel channels[0];
2326 *
2327 * NOTE: Only one band of channels can be scanned per pass. You
2328 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2329 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2330 * before requesting another scan.
2331 */
2332 u8 data[];
2333} __packed;
2334
2335/* Can abort will notify by complete notification with abort status. */
2336#define CAN_ABORT_STATUS cpu_to_le32(0x1)
2337/* complete notification statuses */
2338#define ABORT_STATUS 0x2
2339
2340/*
2341 * REPLY_SCAN_CMD = 0x80 (response)
2342 */
2343struct iwl_scanreq_notification {
2344 __le32 status; /* 1: okay, 2: cannot fulfill request */
2345} __packed;
2346
2347/*
2348 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2349 */
2350struct iwl_scanstart_notification {
2351 __le32 tsf_low;
2352 __le32 tsf_high;
2353 __le32 beacon_timer;
2354 u8 channel;
2355 u8 band;
2356 u8 reserved[2];
2357 __le32 status;
2358} __packed;
2359
2360#define SCAN_OWNER_STATUS 0x1
2361#define MEASURE_OWNER_STATUS 0x2
2362
2363#define IWL_PROBE_STATUS_OK 0
2364#define IWL_PROBE_STATUS_TX_FAILED BIT(0)
2365/* error statuses combined with TX_FAILED */
2366#define IWL_PROBE_STATUS_FAIL_TTL BIT(1)
2367#define IWL_PROBE_STATUS_FAIL_BT BIT(2)
2368
2369#define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
2370/*
2371 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2372 */
2373struct iwl_scanresults_notification {
2374 u8 channel;
2375 u8 band;
2376 u8 probe_status;
2377 u8 num_probe_not_sent; /* not enough time to send */
2378 __le32 tsf_low;
2379 __le32 tsf_high;
2380 __le32 statistics[NUMBER_OF_STATISTICS];
2381} __packed;
2382
2383/*
2384 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2385 */
2386struct iwl_scancomplete_notification {
2387 u8 scanned_channels;
2388 u8 status;
2389 u8 bt_status; /* BT On/Off status */
2390 u8 last_channel;
2391 __le32 tsf_low;
2392 __le32 tsf_high;
2393} __packed;
2394
2395
2396/******************************************************************************
2397 * (9)
2398 * IBSS/AP Commands and Notifications:
2399 *
2400 *****************************************************************************/
2401
2402enum iwl_ibss_manager {
2403 IWL_NOT_IBSS_MANAGER = 0,
2404 IWL_IBSS_MANAGER = 1,
2405};
2406
2407/*
2408 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2409 */
2410
2411struct iwlagn_beacon_notif {
2412 struct iwlagn_tx_resp beacon_notify_hdr;
2413 __le32 low_tsf;
2414 __le32 high_tsf;
2415 __le32 ibss_mgr_status;
2416} __packed;
2417
2418/*
2419 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2420 */
2421
2422struct iwl_tx_beacon_cmd {
2423 struct iwl_tx_cmd tx;
2424 __le16 tim_idx;
2425 u8 tim_size;
2426 u8 reserved1;
2427 struct ieee80211_hdr frame[]; /* beacon frame */
2428} __packed;
2429
2430/******************************************************************************
2431 * (10)
2432 * Statistics Commands and Notifications:
2433 *
2434 *****************************************************************************/
2435
2436#define IWL_TEMP_CONVERT 260
2437
2438#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
2439#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
2440#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
2441
2442/* Used for passing to driver number of successes and failures per rate */
2443struct rate_histogram {
2444 union {
2445 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2446 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2447 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2448 } success;
2449 union {
2450 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2451 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2452 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2453 } failed;
2454} __packed;
2455
2456/* statistics command response */
2457
2458struct statistics_dbg {
2459 __le32 burst_check;
2460 __le32 burst_count;
2461 __le32 wait_for_silence_timeout_cnt;
2462 __le32 reserved[3];
2463} __packed;
2464
2465struct statistics_rx_phy {
2466 __le32 ina_cnt;
2467 __le32 fina_cnt;
2468 __le32 plcp_err;
2469 __le32 crc32_err;
2470 __le32 overrun_err;
2471 __le32 early_overrun_err;
2472 __le32 crc32_good;
2473 __le32 false_alarm_cnt;
2474 __le32 fina_sync_err_cnt;
2475 __le32 sfd_timeout;
2476 __le32 fina_timeout;
2477 __le32 unresponded_rts;
2478 __le32 rxe_frame_limit_overrun;
2479 __le32 sent_ack_cnt;
2480 __le32 sent_cts_cnt;
2481 __le32 sent_ba_rsp_cnt;
2482 __le32 dsp_self_kill;
2483 __le32 mh_format_err;
2484 __le32 re_acq_main_rssi_sum;
2485 __le32 reserved3;
2486} __packed;
2487
2488struct statistics_rx_ht_phy {
2489 __le32 plcp_err;
2490 __le32 overrun_err;
2491 __le32 early_overrun_err;
2492 __le32 crc32_good;
2493 __le32 crc32_err;
2494 __le32 mh_format_err;
2495 __le32 agg_crc32_good;
2496 __le32 agg_mpdu_cnt;
2497 __le32 agg_cnt;
2498 __le32 unsupport_mcs;
2499} __packed;
2500
2501#define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
2502
2503struct statistics_rx_non_phy {
2504 __le32 bogus_cts; /* CTS received when not expecting CTS */
2505 __le32 bogus_ack; /* ACK received when not expecting ACK */
2506 __le32 non_bssid_frames; /* number of frames with BSSID that
2507 * doesn't belong to the STA BSSID */
2508 __le32 filtered_frames; /* count frames that were dumped in the
2509 * filtering process */
2510 __le32 non_channel_beacons; /* beacons with our bss id but not on
2511 * our serving channel */
2512 __le32 channel_beacons; /* beacons with our bss id and in our
2513 * serving channel */
2514 __le32 num_missed_bcon; /* number of missed beacons */
2515 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
2516 * ADC was in saturation */
2517 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2518 * for INA */
2519 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
2520 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
2521 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
2522 __le32 interference_data_flag; /* flag for interference data
2523 * availability. 1 when data is
2524 * available. */
2525 __le32 channel_load; /* counts RX Enable time in uSec */
2526 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
2527 * and CCK) counter */
2528 __le32 beacon_rssi_a;
2529 __le32 beacon_rssi_b;
2530 __le32 beacon_rssi_c;
2531 __le32 beacon_energy_a;
2532 __le32 beacon_energy_b;
2533 __le32 beacon_energy_c;
2534} __packed;
2535
2536struct statistics_rx_non_phy_bt {
2537 struct statistics_rx_non_phy common;
2538 /* additional stats for bt */
2539 __le32 num_bt_kills;
2540 __le32 reserved[2];
2541} __packed;
2542
2543struct statistics_rx {
2544 struct statistics_rx_phy ofdm;
2545 struct statistics_rx_phy cck;
2546 struct statistics_rx_non_phy general;
2547 struct statistics_rx_ht_phy ofdm_ht;
2548} __packed;
2549
2550struct statistics_rx_bt {
2551 struct statistics_rx_phy ofdm;
2552 struct statistics_rx_phy cck;
2553 struct statistics_rx_non_phy_bt general;
2554 struct statistics_rx_ht_phy ofdm_ht;
2555} __packed;
2556
2557/**
2558 * struct statistics_tx_power - current tx power
2559 *
2560 * @ant_a: current tx power on chain a in 1/2 dB step
2561 * @ant_b: current tx power on chain b in 1/2 dB step
2562 * @ant_c: current tx power on chain c in 1/2 dB step
2563 */
2564struct statistics_tx_power {
2565 u8 ant_a;
2566 u8 ant_b;
2567 u8 ant_c;
2568 u8 reserved;
2569} __packed;
2570
2571struct statistics_tx_non_phy_agg {
2572 __le32 ba_timeout;
2573 __le32 ba_reschedule_frames;
2574 __le32 scd_query_agg_frame_cnt;
2575 __le32 scd_query_no_agg;
2576 __le32 scd_query_agg;
2577 __le32 scd_query_mismatch;
2578 __le32 frame_not_ready;
2579 __le32 underrun;
2580 __le32 bt_prio_kill;
2581 __le32 rx_ba_rsp_cnt;
2582} __packed;
2583
2584struct statistics_tx {
2585 __le32 preamble_cnt;
2586 __le32 rx_detected_cnt;
2587 __le32 bt_prio_defer_cnt;
2588 __le32 bt_prio_kill_cnt;
2589 __le32 few_bytes_cnt;
2590 __le32 cts_timeout;
2591 __le32 ack_timeout;
2592 __le32 expected_ack_cnt;
2593 __le32 actual_ack_cnt;
2594 __le32 dump_msdu_cnt;
2595 __le32 burst_abort_next_frame_mismatch_cnt;
2596 __le32 burst_abort_missing_next_frame_cnt;
2597 __le32 cts_timeout_collision;
2598 __le32 ack_or_ba_timeout_collision;
2599 struct statistics_tx_non_phy_agg agg;
2600 /*
2601 * "tx_power" are optional parameters provided by uCode,
2602 * 6000 series is the only device provide the information,
2603 * Those are reserved fields for all the other devices
2604 */
2605 struct statistics_tx_power tx_power;
2606 __le32 reserved1;
2607} __packed;
2608
2609
2610struct statistics_div {
2611 __le32 tx_on_a;
2612 __le32 tx_on_b;
2613 __le32 exec_time;
2614 __le32 probe_time;
2615 __le32 reserved1;
2616 __le32 reserved2;
2617} __packed;
2618
2619struct statistics_general_common {
2620 __le32 temperature; /* radio temperature */
2621 __le32 temperature_m; /* radio voltage */
2622 struct statistics_dbg dbg;
2623 __le32 sleep_time;
2624 __le32 slots_out;
2625 __le32 slots_idle;
2626 __le32 ttl_timestamp;
2627 struct statistics_div div;
2628 __le32 rx_enable_counter;
2629 /*
2630 * num_of_sos_states:
2631 * count the number of times we have to re-tune
2632 * in order to get out of bad PHY status
2633 */
2634 __le32 num_of_sos_states;
2635} __packed;
2636
2637struct statistics_bt_activity {
2638 /* Tx statistics */
2639 __le32 hi_priority_tx_req_cnt;
2640 __le32 hi_priority_tx_denied_cnt;
2641 __le32 lo_priority_tx_req_cnt;
2642 __le32 lo_priority_tx_denied_cnt;
2643 /* Rx statistics */
2644 __le32 hi_priority_rx_req_cnt;
2645 __le32 hi_priority_rx_denied_cnt;
2646 __le32 lo_priority_rx_req_cnt;
2647 __le32 lo_priority_rx_denied_cnt;
2648} __packed;
2649
2650struct statistics_general {
2651 struct statistics_general_common common;
2652 __le32 reserved2;
2653 __le32 reserved3;
2654} __packed;
2655
2656struct statistics_general_bt {
2657 struct statistics_general_common common;
2658 struct statistics_bt_activity activity;
2659 __le32 reserved2;
2660 __le32 reserved3;
2661} __packed;
2662
2663#define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
2664#define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
2665#define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
2666
2667/*
2668 * REPLY_STATISTICS_CMD = 0x9c,
2669 * all devices identical.
2670 *
2671 * This command triggers an immediate response containing uCode statistics.
2672 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2673 *
2674 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2675 * internal copy of the statistics (counters) after issuing the response.
2676 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2677 *
2678 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2679 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
2680 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2681 */
2682#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
2683#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
2684struct iwl_statistics_cmd {
2685 __le32 configuration_flags; /* IWL_STATS_CONF_* */
2686} __packed;
2687
2688/*
2689 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2690 *
2691 * By default, uCode issues this notification after receiving a beacon
2692 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
2693 * REPLY_STATISTICS_CMD 0x9c, above.
2694 *
2695 * Statistics counters continue to increment beacon after beacon, but are
2696 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2697 * 0x9c with CLEAR_STATS bit set (see above).
2698 *
2699 * uCode also issues this notification during scans. uCode clears statistics
2700 * appropriately so that each notification contains statistics for only the
2701 * one channel that has just been scanned.
2702 */
2703#define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
2704#define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8)
2705
2706struct iwl_notif_statistics {
2707 __le32 flag;
2708 struct statistics_rx rx;
2709 struct statistics_tx tx;
2710 struct statistics_general general;
2711} __packed;
2712
2713struct iwl_bt_notif_statistics {
2714 __le32 flag;
2715 struct statistics_rx_bt rx;
2716 struct statistics_tx tx;
2717 struct statistics_general_bt general;
2718} __packed;
2719
2720/*
2721 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
2722 *
2723 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2724 * in regardless of how many missed beacons, which mean when driver receive the
2725 * notification, inside the command, it can find all the beacons information
2726 * which include number of total missed beacons, number of consecutive missed
2727 * beacons, number of beacons received and number of beacons expected to
2728 * receive.
2729 *
2730 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2731 * in order to bring the radio/PHY back to working state; which has no relation
2732 * to when driver will perform sensitivity calibration.
2733 *
2734 * Driver should set it own missed_beacon_threshold to decide when to perform
2735 * sensitivity calibration based on number of consecutive missed beacons in
2736 * order to improve overall performance, especially in noisy environment.
2737 *
2738 */
2739
2740#define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2741#define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2742#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
2743
2744struct iwl_missed_beacon_notif {
2745 __le32 consecutive_missed_beacons;
2746 __le32 total_missed_becons;
2747 __le32 num_expected_beacons;
2748 __le32 num_recvd_beacons;
2749} __packed;
2750
2751
2752/******************************************************************************
2753 * (11)
2754 * Rx Calibration Commands:
2755 *
2756 * With the uCode used for open source drivers, most Tx calibration (except
2757 * for Tx Power) and most Rx calibration is done by uCode during the
2758 * "initialize" phase of uCode boot. Driver must calibrate only:
2759 *
2760 * 1) Tx power (depends on temperature), described elsewhere
2761 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2762 * 3) Receiver sensitivity (to optimize signal detection)
2763 *
2764 *****************************************************************************/
2765
2766/**
2767 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2768 *
2769 * This command sets up the Rx signal detector for a sensitivity level that
2770 * is high enough to lock onto all signals within the associated network,
2771 * but low enough to ignore signals that are below a certain threshold, so as
2772 * not to have too many "false alarms". False alarms are signals that the
2773 * Rx DSP tries to lock onto, but then discards after determining that they
2774 * are noise.
2775 *
2776 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2777 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2778 * time listening, not transmitting). Driver must adjust sensitivity so that
2779 * the ratio of actual false alarms to actual Rx time falls within this range.
2780 *
2781 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2782 * received beacon. These provide information to the driver to analyze the
2783 * sensitivity. Don't analyze statistics that come in from scanning, or any
2784 * other non-associated-network source. Pertinent statistics include:
2785 *
2786 * From "general" statistics (struct statistics_rx_non_phy):
2787 *
2788 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2789 * Measure of energy of desired signal. Used for establishing a level
2790 * below which the device does not detect signals.
2791 *
2792 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2793 * Measure of background noise in silent period after beacon.
2794 *
2795 * channel_load
2796 * uSecs of actual Rx time during beacon period (varies according to
2797 * how much time was spent transmitting).
2798 *
2799 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2800 *
2801 * false_alarm_cnt
2802 * Signal locks abandoned early (before phy-level header).
2803 *
2804 * plcp_err
2805 * Signal locks abandoned late (during phy-level header).
2806 *
2807 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from
2808 * beacon to beacon, i.e. each value is an accumulation of all errors
2809 * before and including the latest beacon. Values will wrap around to 0
2810 * after counting up to 2^32 - 1. Driver must differentiate vs.
2811 * previous beacon's values to determine # false alarms in the current
2812 * beacon period.
2813 *
2814 * Total number of false alarms = false_alarms + plcp_errs
2815 *
2816 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2817 * (notice that the start points for OFDM are at or close to settings for
2818 * maximum sensitivity):
2819 *
2820 * START / MIN / MAX
2821 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120
2822 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210
2823 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140
2824 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270
2825 *
2826 * If actual rate of OFDM false alarms (+ plcp_errors) is too high
2827 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2828 * by *adding* 1 to all 4 of the table entries above, up to the max for
2829 * each entry. Conversely, if false alarm rate is too low (less than 5
2830 * for each 204.8 msecs listening), *subtract* 1 from each entry to
2831 * increase sensitivity.
2832 *
2833 * For CCK sensitivity, keep track of the following:
2834 *
2835 * 1). 20-beacon history of maximum background noise, indicated by
2836 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2837 * 3 receivers. For any given beacon, the "silence reference" is
2838 * the maximum of last 60 samples (20 beacons * 3 receivers).
2839 *
2840 * 2). 10-beacon history of strongest signal level, as indicated
2841 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2842 * i.e. the strength of the signal through the best receiver at the
2843 * moment. These measurements are "upside down", with lower values
2844 * for stronger signals, so max energy will be *minimum* value.
2845 *
2846 * Then for any given beacon, the driver must determine the *weakest*
2847 * of the strongest signals; this is the minimum level that needs to be
2848 * successfully detected, when using the best receiver at the moment.
2849 * "Max cck energy" is the maximum (higher value means lower energy!)
2850 * of the last 10 minima. Once this is determined, driver must add
2851 * a little margin by adding "6" to it.
2852 *
2853 * 3). Number of consecutive beacon periods with too few false alarms.
2854 * Reset this to 0 at the first beacon period that falls within the
2855 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2856 *
2857 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2858 * (notice that the start points for CCK are at maximum sensitivity):
2859 *
2860 * START / MIN / MAX
2861 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200
2862 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400
2863 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100
2864 *
2865 * If actual rate of CCK false alarms (+ plcp_errors) is too high
2866 * (greater than 50 for each 204.8 msecs listening), method for reducing
2867 * sensitivity is:
2868 *
2869 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2870 * up to max 400.
2871 *
2872 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2873 * sensitivity has been reduced a significant amount; bring it up to
2874 * a moderate 161. Otherwise, *add* 3, up to max 200.
2875 *
2876 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2877 * sensitivity has been reduced only a moderate or small amount;
2878 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2879 * down to min 0. Otherwise (if gain has been significantly reduced),
2880 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2881 *
2882 * b) Save a snapshot of the "silence reference".
2883 *
2884 * If actual rate of CCK false alarms (+ plcp_errors) is too low
2885 * (less than 5 for each 204.8 msecs listening), method for increasing
2886 * sensitivity is used only if:
2887 *
2888 * 1a) Previous beacon did not have too many false alarms
2889 * 1b) AND difference between previous "silence reference" and current
2890 * "silence reference" (prev - current) is 2 or more,
2891 * OR 2) 100 or more consecutive beacon periods have had rate of
2892 * less than 5 false alarms per 204.8 milliseconds rx time.
2893 *
2894 * Method for increasing sensitivity:
2895 *
2896 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
2897 * down to min 125.
2898 *
2899 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2900 * down to min 200.
2901 *
2902 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
2903 *
2904 * If actual rate of CCK false alarms (+ plcp_errors) is within good range
2905 * (between 5 and 50 for each 204.8 msecs listening):
2906 *
2907 * 1) Save a snapshot of the silence reference.
2908 *
2909 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors),
2910 * give some extra margin to energy threshold by *subtracting* 8
2911 * from value in HD_MIN_ENERGY_CCK_DET_INDEX.
2912 *
2913 * For all cases (too few, too many, good range), make sure that the CCK
2914 * detection threshold (energy) is below the energy level for robust
2915 * detection over the past 10 beacon periods, the "Max cck energy".
2916 * Lower values mean higher energy; this means making sure that the value
2917 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
2918 *
2919 */
2920
2921/*
2922 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
2923 */
2924#define HD_TABLE_SIZE (11) /* number of entries */
2925#define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */
2926#define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
2927#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
2928#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
2929#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
2930#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
2931#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
2932#define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
2933#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
2934#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
2935#define HD_OFDM_ENERGY_TH_IN_INDEX (10)
2936
2937/*
2938 * Additional table entries in enhance SENSITIVITY_CMD
2939 */
2940#define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11)
2941#define HD_INA_NON_SQUARE_DET_CCK_INDEX (12)
2942#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13)
2943#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14)
2944#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15)
2945#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16)
2946#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17)
2947#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18)
2948#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19)
2949#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20)
2950#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21)
2951#define HD_RESERVED (22)
2952
2953/* number of entries for enhanced tbl */
2954#define ENHANCE_HD_TABLE_SIZE (23)
2955
2956/* number of additional entries for enhanced tbl */
2957#define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
2958
2959#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0)
2960#define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0)
2961#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0)
2962#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668)
2963#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
2964#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486)
2965#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37)
2966#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853)
2967#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
2968#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476)
2969#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99)
2970
2971#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1)
2972#define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1)
2973#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1)
2974#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600)
2975#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40)
2976#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486)
2977#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45)
2978#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853)
2979#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60)
2980#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476)
2981#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99)
2982
2983
2984/* Control field in struct iwl_sensitivity_cmd */
2985#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
2986#define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
2987
2988/**
2989 * struct iwl_sensitivity_cmd
2990 * @control: (1) updates working table, (0) updates default table
2991 * @table: energy threshold values, use HD_* as index into table
2992 *
2993 * Always use "1" in "control" to update uCode's working table and DSP.
2994 */
2995struct iwl_sensitivity_cmd {
2996 __le16 control; /* always use "1" */
2997 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
2998} __packed;
2999
3000/*
3001 *
3002 */
3003struct iwl_enhance_sensitivity_cmd {
3004 __le16 control; /* always use "1" */
3005 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
3006} __packed;
3007
3008
3009/**
3010 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3011 *
3012 * This command sets the relative gains of agn device's 3 radio receiver chains.
3013 *
3014 * After the first association, driver should accumulate signal and noise
3015 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3016 * beacons from the associated network (don't collect statistics that come
3017 * in from scanning, or any other non-network source).
3018 *
3019 * DISCONNECTED ANTENNA:
3020 *
3021 * Driver should determine which antennas are actually connected, by comparing
3022 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the
3023 * following values over 20 beacons, one accumulator for each of the chains
3024 * a/b/c, from struct statistics_rx_non_phy:
3025 *
3026 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3027 *
3028 * Find the strongest signal from among a/b/c. Compare the other two to the
3029 * strongest. If any signal is more than 15 dB (times 20, unless you
3030 * divide the accumulated values by 20) below the strongest, the driver
3031 * considers that antenna to be disconnected, and should not try to use that
3032 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected,
3033 * driver should declare the stronger one as connected, and attempt to use it
3034 * (A and B are the only 2 Tx chains!).
3035 *
3036 *
3037 * RX BALANCE:
3038 *
3039 * Driver should balance the 3 receivers (but just the ones that are connected
3040 * to antennas, see above) for gain, by comparing the average signal levels
3041 * detected during the silence after each beacon (background noise).
3042 * Accumulate (add) the following values over 20 beacons, one accumulator for
3043 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3044 *
3045 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3046 *
3047 * Find the weakest background noise level from among a/b/c. This Rx chain
3048 * will be the reference, with 0 gain adjustment. Attenuate other channels by
3049 * finding noise difference:
3050 *
3051 * (accum_noise[i] - accum_noise[reference]) / 30
3052 *
3053 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3054 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3055 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3056 * and set bit 2 to indicate "reduce gain". The value for the reference
3057 * (weakest) chain should be "0".
3058 *
3059 * diff_gain_[abc] bit fields:
3060 * 2: (1) reduce gain, (0) increase gain
3061 * 1-0: amount of gain, units of 1.5 dB
3062 */
3063
3064/* Phy calibration command for series */
3065enum {
3066 IWL_PHY_CALIBRATE_DC_CMD = 8,
3067 IWL_PHY_CALIBRATE_LO_CMD = 9,
3068 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
3069 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
3070 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16,
3071 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17,
3072 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18,
3073};
3074
3075/* This enum defines the bitmap of various calibrations to enable in both
3076 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3077 */
3078enum iwl_ucode_calib_cfg {
3079 IWL_CALIB_CFG_RX_BB_IDX = BIT(0),
3080 IWL_CALIB_CFG_DC_IDX = BIT(1),
3081 IWL_CALIB_CFG_LO_IDX = BIT(2),
3082 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3),
3083 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4),
3084 IWL_CALIB_CFG_NOISE_IDX = BIT(5),
3085 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6),
3086 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7),
3087 IWL_CALIB_CFG_PAPD_IDX = BIT(8),
3088 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9),
3089 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10),
3090};
3091
3092#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3093 IWL_CALIB_CFG_DC_IDX | \
3094 IWL_CALIB_CFG_LO_IDX | \
3095 IWL_CALIB_CFG_TX_IQ_IDX | \
3096 IWL_CALIB_CFG_RX_IQ_IDX | \
3097 IWL_CALIB_CFG_CRYSTAL_IDX)
3098
3099#define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3100 IWL_CALIB_CFG_DC_IDX | \
3101 IWL_CALIB_CFG_LO_IDX | \
3102 IWL_CALIB_CFG_TX_IQ_IDX | \
3103 IWL_CALIB_CFG_RX_IQ_IDX | \
3104 IWL_CALIB_CFG_TEMPERATURE_IDX | \
3105 IWL_CALIB_CFG_PAPD_IDX | \
3106 IWL_CALIB_CFG_TX_PWR_IDX | \
3107 IWL_CALIB_CFG_CRYSTAL_IDX)
3108
3109#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0))
3110
3111struct iwl_calib_cfg_elmnt_s {
3112 __le32 is_enable;
3113 __le32 start;
3114 __le32 send_res;
3115 __le32 apply_res;
3116 __le32 reserved;
3117} __packed;
3118
3119struct iwl_calib_cfg_status_s {
3120 struct iwl_calib_cfg_elmnt_s once;
3121 struct iwl_calib_cfg_elmnt_s perd;
3122 __le32 flags;
3123} __packed;
3124
3125struct iwl_calib_cfg_cmd {
3126 struct iwl_calib_cfg_status_s ucd_calib_cfg;
3127 struct iwl_calib_cfg_status_s drv_calib_cfg;
3128 __le32 reserved1;
3129} __packed;
3130
3131struct iwl_calib_hdr {
3132 u8 op_code;
3133 u8 first_group;
3134 u8 groups_num;
3135 u8 data_valid;
3136} __packed;
3137
3138struct iwl_calib_cmd {
3139 struct iwl_calib_hdr hdr;
3140 u8 data[];
3141} __packed;
3142
3143struct iwl_calib_xtal_freq_cmd {
3144 struct iwl_calib_hdr hdr;
3145 u8 cap_pin1;
3146 u8 cap_pin2;
3147 u8 pad[2];
3148} __packed;
3149
3150#define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700)
3151struct iwl_calib_temperature_offset_cmd {
3152 struct iwl_calib_hdr hdr;
3153 __le16 radio_sensor_offset;
3154 __le16 reserved;
3155} __packed;
3156
3157struct iwl_calib_temperature_offset_v2_cmd {
3158 struct iwl_calib_hdr hdr;
3159 __le16 radio_sensor_offset_high;
3160 __le16 radio_sensor_offset_low;
3161 __le16 burntVoltageRef;
3162 __le16 reserved;
3163} __packed;
3164
3165/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3166struct iwl_calib_chain_noise_reset_cmd {
3167 struct iwl_calib_hdr hdr;
3168 u8 data[];
3169};
3170
3171/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
3172struct iwl_calib_chain_noise_gain_cmd {
3173 struct iwl_calib_hdr hdr;
3174 u8 delta_gain_1;
3175 u8 delta_gain_2;
3176 u8 pad[2];
3177} __packed;
3178
3179/******************************************************************************
3180 * (12)
3181 * Miscellaneous Commands:
3182 *
3183 *****************************************************************************/
3184
3185/*
3186 * LEDs Command & Response
3187 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3188 *
3189 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3190 * this command turns it on or off, or sets up a periodic blinking cycle.
3191 */
3192struct iwl_led_cmd {
3193 __le32 interval; /* "interval" in uSec */
3194 u8 id; /* 1: Activity, 2: Link, 3: Tech */
3195 u8 off; /* # intervals off while blinking;
3196 * "0", with >0 "on" value, turns LED on */
3197 u8 on; /* # intervals on while blinking;
3198 * "0", regardless of "off", turns LED off */
3199 u8 reserved;
3200} __packed;
3201
3202/*
3203 * station priority table entries
3204 * also used as potential "events" value for both
3205 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
3206 */
3207
3208/*
3209 * COEX events entry flag masks
3210 * RP - Requested Priority
3211 * WP - Win Medium Priority: priority assigned when the contention has been won
3212 */
3213#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3214#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3215#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3216
3217#define COEX_CU_UNASSOC_IDLE_RP 4
3218#define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3219#define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3220#define COEX_CU_CALIBRATION_RP 4
3221#define COEX_CU_PERIODIC_CALIBRATION_RP 4
3222#define COEX_CU_CONNECTION_ESTAB_RP 4
3223#define COEX_CU_ASSOCIATED_IDLE_RP 4
3224#define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3225#define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3226#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3227#define COEX_CU_RF_ON_RP 6
3228#define COEX_CU_RF_OFF_RP 4
3229#define COEX_CU_STAND_ALONE_DEBUG_RP 6
3230#define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3231#define COEX_CU_RSRVD1_RP 4
3232#define COEX_CU_RSRVD2_RP 4
3233
3234#define COEX_CU_UNASSOC_IDLE_WP 3
3235#define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3236#define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3237#define COEX_CU_CALIBRATION_WP 3
3238#define COEX_CU_PERIODIC_CALIBRATION_WP 3
3239#define COEX_CU_CONNECTION_ESTAB_WP 3
3240#define COEX_CU_ASSOCIATED_IDLE_WP 3
3241#define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3242#define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3243#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3244#define COEX_CU_RF_ON_WP 3
3245#define COEX_CU_RF_OFF_WP 3
3246#define COEX_CU_STAND_ALONE_DEBUG_WP 6
3247#define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3248#define COEX_CU_RSRVD1_WP 3
3249#define COEX_CU_RSRVD2_WP 3
3250
3251#define COEX_UNASSOC_IDLE_FLAGS 0
3252#define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3253 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3254 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3255#define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3256 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3257 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3258#define COEX_CALIBRATION_FLAGS \
3259 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3260 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3261#define COEX_PERIODIC_CALIBRATION_FLAGS 0
3262/*
3263 * COEX_CONNECTION_ESTAB:
3264 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3265 */
3266#define COEX_CONNECTION_ESTAB_FLAGS \
3267 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3268 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3269 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3270#define COEX_ASSOCIATED_IDLE_FLAGS 0
3271#define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3272 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3273 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3274#define COEX_ASSOC_AUTO_SCAN_FLAGS \
3275 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3276 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3277#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3278#define COEX_RF_ON_FLAGS 0
3279#define COEX_RF_OFF_FLAGS 0
3280#define COEX_STAND_ALONE_DEBUG_FLAGS \
3281 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3282 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3283#define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3284 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3285 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3286 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3287#define COEX_RSRVD1_FLAGS 0
3288#define COEX_RSRVD2_FLAGS 0
3289/*
3290 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3291 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3292 */
3293#define COEX_CU_RF_ON_FLAGS \
3294 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3295 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3296 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3297
3298
3299enum {
3300 /* un-association part */
3301 COEX_UNASSOC_IDLE = 0,
3302 COEX_UNASSOC_MANUAL_SCAN = 1,
3303 COEX_UNASSOC_AUTO_SCAN = 2,
3304 /* calibration */
3305 COEX_CALIBRATION = 3,
3306 COEX_PERIODIC_CALIBRATION = 4,
3307 /* connection */
3308 COEX_CONNECTION_ESTAB = 5,
3309 /* association part */
3310 COEX_ASSOCIATED_IDLE = 6,
3311 COEX_ASSOC_MANUAL_SCAN = 7,
3312 COEX_ASSOC_AUTO_SCAN = 8,
3313 COEX_ASSOC_ACTIVE_LEVEL = 9,
3314 /* RF ON/OFF */
3315 COEX_RF_ON = 10,
3316 COEX_RF_OFF = 11,
3317 COEX_STAND_ALONE_DEBUG = 12,
3318 /* IPAN */
3319 COEX_IPAN_ASSOC_LEVEL = 13,
3320 /* reserved */
3321 COEX_RSRVD1 = 14,
3322 COEX_RSRVD2 = 15,
3323 COEX_NUM_OF_EVENTS = 16
3324};
3325
3326/*
3327 * Coexistence WIFI/WIMAX Command
3328 * COEX_PRIORITY_TABLE_CMD = 0x5a
3329 *
3330 */
3331struct iwl_wimax_coex_event_entry {
3332 u8 request_prio;
3333 u8 win_medium_prio;
3334 u8 reserved;
3335 u8 flags;
3336} __packed;
3337
3338/* COEX flag masks */
3339
3340/* Station table is valid */
3341#define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1)
3342/* UnMask wake up src at unassociated sleep */
3343#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4)
3344/* UnMask wake up src at associated sleep */
3345#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8)
3346/* Enable CoEx feature. */
3347#define COEX_FLAGS_COEX_ENABLE_MSK (0x80)
3348
3349struct iwl_wimax_coex_cmd {
3350 u8 flags;
3351 u8 reserved[3];
3352 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
3353} __packed;
3354
3355/*
3356 * Coexistence MEDIUM NOTIFICATION
3357 * COEX_MEDIUM_NOTIFICATION = 0x5b
3358 *
3359 * notification from uCode to host to indicate medium changes
3360 *
3361 */
3362/*
3363 * status field
3364 * bit 0 - 2: medium status
3365 * bit 3: medium change indication
3366 * bit 4 - 31: reserved
3367 */
3368/* status option values, (0 - 2 bits) */
3369#define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
3370#define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
3371#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3372#define COEX_MEDIUM_MSK (0x7)
3373
3374/* send notification status (1 bit) */
3375#define COEX_MEDIUM_CHANGED (0x8)
3376#define COEX_MEDIUM_CHANGED_MSK (0x8)
3377#define COEX_MEDIUM_SHIFT (3)
3378
3379struct iwl_coex_medium_notification {
3380 __le32 status;
3381 __le32 events;
3382} __packed;
3383
3384/*
3385 * Coexistence EVENT Command
3386 * COEX_EVENT_CMD = 0x5c
3387 *
3388 * send from host to uCode for coex event request.
3389 */
3390/* flags options */
3391#define COEX_EVENT_REQUEST_MSK (0x1)
3392
3393struct iwl_coex_event_cmd {
3394 u8 flags;
3395 u8 event;
3396 __le16 reserved;
3397} __packed;
3398
3399struct iwl_coex_event_resp {
3400 __le32 status;
3401} __packed;
3402
3403
3404/******************************************************************************
3405 * Bluetooth Coexistence commands
3406 *
3407 *****************************************************************************/
3408
3409/*
3410 * BT Status notification
3411 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
3412 */
3413enum iwl_bt_coex_profile_traffic_load {
3414 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0,
3415 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1,
3416 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2,
3417 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3,
3418/*
3419 * There are no more even though below is a u8, the
3420 * indication from the BT device only has two bits.
3421 */
3422};
3423
3424#define BT_SESSION_ACTIVITY_1_UART_MSG 0x1
3425#define BT_SESSION_ACTIVITY_2_UART_MSG 0x2
3426
3427/* BT UART message - Share Part (BT -> WiFi) */
3428#define BT_UART_MSG_FRAME1MSGTYPE_POS (0)
3429#define BT_UART_MSG_FRAME1MSGTYPE_MSK \
3430 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3431#define BT_UART_MSG_FRAME1SSN_POS (3)
3432#define BT_UART_MSG_FRAME1SSN_MSK \
3433 (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3434#define BT_UART_MSG_FRAME1UPDATEREQ_POS (5)
3435#define BT_UART_MSG_FRAME1UPDATEREQ_MSK \
3436 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3437#define BT_UART_MSG_FRAME1RESERVED_POS (6)
3438#define BT_UART_MSG_FRAME1RESERVED_MSK \
3439 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3440
3441#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0)
3442#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \
3443 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3444#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2)
3445#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \
3446 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3447#define BT_UART_MSG_FRAME2CHLSEQN_POS (4)
3448#define BT_UART_MSG_FRAME2CHLSEQN_MSK \
3449 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3450#define BT_UART_MSG_FRAME2INBAND_POS (5)
3451#define BT_UART_MSG_FRAME2INBAND_MSK \
3452 (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3453#define BT_UART_MSG_FRAME2RESERVED_POS (6)
3454#define BT_UART_MSG_FRAME2RESERVED_MSK \
3455 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3456
3457#define BT_UART_MSG_FRAME3SCOESCO_POS (0)
3458#define BT_UART_MSG_FRAME3SCOESCO_MSK \
3459 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3460#define BT_UART_MSG_FRAME3SNIFF_POS (1)
3461#define BT_UART_MSG_FRAME3SNIFF_MSK \
3462 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3463#define BT_UART_MSG_FRAME3A2DP_POS (2)
3464#define BT_UART_MSG_FRAME3A2DP_MSK \
3465 (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3466#define BT_UART_MSG_FRAME3ACL_POS (3)
3467#define BT_UART_MSG_FRAME3ACL_MSK \
3468 (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3469#define BT_UART_MSG_FRAME3MASTER_POS (4)
3470#define BT_UART_MSG_FRAME3MASTER_MSK \
3471 (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3472#define BT_UART_MSG_FRAME3OBEX_POS (5)
3473#define BT_UART_MSG_FRAME3OBEX_MSK \
3474 (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3475#define BT_UART_MSG_FRAME3RESERVED_POS (6)
3476#define BT_UART_MSG_FRAME3RESERVED_MSK \
3477 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3478
3479#define BT_UART_MSG_FRAME4IDLEDURATION_POS (0)
3480#define BT_UART_MSG_FRAME4IDLEDURATION_MSK \
3481 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3482#define BT_UART_MSG_FRAME4RESERVED_POS (6)
3483#define BT_UART_MSG_FRAME4RESERVED_MSK \
3484 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3485
3486#define BT_UART_MSG_FRAME5TXACTIVITY_POS (0)
3487#define BT_UART_MSG_FRAME5TXACTIVITY_MSK \
3488 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3489#define BT_UART_MSG_FRAME5RXACTIVITY_POS (2)
3490#define BT_UART_MSG_FRAME5RXACTIVITY_MSK \
3491 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3492#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4)
3493#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \
3494 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3495#define BT_UART_MSG_FRAME5RESERVED_POS (6)
3496#define BT_UART_MSG_FRAME5RESERVED_MSK \
3497 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3498
3499#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0)
3500#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \
3501 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3502#define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5)
3503#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \
3504 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3505#define BT_UART_MSG_FRAME6RESERVED_POS (6)
3506#define BT_UART_MSG_FRAME6RESERVED_MSK \
3507 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3508
3509#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0)
3510#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \
3511 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
3512#define BT_UART_MSG_FRAME7PAGE_POS (3)
3513#define BT_UART_MSG_FRAME7PAGE_MSK \
3514 (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3515#define BT_UART_MSG_FRAME7INQUIRY_POS (4)
3516#define BT_UART_MSG_FRAME7INQUIRY_MSK \
3517 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
3518#define BT_UART_MSG_FRAME7CONNECTABLE_POS (5)
3519#define BT_UART_MSG_FRAME7CONNECTABLE_MSK \
3520 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3521#define BT_UART_MSG_FRAME7RESERVED_POS (6)
3522#define BT_UART_MSG_FRAME7RESERVED_MSK \
3523 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3524
3525/* BT Session Activity 2 UART message (BT -> WiFi) */
3526#define BT_UART_MSG_2_FRAME1RESERVED1_POS (5)
3527#define BT_UART_MSG_2_FRAME1RESERVED1_MSK \
3528 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3529#define BT_UART_MSG_2_FRAME1RESERVED2_POS (6)
3530#define BT_UART_MSG_2_FRAME1RESERVED2_MSK \
3531 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3532
3533#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0)
3534#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \
3535 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3536#define BT_UART_MSG_2_FRAME2RESERVED_POS (6)
3537#define BT_UART_MSG_2_FRAME2RESERVED_MSK \
3538 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3539
3540#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0)
3541#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \
3542 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3543#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4)
3544#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \
3545 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3546#define BT_UART_MSG_2_FRAME3LEMASTER_POS (5)
3547#define BT_UART_MSG_2_FRAME3LEMASTER_MSK \
3548 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3549#define BT_UART_MSG_2_FRAME3RESERVED_POS (6)
3550#define BT_UART_MSG_2_FRAME3RESERVED_MSK \
3551 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3552
3553#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0)
3554#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \
3555 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3556#define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4)
3557#define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \
3558 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3559#define BT_UART_MSG_2_FRAME4RESERVED_POS (6)
3560#define BT_UART_MSG_2_FRAME4RESERVED_MSK \
3561 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3562
3563#define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0)
3564#define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \
3565 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3566#define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4)
3567#define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \
3568 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3569#define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5)
3570#define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \
3571 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3572#define BT_UART_MSG_2_FRAME5RESERVED_POS (6)
3573#define BT_UART_MSG_2_FRAME5RESERVED_MSK \
3574 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3575
3576#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0)
3577#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \
3578 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3579#define BT_UART_MSG_2_FRAME6RFU_POS (5)
3580#define BT_UART_MSG_2_FRAME6RFU_MSK \
3581 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3582#define BT_UART_MSG_2_FRAME6RESERVED_POS (6)
3583#define BT_UART_MSG_2_FRAME6RESERVED_MSK \
3584 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3585
3586#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0)
3587#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \
3588 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3589#define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3)
3590#define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \
3591 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3592#define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4)
3593#define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \
3594 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3595#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5)
3596#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \
3597 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3598#define BT_UART_MSG_2_FRAME7RESERVED_POS (6)
3599#define BT_UART_MSG_2_FRAME7RESERVED_MSK \
3600 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3601
3602
3603#define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD (-62)
3604#define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD (-65)
3605
3606struct iwl_bt_uart_msg {
3607 u8 header;
3608 u8 frame1;
3609 u8 frame2;
3610 u8 frame3;
3611 u8 frame4;
3612 u8 frame5;
3613 u8 frame6;
3614 u8 frame7;
3615} __packed;
3616
3617struct iwl_bt_coex_profile_notif {
3618 struct iwl_bt_uart_msg last_bt_uart_msg;
3619 u8 bt_status; /* 0 - off, 1 - on */
3620 u8 bt_traffic_load; /* 0 .. 3? */
3621 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3622 u8 reserved;
3623} __packed;
3624
3625#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3626#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3627#define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1
3628#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e
3629#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4
3630#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0
3631#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1
3632
3633/*
3634 * BT Coexistence Priority table
3635 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3636 */
3637enum bt_coex_prio_table_events {
3638 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3639 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3640 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3641 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3642 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3643 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3644 BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3645 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3646 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3647 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3648 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3649 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3650 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3651 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3652 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3653 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3654 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3655 BT_COEX_PRIO_TBL_EVT_MAX,
3656};
3657
3658enum bt_coex_prio_table_priorities {
3659 BT_COEX_PRIO_TBL_DISABLED = 0,
3660 BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3661 BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3662 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3663 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3664 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3665 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3666 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3667 BT_COEX_PRIO_TBL_MAX,
3668};
3669
3670struct iwl_bt_coex_prio_table_cmd {
3671 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
3672} __packed;
3673
3674#define IWL_BT_COEX_ENV_CLOSE 0
3675#define IWL_BT_COEX_ENV_OPEN 1
3676/*
3677 * BT Protection Envelope
3678 * REPLY_BT_COEX_PROT_ENV = 0xcd
3679 */
3680struct iwl_bt_coex_prot_env_cmd {
3681 u8 action; /* 0 = closed, 1 = open */
3682 u8 type; /* 0 .. 15 */
3683 u8 reserved[2];
3684} __packed;
3685
3686/*
3687 * REPLY_D3_CONFIG
3688 */
3689enum iwlagn_d3_wakeup_filters {
3690 IWLAGN_D3_WAKEUP_RFKILL = BIT(0),
3691 IWLAGN_D3_WAKEUP_SYSASSERT = BIT(1),
3692};
3693
3694struct iwlagn_d3_config_cmd {
3695 __le32 min_sleep_time;
3696 __le32 wakeup_flags;
3697} __packed;
3698
3699/*
3700 * REPLY_WOWLAN_PATTERNS
3701 */
3702#define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16
3703#define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128
3704
3705struct iwlagn_wowlan_pattern {
3706 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8];
3707 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN];
3708 u8 mask_size;
3709 u8 pattern_size;
3710 __le16 reserved;
3711} __packed;
3712
3713#define IWLAGN_WOWLAN_MAX_PATTERNS 20
3714
3715struct iwlagn_wowlan_patterns_cmd {
3716 __le32 n_patterns;
3717 struct iwlagn_wowlan_pattern patterns[];
3718} __packed;
3719
3720/*
3721 * REPLY_WOWLAN_WAKEUP_FILTER
3722 */
3723enum iwlagn_wowlan_wakeup_filters {
3724 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0),
3725 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1),
3726 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2),
3727 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3),
3728 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4),
3729 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(5),
3730 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(6),
3731 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(7),
3732 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(8),
3733};
3734
3735struct iwlagn_wowlan_wakeup_filter_cmd {
3736 __le32 enabled;
3737 __le16 non_qos_seq;
3738 __le16 reserved;
3739 __le16 qos_seq[8];
3740};
3741
3742/*
3743 * REPLY_WOWLAN_TSC_RSC_PARAMS
3744 */
3745#define IWLAGN_NUM_RSC 16
3746
3747struct tkip_sc {
3748 __le16 iv16;
3749 __le16 pad;
3750 __le32 iv32;
3751} __packed;
3752
3753struct iwlagn_tkip_rsc_tsc {
3754 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC];
3755 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC];
3756 struct tkip_sc tsc;
3757} __packed;
3758
3759struct aes_sc {
3760 __le64 pn;
3761} __packed;
3762
3763struct iwlagn_aes_rsc_tsc {
3764 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC];
3765 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC];
3766 struct aes_sc tsc;
3767} __packed;
3768
3769union iwlagn_all_tsc_rsc {
3770 struct iwlagn_tkip_rsc_tsc tkip;
3771 struct iwlagn_aes_rsc_tsc aes;
3772};
3773
3774struct iwlagn_wowlan_rsc_tsc_params_cmd {
3775 union iwlagn_all_tsc_rsc all_tsc_rsc;
3776} __packed;
3777
3778/*
3779 * REPLY_WOWLAN_TKIP_PARAMS
3780 */
3781#define IWLAGN_MIC_KEY_SIZE 8
3782#define IWLAGN_P1K_SIZE 5
3783struct iwlagn_mic_keys {
3784 u8 tx[IWLAGN_MIC_KEY_SIZE];
3785 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE];
3786 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE];
3787} __packed;
3788
3789struct iwlagn_p1k_cache {
3790 __le16 p1k[IWLAGN_P1K_SIZE];
3791} __packed;
3792
3793#define IWLAGN_NUM_RX_P1K_CACHE 2
3794
3795struct iwlagn_wowlan_tkip_params_cmd {
3796 struct iwlagn_mic_keys mic_keys;
3797 struct iwlagn_p1k_cache tx;
3798 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE];
3799 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE];
3800} __packed;
3801
3802/*
3803 * REPLY_WOWLAN_KEK_KCK_MATERIAL
3804 */
3805
3806#define IWLAGN_KCK_MAX_SIZE 32
3807#define IWLAGN_KEK_MAX_SIZE 32
3808
3809struct iwlagn_wowlan_kek_kck_material_cmd {
3810 u8 kck[IWLAGN_KCK_MAX_SIZE];
3811 u8 kek[IWLAGN_KEK_MAX_SIZE];
3812 __le16 kck_len;
3813 __le16 kek_len;
3814 __le64 replay_ctr;
3815} __packed;
3816
3817#define RF_KILL_INDICATOR_FOR_WOWLAN 0x87
3818
3819/*
3820 * REPLY_WOWLAN_GET_STATUS = 0xe5
3821 */
3822struct iwlagn_wowlan_status {
3823 __le64 replay_ctr;
3824 __le32 rekey_status;
3825 __le32 wakeup_reason;
3826 u8 pattern_number;
3827 u8 reserved1;
3828 __le16 qos_seq_ctr[8];
3829 __le16 non_qos_seq_ctr;
3830 __le16 reserved2;
3831 union iwlagn_all_tsc_rsc tsc_rsc;
3832 __le16 reserved3;
3833} __packed;
3834
3835/*
3836 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3837 */
3838
3839/*
3840 * Minimum slot time in TU
3841 */
3842#define IWL_MIN_SLOT_TIME 20
3843
3844/**
3845 * struct iwl_wipan_slot
3846 * @width: Time in TU
3847 * @type:
3848 * 0 - BSS
3849 * 1 - PAN
3850 */
3851struct iwl_wipan_slot {
3852 __le16 width;
3853 u8 type;
3854 u8 reserved;
3855} __packed;
3856
3857#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */
3858#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */
3859#define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */
3860#define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4)
3861#define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5)
3862
3863/**
3864 * struct iwl_wipan_params_cmd
3865 * @flags:
3866 * bit0: reserved
3867 * bit1: CP leave channel with CTS
3868 * bit2: CP leave channel qith Quiet
3869 * bit3: slotted mode
3870 * 1 - work in slotted mode
3871 * 0 - work in non slotted mode
3872 * bit4: filter beacon notification
3873 * bit5: full tx slotted mode. if this flag is set,
3874 * uCode will perform leaving channel methods in context switch
3875 * also when working in same channel mode
3876 * @num_slots: 1 - 10
3877 */
3878struct iwl_wipan_params_cmd {
3879 __le16 flags;
3880 u8 reserved;
3881 u8 num_slots;
3882 struct iwl_wipan_slot slots[10];
3883} __packed;
3884
3885/*
3886 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3887 *
3888 * TODO: Figure out what this is used for,
3889 * it can only switch between 2.4 GHz
3890 * channels!!
3891 */
3892
3893struct iwl_wipan_p2p_channel_switch_cmd {
3894 __le16 channel;
3895 __le16 reserved;
3896};
3897
3898/*
3899 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3900 *
3901 * This is used by the device to notify us of the
3902 * NoA schedule it determined so we can forward it
3903 * to userspace for inclusion in probe responses.
3904 *
3905 * In beacons, the NoA schedule is simply appended
3906 * to the frame we give the device.
3907 */
3908
3909struct iwl_wipan_noa_descriptor {
3910 u8 count;
3911 __le32 duration;
3912 __le32 interval;
3913 __le32 starttime;
3914} __packed;
3915
3916struct iwl_wipan_noa_attribute {
3917 u8 id;
3918 __le16 length;
3919 u8 index;
3920 u8 ct_window;
3921 struct iwl_wipan_noa_descriptor descr0, descr1;
3922 u8 reserved;
3923} __packed;
3924
3925struct iwl_wipan_noa_notification {
3926 u32 noa_active;
3927 struct iwl_wipan_noa_attribute noa_attribute;
3928} __packed;
3929
3930#endif /* __iwl_commands_h__ */
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * The full GNU General Public License is included in this distribution
20 * in the file called COPYING.
21 *
22 * Contact Information:
23 * Intel Linux Wireless <linuxwifi@intel.com>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 * BSD LICENSE
27 *
28 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
33 * are met:
34 *
35 * * Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * * Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in
39 * the documentation and/or other materials provided with the
40 * distribution.
41 * * Neither the name Intel Corporation nor the names of its
42 * contributors may be used to endorse or promote products derived
43 * from this software without specific prior written permission.
44 *
45 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
46 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
47 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
48 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
49 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
50 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
51 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
52 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
53 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
54 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
55 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 *
57 *****************************************************************************/
58/*
59 * Please use this file (commands.h) only for uCode API definitions.
60 * Please use iwl-xxxx-hw.h for hardware-related definitions.
61 * Please use dev.h for driver implementation definitions.
62 */
63
64#ifndef __iwl_commands_h__
65#define __iwl_commands_h__
66
67#include <linux/ieee80211.h>
68#include <linux/types.h>
69
70
71enum {
72 REPLY_ALIVE = 0x1,
73 REPLY_ERROR = 0x2,
74 REPLY_ECHO = 0x3, /* test command */
75
76 /* RXON and QOS commands */
77 REPLY_RXON = 0x10,
78 REPLY_RXON_ASSOC = 0x11,
79 REPLY_QOS_PARAM = 0x13,
80 REPLY_RXON_TIMING = 0x14,
81
82 /* Multi-Station support */
83 REPLY_ADD_STA = 0x18,
84 REPLY_REMOVE_STA = 0x19,
85 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
86 REPLY_TXFIFO_FLUSH = 0x1e,
87
88 /* Security */
89 REPLY_WEPKEY = 0x20,
90
91 /* RX, TX, LEDs */
92 REPLY_TX = 0x1c,
93 REPLY_LEDS_CMD = 0x48,
94 REPLY_TX_LINK_QUALITY_CMD = 0x4e,
95
96 /* WiMAX coexistence */
97 COEX_PRIORITY_TABLE_CMD = 0x5a,
98 COEX_MEDIUM_NOTIFICATION = 0x5b,
99 COEX_EVENT_CMD = 0x5c,
100
101 /* Calibration */
102 TEMPERATURE_NOTIFICATION = 0x62,
103 CALIBRATION_CFG_CMD = 0x65,
104 CALIBRATION_RES_NOTIFICATION = 0x66,
105 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
106
107 /* 802.11h related */
108 REPLY_QUIET_CMD = 0x71, /* not used */
109 REPLY_CHANNEL_SWITCH = 0x72,
110 CHANNEL_SWITCH_NOTIFICATION = 0x73,
111 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
112 SPECTRUM_MEASURE_NOTIFICATION = 0x75,
113
114 /* Power Management */
115 POWER_TABLE_CMD = 0x77,
116 PM_SLEEP_NOTIFICATION = 0x7A,
117 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
118
119 /* Scan commands and notifications */
120 REPLY_SCAN_CMD = 0x80,
121 REPLY_SCAN_ABORT_CMD = 0x81,
122 SCAN_START_NOTIFICATION = 0x82,
123 SCAN_RESULTS_NOTIFICATION = 0x83,
124 SCAN_COMPLETE_NOTIFICATION = 0x84,
125
126 /* IBSS/AP commands */
127 BEACON_NOTIFICATION = 0x90,
128 REPLY_TX_BEACON = 0x91,
129 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
130
131 /* Miscellaneous commands */
132 REPLY_TX_POWER_DBM_CMD = 0x95,
133 QUIET_NOTIFICATION = 0x96, /* not used */
134 REPLY_TX_PWR_TABLE_CMD = 0x97,
135 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
136 TX_ANT_CONFIGURATION_CMD = 0x98,
137 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
138
139 /* Bluetooth device coexistence config command */
140 REPLY_BT_CONFIG = 0x9b,
141
142 /* Statistics */
143 REPLY_STATISTICS_CMD = 0x9c,
144 STATISTICS_NOTIFICATION = 0x9d,
145
146 /* RF-KILL commands and notifications */
147 REPLY_CARD_STATE_CMD = 0xa0,
148 CARD_STATE_NOTIFICATION = 0xa1,
149
150 /* Missed beacons notification */
151 MISSED_BEACONS_NOTIFICATION = 0xa2,
152
153 REPLY_CT_KILL_CONFIG_CMD = 0xa4,
154 SENSITIVITY_CMD = 0xa8,
155 REPLY_PHY_CALIBRATION_CMD = 0xb0,
156 REPLY_RX_PHY_CMD = 0xc0,
157 REPLY_RX_MPDU_CMD = 0xc1,
158 REPLY_RX = 0xc3,
159 REPLY_COMPRESSED_BA = 0xc5,
160
161 /* BT Coex */
162 REPLY_BT_COEX_PRIO_TABLE = 0xcc,
163 REPLY_BT_COEX_PROT_ENV = 0xcd,
164 REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
165
166 /* PAN commands */
167 REPLY_WIPAN_PARAMS = 0xb2,
168 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */
169 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
170 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */
171 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */
172 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */
173 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
174 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
175 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
176
177 REPLY_WOWLAN_PATTERNS = 0xe0,
178 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1,
179 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2,
180 REPLY_WOWLAN_TKIP_PARAMS = 0xe3,
181 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4,
182 REPLY_WOWLAN_GET_STATUS = 0xe5,
183 REPLY_D3_CONFIG = 0xd3,
184
185 REPLY_MAX = 0xff
186};
187
188/*
189 * Minimum number of queues. MAX_NUM is defined in hw specific files.
190 * Set the minimum to accommodate
191 * - 4 standard TX queues
192 * - the command queue
193 * - 4 PAN TX queues
194 * - the PAN multicast queue, and
195 * - the AUX (TX during scan dwell) queue.
196 */
197#define IWL_MIN_NUM_QUEUES 11
198
199/*
200 * Command queue depends on iPAN support.
201 */
202#define IWL_DEFAULT_CMD_QUEUE_NUM 4
203#define IWL_IPAN_CMD_QUEUE_NUM 9
204
205#define IWL_TX_FIFO_BK 0 /* shared */
206#define IWL_TX_FIFO_BE 1
207#define IWL_TX_FIFO_VI 2 /* shared */
208#define IWL_TX_FIFO_VO 3
209#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK
210#define IWL_TX_FIFO_BE_IPAN 4
211#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI
212#define IWL_TX_FIFO_VO_IPAN 5
213/* re-uses the VO FIFO, uCode will properly flush/schedule */
214#define IWL_TX_FIFO_AUX 5
215#define IWL_TX_FIFO_UNUSED 255
216
217#define IWLAGN_CMD_FIFO_NUM 7
218
219/*
220 * This queue number is required for proper operation
221 * because the ucode will stop/start the scheduler as
222 * required.
223 */
224#define IWL_IPAN_MCAST_QUEUE 8
225
226/******************************************************************************
227 * (0)
228 * Commonly used structures and definitions:
229 * Command header, rate_n_flags, txpower
230 *
231 *****************************************************************************/
232
233/**
234 * iwlagn rate_n_flags bit fields
235 *
236 * rate_n_flags format is used in following iwlagn commands:
237 * REPLY_RX (response only)
238 * REPLY_RX_MPDU (response only)
239 * REPLY_TX (both command and response)
240 * REPLY_TX_LINK_QUALITY_CMD
241 *
242 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
243 * 2-0: 0) 6 Mbps
244 * 1) 12 Mbps
245 * 2) 18 Mbps
246 * 3) 24 Mbps
247 * 4) 36 Mbps
248 * 5) 48 Mbps
249 * 6) 54 Mbps
250 * 7) 60 Mbps
251 *
252 * 4-3: 0) Single stream (SISO)
253 * 1) Dual stream (MIMO)
254 * 2) Triple stream (MIMO)
255 *
256 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
257 *
258 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
259 * 3-0: 0xD) 6 Mbps
260 * 0xF) 9 Mbps
261 * 0x5) 12 Mbps
262 * 0x7) 18 Mbps
263 * 0x9) 24 Mbps
264 * 0xB) 36 Mbps
265 * 0x1) 48 Mbps
266 * 0x3) 54 Mbps
267 *
268 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
269 * 6-0: 10) 1 Mbps
270 * 20) 2 Mbps
271 * 55) 5.5 Mbps
272 * 110) 11 Mbps
273 */
274#define RATE_MCS_CODE_MSK 0x7
275#define RATE_MCS_SPATIAL_POS 3
276#define RATE_MCS_SPATIAL_MSK 0x18
277#define RATE_MCS_HT_DUP_POS 5
278#define RATE_MCS_HT_DUP_MSK 0x20
279/* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
280#define RATE_MCS_RATE_MSK 0xff
281
282/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
283#define RATE_MCS_FLAGS_POS 8
284#define RATE_MCS_HT_POS 8
285#define RATE_MCS_HT_MSK 0x100
286
287/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
288#define RATE_MCS_CCK_POS 9
289#define RATE_MCS_CCK_MSK 0x200
290
291/* Bit 10: (1) Use Green Field preamble */
292#define RATE_MCS_GF_POS 10
293#define RATE_MCS_GF_MSK 0x400
294
295/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
296#define RATE_MCS_HT40_POS 11
297#define RATE_MCS_HT40_MSK 0x800
298
299/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
300#define RATE_MCS_DUP_POS 12
301#define RATE_MCS_DUP_MSK 0x1000
302
303/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
304#define RATE_MCS_SGI_POS 13
305#define RATE_MCS_SGI_MSK 0x2000
306
307/**
308 * rate_n_flags Tx antenna masks
309 * bit14:16
310 */
311#define RATE_MCS_ANT_POS 14
312#define RATE_MCS_ANT_A_MSK 0x04000
313#define RATE_MCS_ANT_B_MSK 0x08000
314#define RATE_MCS_ANT_C_MSK 0x10000
315#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
316#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
317#define RATE_ANT_NUM 3
318
319#define POWER_TABLE_NUM_ENTRIES 33
320#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
321#define POWER_TABLE_CCK_ENTRY 32
322
323#define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
324#define IWL_PWR_CCK_ENTRIES 2
325
326/**
327 * struct tx_power_dual_stream
328 *
329 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
330 *
331 * Same format as iwl_tx_power_dual_stream, but __le32
332 */
333struct tx_power_dual_stream {
334 __le32 dw;
335} __packed;
336
337/**
338 * Command REPLY_TX_POWER_DBM_CMD = 0x98
339 * struct iwlagn_tx_power_dbm_cmd
340 */
341#define IWLAGN_TX_POWER_AUTO 0x7f
342#define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
343
344struct iwlagn_tx_power_dbm_cmd {
345 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
346 u8 flags;
347 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
348 u8 reserved;
349} __packed;
350
351/**
352 * Command TX_ANT_CONFIGURATION_CMD = 0x98
353 * This command is used to configure valid Tx antenna.
354 * By default uCode concludes the valid antenna according to the radio flavor.
355 * This command enables the driver to override/modify this conclusion.
356 */
357struct iwl_tx_ant_config_cmd {
358 __le32 valid;
359} __packed;
360
361/******************************************************************************
362 * (0a)
363 * Alive and Error Commands & Responses:
364 *
365 *****************************************************************************/
366
367#define UCODE_VALID_OK cpu_to_le32(0x1)
368
369/**
370 * REPLY_ALIVE = 0x1 (response only, not a command)
371 *
372 * uCode issues this "alive" notification once the runtime image is ready
373 * to receive commands from the driver. This is the *second* "alive"
374 * notification that the driver will receive after rebooting uCode;
375 * this "alive" is indicated by subtype field != 9.
376 *
377 * See comments documenting "BSM" (bootstrap state machine).
378 *
379 * This response includes two pointers to structures within the device's
380 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
381 *
382 * 1) log_event_table_ptr indicates base of the event log. This traces
383 * a 256-entry history of uCode execution within a circular buffer.
384 * Its header format is:
385 *
386 * __le32 log_size; log capacity (in number of entries)
387 * __le32 type; (1) timestamp with each entry, (0) no timestamp
388 * __le32 wraps; # times uCode has wrapped to top of circular buffer
389 * __le32 write_index; next circular buffer entry that uCode would fill
390 *
391 * The header is followed by the circular buffer of log entries. Entries
392 * with timestamps have the following format:
393 *
394 * __le32 event_id; range 0 - 1500
395 * __le32 timestamp; low 32 bits of TSF (of network, if associated)
396 * __le32 data; event_id-specific data value
397 *
398 * Entries without timestamps contain only event_id and data.
399 *
400 *
401 * 2) error_event_table_ptr indicates base of the error log. This contains
402 * information about any uCode error that occurs. For agn, the format
403 * of the error log is defined by struct iwl_error_event_table.
404 *
405 * The Linux driver can print both logs to the system log when a uCode error
406 * occurs.
407 */
408
409/*
410 * Note: This structure is read from the device with IO accesses,
411 * and the reading already does the endian conversion. As it is
412 * read with u32-sized accesses, any members with a different size
413 * need to be ordered correctly though!
414 */
415struct iwl_error_event_table {
416 u32 valid; /* (nonzero) valid, (0) log is empty */
417 u32 error_id; /* type of error */
418 u32 pc; /* program counter */
419 u32 blink1; /* branch link */
420 u32 blink2; /* branch link */
421 u32 ilink1; /* interrupt link */
422 u32 ilink2; /* interrupt link */
423 u32 data1; /* error-specific data */
424 u32 data2; /* error-specific data */
425 u32 line; /* source code line of error */
426 u32 bcon_time; /* beacon timer */
427 u32 tsf_low; /* network timestamp function timer */
428 u32 tsf_hi; /* network timestamp function timer */
429 u32 gp1; /* GP1 timer register */
430 u32 gp2; /* GP2 timer register */
431 u32 gp3; /* GP3 timer register */
432 u32 ucode_ver; /* uCode version */
433 u32 hw_ver; /* HW Silicon version */
434 u32 brd_ver; /* HW board version */
435 u32 log_pc; /* log program counter */
436 u32 frame_ptr; /* frame pointer */
437 u32 stack_ptr; /* stack pointer */
438 u32 hcmd; /* last host command header */
439 u32 isr0; /* isr status register LMPM_NIC_ISR0:
440 * rxtx_flag */
441 u32 isr1; /* isr status register LMPM_NIC_ISR1:
442 * host_flag */
443 u32 isr2; /* isr status register LMPM_NIC_ISR2:
444 * enc_flag */
445 u32 isr3; /* isr status register LMPM_NIC_ISR3:
446 * time_flag */
447 u32 isr4; /* isr status register LMPM_NIC_ISR4:
448 * wico interrupt */
449 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
450 u32 wait_event; /* wait event() caller address */
451 u32 l2p_control; /* L2pControlField */
452 u32 l2p_duration; /* L2pDurationField */
453 u32 l2p_mhvalid; /* L2pMhValidBits */
454 u32 l2p_addr_match; /* L2pAddrMatchStat */
455 u32 lmpm_pmg_sel; /* indicate which clocks are turned on
456 * (LMPM_PMG_SEL) */
457 u32 u_timestamp; /* indicate when the date and time of the
458 * compilation */
459 u32 flow_handler; /* FH read/write pointers, RX credit */
460} __packed;
461
462struct iwl_alive_resp {
463 u8 ucode_minor;
464 u8 ucode_major;
465 __le16 reserved1;
466 u8 sw_rev[8];
467 u8 ver_type;
468 u8 ver_subtype; /* not "9" for runtime alive */
469 __le16 reserved2;
470 __le32 log_event_table_ptr; /* SRAM address for event log */
471 __le32 error_event_table_ptr; /* SRAM address for error log */
472 __le32 timestamp;
473 __le32 is_valid;
474} __packed;
475
476/*
477 * REPLY_ERROR = 0x2 (response only, not a command)
478 */
479struct iwl_error_resp {
480 __le32 error_type;
481 u8 cmd_id;
482 u8 reserved1;
483 __le16 bad_cmd_seq_num;
484 __le32 error_info;
485 __le64 timestamp;
486} __packed;
487
488/******************************************************************************
489 * (1)
490 * RXON Commands & Responses:
491 *
492 *****************************************************************************/
493
494/*
495 * Rx config defines & structure
496 */
497/* rx_config device types */
498enum {
499 RXON_DEV_TYPE_AP = 1,
500 RXON_DEV_TYPE_ESS = 3,
501 RXON_DEV_TYPE_IBSS = 4,
502 RXON_DEV_TYPE_SNIFFER = 6,
503 RXON_DEV_TYPE_CP = 7,
504 RXON_DEV_TYPE_2STA = 8,
505 RXON_DEV_TYPE_P2P = 9,
506};
507
508
509#define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
510#define RXON_RX_CHAIN_DRIVER_FORCE_POS (0)
511#define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
512#define RXON_RX_CHAIN_VALID_POS (1)
513#define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
514#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
515#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
516#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
517#define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
518#define RXON_RX_CHAIN_CNT_POS (10)
519#define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
520#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
521#define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
522#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
523
524/* rx_config flags */
525/* band & modulation selection */
526#define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
527#define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
528/* auto detection enable */
529#define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
530/* TGg protection when tx */
531#define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
532/* cck short slot & preamble */
533#define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
534#define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
535/* antenna selection */
536#define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
537#define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
538#define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
539#define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
540/* radar detection enable */
541#define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
542#define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
543/* rx response to host with 8-byte TSF
544* (according to ON_AIR deassertion) */
545#define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
546
547
548/* HT flags */
549#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
550#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
551
552#define RXON_FLG_HT_OPERATING_MODE_POS (23)
553
554#define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
555#define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23)
556
557#define RXON_FLG_CHANNEL_MODE_POS (25)
558#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
559
560/* channel mode */
561enum {
562 CHANNEL_MODE_LEGACY = 0,
563 CHANNEL_MODE_PURE_40 = 1,
564 CHANNEL_MODE_MIXED = 2,
565 CHANNEL_MODE_RESERVED = 3,
566};
567#define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
568#define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
569#define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
570
571/* CTS to self (if spec allows) flag */
572#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
573
574/* rx_config filter flags */
575/* accept all data frames */
576#define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
577/* pass control & management to host */
578#define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
579/* accept multi-cast */
580#define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
581/* don't decrypt uni-cast frames */
582#define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
583/* don't decrypt multi-cast frames */
584#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
585/* STA is associated */
586#define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
587/* transfer to host non bssid beacons in associated state */
588#define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
589
590/**
591 * REPLY_RXON = 0x10 (command, has simple generic response)
592 *
593 * RXON tunes the radio tuner to a service channel, and sets up a number
594 * of parameters that are used primarily for Rx, but also for Tx operations.
595 *
596 * NOTE: When tuning to a new channel, driver must set the
597 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent
598 * info within the device, including the station tables, tx retry
599 * rate tables, and txpower tables. Driver must build a new station
600 * table and txpower table before transmitting anything on the RXON
601 * channel.
602 *
603 * NOTE: All RXONs wipe clean the internal txpower table. Driver must
604 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
605 * regardless of whether RXON_FILTER_ASSOC_MSK is set.
606 */
607
608struct iwl_rxon_cmd {
609 u8 node_addr[6];
610 __le16 reserved1;
611 u8 bssid_addr[6];
612 __le16 reserved2;
613 u8 wlap_bssid_addr[6];
614 __le16 reserved3;
615 u8 dev_type;
616 u8 air_propagation;
617 __le16 rx_chain;
618 u8 ofdm_basic_rates;
619 u8 cck_basic_rates;
620 __le16 assoc_id;
621 __le32 flags;
622 __le32 filter_flags;
623 __le16 channel;
624 u8 ofdm_ht_single_stream_basic_rates;
625 u8 ofdm_ht_dual_stream_basic_rates;
626 u8 ofdm_ht_triple_stream_basic_rates;
627 u8 reserved5;
628 __le16 acquisition_data;
629 __le16 reserved6;
630} __packed;
631
632/*
633 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
634 */
635struct iwl_rxon_assoc_cmd {
636 __le32 flags;
637 __le32 filter_flags;
638 u8 ofdm_basic_rates;
639 u8 cck_basic_rates;
640 __le16 reserved1;
641 u8 ofdm_ht_single_stream_basic_rates;
642 u8 ofdm_ht_dual_stream_basic_rates;
643 u8 ofdm_ht_triple_stream_basic_rates;
644 u8 reserved2;
645 __le16 rx_chain_select_flags;
646 __le16 acquisition_data;
647 __le32 reserved3;
648} __packed;
649
650#define IWL_CONN_MAX_LISTEN_INTERVAL 10
651#define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */
652
653/*
654 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
655 */
656struct iwl_rxon_time_cmd {
657 __le64 timestamp;
658 __le16 beacon_interval;
659 __le16 atim_window;
660 __le32 beacon_init_val;
661 __le16 listen_interval;
662 u8 dtim_period;
663 u8 delta_cp_bss_tbtts;
664} __packed;
665
666/*
667 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
668 */
669/**
670 * struct iwl5000_channel_switch_cmd
671 * @band: 0- 5.2GHz, 1- 2.4GHz
672 * @expect_beacon: 0- resume transmits after channel switch
673 * 1- wait for beacon to resume transmits
674 * @channel: new channel number
675 * @rxon_flags: Rx on flags
676 * @rxon_filter_flags: filtering parameters
677 * @switch_time: switch time in extended beacon format
678 * @reserved: reserved bytes
679 */
680struct iwl5000_channel_switch_cmd {
681 u8 band;
682 u8 expect_beacon;
683 __le16 channel;
684 __le32 rxon_flags;
685 __le32 rxon_filter_flags;
686 __le32 switch_time;
687 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
688} __packed;
689
690/**
691 * struct iwl6000_channel_switch_cmd
692 * @band: 0- 5.2GHz, 1- 2.4GHz
693 * @expect_beacon: 0- resume transmits after channel switch
694 * 1- wait for beacon to resume transmits
695 * @channel: new channel number
696 * @rxon_flags: Rx on flags
697 * @rxon_filter_flags: filtering parameters
698 * @switch_time: switch time in extended beacon format
699 * @reserved: reserved bytes
700 */
701struct iwl6000_channel_switch_cmd {
702 u8 band;
703 u8 expect_beacon;
704 __le16 channel;
705 __le32 rxon_flags;
706 __le32 rxon_filter_flags;
707 __le32 switch_time;
708 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
709} __packed;
710
711/*
712 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
713 */
714struct iwl_csa_notification {
715 __le16 band;
716 __le16 channel;
717 __le32 status; /* 0 - OK, 1 - fail */
718} __packed;
719
720/******************************************************************************
721 * (2)
722 * Quality-of-Service (QOS) Commands & Responses:
723 *
724 *****************************************************************************/
725
726/**
727 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
728 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
729 *
730 * @cw_min: Contention window, start value in numbers of slots.
731 * Should be a power-of-2, minus 1. Device's default is 0x0f.
732 * @cw_max: Contention window, max value in numbers of slots.
733 * Should be a power-of-2, minus 1. Device's default is 0x3f.
734 * @aifsn: Number of slots in Arbitration Interframe Space (before
735 * performing random backoff timing prior to Tx). Device default 1.
736 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0.
737 *
738 * Device will automatically increase contention window by (2*CW) + 1 for each
739 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW
740 * value, to cap the CW value.
741 */
742struct iwl_ac_qos {
743 __le16 cw_min;
744 __le16 cw_max;
745 u8 aifsn;
746 u8 reserved1;
747 __le16 edca_txop;
748} __packed;
749
750/* QoS flags defines */
751#define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
752#define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
753#define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
754
755/* Number of Access Categories (AC) (EDCA), queues 0..3 */
756#define AC_NUM 4
757
758/*
759 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
760 *
761 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
762 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
763 */
764struct iwl_qosparam_cmd {
765 __le32 qos_flags;
766 struct iwl_ac_qos ac[AC_NUM];
767} __packed;
768
769/******************************************************************************
770 * (3)
771 * Add/Modify Stations Commands & Responses:
772 *
773 *****************************************************************************/
774/*
775 * Multi station support
776 */
777
778/* Special, dedicated locations within device's station table */
779#define IWL_AP_ID 0
780#define IWL_AP_ID_PAN 1
781#define IWL_STA_ID 2
782#define IWLAGN_PAN_BCAST_ID 14
783#define IWLAGN_BROADCAST_ID 15
784#define IWLAGN_STATION_COUNT 16
785
786#define IWL_TID_NON_QOS IWL_MAX_TID_COUNT
787
788#define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2)
789#define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8)
790#define STA_FLG_PAN_STATION cpu_to_le32(1 << 13)
791#define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
792#define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
793#define STA_FLG_MAX_AGG_SIZE_POS (19)
794#define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
795#define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21)
796#define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
797#define STA_FLG_AGG_MPDU_DENSITY_POS (23)
798#define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
799
800/* Use in mode field. 1: modify existing entry, 0: add new station entry */
801#define STA_CONTROL_MODIFY_MSK 0x01
802
803/* key flags __le16*/
804#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
805#define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
806#define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
807#define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
808#define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
809
810#define STA_KEY_FLG_KEYID_POS 8
811#define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
812/* wep key is either from global key (0) or from station info array (1) */
813#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
814
815/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
816#define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
817#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
818#define STA_KEY_MAX_NUM 8
819#define STA_KEY_MAX_NUM_PAN 16
820/* must not match WEP_INVALID_OFFSET */
821#define IWLAGN_HW_KEY_DEFAULT 0xfe
822
823/* Flags indicate whether to modify vs. don't change various station params */
824#define STA_MODIFY_KEY_MASK 0x01
825#define STA_MODIFY_TID_DISABLE_TX 0x02
826#define STA_MODIFY_TX_RATE_MSK 0x04
827#define STA_MODIFY_ADDBA_TID_MSK 0x08
828#define STA_MODIFY_DELBA_TID_MSK 0x10
829#define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
830
831/* agn */
832struct iwl_keyinfo {
833 __le16 key_flags;
834 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
835 u8 reserved1;
836 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
837 u8 key_offset;
838 u8 reserved2;
839 u8 key[16]; /* 16-byte unicast decryption key */
840 __le64 tx_secur_seq_cnt;
841 __le64 hw_tkip_mic_rx_key;
842 __le64 hw_tkip_mic_tx_key;
843} __packed;
844
845/**
846 * struct sta_id_modify
847 * @addr[ETH_ALEN]: station's MAC address
848 * @sta_id: index of station in uCode's station table
849 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
850 *
851 * Driver selects unused table index when adding new station,
852 * or the index to a pre-existing station entry when modifying that station.
853 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
854 *
855 * modify_mask flags select which parameters to modify vs. leave alone.
856 */
857struct sta_id_modify {
858 u8 addr[ETH_ALEN];
859 __le16 reserved1;
860 u8 sta_id;
861 u8 modify_mask;
862 __le16 reserved2;
863} __packed;
864
865/*
866 * REPLY_ADD_STA = 0x18 (command)
867 *
868 * The device contains an internal table of per-station information,
869 * with info on security keys, aggregation parameters, and Tx rates for
870 * initial Tx attempt and any retries (agn devices uses
871 * REPLY_TX_LINK_QUALITY_CMD,
872 *
873 * REPLY_ADD_STA sets up the table entry for one station, either creating
874 * a new entry, or modifying a pre-existing one.
875 *
876 * NOTE: RXON command (without "associated" bit set) wipes the station table
877 * clean. Moving into RF_KILL state does this also. Driver must set up
878 * new station table before transmitting anything on the RXON channel
879 * (except active scans or active measurements; those commands carry
880 * their own txpower/rate setup data).
881 *
882 * When getting started on a new channel, driver must set up the
883 * IWL_BROADCAST_ID entry (last entry in the table). For a client
884 * station in a BSS, once an AP is selected, driver sets up the AP STA
885 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP
886 * are all that are needed for a BSS client station. If the device is
887 * used as AP, or in an IBSS network, driver must set up station table
888 * entries for all STAs in network, starting with index IWL_STA_ID.
889 */
890
891struct iwl_addsta_cmd {
892 u8 mode; /* 1: modify existing, 0: add new station */
893 u8 reserved[3];
894 struct sta_id_modify sta;
895 struct iwl_keyinfo key;
896 __le32 station_flags; /* STA_FLG_* */
897 __le32 station_flags_msk; /* STA_FLG_* */
898
899 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
900 * corresponding to bit (e.g. bit 5 controls TID 5).
901 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
902 __le16 tid_disable_tx;
903 __le16 legacy_reserved;
904
905 /* TID for which to add block-ack support.
906 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
907 u8 add_immediate_ba_tid;
908
909 /* TID for which to remove block-ack support.
910 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
911 u8 remove_immediate_ba_tid;
912
913 /* Starting Sequence Number for added block-ack support.
914 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
915 __le16 add_immediate_ba_ssn;
916
917 /*
918 * Number of packets OK to transmit to station even though
919 * it is asleep -- used to synchronise PS-poll and u-APSD
920 * responses while ucode keeps track of STA sleep state.
921 */
922 __le16 sleep_tx_count;
923
924 __le16 reserved2;
925} __packed;
926
927
928#define ADD_STA_SUCCESS_MSK 0x1
929#define ADD_STA_NO_ROOM_IN_TABLE 0x2
930#define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4
931#define ADD_STA_MODIFY_NON_EXIST_STA 0x8
932/*
933 * REPLY_ADD_STA = 0x18 (response)
934 */
935struct iwl_add_sta_resp {
936 u8 status; /* ADD_STA_* */
937} __packed;
938
939#define REM_STA_SUCCESS_MSK 0x1
940/*
941 * REPLY_REM_STA = 0x19 (response)
942 */
943struct iwl_rem_sta_resp {
944 u8 status;
945} __packed;
946
947/*
948 * REPLY_REM_STA = 0x19 (command)
949 */
950struct iwl_rem_sta_cmd {
951 u8 num_sta; /* number of removed stations */
952 u8 reserved[3];
953 u8 addr[ETH_ALEN]; /* MAC addr of the first station */
954 u8 reserved2[2];
955} __packed;
956
957
958/* WiFi queues mask */
959#define IWL_SCD_BK_MSK BIT(0)
960#define IWL_SCD_BE_MSK BIT(1)
961#define IWL_SCD_VI_MSK BIT(2)
962#define IWL_SCD_VO_MSK BIT(3)
963#define IWL_SCD_MGMT_MSK BIT(3)
964
965/* PAN queues mask */
966#define IWL_PAN_SCD_BK_MSK BIT(4)
967#define IWL_PAN_SCD_BE_MSK BIT(5)
968#define IWL_PAN_SCD_VI_MSK BIT(6)
969#define IWL_PAN_SCD_VO_MSK BIT(7)
970#define IWL_PAN_SCD_MGMT_MSK BIT(7)
971#define IWL_PAN_SCD_MULTICAST_MSK BIT(8)
972
973#define IWL_AGG_TX_QUEUE_MSK 0xffc00
974
975#define IWL_DROP_ALL BIT(1)
976
977/*
978 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
979 *
980 * When using full FIFO flush this command checks the scheduler HW block WR/RD
981 * pointers to check if all the frames were transferred by DMA into the
982 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
983 * empty the command can finish.
984 * This command is used to flush the TXFIFO from transmit commands, it may
985 * operate on single or multiple queues, the command queue can't be flushed by
986 * this command. The command response is returned when all the queue flush
987 * operations are done. Each TX command flushed return response with the FLUSH
988 * status set in the TX response status. When FIFO flush operation is used,
989 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
990 * are set.
991 *
992 * @queue_control: bit mask for which queues to flush
993 * @flush_control: flush controls
994 * 0: Dump single MSDU
995 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
996 * 2: Dump all FIFO
997 */
998struct iwl_txfifo_flush_cmd_v3 {
999 __le32 queue_control;
1000 __le16 flush_control;
1001 __le16 reserved;
1002} __packed;
1003
1004struct iwl_txfifo_flush_cmd_v2 {
1005 __le16 queue_control;
1006 __le16 flush_control;
1007} __packed;
1008
1009/*
1010 * REPLY_WEP_KEY = 0x20
1011 */
1012struct iwl_wep_key {
1013 u8 key_index;
1014 u8 key_offset;
1015 u8 reserved1[2];
1016 u8 key_size;
1017 u8 reserved2[3];
1018 u8 key[16];
1019} __packed;
1020
1021struct iwl_wep_cmd {
1022 u8 num_keys;
1023 u8 global_key_type;
1024 u8 flags;
1025 u8 reserved;
1026 struct iwl_wep_key key[0];
1027} __packed;
1028
1029#define WEP_KEY_WEP_TYPE 1
1030#define WEP_KEYS_MAX 4
1031#define WEP_INVALID_OFFSET 0xff
1032#define WEP_KEY_LEN_64 5
1033#define WEP_KEY_LEN_128 13
1034
1035/******************************************************************************
1036 * (4)
1037 * Rx Responses:
1038 *
1039 *****************************************************************************/
1040
1041#define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
1042#define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
1043
1044#define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
1045#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
1046#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
1047#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
1048#define RX_RES_PHY_FLAGS_ANTENNA_MSK 0x70
1049#define RX_RES_PHY_FLAGS_ANTENNA_POS 4
1050#define RX_RES_PHY_FLAGS_AGG_MSK cpu_to_le16(1 << 7)
1051
1052#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
1053#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
1054#define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
1055#define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
1056#define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
1057#define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8)
1058
1059#define RX_RES_STATUS_STATION_FOUND (1<<6)
1060#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7)
1061
1062#define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
1063#define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
1064#define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
1065#define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
1066#define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
1067
1068#define RX_MPDU_RES_STATUS_ICV_OK (0x20)
1069#define RX_MPDU_RES_STATUS_MIC_OK (0x40)
1070#define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7)
1071#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1072
1073
1074#define IWLAGN_RX_RES_PHY_CNT 8
1075#define IWLAGN_RX_RES_AGC_IDX 1
1076#define IWLAGN_RX_RES_RSSI_AB_IDX 2
1077#define IWLAGN_RX_RES_RSSI_C_IDX 3
1078#define IWLAGN_OFDM_AGC_MSK 0xfe00
1079#define IWLAGN_OFDM_AGC_BIT_POS 9
1080#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1081#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1082#define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1083#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1084#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1085#define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1086#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1087#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1088#define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1089
1090struct iwlagn_non_cfg_phy {
1091 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */
1092} __packed;
1093
1094
1095/*
1096 * REPLY_RX = 0xc3 (response only, not a command)
1097 * Used only for legacy (non 11n) frames.
1098 */
1099struct iwl_rx_phy_res {
1100 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
1101 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
1102 u8 stat_id; /* configurable DSP phy data set ID */
1103 u8 reserved1;
1104 __le64 timestamp; /* TSF at on air rise */
1105 __le32 beacon_time_stamp; /* beacon at on-air rise */
1106 __le16 phy_flags; /* general phy flags: band, modulation, ... */
1107 __le16 channel; /* channel number */
1108 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
1109 __le32 rate_n_flags; /* RATE_MCS_* */
1110 __le16 byte_count; /* frame's byte-count */
1111 __le16 frame_time; /* frame's time on the air */
1112} __packed;
1113
1114struct iwl_rx_mpdu_res_start {
1115 __le16 byte_count;
1116 __le16 reserved;
1117} __packed;
1118
1119
1120/******************************************************************************
1121 * (5)
1122 * Tx Commands & Responses:
1123 *
1124 * Driver must place each REPLY_TX command into one of the prioritized Tx
1125 * queues in host DRAM, shared between driver and device (see comments for
1126 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode
1127 * are preparing to transmit, the device pulls the Tx command over the PCI
1128 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1129 * from which data will be transmitted.
1130 *
1131 * uCode handles all timing and protocol related to control frames
1132 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler
1133 * handle reception of block-acks; uCode updates the host driver via
1134 * REPLY_COMPRESSED_BA.
1135 *
1136 * uCode handles retrying Tx when an ACK is expected but not received.
1137 * This includes trying lower data rates than the one requested in the Tx
1138 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn).
1139 *
1140 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1141 * This command must be executed after every RXON command, before Tx can occur.
1142 *****************************************************************************/
1143
1144/* REPLY_TX Tx flags field */
1145
1146/*
1147 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
1148 * before this frame. if CTS-to-self required check
1149 * RXON_FLG_SELF_CTS_EN status.
1150 */
1151#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
1152
1153/* 1: Expect ACK from receiving station
1154 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1155 * Set this for unicast frames, but not broadcast/multicast. */
1156#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
1157
1158/* For agn devices:
1159 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1160 * Tx command's initial_rate_index indicates first rate to try;
1161 * uCode walks through table for additional Tx attempts.
1162 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1163 * This rate will be used for all Tx attempts; it will not be scaled. */
1164#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
1165
1166/* 1: Expect immediate block-ack.
1167 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
1168#define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
1169
1170/* Tx antenna selection field; reserved (0) for agn devices. */
1171#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1172
1173/* 1: Ignore Bluetooth priority for this frame.
1174 * 0: Delay Tx until Bluetooth device is done (normal usage). */
1175#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
1176
1177/* 1: uCode overrides sequence control field in MAC header.
1178 * 0: Driver provides sequence control field in MAC header.
1179 * Set this for management frames, non-QOS data frames, non-unicast frames,
1180 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
1181#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
1182
1183/* 1: This frame is non-last MPDU; more fragments are coming.
1184 * 0: Last fragment, or not using fragmentation. */
1185#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
1186
1187/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1188 * 0: No TSF required in outgoing frame.
1189 * Set this for transmitting beacons and probe responses. */
1190#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
1191
1192/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1193 * alignment of frame's payload data field.
1194 * 0: No pad
1195 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1196 * field (but not both). Driver must align frame data (i.e. data following
1197 * MAC header) to DWORD boundary. */
1198#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
1199
1200/* accelerate aggregation support
1201 * 0 - no CCMP encryption; 1 - CCMP encryption */
1202#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
1203
1204/* HCCA-AP - disable duration overwriting. */
1205#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
1206
1207
1208/*
1209 * TX command security control
1210 */
1211#define TX_CMD_SEC_WEP 0x01
1212#define TX_CMD_SEC_CCM 0x02
1213#define TX_CMD_SEC_TKIP 0x03
1214#define TX_CMD_SEC_MSK 0x03
1215#define TX_CMD_SEC_SHIFT 6
1216#define TX_CMD_SEC_KEY128 0x08
1217
1218/*
1219 * REPLY_TX = 0x1c (command)
1220 */
1221
1222/*
1223 * Used for managing Tx retries when expecting block-acks.
1224 * Driver should set these fields to 0.
1225 */
1226struct iwl_dram_scratch {
1227 u8 try_cnt; /* Tx attempts */
1228 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */
1229 __le16 reserved;
1230} __packed;
1231
1232struct iwl_tx_cmd {
1233 /*
1234 * MPDU byte count:
1235 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1236 * + 8 byte IV for CCM or TKIP (not used for WEP)
1237 * + Data payload
1238 * + 8-byte MIC (not used for CCM/WEP)
1239 * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1240 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1241 * Range: 14-2342 bytes.
1242 */
1243 __le16 len;
1244
1245 /*
1246 * MPDU or MSDU byte count for next frame.
1247 * Used for fragmentation and bursting, but not 11n aggregation.
1248 * Same as "len", but for next frame. Set to 0 if not applicable.
1249 */
1250 __le16 next_frame_len;
1251
1252 __le32 tx_flags; /* TX_CMD_FLG_* */
1253
1254 /* uCode may modify this field of the Tx command (in host DRAM!).
1255 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
1256 struct iwl_dram_scratch scratch;
1257
1258 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1259 __le32 rate_n_flags; /* RATE_MCS_* */
1260
1261 /* Index of destination station in uCode's station table */
1262 u8 sta_id;
1263
1264 /* Type of security encryption: CCM or TKIP */
1265 u8 sec_ctl; /* TX_CMD_SEC_* */
1266
1267 /*
1268 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1269 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for
1270 * data frames, this field may be used to selectively reduce initial
1271 * rate (via non-0 value) for special frames (e.g. management), while
1272 * still supporting rate scaling for all frames.
1273 */
1274 u8 initial_rate_index;
1275 u8 reserved;
1276 u8 key[16];
1277 __le16 next_frame_flags;
1278 __le16 reserved2;
1279 union {
1280 __le32 life_time;
1281 __le32 attempt;
1282 } stop_time;
1283
1284 /* Host DRAM physical address pointer to "scratch" in this command.
1285 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */
1286 __le32 dram_lsb_ptr;
1287 u8 dram_msb_ptr;
1288
1289 u8 rts_retry_limit; /*byte 50 */
1290 u8 data_retry_limit; /*byte 51 */
1291 u8 tid_tspec;
1292 union {
1293 __le16 pm_frame_timeout;
1294 __le16 attempt_duration;
1295 } timeout;
1296
1297 /*
1298 * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1299 * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1300 */
1301 __le16 driver_txop;
1302
1303 /*
1304 * MAC header goes here, followed by 2 bytes padding if MAC header
1305 * length is 26 or 30 bytes, followed by payload data
1306 */
1307 u8 payload[0];
1308 struct ieee80211_hdr hdr[0];
1309} __packed;
1310
1311/*
1312 * TX command response is sent after *agn* transmission attempts.
1313 *
1314 * both postpone and abort status are expected behavior from uCode. there is
1315 * no special operation required from driver; except for RFKILL_FLUSH,
1316 * which required tx flush host command to flush all the tx frames in queues
1317 */
1318enum {
1319 TX_STATUS_SUCCESS = 0x01,
1320 TX_STATUS_DIRECT_DONE = 0x02,
1321 /* postpone TX */
1322 TX_STATUS_POSTPONE_DELAY = 0x40,
1323 TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1324 TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1325 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1326 TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1327 /* abort TX */
1328 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
1329 TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1330 TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1331 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
1332 TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1333 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
1334 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1335 TX_STATUS_FAIL_DEST_PS = 0x88,
1336 TX_STATUS_FAIL_HOST_ABORTED = 0x89,
1337 TX_STATUS_FAIL_BT_RETRY = 0x8a,
1338 TX_STATUS_FAIL_STA_INVALID = 0x8b,
1339 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1340 TX_STATUS_FAIL_TID_DISABLE = 0x8d,
1341 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
1342 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1343 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1344 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
1345};
1346
1347#define TX_PACKET_MODE_REGULAR 0x0000
1348#define TX_PACKET_MODE_BURST_SEQ 0x0100
1349#define TX_PACKET_MODE_BURST_FIRST 0x0200
1350
1351enum {
1352 TX_POWER_PA_NOT_ACTIVE = 0x0,
1353};
1354
1355enum {
1356 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
1357 TX_STATUS_DELAY_MSK = 0x00000040,
1358 TX_STATUS_ABORT_MSK = 0x00000080,
1359 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
1360 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
1361 TX_RESERVED = 0x00780000, /* bits 19:22 */
1362 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
1363 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1364};
1365
1366/* *******************************
1367 * TX aggregation status
1368 ******************************* */
1369
1370enum {
1371 AGG_TX_STATE_TRANSMITTED = 0x00,
1372 AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1373 AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1374 AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1375 AGG_TX_STATE_ABORT_MSK = 0x08,
1376 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1377 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1378 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1379 AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1380 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1381 AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1382 AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1383 AGG_TX_STATE_DELAY_TX_MSK = 0x400
1384};
1385
1386#define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */
1387#define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */
1388#define AGG_TX_TRY_POS 12
1389
1390#define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1391 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1392 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
1393
1394/* # tx attempts for first frame in aggregation */
1395#define AGG_TX_STATE_TRY_CNT_POS 12
1396#define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1397
1398/* Command ID and sequence number of Tx command for this frame */
1399#define AGG_TX_STATE_SEQ_NUM_POS 16
1400#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1401
1402/*
1403 * REPLY_TX = 0x1c (response)
1404 *
1405 * This response may be in one of two slightly different formats, indicated
1406 * by the frame_count field:
1407 *
1408 * 1) No aggregation (frame_count == 1). This reports Tx results for
1409 * a single frame. Multiple attempts, at various bit rates, may have
1410 * been made for this frame.
1411 *
1412 * 2) Aggregation (frame_count > 1). This reports Tx results for
1413 * 2 or more frames that used block-acknowledge. All frames were
1414 * transmitted at same rate. Rate scaling may have been used if first
1415 * frame in this new agg block failed in previous agg block(s).
1416 *
1417 * Note that, for aggregation, ACK (block-ack) status is not delivered here;
1418 * block-ack has not been received by the time the agn device records
1419 * this status.
1420 * This status relates to reasons the tx might have been blocked or aborted
1421 * within the sending station (this agn device), rather than whether it was
1422 * received successfully by the destination station.
1423 */
1424struct agg_tx_status {
1425 __le16 status;
1426 __le16 sequence;
1427} __packed;
1428
1429/* refer to ra_tid */
1430#define IWLAGN_TX_RES_TID_POS 0
1431#define IWLAGN_TX_RES_TID_MSK 0x0f
1432#define IWLAGN_TX_RES_RA_POS 4
1433#define IWLAGN_TX_RES_RA_MSK 0xf0
1434
1435struct iwlagn_tx_resp {
1436 u8 frame_count; /* 1 no aggregation, >1 aggregation */
1437 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1438 u8 failure_rts; /* # failures due to unsuccessful RTS */
1439 u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1440
1441 /* For non-agg: Rate at which frame was successful.
1442 * For agg: Rate at which all frames were transmitted. */
1443 __le32 rate_n_flags; /* RATE_MCS_* */
1444
1445 /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1446 * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1447 __le16 wireless_media_time; /* uSecs */
1448
1449 u8 pa_status; /* RF power amplifier measurement (not used) */
1450 u8 pa_integ_res_a[3];
1451 u8 pa_integ_res_b[3];
1452 u8 pa_integ_res_C[3];
1453
1454 __le32 tfd_info;
1455 __le16 seq_ctl;
1456 __le16 byte_cnt;
1457 u8 tlc_info;
1458 u8 ra_tid; /* tid (0:3), sta_id (4:7) */
1459 __le16 frame_ctrl;
1460 /*
1461 * For non-agg: frame status TX_STATUS_*
1462 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1463 * fields follow this one, up to frame_count.
1464 * Bit fields:
1465 * 11- 0: AGG_TX_STATE_* status code
1466 * 15-12: Retry count for 1st frame in aggregation (retries
1467 * occur if tx failed for this frame when it was a
1468 * member of a previous aggregation block). If rate
1469 * scaling is used, retry count indicates the rate
1470 * table entry used for all frames in the new agg.
1471 * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1472 */
1473 struct agg_tx_status status; /* TX status (in aggregation -
1474 * status of 1st frame) */
1475} __packed;
1476/*
1477 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
1478 *
1479 * Reports Block-Acknowledge from recipient station
1480 */
1481struct iwl_compressed_ba_resp {
1482 __le32 sta_addr_lo32;
1483 __le16 sta_addr_hi16;
1484 __le16 reserved;
1485
1486 /* Index of recipient (BA-sending) station in uCode's station table */
1487 u8 sta_id;
1488 u8 tid;
1489 __le16 seq_ctl;
1490 __le64 bitmap;
1491 __le16 scd_flow;
1492 __le16 scd_ssn;
1493 u8 txed; /* number of frames sent */
1494 u8 txed_2_done; /* number of frames acked */
1495 __le16 reserved1;
1496} __packed;
1497
1498/*
1499 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
1500 *
1501 */
1502
1503/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
1504#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
1505
1506/* # of EDCA prioritized tx fifos */
1507#define LINK_QUAL_AC_NUM AC_NUM
1508
1509/* # entries in rate scale table to support Tx retries */
1510#define LINK_QUAL_MAX_RETRY_NUM 16
1511
1512/* Tx antenna selection values */
1513#define LINK_QUAL_ANT_A_MSK (1 << 0)
1514#define LINK_QUAL_ANT_B_MSK (1 << 1)
1515#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1516
1517
1518/**
1519 * struct iwl_link_qual_general_params
1520 *
1521 * Used in REPLY_TX_LINK_QUALITY_CMD
1522 */
1523struct iwl_link_qual_general_params {
1524 u8 flags;
1525
1526 /* No entries at or above this (driver chosen) index contain MIMO */
1527 u8 mimo_delimiter;
1528
1529 /* Best single antenna to use for single stream (legacy, SISO). */
1530 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */
1531
1532 /* Best antennas to use for MIMO */
1533 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */
1534
1535 /*
1536 * If driver needs to use different initial rates for different
1537 * EDCA QOS access categories (as implemented by tx fifos 0-3),
1538 * this table will set that up, by indicating the indexes in the
1539 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1540 * Otherwise, driver should set all entries to 0.
1541 *
1542 * Entry usage:
1543 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1544 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1545 */
1546 u8 start_rate_index[LINK_QUAL_AC_NUM];
1547} __packed;
1548
1549#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
1550#define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
1551#define LINK_QUAL_AGG_TIME_LIMIT_MIN (100)
1552
1553#define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1554#define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1555#define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1556
1557#define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63)
1558#define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
1559#define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
1560
1561/**
1562 * struct iwl_link_qual_agg_params
1563 *
1564 * Used in REPLY_TX_LINK_QUALITY_CMD
1565 */
1566struct iwl_link_qual_agg_params {
1567
1568 /*
1569 *Maximum number of uSec in aggregation.
1570 * default set to 4000 (4 milliseconds) if not configured in .cfg
1571 */
1572 __le16 agg_time_limit;
1573
1574 /*
1575 * Number of Tx retries allowed for a frame, before that frame will
1576 * no longer be considered for the start of an aggregation sequence
1577 * (scheduler will then try to tx it as single frame).
1578 * Driver should set this to 3.
1579 */
1580 u8 agg_dis_start_th;
1581
1582 /*
1583 * Maximum number of frames in aggregation.
1584 * 0 = no limit (default). 1 = no aggregation.
1585 * Other values = max # frames in aggregation.
1586 */
1587 u8 agg_frame_cnt_limit;
1588
1589 __le32 reserved;
1590} __packed;
1591
1592/*
1593 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
1594 *
1595 * For agn devices
1596 *
1597 * Each station in the agn device's internal station table has its own table
1598 * of 16
1599 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1600 * an ACK is not received. This command replaces the entire table for
1601 * one station.
1602 *
1603 * NOTE: Station must already be in agn device's station table.
1604 * Use REPLY_ADD_STA.
1605 *
1606 * The rate scaling procedures described below work well. Of course, other
1607 * procedures are possible, and may work better for particular environments.
1608 *
1609 *
1610 * FILLING THE RATE TABLE
1611 *
1612 * Given a particular initial rate and mode, as determined by the rate
1613 * scaling algorithm described below, the Linux driver uses the following
1614 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1615 * Link Quality command:
1616 *
1617 *
1618 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate:
1619 * a) Use this same initial rate for first 3 entries.
1620 * b) Find next lower available rate using same mode (SISO or MIMO),
1621 * use for next 3 entries. If no lower rate available, switch to
1622 * legacy mode (no HT40 channel, no MIMO, no short guard interval).
1623 * c) If using MIMO, set command's mimo_delimiter to number of entries
1624 * using MIMO (3 or 6).
1625 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
1626 * no MIMO, no short guard interval), at the next lower bit rate
1627 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1628 * legacy procedure for remaining table entries.
1629 *
1630 * 2) If using legacy initial rate:
1631 * a) Use the initial rate for only one entry.
1632 * b) For each following entry, reduce the rate to next lower available
1633 * rate, until reaching the lowest available rate.
1634 * c) When reducing rate, also switch antenna selection.
1635 * d) Once lowest available rate is reached, repeat this rate until
1636 * rate table is filled (16 entries), switching antenna each entry.
1637 *
1638 *
1639 * ACCUMULATING HISTORY
1640 *
1641 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1642 * uses two sets of frame Tx success history: One for the current/active
1643 * modulation mode, and one for a speculative/search mode that is being
1644 * attempted. If the speculative mode turns out to be more effective (i.e.
1645 * actual transfer rate is better), then the driver continues to use the
1646 * speculative mode as the new current active mode.
1647 *
1648 * Each history set contains, separately for each possible rate, data for a
1649 * sliding window of the 62 most recent tx attempts at that rate. The data
1650 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1651 * and attempted frames, from which the driver can additionally calculate a
1652 * success ratio (success / attempted) and number of failures
1653 * (attempted - success), and control the size of the window (attempted).
1654 * The driver uses the bit map to remove successes from the success sum, as
1655 * the oldest tx attempts fall out of the window.
1656 *
1657 * When the agn device makes multiple tx attempts for a given frame, each
1658 * attempt might be at a different rate, and have different modulation
1659 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1660 * up in the rate scaling table in the Link Quality command. The driver must
1661 * determine which rate table entry was used for each tx attempt, to determine
1662 * which rate-specific history to update, and record only those attempts that
1663 * match the modulation characteristics of the history set.
1664 *
1665 * When using block-ack (aggregation), all frames are transmitted at the same
1666 * rate, since there is no per-attempt acknowledgment from the destination
1667 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in
1668 * rate_n_flags field. After receiving a block-ack, the driver can update
1669 * history for the entire block all at once.
1670 *
1671 *
1672 * FINDING BEST STARTING RATE:
1673 *
1674 * When working with a selected initial modulation mode (see below), the
1675 * driver attempts to find a best initial rate. The initial rate is the
1676 * first entry in the Link Quality command's rate table.
1677 *
1678 * 1) Calculate actual throughput (success ratio * expected throughput, see
1679 * table below) for current initial rate. Do this only if enough frames
1680 * have been attempted to make the value meaningful: at least 6 failed
1681 * tx attempts, or at least 8 successes. If not enough, don't try rate
1682 * scaling yet.
1683 *
1684 * 2) Find available rates adjacent to current initial rate. Available means:
1685 * a) supported by hardware &&
1686 * b) supported by association &&
1687 * c) within any constraints selected by user
1688 *
1689 * 3) Gather measured throughputs for adjacent rates. These might not have
1690 * enough history to calculate a throughput. That's okay, we might try
1691 * using one of them anyway!
1692 *
1693 * 4) Try decreasing rate if, for current rate:
1694 * a) success ratio is < 15% ||
1695 * b) lower adjacent rate has better measured throughput ||
1696 * c) higher adjacent rate has worse throughput, and lower is unmeasured
1697 *
1698 * As a sanity check, if decrease was determined above, leave rate
1699 * unchanged if:
1700 * a) lower rate unavailable
1701 * b) success ratio at current rate > 85% (very good)
1702 * c) current measured throughput is better than expected throughput
1703 * of lower rate (under perfect 100% tx conditions, see table below)
1704 *
1705 * 5) Try increasing rate if, for current rate:
1706 * a) success ratio is < 15% ||
1707 * b) both adjacent rates' throughputs are unmeasured (try it!) ||
1708 * b) higher adjacent rate has better measured throughput ||
1709 * c) lower adjacent rate has worse throughput, and higher is unmeasured
1710 *
1711 * As a sanity check, if increase was determined above, leave rate
1712 * unchanged if:
1713 * a) success ratio at current rate < 70%. This is not particularly
1714 * good performance; higher rate is sure to have poorer success.
1715 *
1716 * 6) Re-evaluate the rate after each tx frame. If working with block-
1717 * acknowledge, history and statistics may be calculated for the entire
1718 * block (including prior history that fits within the history windows),
1719 * before re-evaluation.
1720 *
1721 * FINDING BEST STARTING MODULATION MODE:
1722 *
1723 * After working with a modulation mode for a "while" (and doing rate scaling),
1724 * the driver searches for a new initial mode in an attempt to improve
1725 * throughput. The "while" is measured by numbers of attempted frames:
1726 *
1727 * For legacy mode, search for new mode after:
1728 * 480 successful frames, or 160 failed frames
1729 * For high-throughput modes (SISO or MIMO), search for new mode after:
1730 * 4500 successful frames, or 400 failed frames
1731 *
1732 * Mode switch possibilities are (3 for each mode):
1733 *
1734 * For legacy:
1735 * Change antenna, try SISO (if HT association), try MIMO (if HT association)
1736 * For SISO:
1737 * Change antenna, try MIMO, try shortened guard interval (SGI)
1738 * For MIMO:
1739 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1740 *
1741 * When trying a new mode, use the same bit rate as the old/current mode when
1742 * trying antenna switches and shortened guard interval. When switching to
1743 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1744 * for which the expected throughput (under perfect conditions) is about the
1745 * same or slightly better than the actual measured throughput delivered by
1746 * the old/current mode.
1747 *
1748 * Actual throughput can be estimated by multiplying the expected throughput
1749 * by the success ratio (successful / attempted tx frames). Frame size is
1750 * not considered in this calculation; it assumes that frame size will average
1751 * out to be fairly consistent over several samples. The following are
1752 * metric values for expected throughput assuming 100% success ratio.
1753 * Only G band has support for CCK rates:
1754 *
1755 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60
1756 *
1757 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186
1758 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186
1759 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202
1760 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211
1761 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251
1762 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257
1763 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257
1764 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264
1765 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289
1766 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293
1767 *
1768 * After the new mode has been tried for a short while (minimum of 6 failed
1769 * frames or 8 successful frames), compare success ratio and actual throughput
1770 * estimate of the new mode with the old. If either is better with the new
1771 * mode, continue to use the new mode.
1772 *
1773 * Continue comparing modes until all 3 possibilities have been tried.
1774 * If moving from legacy to HT, try all 3 possibilities from the new HT
1775 * mode. After trying all 3, a best mode is found. Continue to use this mode
1776 * for the longer "while" described above (e.g. 480 successful frames for
1777 * legacy), and then repeat the search process.
1778 *
1779 */
1780struct iwl_link_quality_cmd {
1781
1782 /* Index of destination/recipient station in uCode's station table */
1783 u8 sta_id;
1784 u8 reserved1;
1785 __le16 control; /* not used */
1786 struct iwl_link_qual_general_params general_params;
1787 struct iwl_link_qual_agg_params agg_params;
1788
1789 /*
1790 * Rate info; when using rate-scaling, Tx command's initial_rate_index
1791 * specifies 1st Tx rate attempted, via index into this table.
1792 * agn devices works its way through table when retrying Tx.
1793 */
1794 struct {
1795 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */
1796 } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1797 __le32 reserved2;
1798} __packed;
1799
1800/*
1801 * BT configuration enable flags:
1802 * bit 0 - 1: BT channel announcement enabled
1803 * 0: disable
1804 * bit 1 - 1: priority of BT device enabled
1805 * 0: disable
1806 * bit 2 - 1: BT 2 wire support enabled
1807 * 0: disable
1808 */
1809#define BT_COEX_DISABLE (0x0)
1810#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1811#define BT_ENABLE_PRIORITY BIT(1)
1812#define BT_ENABLE_2_WIRE BIT(2)
1813
1814#define BT_COEX_DISABLE (0x0)
1815#define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1816
1817#define BT_LEAD_TIME_MIN (0x0)
1818#define BT_LEAD_TIME_DEF (0x1E)
1819#define BT_LEAD_TIME_MAX (0xFF)
1820
1821#define BT_MAX_KILL_MIN (0x1)
1822#define BT_MAX_KILL_DEF (0x5)
1823#define BT_MAX_KILL_MAX (0xFF)
1824
1825#define BT_DURATION_LIMIT_DEF 625
1826#define BT_DURATION_LIMIT_MAX 1250
1827#define BT_DURATION_LIMIT_MIN 625
1828
1829#define BT_ON_THRESHOLD_DEF 4
1830#define BT_ON_THRESHOLD_MAX 1000
1831#define BT_ON_THRESHOLD_MIN 1
1832
1833#define BT_FRAG_THRESHOLD_DEF 0
1834#define BT_FRAG_THRESHOLD_MAX 0
1835#define BT_FRAG_THRESHOLD_MIN 0
1836
1837#define BT_AGG_THRESHOLD_DEF 1200
1838#define BT_AGG_THRESHOLD_MAX 8000
1839#define BT_AGG_THRESHOLD_MIN 400
1840
1841/*
1842 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
1843 *
1844 * agn devices support hardware handshake with Bluetooth device on
1845 * same platform. Bluetooth device alerts wireless device when it will Tx;
1846 * wireless device can delay or kill its own Tx to accommodate.
1847 */
1848struct iwl_bt_cmd {
1849 u8 flags;
1850 u8 lead_time;
1851 u8 max_kill;
1852 u8 reserved;
1853 __le32 kill_ack_mask;
1854 __le32 kill_cts_mask;
1855} __packed;
1856
1857#define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0)
1858
1859#define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5))
1860#define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3
1861#define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0
1862#define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1
1863#define IWLAGN_BT_FLAG_COEX_MODE_3W 2
1864#define IWLAGN_BT_FLAG_COEX_MODE_4W 3
1865
1866#define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6)
1867/* Disable Sync PSPoll on SCO/eSCO */
1868#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7)
1869
1870#define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */
1871#define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */
1872
1873#define IWLAGN_BT_PRIO_BOOST_MAX 0xFF
1874#define IWLAGN_BT_PRIO_BOOST_MIN 0x00
1875#define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0
1876#define IWLAGN_BT_PRIO_BOOST_DEFAULT32 0xF0F0F0F0
1877
1878#define IWLAGN_BT_MAX_KILL_DEFAULT 5
1879
1880#define IWLAGN_BT3_T7_DEFAULT 1
1881
1882enum iwl_bt_kill_idx {
1883 IWL_BT_KILL_DEFAULT = 0,
1884 IWL_BT_KILL_OVERRIDE = 1,
1885 IWL_BT_KILL_REDUCE = 2,
1886};
1887
1888#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1889#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
1890#define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
1891#define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE cpu_to_le32(0)
1892
1893#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2
1894
1895#define IWLAGN_BT3_T2_DEFAULT 0xc
1896
1897#define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0))
1898#define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1))
1899#define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2))
1900#define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3))
1901#define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4))
1902#define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5))
1903#define IWLAGN_BT_VALID_REDUCED_TX_PWR cpu_to_le16(BIT(6))
1904#define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7))
1905
1906#define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1907 IWLAGN_BT_VALID_BOOST | \
1908 IWLAGN_BT_VALID_MAX_KILL | \
1909 IWLAGN_BT_VALID_3W_TIMERS | \
1910 IWLAGN_BT_VALID_KILL_ACK_MASK | \
1911 IWLAGN_BT_VALID_KILL_CTS_MASK | \
1912 IWLAGN_BT_VALID_REDUCED_TX_PWR | \
1913 IWLAGN_BT_VALID_3W_LUT)
1914
1915#define IWLAGN_BT_REDUCED_TX_PWR BIT(0)
1916
1917#define IWLAGN_BT_DECISION_LUT_SIZE 12
1918
1919struct iwl_basic_bt_cmd {
1920 u8 flags;
1921 u8 ledtime; /* unused */
1922 u8 max_kill;
1923 u8 bt3_timer_t7_value;
1924 __le32 kill_ack_mask;
1925 __le32 kill_cts_mask;
1926 u8 bt3_prio_sample_time;
1927 u8 bt3_timer_t2_value;
1928 __le16 bt4_reaction_time; /* unused */
1929 __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE];
1930 /*
1931 * bit 0: use reduced tx power for control frame
1932 * bit 1 - 7: reserved
1933 */
1934 u8 reduce_txpower;
1935 u8 reserved;
1936 __le16 valid;
1937};
1938
1939struct iwl_bt_cmd_v1 {
1940 struct iwl_basic_bt_cmd basic;
1941 u8 prio_boost;
1942 /*
1943 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1944 * if configure the following patterns
1945 */
1946 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1947 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1948};
1949
1950struct iwl_bt_cmd_v2 {
1951 struct iwl_basic_bt_cmd basic;
1952 __le32 prio_boost;
1953 /*
1954 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1955 * if configure the following patterns
1956 */
1957 u8 reserved;
1958 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1959 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1960};
1961
1962#define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0))
1963
1964struct iwlagn_bt_sco_cmd {
1965 __le32 flags;
1966};
1967
1968/******************************************************************************
1969 * (6)
1970 * Spectrum Management (802.11h) Commands, Responses, Notifications:
1971 *
1972 *****************************************************************************/
1973
1974/*
1975 * Spectrum Management
1976 */
1977#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
1978 RXON_FILTER_CTL2HOST_MSK | \
1979 RXON_FILTER_ACCEPT_GRP_MSK | \
1980 RXON_FILTER_DIS_DECRYPT_MSK | \
1981 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
1982 RXON_FILTER_ASSOC_MSK | \
1983 RXON_FILTER_BCON_AWARE_MSK)
1984
1985struct iwl_measure_channel {
1986 __le32 duration; /* measurement duration in extended beacon
1987 * format */
1988 u8 channel; /* channel to measure */
1989 u8 type; /* see enum iwl_measure_type */
1990 __le16 reserved;
1991} __packed;
1992
1993/*
1994 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
1995 */
1996struct iwl_spectrum_cmd {
1997 __le16 len; /* number of bytes starting from token */
1998 u8 token; /* token id */
1999 u8 id; /* measurement id -- 0 or 1 */
2000 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
2001 u8 periodic; /* 1 = periodic */
2002 __le16 path_loss_timeout;
2003 __le32 start_time; /* start time in extended beacon format */
2004 __le32 reserved2;
2005 __le32 flags; /* rxon flags */
2006 __le32 filter_flags; /* rxon filter flags */
2007 __le16 channel_count; /* minimum 1, maximum 10 */
2008 __le16 reserved3;
2009 struct iwl_measure_channel channels[10];
2010} __packed;
2011
2012/*
2013 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
2014 */
2015struct iwl_spectrum_resp {
2016 u8 token;
2017 u8 id; /* id of the prior command replaced, or 0xff */
2018 __le16 status; /* 0 - command will be handled
2019 * 1 - cannot handle (conflicts with another
2020 * measurement) */
2021} __packed;
2022
2023enum iwl_measurement_state {
2024 IWL_MEASUREMENT_START = 0,
2025 IWL_MEASUREMENT_STOP = 1,
2026};
2027
2028enum iwl_measurement_status {
2029 IWL_MEASUREMENT_OK = 0,
2030 IWL_MEASUREMENT_CONCURRENT = 1,
2031 IWL_MEASUREMENT_CSA_CONFLICT = 2,
2032 IWL_MEASUREMENT_TGH_CONFLICT = 3,
2033 /* 4-5 reserved */
2034 IWL_MEASUREMENT_STOPPED = 6,
2035 IWL_MEASUREMENT_TIMEOUT = 7,
2036 IWL_MEASUREMENT_PERIODIC_FAILED = 8,
2037};
2038
2039#define NUM_ELEMENTS_IN_HISTOGRAM 8
2040
2041struct iwl_measurement_histogram {
2042 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2043 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
2044} __packed;
2045
2046/* clear channel availability counters */
2047struct iwl_measurement_cca_counters {
2048 __le32 ofdm;
2049 __le32 cck;
2050} __packed;
2051
2052enum iwl_measure_type {
2053 IWL_MEASURE_BASIC = (1 << 0),
2054 IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2055 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2056 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2057 IWL_MEASURE_FRAME = (1 << 4),
2058 /* bits 5:6 are reserved */
2059 IWL_MEASURE_IDLE = (1 << 7),
2060};
2061
2062/*
2063 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2064 */
2065struct iwl_spectrum_notification {
2066 u8 id; /* measurement id -- 0 or 1 */
2067 u8 token;
2068 u8 channel_index; /* index in measurement channel list */
2069 u8 state; /* 0 - start, 1 - stop */
2070 __le32 start_time; /* lower 32-bits of TSF */
2071 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
2072 u8 channel;
2073 u8 type; /* see enum iwl_measurement_type */
2074 u8 reserved1;
2075 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
2076 * valid if applicable for measurement type requested. */
2077 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
2078 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
2079 __le32 cca_time; /* channel load time in usecs */
2080 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
2081 * unidentified */
2082 u8 reserved2[3];
2083 struct iwl_measurement_histogram histogram;
2084 __le32 stop_time; /* lower 32-bits of TSF */
2085 __le32 status; /* see iwl_measurement_status */
2086} __packed;
2087
2088/******************************************************************************
2089 * (7)
2090 * Power Management Commands, Responses, Notifications:
2091 *
2092 *****************************************************************************/
2093
2094/**
2095 * struct iwl_powertable_cmd - Power Table Command
2096 * @flags: See below:
2097 *
2098 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2099 *
2100 * PM allow:
2101 * bit 0 - '0' Driver not allow power management
2102 * '1' Driver allow PM (use rest of parameters)
2103 *
2104 * uCode send sleep notifications:
2105 * bit 1 - '0' Don't send sleep notification
2106 * '1' send sleep notification (SEND_PM_NOTIFICATION)
2107 *
2108 * Sleep over DTIM
2109 * bit 2 - '0' PM have to walk up every DTIM
2110 * '1' PM could sleep over DTIM till listen Interval.
2111 *
2112 * PCI power managed
2113 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2114 * '1' !(PCI_CFG_LINK_CTRL & 0x1)
2115 *
2116 * Fast PD
2117 * bit 4 - '1' Put radio to sleep when receiving frame for others
2118 *
2119 * Force sleep Modes
2120 * bit 31/30- '00' use both mac/xtal sleeps
2121 * '01' force Mac sleep
2122 * '10' force xtal sleep
2123 * '11' Illegal set
2124 *
2125 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
2126 * ucode assume sleep over DTIM is allowed and we don't need to wake up
2127 * for every DTIM.
2128 */
2129#define IWL_POWER_VEC_SIZE 5
2130
2131#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
2132#define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0))
2133#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1))
2134#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
2135#define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
2136#define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
2137#define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5))
2138#define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6))
2139#define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7))
2140#define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8))
2141#define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9))
2142
2143struct iwl_powertable_cmd {
2144 __le16 flags;
2145 u8 keep_alive_seconds;
2146 u8 debug_flags;
2147 __le32 rx_data_timeout;
2148 __le32 tx_data_timeout;
2149 __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2150 __le32 keep_alive_beacons;
2151} __packed;
2152
2153/*
2154 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
2155 * all devices identical.
2156 */
2157struct iwl_sleep_notification {
2158 u8 pm_sleep_mode;
2159 u8 pm_wakeup_src;
2160 __le16 reserved;
2161 __le32 sleep_time;
2162 __le32 tsf_low;
2163 __le32 bcon_timer;
2164} __packed;
2165
2166/* Sleep states. all devices identical. */
2167enum {
2168 IWL_PM_NO_SLEEP = 0,
2169 IWL_PM_SLP_MAC = 1,
2170 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2171 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2172 IWL_PM_SLP_PHY = 4,
2173 IWL_PM_SLP_REPENT = 5,
2174 IWL_PM_WAKEUP_BY_TIMER = 6,
2175 IWL_PM_WAKEUP_BY_DRIVER = 7,
2176 IWL_PM_WAKEUP_BY_RFKILL = 8,
2177 /* 3 reserved */
2178 IWL_PM_NUM_OF_MODES = 12,
2179};
2180
2181/*
2182 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2183 */
2184#define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
2185#define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
2186#define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
2187struct iwl_card_state_cmd {
2188 __le32 status; /* CARD_STATE_CMD_* request new power state */
2189} __packed;
2190
2191/*
2192 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2193 */
2194struct iwl_card_state_notif {
2195 __le32 flags;
2196} __packed;
2197
2198#define HW_CARD_DISABLED 0x01
2199#define SW_CARD_DISABLED 0x02
2200#define CT_CARD_DISABLED 0x04
2201#define RXON_CARD_DISABLED 0x10
2202
2203struct iwl_ct_kill_config {
2204 __le32 reserved;
2205 __le32 critical_temperature_M;
2206 __le32 critical_temperature_R;
2207} __packed;
2208
2209/* 1000, and 6x00 */
2210struct iwl_ct_kill_throttling_config {
2211 __le32 critical_temperature_exit;
2212 __le32 reserved;
2213 __le32 critical_temperature_enter;
2214} __packed;
2215
2216/******************************************************************************
2217 * (8)
2218 * Scan Commands, Responses, Notifications:
2219 *
2220 *****************************************************************************/
2221
2222#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2223#define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
2224
2225/**
2226 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
2227 *
2228 * One for each channel in the scan list.
2229 * Each channel can independently select:
2230 * 1) SSID for directed active scans
2231 * 2) Txpower setting (for rate specified within Tx command)
2232 * 3) How long to stay on-channel (behavior may be modified by quiet_time,
2233 * quiet_plcp_th, good_CRC_th)
2234 *
2235 * To avoid uCode errors, make sure the following are true (see comments
2236 * under struct iwl_scan_cmd about max_out_time and quiet_time):
2237 * 1) If using passive_dwell (i.e. passive_dwell != 0):
2238 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2239 * 2) quiet_time <= active_dwell
2240 * 3) If restricting off-channel time (i.e. max_out_time !=0):
2241 * passive_dwell < max_out_time
2242 * active_dwell < max_out_time
2243 */
2244
2245struct iwl_scan_channel {
2246 /*
2247 * type is defined as:
2248 * 0:0 1 = active, 0 = passive
2249 * 1:20 SSID direct bit map; if a bit is set, then corresponding
2250 * SSID IE is transmitted in probe request.
2251 * 21:31 reserved
2252 */
2253 __le32 type;
2254 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
2255 u8 tx_gain; /* gain for analog radio */
2256 u8 dsp_atten; /* gain for DSP */
2257 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2258 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
2259} __packed;
2260
2261/* set number of direct probes __le32 type */
2262#define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2263
2264/**
2265 * struct iwl_ssid_ie - directed scan network information element
2266 *
2267 * Up to 20 of these may appear in REPLY_SCAN_CMD,
2268 * selected by "type" bit field in struct iwl_scan_channel;
2269 * each channel may select different ssids from among the 20 entries.
2270 * SSID IEs get transmitted in reverse order of entry.
2271 */
2272struct iwl_ssid_ie {
2273 u8 id;
2274 u8 len;
2275 u8 ssid[32];
2276} __packed;
2277
2278#define PROBE_OPTION_MAX 20
2279#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
2280#define IWL_GOOD_CRC_TH_DISABLED 0
2281#define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2282#define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
2283#define IWL_MAX_CMD_SIZE 4096
2284
2285/*
2286 * REPLY_SCAN_CMD = 0x80 (command)
2287 *
2288 * The hardware scan command is very powerful; the driver can set it up to
2289 * maintain (relatively) normal network traffic while doing a scan in the
2290 * background. The max_out_time and suspend_time control the ratio of how
2291 * long the device stays on an associated network channel ("service channel")
2292 * vs. how long it's away from the service channel, i.e. tuned to other channels
2293 * for scanning.
2294 *
2295 * max_out_time is the max time off-channel (in usec), and suspend_time
2296 * is how long (in "extended beacon" format) that the scan is "suspended"
2297 * after returning to the service channel. That is, suspend_time is the
2298 * time that we stay on the service channel, doing normal work, between
2299 * scan segments. The driver may set these parameters differently to support
2300 * scanning when associated vs. not associated, and light vs. heavy traffic
2301 * loads when associated.
2302 *
2303 * After receiving this command, the device's scan engine does the following;
2304 *
2305 * 1) Sends SCAN_START notification to driver
2306 * 2) Checks to see if it has time to do scan for one channel
2307 * 3) Sends NULL packet, with power-save (PS) bit set to 1,
2308 * to tell AP that we're going off-channel
2309 * 4) Tunes to first channel in scan list, does active or passive scan
2310 * 5) Sends SCAN_RESULT notification to driver
2311 * 6) Checks to see if it has time to do scan on *next* channel in list
2312 * 7) Repeats 4-6 until it no longer has time to scan the next channel
2313 * before max_out_time expires
2314 * 8) Returns to service channel
2315 * 9) Sends NULL packet with PS=0 to tell AP that we're back
2316 * 10) Stays on service channel until suspend_time expires
2317 * 11) Repeats entire process 2-10 until list is complete
2318 * 12) Sends SCAN_COMPLETE notification
2319 *
2320 * For fast, efficient scans, the scan command also has support for staying on
2321 * a channel for just a short time, if doing active scanning and getting no
2322 * responses to the transmitted probe request. This time is controlled by
2323 * quiet_time, and the number of received packets below which a channel is
2324 * considered "quiet" is controlled by quiet_plcp_threshold.
2325 *
2326 * For active scanning on channels that have regulatory restrictions against
2327 * blindly transmitting, the scan can listen before transmitting, to make sure
2328 * that there is already legitimate activity on the channel. If enough
2329 * packets are cleanly received on the channel (controlled by good_CRC_th,
2330 * typical value 1), the scan engine starts transmitting probe requests.
2331 *
2332 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2333 *
2334 * To avoid uCode errors, see timing restrictions described under
2335 * struct iwl_scan_channel.
2336 */
2337
2338enum iwl_scan_flags {
2339 /* BIT(0) currently unused */
2340 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1),
2341 /* bits 2-7 reserved */
2342};
2343
2344struct iwl_scan_cmd {
2345 __le16 len;
2346 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */
2347 u8 channel_count; /* # channels in channel list */
2348 __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2349 * (only for active scan) */
2350 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2351 __le16 good_CRC_th; /* passive -> active promotion threshold */
2352 __le16 rx_chain; /* RXON_RX_CHAIN_* */
2353 __le32 max_out_time; /* max usec to be away from associated (service)
2354 * channel */
2355 __le32 suspend_time; /* pause scan this long (in "extended beacon
2356 * format") when returning to service chnl:
2357 */
2358 __le32 flags; /* RXON_FLG_* */
2359 __le32 filter_flags; /* RXON_FILTER_* */
2360
2361 /* For active scans (set to all-0s for passive scans).
2362 * Does not include payload. Must specify Tx rate; no rate scaling. */
2363 struct iwl_tx_cmd tx_cmd;
2364
2365 /* For directed active scans (set to all-0s otherwise) */
2366 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
2367
2368 /*
2369 * Probe request frame, followed by channel list.
2370 *
2371 * Size of probe request frame is specified by byte count in tx_cmd.
2372 * Channel list follows immediately after probe request frame.
2373 * Number of channels in list is specified by channel_count.
2374 * Each channel in list is of type:
2375 *
2376 * struct iwl_scan_channel channels[0];
2377 *
2378 * NOTE: Only one band of channels can be scanned per pass. You
2379 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2380 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2381 * before requesting another scan.
2382 */
2383 u8 data[0];
2384} __packed;
2385
2386/* Can abort will notify by complete notification with abort status. */
2387#define CAN_ABORT_STATUS cpu_to_le32(0x1)
2388/* complete notification statuses */
2389#define ABORT_STATUS 0x2
2390
2391/*
2392 * REPLY_SCAN_CMD = 0x80 (response)
2393 */
2394struct iwl_scanreq_notification {
2395 __le32 status; /* 1: okay, 2: cannot fulfill request */
2396} __packed;
2397
2398/*
2399 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2400 */
2401struct iwl_scanstart_notification {
2402 __le32 tsf_low;
2403 __le32 tsf_high;
2404 __le32 beacon_timer;
2405 u8 channel;
2406 u8 band;
2407 u8 reserved[2];
2408 __le32 status;
2409} __packed;
2410
2411#define SCAN_OWNER_STATUS 0x1
2412#define MEASURE_OWNER_STATUS 0x2
2413
2414#define IWL_PROBE_STATUS_OK 0
2415#define IWL_PROBE_STATUS_TX_FAILED BIT(0)
2416/* error statuses combined with TX_FAILED */
2417#define IWL_PROBE_STATUS_FAIL_TTL BIT(1)
2418#define IWL_PROBE_STATUS_FAIL_BT BIT(2)
2419
2420#define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
2421/*
2422 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2423 */
2424struct iwl_scanresults_notification {
2425 u8 channel;
2426 u8 band;
2427 u8 probe_status;
2428 u8 num_probe_not_sent; /* not enough time to send */
2429 __le32 tsf_low;
2430 __le32 tsf_high;
2431 __le32 statistics[NUMBER_OF_STATISTICS];
2432} __packed;
2433
2434/*
2435 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2436 */
2437struct iwl_scancomplete_notification {
2438 u8 scanned_channels;
2439 u8 status;
2440 u8 bt_status; /* BT On/Off status */
2441 u8 last_channel;
2442 __le32 tsf_low;
2443 __le32 tsf_high;
2444} __packed;
2445
2446
2447/******************************************************************************
2448 * (9)
2449 * IBSS/AP Commands and Notifications:
2450 *
2451 *****************************************************************************/
2452
2453enum iwl_ibss_manager {
2454 IWL_NOT_IBSS_MANAGER = 0,
2455 IWL_IBSS_MANAGER = 1,
2456};
2457
2458/*
2459 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2460 */
2461
2462struct iwlagn_beacon_notif {
2463 struct iwlagn_tx_resp beacon_notify_hdr;
2464 __le32 low_tsf;
2465 __le32 high_tsf;
2466 __le32 ibss_mgr_status;
2467} __packed;
2468
2469/*
2470 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2471 */
2472
2473struct iwl_tx_beacon_cmd {
2474 struct iwl_tx_cmd tx;
2475 __le16 tim_idx;
2476 u8 tim_size;
2477 u8 reserved1;
2478 struct ieee80211_hdr frame[0]; /* beacon frame */
2479} __packed;
2480
2481/******************************************************************************
2482 * (10)
2483 * Statistics Commands and Notifications:
2484 *
2485 *****************************************************************************/
2486
2487#define IWL_TEMP_CONVERT 260
2488
2489#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
2490#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
2491#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
2492
2493/* Used for passing to driver number of successes and failures per rate */
2494struct rate_histogram {
2495 union {
2496 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2497 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2498 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2499 } success;
2500 union {
2501 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2502 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2503 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2504 } failed;
2505} __packed;
2506
2507/* statistics command response */
2508
2509struct statistics_dbg {
2510 __le32 burst_check;
2511 __le32 burst_count;
2512 __le32 wait_for_silence_timeout_cnt;
2513 __le32 reserved[3];
2514} __packed;
2515
2516struct statistics_rx_phy {
2517 __le32 ina_cnt;
2518 __le32 fina_cnt;
2519 __le32 plcp_err;
2520 __le32 crc32_err;
2521 __le32 overrun_err;
2522 __le32 early_overrun_err;
2523 __le32 crc32_good;
2524 __le32 false_alarm_cnt;
2525 __le32 fina_sync_err_cnt;
2526 __le32 sfd_timeout;
2527 __le32 fina_timeout;
2528 __le32 unresponded_rts;
2529 __le32 rxe_frame_limit_overrun;
2530 __le32 sent_ack_cnt;
2531 __le32 sent_cts_cnt;
2532 __le32 sent_ba_rsp_cnt;
2533 __le32 dsp_self_kill;
2534 __le32 mh_format_err;
2535 __le32 re_acq_main_rssi_sum;
2536 __le32 reserved3;
2537} __packed;
2538
2539struct statistics_rx_ht_phy {
2540 __le32 plcp_err;
2541 __le32 overrun_err;
2542 __le32 early_overrun_err;
2543 __le32 crc32_good;
2544 __le32 crc32_err;
2545 __le32 mh_format_err;
2546 __le32 agg_crc32_good;
2547 __le32 agg_mpdu_cnt;
2548 __le32 agg_cnt;
2549 __le32 unsupport_mcs;
2550} __packed;
2551
2552#define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
2553
2554struct statistics_rx_non_phy {
2555 __le32 bogus_cts; /* CTS received when not expecting CTS */
2556 __le32 bogus_ack; /* ACK received when not expecting ACK */
2557 __le32 non_bssid_frames; /* number of frames with BSSID that
2558 * doesn't belong to the STA BSSID */
2559 __le32 filtered_frames; /* count frames that were dumped in the
2560 * filtering process */
2561 __le32 non_channel_beacons; /* beacons with our bss id but not on
2562 * our serving channel */
2563 __le32 channel_beacons; /* beacons with our bss id and in our
2564 * serving channel */
2565 __le32 num_missed_bcon; /* number of missed beacons */
2566 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
2567 * ADC was in saturation */
2568 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2569 * for INA */
2570 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
2571 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
2572 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
2573 __le32 interference_data_flag; /* flag for interference data
2574 * availability. 1 when data is
2575 * available. */
2576 __le32 channel_load; /* counts RX Enable time in uSec */
2577 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
2578 * and CCK) counter */
2579 __le32 beacon_rssi_a;
2580 __le32 beacon_rssi_b;
2581 __le32 beacon_rssi_c;
2582 __le32 beacon_energy_a;
2583 __le32 beacon_energy_b;
2584 __le32 beacon_energy_c;
2585} __packed;
2586
2587struct statistics_rx_non_phy_bt {
2588 struct statistics_rx_non_phy common;
2589 /* additional stats for bt */
2590 __le32 num_bt_kills;
2591 __le32 reserved[2];
2592} __packed;
2593
2594struct statistics_rx {
2595 struct statistics_rx_phy ofdm;
2596 struct statistics_rx_phy cck;
2597 struct statistics_rx_non_phy general;
2598 struct statistics_rx_ht_phy ofdm_ht;
2599} __packed;
2600
2601struct statistics_rx_bt {
2602 struct statistics_rx_phy ofdm;
2603 struct statistics_rx_phy cck;
2604 struct statistics_rx_non_phy_bt general;
2605 struct statistics_rx_ht_phy ofdm_ht;
2606} __packed;
2607
2608/**
2609 * struct statistics_tx_power - current tx power
2610 *
2611 * @ant_a: current tx power on chain a in 1/2 dB step
2612 * @ant_b: current tx power on chain b in 1/2 dB step
2613 * @ant_c: current tx power on chain c in 1/2 dB step
2614 */
2615struct statistics_tx_power {
2616 u8 ant_a;
2617 u8 ant_b;
2618 u8 ant_c;
2619 u8 reserved;
2620} __packed;
2621
2622struct statistics_tx_non_phy_agg {
2623 __le32 ba_timeout;
2624 __le32 ba_reschedule_frames;
2625 __le32 scd_query_agg_frame_cnt;
2626 __le32 scd_query_no_agg;
2627 __le32 scd_query_agg;
2628 __le32 scd_query_mismatch;
2629 __le32 frame_not_ready;
2630 __le32 underrun;
2631 __le32 bt_prio_kill;
2632 __le32 rx_ba_rsp_cnt;
2633} __packed;
2634
2635struct statistics_tx {
2636 __le32 preamble_cnt;
2637 __le32 rx_detected_cnt;
2638 __le32 bt_prio_defer_cnt;
2639 __le32 bt_prio_kill_cnt;
2640 __le32 few_bytes_cnt;
2641 __le32 cts_timeout;
2642 __le32 ack_timeout;
2643 __le32 expected_ack_cnt;
2644 __le32 actual_ack_cnt;
2645 __le32 dump_msdu_cnt;
2646 __le32 burst_abort_next_frame_mismatch_cnt;
2647 __le32 burst_abort_missing_next_frame_cnt;
2648 __le32 cts_timeout_collision;
2649 __le32 ack_or_ba_timeout_collision;
2650 struct statistics_tx_non_phy_agg agg;
2651 /*
2652 * "tx_power" are optional parameters provided by uCode,
2653 * 6000 series is the only device provide the information,
2654 * Those are reserved fields for all the other devices
2655 */
2656 struct statistics_tx_power tx_power;
2657 __le32 reserved1;
2658} __packed;
2659
2660
2661struct statistics_div {
2662 __le32 tx_on_a;
2663 __le32 tx_on_b;
2664 __le32 exec_time;
2665 __le32 probe_time;
2666 __le32 reserved1;
2667 __le32 reserved2;
2668} __packed;
2669
2670struct statistics_general_common {
2671 __le32 temperature; /* radio temperature */
2672 __le32 temperature_m; /* radio voltage */
2673 struct statistics_dbg dbg;
2674 __le32 sleep_time;
2675 __le32 slots_out;
2676 __le32 slots_idle;
2677 __le32 ttl_timestamp;
2678 struct statistics_div div;
2679 __le32 rx_enable_counter;
2680 /*
2681 * num_of_sos_states:
2682 * count the number of times we have to re-tune
2683 * in order to get out of bad PHY status
2684 */
2685 __le32 num_of_sos_states;
2686} __packed;
2687
2688struct statistics_bt_activity {
2689 /* Tx statistics */
2690 __le32 hi_priority_tx_req_cnt;
2691 __le32 hi_priority_tx_denied_cnt;
2692 __le32 lo_priority_tx_req_cnt;
2693 __le32 lo_priority_tx_denied_cnt;
2694 /* Rx statistics */
2695 __le32 hi_priority_rx_req_cnt;
2696 __le32 hi_priority_rx_denied_cnt;
2697 __le32 lo_priority_rx_req_cnt;
2698 __le32 lo_priority_rx_denied_cnt;
2699} __packed;
2700
2701struct statistics_general {
2702 struct statistics_general_common common;
2703 __le32 reserved2;
2704 __le32 reserved3;
2705} __packed;
2706
2707struct statistics_general_bt {
2708 struct statistics_general_common common;
2709 struct statistics_bt_activity activity;
2710 __le32 reserved2;
2711 __le32 reserved3;
2712} __packed;
2713
2714#define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
2715#define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
2716#define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
2717
2718/*
2719 * REPLY_STATISTICS_CMD = 0x9c,
2720 * all devices identical.
2721 *
2722 * This command triggers an immediate response containing uCode statistics.
2723 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2724 *
2725 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2726 * internal copy of the statistics (counters) after issuing the response.
2727 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2728 *
2729 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2730 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
2731 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2732 */
2733#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
2734#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
2735struct iwl_statistics_cmd {
2736 __le32 configuration_flags; /* IWL_STATS_CONF_* */
2737} __packed;
2738
2739/*
2740 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2741 *
2742 * By default, uCode issues this notification after receiving a beacon
2743 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
2744 * REPLY_STATISTICS_CMD 0x9c, above.
2745 *
2746 * Statistics counters continue to increment beacon after beacon, but are
2747 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2748 * 0x9c with CLEAR_STATS bit set (see above).
2749 *
2750 * uCode also issues this notification during scans. uCode clears statistics
2751 * appropriately so that each notification contains statistics for only the
2752 * one channel that has just been scanned.
2753 */
2754#define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
2755#define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8)
2756
2757struct iwl_notif_statistics {
2758 __le32 flag;
2759 struct statistics_rx rx;
2760 struct statistics_tx tx;
2761 struct statistics_general general;
2762} __packed;
2763
2764struct iwl_bt_notif_statistics {
2765 __le32 flag;
2766 struct statistics_rx_bt rx;
2767 struct statistics_tx tx;
2768 struct statistics_general_bt general;
2769} __packed;
2770
2771/*
2772 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
2773 *
2774 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2775 * in regardless of how many missed beacons, which mean when driver receive the
2776 * notification, inside the command, it can find all the beacons information
2777 * which include number of total missed beacons, number of consecutive missed
2778 * beacons, number of beacons received and number of beacons expected to
2779 * receive.
2780 *
2781 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2782 * in order to bring the radio/PHY back to working state; which has no relation
2783 * to when driver will perform sensitivity calibration.
2784 *
2785 * Driver should set it own missed_beacon_threshold to decide when to perform
2786 * sensitivity calibration based on number of consecutive missed beacons in
2787 * order to improve overall performance, especially in noisy environment.
2788 *
2789 */
2790
2791#define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2792#define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2793#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
2794
2795struct iwl_missed_beacon_notif {
2796 __le32 consecutive_missed_beacons;
2797 __le32 total_missed_becons;
2798 __le32 num_expected_beacons;
2799 __le32 num_recvd_beacons;
2800} __packed;
2801
2802
2803/******************************************************************************
2804 * (11)
2805 * Rx Calibration Commands:
2806 *
2807 * With the uCode used for open source drivers, most Tx calibration (except
2808 * for Tx Power) and most Rx calibration is done by uCode during the
2809 * "initialize" phase of uCode boot. Driver must calibrate only:
2810 *
2811 * 1) Tx power (depends on temperature), described elsewhere
2812 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2813 * 3) Receiver sensitivity (to optimize signal detection)
2814 *
2815 *****************************************************************************/
2816
2817/**
2818 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2819 *
2820 * This command sets up the Rx signal detector for a sensitivity level that
2821 * is high enough to lock onto all signals within the associated network,
2822 * but low enough to ignore signals that are below a certain threshold, so as
2823 * not to have too many "false alarms". False alarms are signals that the
2824 * Rx DSP tries to lock onto, but then discards after determining that they
2825 * are noise.
2826 *
2827 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2828 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2829 * time listening, not transmitting). Driver must adjust sensitivity so that
2830 * the ratio of actual false alarms to actual Rx time falls within this range.
2831 *
2832 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2833 * received beacon. These provide information to the driver to analyze the
2834 * sensitivity. Don't analyze statistics that come in from scanning, or any
2835 * other non-associated-network source. Pertinent statistics include:
2836 *
2837 * From "general" statistics (struct statistics_rx_non_phy):
2838 *
2839 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2840 * Measure of energy of desired signal. Used for establishing a level
2841 * below which the device does not detect signals.
2842 *
2843 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2844 * Measure of background noise in silent period after beacon.
2845 *
2846 * channel_load
2847 * uSecs of actual Rx time during beacon period (varies according to
2848 * how much time was spent transmitting).
2849 *
2850 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2851 *
2852 * false_alarm_cnt
2853 * Signal locks abandoned early (before phy-level header).
2854 *
2855 * plcp_err
2856 * Signal locks abandoned late (during phy-level header).
2857 *
2858 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from
2859 * beacon to beacon, i.e. each value is an accumulation of all errors
2860 * before and including the latest beacon. Values will wrap around to 0
2861 * after counting up to 2^32 - 1. Driver must differentiate vs.
2862 * previous beacon's values to determine # false alarms in the current
2863 * beacon period.
2864 *
2865 * Total number of false alarms = false_alarms + plcp_errs
2866 *
2867 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2868 * (notice that the start points for OFDM are at or close to settings for
2869 * maximum sensitivity):
2870 *
2871 * START / MIN / MAX
2872 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120
2873 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210
2874 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140
2875 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270
2876 *
2877 * If actual rate of OFDM false alarms (+ plcp_errors) is too high
2878 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2879 * by *adding* 1 to all 4 of the table entries above, up to the max for
2880 * each entry. Conversely, if false alarm rate is too low (less than 5
2881 * for each 204.8 msecs listening), *subtract* 1 from each entry to
2882 * increase sensitivity.
2883 *
2884 * For CCK sensitivity, keep track of the following:
2885 *
2886 * 1). 20-beacon history of maximum background noise, indicated by
2887 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2888 * 3 receivers. For any given beacon, the "silence reference" is
2889 * the maximum of last 60 samples (20 beacons * 3 receivers).
2890 *
2891 * 2). 10-beacon history of strongest signal level, as indicated
2892 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2893 * i.e. the strength of the signal through the best receiver at the
2894 * moment. These measurements are "upside down", with lower values
2895 * for stronger signals, so max energy will be *minimum* value.
2896 *
2897 * Then for any given beacon, the driver must determine the *weakest*
2898 * of the strongest signals; this is the minimum level that needs to be
2899 * successfully detected, when using the best receiver at the moment.
2900 * "Max cck energy" is the maximum (higher value means lower energy!)
2901 * of the last 10 minima. Once this is determined, driver must add
2902 * a little margin by adding "6" to it.
2903 *
2904 * 3). Number of consecutive beacon periods with too few false alarms.
2905 * Reset this to 0 at the first beacon period that falls within the
2906 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2907 *
2908 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2909 * (notice that the start points for CCK are at maximum sensitivity):
2910 *
2911 * START / MIN / MAX
2912 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200
2913 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400
2914 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100
2915 *
2916 * If actual rate of CCK false alarms (+ plcp_errors) is too high
2917 * (greater than 50 for each 204.8 msecs listening), method for reducing
2918 * sensitivity is:
2919 *
2920 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2921 * up to max 400.
2922 *
2923 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2924 * sensitivity has been reduced a significant amount; bring it up to
2925 * a moderate 161. Otherwise, *add* 3, up to max 200.
2926 *
2927 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2928 * sensitivity has been reduced only a moderate or small amount;
2929 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2930 * down to min 0. Otherwise (if gain has been significantly reduced),
2931 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2932 *
2933 * b) Save a snapshot of the "silence reference".
2934 *
2935 * If actual rate of CCK false alarms (+ plcp_errors) is too low
2936 * (less than 5 for each 204.8 msecs listening), method for increasing
2937 * sensitivity is used only if:
2938 *
2939 * 1a) Previous beacon did not have too many false alarms
2940 * 1b) AND difference between previous "silence reference" and current
2941 * "silence reference" (prev - current) is 2 or more,
2942 * OR 2) 100 or more consecutive beacon periods have had rate of
2943 * less than 5 false alarms per 204.8 milliseconds rx time.
2944 *
2945 * Method for increasing sensitivity:
2946 *
2947 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
2948 * down to min 125.
2949 *
2950 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2951 * down to min 200.
2952 *
2953 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
2954 *
2955 * If actual rate of CCK false alarms (+ plcp_errors) is within good range
2956 * (between 5 and 50 for each 204.8 msecs listening):
2957 *
2958 * 1) Save a snapshot of the silence reference.
2959 *
2960 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors),
2961 * give some extra margin to energy threshold by *subtracting* 8
2962 * from value in HD_MIN_ENERGY_CCK_DET_INDEX.
2963 *
2964 * For all cases (too few, too many, good range), make sure that the CCK
2965 * detection threshold (energy) is below the energy level for robust
2966 * detection over the past 10 beacon periods, the "Max cck energy".
2967 * Lower values mean higher energy; this means making sure that the value
2968 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
2969 *
2970 */
2971
2972/*
2973 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
2974 */
2975#define HD_TABLE_SIZE (11) /* number of entries */
2976#define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */
2977#define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
2978#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
2979#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
2980#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
2981#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
2982#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
2983#define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
2984#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
2985#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
2986#define HD_OFDM_ENERGY_TH_IN_INDEX (10)
2987
2988/*
2989 * Additional table entries in enhance SENSITIVITY_CMD
2990 */
2991#define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11)
2992#define HD_INA_NON_SQUARE_DET_CCK_INDEX (12)
2993#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13)
2994#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14)
2995#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15)
2996#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16)
2997#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17)
2998#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18)
2999#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19)
3000#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20)
3001#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21)
3002#define HD_RESERVED (22)
3003
3004/* number of entries for enhanced tbl */
3005#define ENHANCE_HD_TABLE_SIZE (23)
3006
3007/* number of additional entries for enhanced tbl */
3008#define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
3009
3010#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0)
3011#define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0)
3012#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0)
3013#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668)
3014#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
3015#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486)
3016#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37)
3017#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853)
3018#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
3019#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476)
3020#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99)
3021
3022#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1)
3023#define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1)
3024#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1)
3025#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600)
3026#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40)
3027#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486)
3028#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45)
3029#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853)
3030#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60)
3031#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476)
3032#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99)
3033
3034
3035/* Control field in struct iwl_sensitivity_cmd */
3036#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
3037#define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
3038
3039/**
3040 * struct iwl_sensitivity_cmd
3041 * @control: (1) updates working table, (0) updates default table
3042 * @table: energy threshold values, use HD_* as index into table
3043 *
3044 * Always use "1" in "control" to update uCode's working table and DSP.
3045 */
3046struct iwl_sensitivity_cmd {
3047 __le16 control; /* always use "1" */
3048 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
3049} __packed;
3050
3051/*
3052 *
3053 */
3054struct iwl_enhance_sensitivity_cmd {
3055 __le16 control; /* always use "1" */
3056 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
3057} __packed;
3058
3059
3060/**
3061 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3062 *
3063 * This command sets the relative gains of agn device's 3 radio receiver chains.
3064 *
3065 * After the first association, driver should accumulate signal and noise
3066 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3067 * beacons from the associated network (don't collect statistics that come
3068 * in from scanning, or any other non-network source).
3069 *
3070 * DISCONNECTED ANTENNA:
3071 *
3072 * Driver should determine which antennas are actually connected, by comparing
3073 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the
3074 * following values over 20 beacons, one accumulator for each of the chains
3075 * a/b/c, from struct statistics_rx_non_phy:
3076 *
3077 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3078 *
3079 * Find the strongest signal from among a/b/c. Compare the other two to the
3080 * strongest. If any signal is more than 15 dB (times 20, unless you
3081 * divide the accumulated values by 20) below the strongest, the driver
3082 * considers that antenna to be disconnected, and should not try to use that
3083 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected,
3084 * driver should declare the stronger one as connected, and attempt to use it
3085 * (A and B are the only 2 Tx chains!).
3086 *
3087 *
3088 * RX BALANCE:
3089 *
3090 * Driver should balance the 3 receivers (but just the ones that are connected
3091 * to antennas, see above) for gain, by comparing the average signal levels
3092 * detected during the silence after each beacon (background noise).
3093 * Accumulate (add) the following values over 20 beacons, one accumulator for
3094 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3095 *
3096 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3097 *
3098 * Find the weakest background noise level from among a/b/c. This Rx chain
3099 * will be the reference, with 0 gain adjustment. Attenuate other channels by
3100 * finding noise difference:
3101 *
3102 * (accum_noise[i] - accum_noise[reference]) / 30
3103 *
3104 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3105 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3106 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3107 * and set bit 2 to indicate "reduce gain". The value for the reference
3108 * (weakest) chain should be "0".
3109 *
3110 * diff_gain_[abc] bit fields:
3111 * 2: (1) reduce gain, (0) increase gain
3112 * 1-0: amount of gain, units of 1.5 dB
3113 */
3114
3115/* Phy calibration command for series */
3116enum {
3117 IWL_PHY_CALIBRATE_DC_CMD = 8,
3118 IWL_PHY_CALIBRATE_LO_CMD = 9,
3119 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
3120 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
3121 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16,
3122 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17,
3123 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18,
3124};
3125
3126/* This enum defines the bitmap of various calibrations to enable in both
3127 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3128 */
3129enum iwl_ucode_calib_cfg {
3130 IWL_CALIB_CFG_RX_BB_IDX = BIT(0),
3131 IWL_CALIB_CFG_DC_IDX = BIT(1),
3132 IWL_CALIB_CFG_LO_IDX = BIT(2),
3133 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3),
3134 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4),
3135 IWL_CALIB_CFG_NOISE_IDX = BIT(5),
3136 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6),
3137 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7),
3138 IWL_CALIB_CFG_PAPD_IDX = BIT(8),
3139 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9),
3140 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10),
3141};
3142
3143#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3144 IWL_CALIB_CFG_DC_IDX | \
3145 IWL_CALIB_CFG_LO_IDX | \
3146 IWL_CALIB_CFG_TX_IQ_IDX | \
3147 IWL_CALIB_CFG_RX_IQ_IDX | \
3148 IWL_CALIB_CFG_CRYSTAL_IDX)
3149
3150#define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3151 IWL_CALIB_CFG_DC_IDX | \
3152 IWL_CALIB_CFG_LO_IDX | \
3153 IWL_CALIB_CFG_TX_IQ_IDX | \
3154 IWL_CALIB_CFG_RX_IQ_IDX | \
3155 IWL_CALIB_CFG_TEMPERATURE_IDX | \
3156 IWL_CALIB_CFG_PAPD_IDX | \
3157 IWL_CALIB_CFG_TX_PWR_IDX | \
3158 IWL_CALIB_CFG_CRYSTAL_IDX)
3159
3160#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0))
3161
3162struct iwl_calib_cfg_elmnt_s {
3163 __le32 is_enable;
3164 __le32 start;
3165 __le32 send_res;
3166 __le32 apply_res;
3167 __le32 reserved;
3168} __packed;
3169
3170struct iwl_calib_cfg_status_s {
3171 struct iwl_calib_cfg_elmnt_s once;
3172 struct iwl_calib_cfg_elmnt_s perd;
3173 __le32 flags;
3174} __packed;
3175
3176struct iwl_calib_cfg_cmd {
3177 struct iwl_calib_cfg_status_s ucd_calib_cfg;
3178 struct iwl_calib_cfg_status_s drv_calib_cfg;
3179 __le32 reserved1;
3180} __packed;
3181
3182struct iwl_calib_hdr {
3183 u8 op_code;
3184 u8 first_group;
3185 u8 groups_num;
3186 u8 data_valid;
3187} __packed;
3188
3189struct iwl_calib_cmd {
3190 struct iwl_calib_hdr hdr;
3191 u8 data[0];
3192} __packed;
3193
3194struct iwl_calib_xtal_freq_cmd {
3195 struct iwl_calib_hdr hdr;
3196 u8 cap_pin1;
3197 u8 cap_pin2;
3198 u8 pad[2];
3199} __packed;
3200
3201#define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700)
3202struct iwl_calib_temperature_offset_cmd {
3203 struct iwl_calib_hdr hdr;
3204 __le16 radio_sensor_offset;
3205 __le16 reserved;
3206} __packed;
3207
3208struct iwl_calib_temperature_offset_v2_cmd {
3209 struct iwl_calib_hdr hdr;
3210 __le16 radio_sensor_offset_high;
3211 __le16 radio_sensor_offset_low;
3212 __le16 burntVoltageRef;
3213 __le16 reserved;
3214} __packed;
3215
3216/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3217struct iwl_calib_chain_noise_reset_cmd {
3218 struct iwl_calib_hdr hdr;
3219 u8 data[0];
3220};
3221
3222/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
3223struct iwl_calib_chain_noise_gain_cmd {
3224 struct iwl_calib_hdr hdr;
3225 u8 delta_gain_1;
3226 u8 delta_gain_2;
3227 u8 pad[2];
3228} __packed;
3229
3230/******************************************************************************
3231 * (12)
3232 * Miscellaneous Commands:
3233 *
3234 *****************************************************************************/
3235
3236/*
3237 * LEDs Command & Response
3238 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3239 *
3240 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3241 * this command turns it on or off, or sets up a periodic blinking cycle.
3242 */
3243struct iwl_led_cmd {
3244 __le32 interval; /* "interval" in uSec */
3245 u8 id; /* 1: Activity, 2: Link, 3: Tech */
3246 u8 off; /* # intervals off while blinking;
3247 * "0", with >0 "on" value, turns LED on */
3248 u8 on; /* # intervals on while blinking;
3249 * "0", regardless of "off", turns LED off */
3250 u8 reserved;
3251} __packed;
3252
3253/*
3254 * station priority table entries
3255 * also used as potential "events" value for both
3256 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
3257 */
3258
3259/*
3260 * COEX events entry flag masks
3261 * RP - Requested Priority
3262 * WP - Win Medium Priority: priority assigned when the contention has been won
3263 */
3264#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3265#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3266#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3267
3268#define COEX_CU_UNASSOC_IDLE_RP 4
3269#define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3270#define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3271#define COEX_CU_CALIBRATION_RP 4
3272#define COEX_CU_PERIODIC_CALIBRATION_RP 4
3273#define COEX_CU_CONNECTION_ESTAB_RP 4
3274#define COEX_CU_ASSOCIATED_IDLE_RP 4
3275#define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3276#define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3277#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3278#define COEX_CU_RF_ON_RP 6
3279#define COEX_CU_RF_OFF_RP 4
3280#define COEX_CU_STAND_ALONE_DEBUG_RP 6
3281#define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3282#define COEX_CU_RSRVD1_RP 4
3283#define COEX_CU_RSRVD2_RP 4
3284
3285#define COEX_CU_UNASSOC_IDLE_WP 3
3286#define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3287#define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3288#define COEX_CU_CALIBRATION_WP 3
3289#define COEX_CU_PERIODIC_CALIBRATION_WP 3
3290#define COEX_CU_CONNECTION_ESTAB_WP 3
3291#define COEX_CU_ASSOCIATED_IDLE_WP 3
3292#define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3293#define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3294#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3295#define COEX_CU_RF_ON_WP 3
3296#define COEX_CU_RF_OFF_WP 3
3297#define COEX_CU_STAND_ALONE_DEBUG_WP 6
3298#define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3299#define COEX_CU_RSRVD1_WP 3
3300#define COEX_CU_RSRVD2_WP 3
3301
3302#define COEX_UNASSOC_IDLE_FLAGS 0
3303#define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3304 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3305 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3306#define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3307 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3308 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3309#define COEX_CALIBRATION_FLAGS \
3310 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3311 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3312#define COEX_PERIODIC_CALIBRATION_FLAGS 0
3313/*
3314 * COEX_CONNECTION_ESTAB:
3315 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3316 */
3317#define COEX_CONNECTION_ESTAB_FLAGS \
3318 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3319 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3320 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3321#define COEX_ASSOCIATED_IDLE_FLAGS 0
3322#define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3323 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3324 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3325#define COEX_ASSOC_AUTO_SCAN_FLAGS \
3326 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3327 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3328#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3329#define COEX_RF_ON_FLAGS 0
3330#define COEX_RF_OFF_FLAGS 0
3331#define COEX_STAND_ALONE_DEBUG_FLAGS \
3332 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3333 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3334#define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3335 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3336 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3337 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3338#define COEX_RSRVD1_FLAGS 0
3339#define COEX_RSRVD2_FLAGS 0
3340/*
3341 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3342 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3343 */
3344#define COEX_CU_RF_ON_FLAGS \
3345 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3346 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3347 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3348
3349
3350enum {
3351 /* un-association part */
3352 COEX_UNASSOC_IDLE = 0,
3353 COEX_UNASSOC_MANUAL_SCAN = 1,
3354 COEX_UNASSOC_AUTO_SCAN = 2,
3355 /* calibration */
3356 COEX_CALIBRATION = 3,
3357 COEX_PERIODIC_CALIBRATION = 4,
3358 /* connection */
3359 COEX_CONNECTION_ESTAB = 5,
3360 /* association part */
3361 COEX_ASSOCIATED_IDLE = 6,
3362 COEX_ASSOC_MANUAL_SCAN = 7,
3363 COEX_ASSOC_AUTO_SCAN = 8,
3364 COEX_ASSOC_ACTIVE_LEVEL = 9,
3365 /* RF ON/OFF */
3366 COEX_RF_ON = 10,
3367 COEX_RF_OFF = 11,
3368 COEX_STAND_ALONE_DEBUG = 12,
3369 /* IPAN */
3370 COEX_IPAN_ASSOC_LEVEL = 13,
3371 /* reserved */
3372 COEX_RSRVD1 = 14,
3373 COEX_RSRVD2 = 15,
3374 COEX_NUM_OF_EVENTS = 16
3375};
3376
3377/*
3378 * Coexistence WIFI/WIMAX Command
3379 * COEX_PRIORITY_TABLE_CMD = 0x5a
3380 *
3381 */
3382struct iwl_wimax_coex_event_entry {
3383 u8 request_prio;
3384 u8 win_medium_prio;
3385 u8 reserved;
3386 u8 flags;
3387} __packed;
3388
3389/* COEX flag masks */
3390
3391/* Station table is valid */
3392#define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1)
3393/* UnMask wake up src at unassociated sleep */
3394#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4)
3395/* UnMask wake up src at associated sleep */
3396#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8)
3397/* Enable CoEx feature. */
3398#define COEX_FLAGS_COEX_ENABLE_MSK (0x80)
3399
3400struct iwl_wimax_coex_cmd {
3401 u8 flags;
3402 u8 reserved[3];
3403 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
3404} __packed;
3405
3406/*
3407 * Coexistence MEDIUM NOTIFICATION
3408 * COEX_MEDIUM_NOTIFICATION = 0x5b
3409 *
3410 * notification from uCode to host to indicate medium changes
3411 *
3412 */
3413/*
3414 * status field
3415 * bit 0 - 2: medium status
3416 * bit 3: medium change indication
3417 * bit 4 - 31: reserved
3418 */
3419/* status option values, (0 - 2 bits) */
3420#define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
3421#define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
3422#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3423#define COEX_MEDIUM_MSK (0x7)
3424
3425/* send notification status (1 bit) */
3426#define COEX_MEDIUM_CHANGED (0x8)
3427#define COEX_MEDIUM_CHANGED_MSK (0x8)
3428#define COEX_MEDIUM_SHIFT (3)
3429
3430struct iwl_coex_medium_notification {
3431 __le32 status;
3432 __le32 events;
3433} __packed;
3434
3435/*
3436 * Coexistence EVENT Command
3437 * COEX_EVENT_CMD = 0x5c
3438 *
3439 * send from host to uCode for coex event request.
3440 */
3441/* flags options */
3442#define COEX_EVENT_REQUEST_MSK (0x1)
3443
3444struct iwl_coex_event_cmd {
3445 u8 flags;
3446 u8 event;
3447 __le16 reserved;
3448} __packed;
3449
3450struct iwl_coex_event_resp {
3451 __le32 status;
3452} __packed;
3453
3454
3455/******************************************************************************
3456 * Bluetooth Coexistence commands
3457 *
3458 *****************************************************************************/
3459
3460/*
3461 * BT Status notification
3462 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
3463 */
3464enum iwl_bt_coex_profile_traffic_load {
3465 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0,
3466 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1,
3467 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2,
3468 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3,
3469/*
3470 * There are no more even though below is a u8, the
3471 * indication from the BT device only has two bits.
3472 */
3473};
3474
3475#define BT_SESSION_ACTIVITY_1_UART_MSG 0x1
3476#define BT_SESSION_ACTIVITY_2_UART_MSG 0x2
3477
3478/* BT UART message - Share Part (BT -> WiFi) */
3479#define BT_UART_MSG_FRAME1MSGTYPE_POS (0)
3480#define BT_UART_MSG_FRAME1MSGTYPE_MSK \
3481 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3482#define BT_UART_MSG_FRAME1SSN_POS (3)
3483#define BT_UART_MSG_FRAME1SSN_MSK \
3484 (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3485#define BT_UART_MSG_FRAME1UPDATEREQ_POS (5)
3486#define BT_UART_MSG_FRAME1UPDATEREQ_MSK \
3487 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3488#define BT_UART_MSG_FRAME1RESERVED_POS (6)
3489#define BT_UART_MSG_FRAME1RESERVED_MSK \
3490 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3491
3492#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0)
3493#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \
3494 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3495#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2)
3496#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \
3497 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3498#define BT_UART_MSG_FRAME2CHLSEQN_POS (4)
3499#define BT_UART_MSG_FRAME2CHLSEQN_MSK \
3500 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3501#define BT_UART_MSG_FRAME2INBAND_POS (5)
3502#define BT_UART_MSG_FRAME2INBAND_MSK \
3503 (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3504#define BT_UART_MSG_FRAME2RESERVED_POS (6)
3505#define BT_UART_MSG_FRAME2RESERVED_MSK \
3506 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3507
3508#define BT_UART_MSG_FRAME3SCOESCO_POS (0)
3509#define BT_UART_MSG_FRAME3SCOESCO_MSK \
3510 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3511#define BT_UART_MSG_FRAME3SNIFF_POS (1)
3512#define BT_UART_MSG_FRAME3SNIFF_MSK \
3513 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3514#define BT_UART_MSG_FRAME3A2DP_POS (2)
3515#define BT_UART_MSG_FRAME3A2DP_MSK \
3516 (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3517#define BT_UART_MSG_FRAME3ACL_POS (3)
3518#define BT_UART_MSG_FRAME3ACL_MSK \
3519 (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3520#define BT_UART_MSG_FRAME3MASTER_POS (4)
3521#define BT_UART_MSG_FRAME3MASTER_MSK \
3522 (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3523#define BT_UART_MSG_FRAME3OBEX_POS (5)
3524#define BT_UART_MSG_FRAME3OBEX_MSK \
3525 (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3526#define BT_UART_MSG_FRAME3RESERVED_POS (6)
3527#define BT_UART_MSG_FRAME3RESERVED_MSK \
3528 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3529
3530#define BT_UART_MSG_FRAME4IDLEDURATION_POS (0)
3531#define BT_UART_MSG_FRAME4IDLEDURATION_MSK \
3532 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3533#define BT_UART_MSG_FRAME4RESERVED_POS (6)
3534#define BT_UART_MSG_FRAME4RESERVED_MSK \
3535 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3536
3537#define BT_UART_MSG_FRAME5TXACTIVITY_POS (0)
3538#define BT_UART_MSG_FRAME5TXACTIVITY_MSK \
3539 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3540#define BT_UART_MSG_FRAME5RXACTIVITY_POS (2)
3541#define BT_UART_MSG_FRAME5RXACTIVITY_MSK \
3542 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3543#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4)
3544#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \
3545 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3546#define BT_UART_MSG_FRAME5RESERVED_POS (6)
3547#define BT_UART_MSG_FRAME5RESERVED_MSK \
3548 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3549
3550#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0)
3551#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \
3552 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3553#define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5)
3554#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \
3555 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3556#define BT_UART_MSG_FRAME6RESERVED_POS (6)
3557#define BT_UART_MSG_FRAME6RESERVED_MSK \
3558 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3559
3560#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0)
3561#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \
3562 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
3563#define BT_UART_MSG_FRAME7PAGE_POS (3)
3564#define BT_UART_MSG_FRAME7PAGE_MSK \
3565 (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3566#define BT_UART_MSG_FRAME7INQUIRY_POS (4)
3567#define BT_UART_MSG_FRAME7INQUIRY_MSK \
3568 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
3569#define BT_UART_MSG_FRAME7CONNECTABLE_POS (5)
3570#define BT_UART_MSG_FRAME7CONNECTABLE_MSK \
3571 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3572#define BT_UART_MSG_FRAME7RESERVED_POS (6)
3573#define BT_UART_MSG_FRAME7RESERVED_MSK \
3574 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3575
3576/* BT Session Activity 2 UART message (BT -> WiFi) */
3577#define BT_UART_MSG_2_FRAME1RESERVED1_POS (5)
3578#define BT_UART_MSG_2_FRAME1RESERVED1_MSK \
3579 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3580#define BT_UART_MSG_2_FRAME1RESERVED2_POS (6)
3581#define BT_UART_MSG_2_FRAME1RESERVED2_MSK \
3582 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3583
3584#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0)
3585#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \
3586 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3587#define BT_UART_MSG_2_FRAME2RESERVED_POS (6)
3588#define BT_UART_MSG_2_FRAME2RESERVED_MSK \
3589 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3590
3591#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0)
3592#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \
3593 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3594#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4)
3595#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \
3596 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3597#define BT_UART_MSG_2_FRAME3LEMASTER_POS (5)
3598#define BT_UART_MSG_2_FRAME3LEMASTER_MSK \
3599 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3600#define BT_UART_MSG_2_FRAME3RESERVED_POS (6)
3601#define BT_UART_MSG_2_FRAME3RESERVED_MSK \
3602 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3603
3604#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0)
3605#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \
3606 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3607#define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4)
3608#define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \
3609 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3610#define BT_UART_MSG_2_FRAME4RESERVED_POS (6)
3611#define BT_UART_MSG_2_FRAME4RESERVED_MSK \
3612 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3613
3614#define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0)
3615#define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \
3616 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3617#define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4)
3618#define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \
3619 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3620#define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5)
3621#define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \
3622 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3623#define BT_UART_MSG_2_FRAME5RESERVED_POS (6)
3624#define BT_UART_MSG_2_FRAME5RESERVED_MSK \
3625 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3626
3627#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0)
3628#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \
3629 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3630#define BT_UART_MSG_2_FRAME6RFU_POS (5)
3631#define BT_UART_MSG_2_FRAME6RFU_MSK \
3632 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3633#define BT_UART_MSG_2_FRAME6RESERVED_POS (6)
3634#define BT_UART_MSG_2_FRAME6RESERVED_MSK \
3635 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3636
3637#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0)
3638#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \
3639 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3640#define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3)
3641#define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \
3642 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3643#define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4)
3644#define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \
3645 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3646#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5)
3647#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \
3648 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3649#define BT_UART_MSG_2_FRAME7RESERVED_POS (6)
3650#define BT_UART_MSG_2_FRAME7RESERVED_MSK \
3651 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3652
3653
3654#define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD (-62)
3655#define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD (-65)
3656
3657struct iwl_bt_uart_msg {
3658 u8 header;
3659 u8 frame1;
3660 u8 frame2;
3661 u8 frame3;
3662 u8 frame4;
3663 u8 frame5;
3664 u8 frame6;
3665 u8 frame7;
3666} __packed;
3667
3668struct iwl_bt_coex_profile_notif {
3669 struct iwl_bt_uart_msg last_bt_uart_msg;
3670 u8 bt_status; /* 0 - off, 1 - on */
3671 u8 bt_traffic_load; /* 0 .. 3? */
3672 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3673 u8 reserved;
3674} __packed;
3675
3676#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3677#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3678#define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1
3679#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e
3680#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4
3681#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0
3682#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1
3683
3684/*
3685 * BT Coexistence Priority table
3686 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3687 */
3688enum bt_coex_prio_table_events {
3689 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3690 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3691 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3692 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3693 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3694 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3695 BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3696 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3697 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3698 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3699 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3700 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3701 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3702 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3703 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3704 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3705 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3706 BT_COEX_PRIO_TBL_EVT_MAX,
3707};
3708
3709enum bt_coex_prio_table_priorities {
3710 BT_COEX_PRIO_TBL_DISABLED = 0,
3711 BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3712 BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3713 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3714 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3715 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3716 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3717 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3718 BT_COEX_PRIO_TBL_MAX,
3719};
3720
3721struct iwl_bt_coex_prio_table_cmd {
3722 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
3723} __packed;
3724
3725#define IWL_BT_COEX_ENV_CLOSE 0
3726#define IWL_BT_COEX_ENV_OPEN 1
3727/*
3728 * BT Protection Envelope
3729 * REPLY_BT_COEX_PROT_ENV = 0xcd
3730 */
3731struct iwl_bt_coex_prot_env_cmd {
3732 u8 action; /* 0 = closed, 1 = open */
3733 u8 type; /* 0 .. 15 */
3734 u8 reserved[2];
3735} __packed;
3736
3737/*
3738 * REPLY_D3_CONFIG
3739 */
3740enum iwlagn_d3_wakeup_filters {
3741 IWLAGN_D3_WAKEUP_RFKILL = BIT(0),
3742 IWLAGN_D3_WAKEUP_SYSASSERT = BIT(1),
3743};
3744
3745struct iwlagn_d3_config_cmd {
3746 __le32 min_sleep_time;
3747 __le32 wakeup_flags;
3748} __packed;
3749
3750/*
3751 * REPLY_WOWLAN_PATTERNS
3752 */
3753#define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16
3754#define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128
3755
3756struct iwlagn_wowlan_pattern {
3757 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8];
3758 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN];
3759 u8 mask_size;
3760 u8 pattern_size;
3761 __le16 reserved;
3762} __packed;
3763
3764#define IWLAGN_WOWLAN_MAX_PATTERNS 20
3765
3766struct iwlagn_wowlan_patterns_cmd {
3767 __le32 n_patterns;
3768 struct iwlagn_wowlan_pattern patterns[];
3769} __packed;
3770
3771/*
3772 * REPLY_WOWLAN_WAKEUP_FILTER
3773 */
3774enum iwlagn_wowlan_wakeup_filters {
3775 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0),
3776 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1),
3777 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2),
3778 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3),
3779 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4),
3780 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(5),
3781 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(6),
3782 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(7),
3783 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(8),
3784};
3785
3786struct iwlagn_wowlan_wakeup_filter_cmd {
3787 __le32 enabled;
3788 __le16 non_qos_seq;
3789 __le16 reserved;
3790 __le16 qos_seq[8];
3791};
3792
3793/*
3794 * REPLY_WOWLAN_TSC_RSC_PARAMS
3795 */
3796#define IWLAGN_NUM_RSC 16
3797
3798struct tkip_sc {
3799 __le16 iv16;
3800 __le16 pad;
3801 __le32 iv32;
3802} __packed;
3803
3804struct iwlagn_tkip_rsc_tsc {
3805 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC];
3806 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC];
3807 struct tkip_sc tsc;
3808} __packed;
3809
3810struct aes_sc {
3811 __le64 pn;
3812} __packed;
3813
3814struct iwlagn_aes_rsc_tsc {
3815 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC];
3816 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC];
3817 struct aes_sc tsc;
3818} __packed;
3819
3820union iwlagn_all_tsc_rsc {
3821 struct iwlagn_tkip_rsc_tsc tkip;
3822 struct iwlagn_aes_rsc_tsc aes;
3823};
3824
3825struct iwlagn_wowlan_rsc_tsc_params_cmd {
3826 union iwlagn_all_tsc_rsc all_tsc_rsc;
3827} __packed;
3828
3829/*
3830 * REPLY_WOWLAN_TKIP_PARAMS
3831 */
3832#define IWLAGN_MIC_KEY_SIZE 8
3833#define IWLAGN_P1K_SIZE 5
3834struct iwlagn_mic_keys {
3835 u8 tx[IWLAGN_MIC_KEY_SIZE];
3836 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE];
3837 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE];
3838} __packed;
3839
3840struct iwlagn_p1k_cache {
3841 __le16 p1k[IWLAGN_P1K_SIZE];
3842} __packed;
3843
3844#define IWLAGN_NUM_RX_P1K_CACHE 2
3845
3846struct iwlagn_wowlan_tkip_params_cmd {
3847 struct iwlagn_mic_keys mic_keys;
3848 struct iwlagn_p1k_cache tx;
3849 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE];
3850 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE];
3851} __packed;
3852
3853/*
3854 * REPLY_WOWLAN_KEK_KCK_MATERIAL
3855 */
3856
3857#define IWLAGN_KCK_MAX_SIZE 32
3858#define IWLAGN_KEK_MAX_SIZE 32
3859
3860struct iwlagn_wowlan_kek_kck_material_cmd {
3861 u8 kck[IWLAGN_KCK_MAX_SIZE];
3862 u8 kek[IWLAGN_KEK_MAX_SIZE];
3863 __le16 kck_len;
3864 __le16 kek_len;
3865 __le64 replay_ctr;
3866} __packed;
3867
3868#define RF_KILL_INDICATOR_FOR_WOWLAN 0x87
3869
3870/*
3871 * REPLY_WOWLAN_GET_STATUS = 0xe5
3872 */
3873struct iwlagn_wowlan_status {
3874 __le64 replay_ctr;
3875 __le32 rekey_status;
3876 __le32 wakeup_reason;
3877 u8 pattern_number;
3878 u8 reserved1;
3879 __le16 qos_seq_ctr[8];
3880 __le16 non_qos_seq_ctr;
3881 __le16 reserved2;
3882 union iwlagn_all_tsc_rsc tsc_rsc;
3883 __le16 reserved3;
3884} __packed;
3885
3886/*
3887 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3888 */
3889
3890/*
3891 * Minimum slot time in TU
3892 */
3893#define IWL_MIN_SLOT_TIME 20
3894
3895/**
3896 * struct iwl_wipan_slot
3897 * @width: Time in TU
3898 * @type:
3899 * 0 - BSS
3900 * 1 - PAN
3901 */
3902struct iwl_wipan_slot {
3903 __le16 width;
3904 u8 type;
3905 u8 reserved;
3906} __packed;
3907
3908#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */
3909#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */
3910#define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */
3911#define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4)
3912#define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5)
3913
3914/**
3915 * struct iwl_wipan_params_cmd
3916 * @flags:
3917 * bit0: reserved
3918 * bit1: CP leave channel with CTS
3919 * bit2: CP leave channel qith Quiet
3920 * bit3: slotted mode
3921 * 1 - work in slotted mode
3922 * 0 - work in non slotted mode
3923 * bit4: filter beacon notification
3924 * bit5: full tx slotted mode. if this flag is set,
3925 * uCode will perform leaving channel methods in context switch
3926 * also when working in same channel mode
3927 * @num_slots: 1 - 10
3928 */
3929struct iwl_wipan_params_cmd {
3930 __le16 flags;
3931 u8 reserved;
3932 u8 num_slots;
3933 struct iwl_wipan_slot slots[10];
3934} __packed;
3935
3936/*
3937 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3938 *
3939 * TODO: Figure out what this is used for,
3940 * it can only switch between 2.4 GHz
3941 * channels!!
3942 */
3943
3944struct iwl_wipan_p2p_channel_switch_cmd {
3945 __le16 channel;
3946 __le16 reserved;
3947};
3948
3949/*
3950 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3951 *
3952 * This is used by the device to notify us of the
3953 * NoA schedule it determined so we can forward it
3954 * to userspace for inclusion in probe responses.
3955 *
3956 * In beacons, the NoA schedule is simply appended
3957 * to the frame we give the device.
3958 */
3959
3960struct iwl_wipan_noa_descriptor {
3961 u8 count;
3962 __le32 duration;
3963 __le32 interval;
3964 __le32 starttime;
3965} __packed;
3966
3967struct iwl_wipan_noa_attribute {
3968 u8 id;
3969 __le16 length;
3970 u8 index;
3971 u8 ct_window;
3972 struct iwl_wipan_noa_descriptor descr0, descr1;
3973 u8 reserved;
3974} __packed;
3975
3976struct iwl_wipan_noa_notification {
3977 u32 noa_active;
3978 struct iwl_wipan_noa_attribute noa_attribute;
3979} __packed;
3980
3981#endif /* __iwl_commands_h__ */