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1What: /sys/class/watchdog/watchdogn/bootstatus
2Date: August 2015
3Contact: Wim Van Sebroeck <wim@iguana.be>
4Description:
5 It is a read only file. It contains status of the watchdog
6 device at boot. It is equivalent to WDIOC_GETBOOTSTATUS of
7 ioctl interface.
8
9What: /sys/class/watchdog/watchdogn/identity
10Date: August 2015
11Contact: Wim Van Sebroeck <wim@iguana.be>
12Description:
13 It is a read only file. It contains identity string of
14 watchdog device.
15
16What: /sys/class/watchdog/watchdogn/nowayout
17Date: August 2015
18Contact: Wim Van Sebroeck <wim@iguana.be>
19Description:
20 It is a read/write file. While reading, it gives '1'
21 if the device has the nowayout feature set, otherwise
22 it gives '0'. Writing a '1' to the file enables the
23 nowayout feature. Once set, the nowayout feature
24 cannot be disabled, so writing a '0' either has no
25 effect (if the feature was already disabled) or
26 results in a permission error.
27
28What: /sys/class/watchdog/watchdogn/state
29Date: August 2015
30Contact: Wim Van Sebroeck <wim@iguana.be>
31Description:
32 It is a read only file. It gives active/inactive status of
33 watchdog device.
34
35What: /sys/class/watchdog/watchdogn/status
36Date: August 2015
37Contact: Wim Van Sebroeck <wim@iguana.be>
38Description:
39 It is a read only file. It contains watchdog device's
40 internal status bits. It is equivalent to WDIOC_GETSTATUS
41 of ioctl interface.
42
43What: /sys/class/watchdog/watchdogn/timeleft
44Date: August 2015
45Contact: Wim Van Sebroeck <wim@iguana.be>
46Description:
47 It is a read only file. It contains value of time left for
48 reset generation. It is equivalent to WDIOC_GETTIMELEFT of
49 ioctl interface.
50
51What: /sys/class/watchdog/watchdogn/timeout
52Date: August 2015
53Contact: Wim Van Sebroeck <wim@iguana.be>
54Description:
55 It is a read only file. It is read to know about current
56 value of timeout programmed.
57
58What: /sys/class/watchdog/watchdogn/pretimeout
59Date: December 2016
60Contact: Wim Van Sebroeck <wim@iguana.be>
61Description:
62 It is a read only file. It specifies the time in seconds before
63 timeout when the pretimeout interrupt is delivered. Pretimeout
64 is an optional feature.
65
66What: /sys/class/watchdog/watchdogn/pretimeout_avaialable_governors
67Date: February 2017
68Contact: Wim Van Sebroeck <wim@iguana.be>
69Description:
70 It is a read only file. It shows the pretimeout governors
71 available for this watchdog.
72
73What: /sys/class/watchdog/watchdogn/pretimeout_governor
74Date: February 2017
75Contact: Wim Van Sebroeck <wim@iguana.be>
76Description:
77 It is a read/write file. When read, the currently assigned
78 pretimeout governor is returned. When written, it sets
79 the pretimeout governor.
80
81What: /sys/class/watchdog/watchdog1/access_cs0
82Date: August 2019
83Contact: Ivan Mikhaylov <i.mikhaylov@yadro.com>,
84 Alexander Amelkin <a.amelkin@yadro.com>
85Description:
86 It is a read/write file. This attribute exists only if the
87 system has booted from the alternate flash chip due to
88 expiration of a watchdog timer of AST2400/AST2500 when
89 alternate boot function was enabled with 'aspeed,alt-boot'
90 devicetree option for that watchdog or with an appropriate
91 h/w strapping (for WDT2 only).
92
93 At alternate flash the 'access_cs0' sysfs node provides:
94
95 ast2400:
96 a way to get access to the primary SPI flash
97 chip at CS0 after booting from the alternate
98 chip at CS1.
99 ast2500:
100 a way to restore the normal address mapping
101 from (CS0->CS1, CS1->CS0) to (CS0->CS0,
102 CS1->CS1).
103
104 Clearing the boot code selection and timeout counter also
105 resets to the initial state the chip select line mapping. When
106 the SoC is in normal mapping state (i.e. booted from CS0),
107 clearing those bits does nothing for both versions of the SoC.
108 For alternate boot mode (booted from CS1 due to wdt2
109 expiration) the behavior differs as described above.
110
111 This option can be used with wdt2 (watchdog1) only.
112
113 When read, the current status of the boot code selection is
114 shown. When written with any non-zero value, it clears
115 the boot code selection and the timeout counter, which results
116 in chipselect reset for AST2400/AST2500.
1What: /sys/class/watchdog/watchdogn/bootstatus
2Date: August 2015
3Contact: Wim Van Sebroeck <wim@iguana.be>
4Description:
5 It is a read only file. It contains status of the watchdog
6 device at boot. It is equivalent to WDIOC_GETBOOTSTATUS of
7 ioctl interface.
8
9What: /sys/class/watchdog/watchdogn/identity
10Date: August 2015
11Contact: Wim Van Sebroeck <wim@iguana.be>
12Description:
13 It is a read only file. It contains identity string of
14 watchdog device.
15
16What: /sys/class/watchdog/watchdogn/nowayout
17Date: August 2015
18Contact: Wim Van Sebroeck <wim@iguana.be>
19Description:
20 It is a read only file. While reading, it gives '1' if that
21 device supports nowayout feature else, it gives '0'.
22
23What: /sys/class/watchdog/watchdogn/state
24Date: August 2015
25Contact: Wim Van Sebroeck <wim@iguana.be>
26Description:
27 It is a read only file. It gives active/inactive status of
28 watchdog device.
29
30What: /sys/class/watchdog/watchdogn/status
31Date: August 2015
32Contact: Wim Van Sebroeck <wim@iguana.be>
33Description:
34 It is a read only file. It contains watchdog device's
35 internal status bits. It is equivalent to WDIOC_GETSTATUS
36 of ioctl interface.
37
38What: /sys/class/watchdog/watchdogn/timeleft
39Date: August 2015
40Contact: Wim Van Sebroeck <wim@iguana.be>
41Description:
42 It is a read only file. It contains value of time left for
43 reset generation. It is equivalent to WDIOC_GETTIMELEFT of
44 ioctl interface.
45
46What: /sys/class/watchdog/watchdogn/timeout
47Date: August 2015
48Contact: Wim Van Sebroeck <wim@iguana.be>
49Description:
50 It is a read only file. It is read to know about current
51 value of timeout programmed.
52
53What: /sys/class/watchdog/watchdogn/pretimeout
54Date: December 2016
55Contact: Wim Van Sebroeck <wim@iguana.be>
56Description:
57 It is a read only file. It specifies the time in seconds before
58 timeout when the pretimeout interrupt is delivered. Pretimeout
59 is an optional feature.
60
61What: /sys/class/watchdog/watchdogn/pretimeout_avaialable_governors
62Date: February 2017
63Contact: Wim Van Sebroeck <wim@iguana.be>
64Description:
65 It is a read only file. It shows the pretimeout governors
66 available for this watchdog.
67
68What: /sys/class/watchdog/watchdogn/pretimeout_governor
69Date: February 2017
70Contact: Wim Van Sebroeck <wim@iguana.be>
71Description:
72 It is a read/write file. When read, the currently assigned
73 pretimeout governor is returned. When written, it sets
74 the pretimeout governor.
75
76What: /sys/class/watchdog/watchdog1/access_cs0
77Date: August 2019
78Contact: Ivan Mikhaylov <i.mikhaylov@yadro.com>,
79 Alexander Amelkin <a.amelkin@yadro.com>
80Description:
81 It is a read/write file. This attribute exists only if the
82 system has booted from the alternate flash chip due to
83 expiration of a watchdog timer of AST2400/AST2500 when
84 alternate boot function was enabled with 'aspeed,alt-boot'
85 devicetree option for that watchdog or with an appropriate
86 h/w strapping (for WDT2 only).
87
88 At alternate flash the 'access_cs0' sysfs node provides:
89 ast2400: a way to get access to the primary SPI flash
90 chip at CS0 after booting from the alternate
91 chip at CS1.
92 ast2500: a way to restore the normal address mapping
93 from (CS0->CS1, CS1->CS0) to (CS0->CS0,
94 CS1->CS1).
95
96 Clearing the boot code selection and timeout counter also
97 resets to the initial state the chip select line mapping. When
98 the SoC is in normal mapping state (i.e. booted from CS0),
99 clearing those bits does nothing for both versions of the SoC.
100 For alternate boot mode (booted from CS1 due to wdt2
101 expiration) the behavior differs as described above.
102
103 This option can be used with wdt2 (watchdog1) only.
104
105 When read, the current status of the boot code selection is
106 shown. When written with any non-zero value, it clears
107 the boot code selection and the timeout counter, which results
108 in chipselect reset for AST2400/AST2500.