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1/* SPDX-License-Identifier: GPL-2.0 */
2/* pci_sun4v_asm: Hypervisor calls for PCI support.
3 *
4 * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net>
5 */
6
7#include <linux/linkage.h>
8#include <asm/hypervisor.h>
9
10 /* %o0: devhandle
11 * %o1: tsbid
12 * %o2: num ttes
13 * %o3: io_attributes
14 * %o4: io_page_list phys address
15 *
16 * returns %o0: -status if status was non-zero, else
17 * %o0: num pages mapped
18 */
19ENTRY(pci_sun4v_iommu_map)
20 mov %o5, %g1
21 mov HV_FAST_PCI_IOMMU_MAP, %o5
22 ta HV_FAST_TRAP
23 brnz,pn %o0, 1f
24 sub %g0, %o0, %o0
25 mov %o1, %o0
261: retl
27 nop
28ENDPROC(pci_sun4v_iommu_map)
29
30 /* %o0: devhandle
31 * %o1: tsbid
32 * %o2: num ttes
33 *
34 * returns %o0: num ttes demapped
35 */
36ENTRY(pci_sun4v_iommu_demap)
37 mov HV_FAST_PCI_IOMMU_DEMAP, %o5
38 ta HV_FAST_TRAP
39 retl
40 mov %o1, %o0
41ENDPROC(pci_sun4v_iommu_demap)
42
43 /* %o0: devhandle
44 * %o1: tsbid
45 * %o2: &io_attributes
46 * %o3: &real_address
47 *
48 * returns %o0: status
49 */
50ENTRY(pci_sun4v_iommu_getmap)
51 mov %o2, %o4
52 mov HV_FAST_PCI_IOMMU_GETMAP, %o5
53 ta HV_FAST_TRAP
54 stx %o1, [%o4]
55 stx %o2, [%o3]
56 retl
57 mov %o0, %o0
58ENDPROC(pci_sun4v_iommu_getmap)
59
60 /* %o0: devhandle
61 * %o1: pci_device
62 * %o2: pci_config_offset
63 * %o3: size
64 *
65 * returns %o0: data
66 *
67 * If there is an error, the data will be returned
68 * as all 1's.
69 */
70ENTRY(pci_sun4v_config_get)
71 mov HV_FAST_PCI_CONFIG_GET, %o5
72 ta HV_FAST_TRAP
73 brnz,a,pn %o1, 1f
74 mov -1, %o2
751: retl
76 mov %o2, %o0
77ENDPROC(pci_sun4v_config_get)
78
79 /* %o0: devhandle
80 * %o1: pci_device
81 * %o2: pci_config_offset
82 * %o3: size
83 * %o4: data
84 *
85 * returns %o0: status
86 *
87 * status will be zero if the operation completed
88 * successfully, else -1 if not
89 */
90ENTRY(pci_sun4v_config_put)
91 mov HV_FAST_PCI_CONFIG_PUT, %o5
92 ta HV_FAST_TRAP
93 brnz,a,pn %o1, 1f
94 mov -1, %o1
951: retl
96 mov %o1, %o0
97ENDPROC(pci_sun4v_config_put)
98
99 /* %o0: devhandle
100 * %o1: msiqid
101 * %o2: msiq phys address
102 * %o3: num entries
103 *
104 * returns %o0: status
105 *
106 * status will be zero if the operation completed
107 * successfully, else -1 if not
108 */
109ENTRY(pci_sun4v_msiq_conf)
110 mov HV_FAST_PCI_MSIQ_CONF, %o5
111 ta HV_FAST_TRAP
112 retl
113 mov %o0, %o0
114ENDPROC(pci_sun4v_msiq_conf)
115
116 /* %o0: devhandle
117 * %o1: msiqid
118 * %o2: &msiq_phys_addr
119 * %o3: &msiq_num_entries
120 *
121 * returns %o0: status
122 */
123ENTRY(pci_sun4v_msiq_info)
124 mov %o2, %o4
125 mov HV_FAST_PCI_MSIQ_INFO, %o5
126 ta HV_FAST_TRAP
127 stx %o1, [%o4]
128 stx %o2, [%o3]
129 retl
130 mov %o0, %o0
131ENDPROC(pci_sun4v_msiq_info)
132
133 /* %o0: devhandle
134 * %o1: msiqid
135 * %o2: &valid
136 *
137 * returns %o0: status
138 */
139ENTRY(pci_sun4v_msiq_getvalid)
140 mov HV_FAST_PCI_MSIQ_GETVALID, %o5
141 ta HV_FAST_TRAP
142 stx %o1, [%o2]
143 retl
144 mov %o0, %o0
145ENDPROC(pci_sun4v_msiq_getvalid)
146
147 /* %o0: devhandle
148 * %o1: msiqid
149 * %o2: valid
150 *
151 * returns %o0: status
152 */
153ENTRY(pci_sun4v_msiq_setvalid)
154 mov HV_FAST_PCI_MSIQ_SETVALID, %o5
155 ta HV_FAST_TRAP
156 retl
157 mov %o0, %o0
158ENDPROC(pci_sun4v_msiq_setvalid)
159
160 /* %o0: devhandle
161 * %o1: msiqid
162 * %o2: &state
163 *
164 * returns %o0: status
165 */
166ENTRY(pci_sun4v_msiq_getstate)
167 mov HV_FAST_PCI_MSIQ_GETSTATE, %o5
168 ta HV_FAST_TRAP
169 stx %o1, [%o2]
170 retl
171 mov %o0, %o0
172ENDPROC(pci_sun4v_msiq_getstate)
173
174 /* %o0: devhandle
175 * %o1: msiqid
176 * %o2: state
177 *
178 * returns %o0: status
179 */
180ENTRY(pci_sun4v_msiq_setstate)
181 mov HV_FAST_PCI_MSIQ_SETSTATE, %o5
182 ta HV_FAST_TRAP
183 retl
184 mov %o0, %o0
185ENDPROC(pci_sun4v_msiq_setstate)
186
187 /* %o0: devhandle
188 * %o1: msiqid
189 * %o2: &head
190 *
191 * returns %o0: status
192 */
193ENTRY(pci_sun4v_msiq_gethead)
194 mov HV_FAST_PCI_MSIQ_GETHEAD, %o5
195 ta HV_FAST_TRAP
196 stx %o1, [%o2]
197 retl
198 mov %o0, %o0
199ENDPROC(pci_sun4v_msiq_gethead)
200
201 /* %o0: devhandle
202 * %o1: msiqid
203 * %o2: head
204 *
205 * returns %o0: status
206 */
207ENTRY(pci_sun4v_msiq_sethead)
208 mov HV_FAST_PCI_MSIQ_SETHEAD, %o5
209 ta HV_FAST_TRAP
210 retl
211 mov %o0, %o0
212ENDPROC(pci_sun4v_msiq_sethead)
213
214 /* %o0: devhandle
215 * %o1: msiqid
216 * %o2: &tail
217 *
218 * returns %o0: status
219 */
220ENTRY(pci_sun4v_msiq_gettail)
221 mov HV_FAST_PCI_MSIQ_GETTAIL, %o5
222 ta HV_FAST_TRAP
223 stx %o1, [%o2]
224 retl
225 mov %o0, %o0
226ENDPROC(pci_sun4v_msiq_gettail)
227
228 /* %o0: devhandle
229 * %o1: msinum
230 * %o2: &valid
231 *
232 * returns %o0: status
233 */
234ENTRY(pci_sun4v_msi_getvalid)
235 mov HV_FAST_PCI_MSI_GETVALID, %o5
236 ta HV_FAST_TRAP
237 stx %o1, [%o2]
238 retl
239 mov %o0, %o0
240ENDPROC(pci_sun4v_msi_getvalid)
241
242 /* %o0: devhandle
243 * %o1: msinum
244 * %o2: valid
245 *
246 * returns %o0: status
247 */
248ENTRY(pci_sun4v_msi_setvalid)
249 mov HV_FAST_PCI_MSI_SETVALID, %o5
250 ta HV_FAST_TRAP
251 retl
252 mov %o0, %o0
253ENDPROC(pci_sun4v_msi_setvalid)
254
255 /* %o0: devhandle
256 * %o1: msinum
257 * %o2: &msiq
258 *
259 * returns %o0: status
260 */
261ENTRY(pci_sun4v_msi_getmsiq)
262 mov HV_FAST_PCI_MSI_GETMSIQ, %o5
263 ta HV_FAST_TRAP
264 stx %o1, [%o2]
265 retl
266 mov %o0, %o0
267ENDPROC(pci_sun4v_msi_getmsiq)
268
269 /* %o0: devhandle
270 * %o1: msinum
271 * %o2: msitype
272 * %o3: msiq
273 *
274 * returns %o0: status
275 */
276ENTRY(pci_sun4v_msi_setmsiq)
277 mov HV_FAST_PCI_MSI_SETMSIQ, %o5
278 ta HV_FAST_TRAP
279 retl
280 mov %o0, %o0
281ENDPROC(pci_sun4v_msi_setmsiq)
282
283 /* %o0: devhandle
284 * %o1: msinum
285 * %o2: &state
286 *
287 * returns %o0: status
288 */
289ENTRY(pci_sun4v_msi_getstate)
290 mov HV_FAST_PCI_MSI_GETSTATE, %o5
291 ta HV_FAST_TRAP
292 stx %o1, [%o2]
293 retl
294 mov %o0, %o0
295ENDPROC(pci_sun4v_msi_getstate)
296
297 /* %o0: devhandle
298 * %o1: msinum
299 * %o2: state
300 *
301 * returns %o0: status
302 */
303ENTRY(pci_sun4v_msi_setstate)
304 mov HV_FAST_PCI_MSI_SETSTATE, %o5
305 ta HV_FAST_TRAP
306 retl
307 mov %o0, %o0
308ENDPROC(pci_sun4v_msi_setstate)
309
310 /* %o0: devhandle
311 * %o1: msinum
312 * %o2: &msiq
313 *
314 * returns %o0: status
315 */
316ENTRY(pci_sun4v_msg_getmsiq)
317 mov HV_FAST_PCI_MSG_GETMSIQ, %o5
318 ta HV_FAST_TRAP
319 stx %o1, [%o2]
320 retl
321 mov %o0, %o0
322ENDPROC(pci_sun4v_msg_getmsiq)
323
324 /* %o0: devhandle
325 * %o1: msinum
326 * %o2: msiq
327 *
328 * returns %o0: status
329 */
330ENTRY(pci_sun4v_msg_setmsiq)
331 mov HV_FAST_PCI_MSG_SETMSIQ, %o5
332 ta HV_FAST_TRAP
333 retl
334 mov %o0, %o0
335ENDPROC(pci_sun4v_msg_setmsiq)
336
337 /* %o0: devhandle
338 * %o1: msinum
339 * %o2: &valid
340 *
341 * returns %o0: status
342 */
343ENTRY(pci_sun4v_msg_getvalid)
344 mov HV_FAST_PCI_MSG_GETVALID, %o5
345 ta HV_FAST_TRAP
346 stx %o1, [%o2]
347 retl
348 mov %o0, %o0
349ENDPROC(pci_sun4v_msg_getvalid)
350
351 /* %o0: devhandle
352 * %o1: msinum
353 * %o2: valid
354 *
355 * returns %o0: status
356 */
357ENTRY(pci_sun4v_msg_setvalid)
358 mov HV_FAST_PCI_MSG_SETVALID, %o5
359 ta HV_FAST_TRAP
360 retl
361 mov %o0, %o0
362ENDPROC(pci_sun4v_msg_setvalid)
363
364 /*
365 * %o0: devhandle
366 * %o1: r_addr
367 * %o2: size
368 * %o3: pagesize
369 * %o4: virt
370 * %o5: &iotsb_num/&iotsb_handle
371 *
372 * returns %o0: status
373 * %o1: iotsb_num/iotsb_handle
374 */
375ENTRY(pci_sun4v_iotsb_conf)
376 mov %o5, %g1
377 mov HV_FAST_PCI_IOTSB_CONF, %o5
378 ta HV_FAST_TRAP
379 retl
380 stx %o1, [%g1]
381ENDPROC(pci_sun4v_iotsb_conf)
382
383 /*
384 * %o0: devhandle
385 * %o1: iotsb_num/iotsb_handle
386 * %o2: pci_device
387 *
388 * returns %o0: status
389 */
390ENTRY(pci_sun4v_iotsb_bind)
391 mov HV_FAST_PCI_IOTSB_BIND, %o5
392 ta HV_FAST_TRAP
393 retl
394 nop
395ENDPROC(pci_sun4v_iotsb_bind)
396
397 /*
398 * %o0: devhandle
399 * %o1: iotsb_num/iotsb_handle
400 * %o2: index_count
401 * %o3: iotte_attributes
402 * %o4: io_page_list_p
403 * %o5: &mapped
404 *
405 * returns %o0: status
406 * %o1: #mapped
407 */
408ENTRY(pci_sun4v_iotsb_map)
409 mov %o5, %g1
410 mov HV_FAST_PCI_IOTSB_MAP, %o5
411 ta HV_FAST_TRAP
412 retl
413 stx %o1, [%g1]
414ENDPROC(pci_sun4v_iotsb_map)
415
416 /*
417 * %o0: devhandle
418 * %o1: iotsb_num/iotsb_handle
419 * %o2: iotsb_index
420 * %o3: #iottes
421 * %o4: &demapped
422 *
423 * returns %o0: status
424 * %o1: #demapped
425 */
426ENTRY(pci_sun4v_iotsb_demap)
427 mov HV_FAST_PCI_IOTSB_DEMAP, %o5
428 ta HV_FAST_TRAP
429 retl
430 stx %o1, [%o4]
431ENDPROC(pci_sun4v_iotsb_demap)
1/* SPDX-License-Identifier: GPL-2.0 */
2/* pci_sun4v_asm: Hypervisor calls for PCI support.
3 *
4 * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net>
5 */
6
7#include <linux/linkage.h>
8#include <asm/hypervisor.h>
9
10 /* %o0: devhandle
11 * %o1: tsbid
12 * %o2: num ttes
13 * %o3: io_attributes
14 * %o4: io_page_list phys address
15 *
16 * returns %o0: -status if status was non-zero, else
17 * %o0: num pages mapped
18 */
19ENTRY(pci_sun4v_iommu_map)
20 mov %o5, %g1
21 mov HV_FAST_PCI_IOMMU_MAP, %o5
22 ta HV_FAST_TRAP
23 brnz,pn %o0, 1f
24 sub %g0, %o0, %o0
25 mov %o1, %o0
261: retl
27 nop
28ENDPROC(pci_sun4v_iommu_map)
29
30 /* %o0: devhandle
31 * %o1: tsbid
32 * %o2: num ttes
33 *
34 * returns %o0: num ttes demapped
35 */
36ENTRY(pci_sun4v_iommu_demap)
37 mov HV_FAST_PCI_IOMMU_DEMAP, %o5
38 ta HV_FAST_TRAP
39 retl
40 mov %o1, %o0
41ENDPROC(pci_sun4v_iommu_demap)
42
43 /* %o0: devhandle
44 * %o1: tsbid
45 * %o2: &io_attributes
46 * %o3: &real_address
47 *
48 * returns %o0: status
49 */
50ENTRY(pci_sun4v_iommu_getmap)
51 mov %o2, %o4
52 mov HV_FAST_PCI_IOMMU_GETMAP, %o5
53 ta HV_FAST_TRAP
54 stx %o1, [%o4]
55 stx %o2, [%o3]
56 retl
57 mov %o0, %o0
58ENDPROC(pci_sun4v_iommu_getmap)
59
60 /* %o0: devhandle
61 * %o1: pci_device
62 * %o2: pci_config_offset
63 * %o3: size
64 *
65 * returns %o0: data
66 *
67 * If there is an error, the data will be returned
68 * as all 1's.
69 */
70ENTRY(pci_sun4v_config_get)
71 mov HV_FAST_PCI_CONFIG_GET, %o5
72 ta HV_FAST_TRAP
73 brnz,a,pn %o1, 1f
74 mov -1, %o2
751: retl
76 mov %o2, %o0
77ENDPROC(pci_sun4v_config_get)
78
79 /* %o0: devhandle
80 * %o1: pci_device
81 * %o2: pci_config_offset
82 * %o3: size
83 * %o4: data
84 *
85 * returns %o0: status
86 *
87 * status will be zero if the operation completed
88 * successfully, else -1 if not
89 */
90ENTRY(pci_sun4v_config_put)
91 mov HV_FAST_PCI_CONFIG_PUT, %o5
92 ta HV_FAST_TRAP
93 brnz,a,pn %o1, 1f
94 mov -1, %o1
951: retl
96 mov %o1, %o0
97ENDPROC(pci_sun4v_config_put)
98
99 /* %o0: devhandle
100 * %o1: msiqid
101 * %o2: msiq phys address
102 * %o3: num entries
103 *
104 * returns %o0: status
105 *
106 * status will be zero if the operation completed
107 * successfully, else -1 if not
108 */
109ENTRY(pci_sun4v_msiq_conf)
110 mov HV_FAST_PCI_MSIQ_CONF, %o5
111 ta HV_FAST_TRAP
112 retl
113 mov %o0, %o0
114ENDPROC(pci_sun4v_msiq_conf)
115
116 /* %o0: devhandle
117 * %o1: msiqid
118 * %o2: &msiq_phys_addr
119 * %o3: &msiq_num_entries
120 *
121 * returns %o0: status
122 */
123ENTRY(pci_sun4v_msiq_info)
124 mov %o2, %o4
125 mov HV_FAST_PCI_MSIQ_INFO, %o5
126 ta HV_FAST_TRAP
127 stx %o1, [%o4]
128 stx %o2, [%o3]
129 retl
130 mov %o0, %o0
131ENDPROC(pci_sun4v_msiq_info)
132
133 /* %o0: devhandle
134 * %o1: msiqid
135 * %o2: &valid
136 *
137 * returns %o0: status
138 */
139ENTRY(pci_sun4v_msiq_getvalid)
140 mov HV_FAST_PCI_MSIQ_GETVALID, %o5
141 ta HV_FAST_TRAP
142 stx %o1, [%o2]
143 retl
144 mov %o0, %o0
145ENDPROC(pci_sun4v_msiq_getvalid)
146
147 /* %o0: devhandle
148 * %o1: msiqid
149 * %o2: valid
150 *
151 * returns %o0: status
152 */
153ENTRY(pci_sun4v_msiq_setvalid)
154 mov HV_FAST_PCI_MSIQ_SETVALID, %o5
155 ta HV_FAST_TRAP
156 retl
157 mov %o0, %o0
158ENDPROC(pci_sun4v_msiq_setvalid)
159
160 /* %o0: devhandle
161 * %o1: msiqid
162 * %o2: &state
163 *
164 * returns %o0: status
165 */
166ENTRY(pci_sun4v_msiq_getstate)
167 mov HV_FAST_PCI_MSIQ_GETSTATE, %o5
168 ta HV_FAST_TRAP
169 stx %o1, [%o2]
170 retl
171 mov %o0, %o0
172ENDPROC(pci_sun4v_msiq_getstate)
173
174 /* %o0: devhandle
175 * %o1: msiqid
176 * %o2: state
177 *
178 * returns %o0: status
179 */
180ENTRY(pci_sun4v_msiq_setstate)
181 mov HV_FAST_PCI_MSIQ_SETSTATE, %o5
182 ta HV_FAST_TRAP
183 retl
184 mov %o0, %o0
185ENDPROC(pci_sun4v_msiq_setstate)
186
187 /* %o0: devhandle
188 * %o1: msiqid
189 * %o2: &head
190 *
191 * returns %o0: status
192 */
193ENTRY(pci_sun4v_msiq_gethead)
194 mov HV_FAST_PCI_MSIQ_GETHEAD, %o5
195 ta HV_FAST_TRAP
196 stx %o1, [%o2]
197 retl
198 mov %o0, %o0
199ENDPROC(pci_sun4v_msiq_gethead)
200
201 /* %o0: devhandle
202 * %o1: msiqid
203 * %o2: head
204 *
205 * returns %o0: status
206 */
207ENTRY(pci_sun4v_msiq_sethead)
208 mov HV_FAST_PCI_MSIQ_SETHEAD, %o5
209 ta HV_FAST_TRAP
210 retl
211 mov %o0, %o0
212ENDPROC(pci_sun4v_msiq_sethead)
213
214 /* %o0: devhandle
215 * %o1: msiqid
216 * %o2: &tail
217 *
218 * returns %o0: status
219 */
220ENTRY(pci_sun4v_msiq_gettail)
221 mov HV_FAST_PCI_MSIQ_GETTAIL, %o5
222 ta HV_FAST_TRAP
223 stx %o1, [%o2]
224 retl
225 mov %o0, %o0
226ENDPROC(pci_sun4v_msiq_gettail)
227
228 /* %o0: devhandle
229 * %o1: msinum
230 * %o2: &valid
231 *
232 * returns %o0: status
233 */
234ENTRY(pci_sun4v_msi_getvalid)
235 mov HV_FAST_PCI_MSI_GETVALID, %o5
236 ta HV_FAST_TRAP
237 stx %o1, [%o2]
238 retl
239 mov %o0, %o0
240ENDPROC(pci_sun4v_msi_getvalid)
241
242 /* %o0: devhandle
243 * %o1: msinum
244 * %o2: valid
245 *
246 * returns %o0: status
247 */
248ENTRY(pci_sun4v_msi_setvalid)
249 mov HV_FAST_PCI_MSI_SETVALID, %o5
250 ta HV_FAST_TRAP
251 retl
252 mov %o0, %o0
253ENDPROC(pci_sun4v_msi_setvalid)
254
255 /* %o0: devhandle
256 * %o1: msinum
257 * %o2: &msiq
258 *
259 * returns %o0: status
260 */
261ENTRY(pci_sun4v_msi_getmsiq)
262 mov HV_FAST_PCI_MSI_GETMSIQ, %o5
263 ta HV_FAST_TRAP
264 stx %o1, [%o2]
265 retl
266 mov %o0, %o0
267ENDPROC(pci_sun4v_msi_getmsiq)
268
269 /* %o0: devhandle
270 * %o1: msinum
271 * %o2: msitype
272 * %o3: msiq
273 *
274 * returns %o0: status
275 */
276ENTRY(pci_sun4v_msi_setmsiq)
277 mov HV_FAST_PCI_MSI_SETMSIQ, %o5
278 ta HV_FAST_TRAP
279 retl
280 mov %o0, %o0
281ENDPROC(pci_sun4v_msi_setmsiq)
282
283 /* %o0: devhandle
284 * %o1: msinum
285 * %o2: &state
286 *
287 * returns %o0: status
288 */
289ENTRY(pci_sun4v_msi_getstate)
290 mov HV_FAST_PCI_MSI_GETSTATE, %o5
291 ta HV_FAST_TRAP
292 stx %o1, [%o2]
293 retl
294 mov %o0, %o0
295ENDPROC(pci_sun4v_msi_getstate)
296
297 /* %o0: devhandle
298 * %o1: msinum
299 * %o2: state
300 *
301 * returns %o0: status
302 */
303ENTRY(pci_sun4v_msi_setstate)
304 mov HV_FAST_PCI_MSI_SETSTATE, %o5
305 ta HV_FAST_TRAP
306 retl
307 mov %o0, %o0
308ENDPROC(pci_sun4v_msi_setstate)
309
310 /* %o0: devhandle
311 * %o1: msinum
312 * %o2: &msiq
313 *
314 * returns %o0: status
315 */
316ENTRY(pci_sun4v_msg_getmsiq)
317 mov HV_FAST_PCI_MSG_GETMSIQ, %o5
318 ta HV_FAST_TRAP
319 stx %o1, [%o2]
320 retl
321 mov %o0, %o0
322ENDPROC(pci_sun4v_msg_getmsiq)
323
324 /* %o0: devhandle
325 * %o1: msinum
326 * %o2: msiq
327 *
328 * returns %o0: status
329 */
330ENTRY(pci_sun4v_msg_setmsiq)
331 mov HV_FAST_PCI_MSG_SETMSIQ, %o5
332 ta HV_FAST_TRAP
333 retl
334 mov %o0, %o0
335ENDPROC(pci_sun4v_msg_setmsiq)
336
337 /* %o0: devhandle
338 * %o1: msinum
339 * %o2: &valid
340 *
341 * returns %o0: status
342 */
343ENTRY(pci_sun4v_msg_getvalid)
344 mov HV_FAST_PCI_MSG_GETVALID, %o5
345 ta HV_FAST_TRAP
346 stx %o1, [%o2]
347 retl
348 mov %o0, %o0
349ENDPROC(pci_sun4v_msg_getvalid)
350
351 /* %o0: devhandle
352 * %o1: msinum
353 * %o2: valid
354 *
355 * returns %o0: status
356 */
357ENTRY(pci_sun4v_msg_setvalid)
358 mov HV_FAST_PCI_MSG_SETVALID, %o5
359 ta HV_FAST_TRAP
360 retl
361 mov %o0, %o0
362ENDPROC(pci_sun4v_msg_setvalid)
363
364 /*
365 * %o0: devhandle
366 * %o1: r_addr
367 * %o2: size
368 * %o3: pagesize
369 * %o4: virt
370 * %o5: &iotsb_num/&iotsb_handle
371 *
372 * returns %o0: status
373 * %o1: iotsb_num/iotsb_handle
374 */
375ENTRY(pci_sun4v_iotsb_conf)
376 mov %o5, %g1
377 mov HV_FAST_PCI_IOTSB_CONF, %o5
378 ta HV_FAST_TRAP
379 retl
380 stx %o1, [%g1]
381ENDPROC(pci_sun4v_iotsb_conf)
382
383 /*
384 * %o0: devhandle
385 * %o1: iotsb_num/iotsb_handle
386 * %o2: pci_device
387 *
388 * returns %o0: status
389 */
390ENTRY(pci_sun4v_iotsb_bind)
391 mov HV_FAST_PCI_IOTSB_BIND, %o5
392 ta HV_FAST_TRAP
393 retl
394 nop
395ENDPROC(pci_sun4v_iotsb_bind)
396
397 /*
398 * %o0: devhandle
399 * %o1: iotsb_num/iotsb_handle
400 * %o2: index_count
401 * %o3: iotte_attributes
402 * %o4: io_page_list_p
403 * %o5: &mapped
404 *
405 * returns %o0: status
406 * %o1: #mapped
407 */
408ENTRY(pci_sun4v_iotsb_map)
409 mov %o5, %g1
410 mov HV_FAST_PCI_IOTSB_MAP, %o5
411 ta HV_FAST_TRAP
412 retl
413 stx %o1, [%g1]
414ENDPROC(pci_sun4v_iotsb_map)
415
416 /*
417 * %o0: devhandle
418 * %o1: iotsb_num/iotsb_handle
419 * %o2: iotsb_index
420 * %o3: #iottes
421 * %o4: &demapped
422 *
423 * returns %o0: status
424 * %o1: #demapped
425 */
426ENTRY(pci_sun4v_iotsb_demap)
427 mov HV_FAST_PCI_IOTSB_DEMAP, %o5
428 ta HV_FAST_TRAP
429 retl
430 stx %o1, [%o4]
431ENDPROC(pci_sun4v_iotsb_demap)