1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 *  linux/arch/arm/mach-pxa/viper.c
   4 *
   5 *  Support for the Arcom VIPER SBC.
   6 *
   7 *  Author:	Ian Campbell
   8 *  Created:    Feb 03, 2003
   9 *  Copyright:  Arcom Control Systems
  10 *
  11 *  Maintained by Marc Zyngier <maz@misterjones.org>
  12 *                             <marc.zyngier@altran.com>
  13 *
  14 * Based on lubbock.c:
  15 *  Author:	Nicolas Pitre
  16 *  Created:	Jun 15, 2001
  17 *  Copyright:	MontaVista Software Inc.
  18 */
  19
  20#include <linux/types.h>
  21#include <linux/memory.h>
  22#include <linux/cpu.h>
  23#include <linux/cpufreq.h>
  24#include <linux/delay.h>
  25#include <linux/fs.h>
  26#include <linux/init.h>
  27#include <linux/slab.h>
  28#include <linux/interrupt.h>
  29#include <linux/major.h>
  30#include <linux/module.h>
  31#include <linux/pm.h>
  32#include <linux/sched.h>
  33#include <linux/gpio.h>
  34#include <linux/jiffies.h>
  35#include <linux/platform_data/i2c-gpio.h>
  36#include <linux/gpio/machine.h>
  37#include <linux/platform_data/i2c-pxa.h>
  38#include <linux/serial_8250.h>
  39#include <linux/smc91x.h>
  40#include <linux/pwm.h>
  41#include <linux/pwm_backlight.h>
  42#include <linux/usb/isp116x.h>
  43#include <linux/mtd/mtd.h>
  44#include <linux/mtd/partitions.h>
  45#include <linux/mtd/physmap.h>
  46#include <linux/syscore_ops.h>
  47
  48#include "pxa25x.h"
  49#include <linux/platform_data/asoc-pxa.h>
  50#include <linux/platform_data/video-pxafb.h>
  51#include "regs-uart.h"
  52#include "viper-pcmcia.h"
  53#include "viper.h"
  54
  55#include <asm/setup.h>
  56#include <asm/mach-types.h>
  57#include <asm/irq.h>
  58#include <linux/sizes.h>
  59#include <asm/system_info.h>
  60
  61#include <asm/mach/arch.h>
  62#include <asm/mach/map.h>
  63#include <asm/mach/irq.h>
  64
  65#include "generic.h"
  66#include "devices.h"
  67
  68static unsigned int icr;
  69
  70static void viper_icr_set_bit(unsigned int bit)
  71{
  72	icr |= bit;
  73	VIPER_ICR = icr;
  74}
  75
  76static void viper_icr_clear_bit(unsigned int bit)
  77{
  78	icr &= ~bit;
  79	VIPER_ICR = icr;
  80}
  81
  82/* This function is used from the pcmcia module to reset the CF */
  83static void viper_cf_reset(int state)
  84{
  85	if (state)
  86		viper_icr_set_bit(VIPER_ICR_CF_RST);
  87	else
  88		viper_icr_clear_bit(VIPER_ICR_CF_RST);
  89}
  90
  91static struct arcom_pcmcia_pdata viper_pcmcia_info = {
  92	.cd_gpio	= VIPER_CF_CD_GPIO,
  93	.rdy_gpio	= VIPER_CF_RDY_GPIO,
  94	.pwr_gpio	= VIPER_CF_POWER_GPIO,
  95	.reset		= viper_cf_reset,
  96};
  97
  98static struct platform_device viper_pcmcia_device = {
  99	.name		= "viper-pcmcia",
 100	.id		= -1,
 101	.dev		= {
 102		.platform_data	= &viper_pcmcia_info,
 103	},
 104};
 105
 106/*
 107 * The CPLD version register was not present on VIPER boards prior to
 108 * v2i1. On v1 boards where the version register is not present we
 109 * will just read back the previous value from the databus.
 110 *
 111 * Therefore we do two reads. The first time we write 0 to the
 112 * (read-only) register before reading and the second time we write
 113 * 0xff first. If the two reads do not match or they read back as 0xff
 114 * or 0x00 then we have version 1 hardware.
 115 */
 116static u8 viper_hw_version(void)
 117{
 118	u8 v1, v2;
 119	unsigned long flags;
 120
 121	local_irq_save(flags);
 122
 123	VIPER_VERSION = 0;
 124	v1 = VIPER_VERSION;
 125	VIPER_VERSION = 0xff;
 126	v2 = VIPER_VERSION;
 127
 128	v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
 129
 130	local_irq_restore(flags);
 131	return v1;
 132}
 133
 134/* CPU system core operations. */
 135static int viper_cpu_suspend(void)
 136{
 137	viper_icr_set_bit(VIPER_ICR_R_DIS);
 138	return 0;
 139}
 140
 141static void viper_cpu_resume(void)
 142{
 143	viper_icr_clear_bit(VIPER_ICR_R_DIS);
 144}
 145
 146static struct syscore_ops viper_cpu_syscore_ops = {
 147	.suspend	= viper_cpu_suspend,
 148	.resume		= viper_cpu_resume,
 149};
 150
 151static unsigned int current_voltage_divisor;
 152
 153/*
 154 * If force is not true then step from existing to new divisor. If
 155 * force is true then jump straight to the new divisor. Stepping is
 156 * used because if the jump in voltage is too large, the VCC can dip
 157 * too low and the regulator cuts out.
 158 *
 159 * force can be used to initialize the divisor to a know state by
 160 * setting the value for the current clock speed, since we are already
 161 * running at that speed we know the voltage should be pretty close so
 162 * the jump won't be too large
 163 */
 164static void viper_set_core_cpu_voltage(unsigned long khz, int force)
 165{
 166	int i = 0;
 167	unsigned int divisor = 0;
 168	const char *v;
 169
 170	if (khz < 200000) {
 171		v = "1.0"; divisor = 0xfff;
 172	} else if (khz < 300000) {
 173		v = "1.1"; divisor = 0xde5;
 174	} else {
 175		v = "1.3"; divisor = 0x325;
 176	}
 177
 178	pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
 179		 v, (int)khz / 1000, (int)khz % 1000);
 180
 181#define STEP 0x100
 182	do {
 183		int step;
 184
 185		if (force)
 186			step = divisor;
 187		else if (current_voltage_divisor < divisor - STEP)
 188			step = current_voltage_divisor + STEP;
 189		else if (current_voltage_divisor > divisor + STEP)
 190			step = current_voltage_divisor - STEP;
 191		else
 192			step = divisor;
 193		force = 0;
 194
 195		gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
 196		gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
 197
 198		for (i = 1 << 11 ; i > 0 ; i >>= 1) {
 199			udelay(1);
 200
 201			gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
 202			udelay(1);
 203
 204			gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
 205			udelay(1);
 206
 207			gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
 208		}
 209		udelay(1);
 210
 211		gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
 212		udelay(1);
 213
 214		gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
 215
 216		current_voltage_divisor = step;
 217	} while (current_voltage_divisor != divisor);
 218}
 219
 220/* Interrupt handling */
 221static unsigned long viper_irq_enabled_mask;
 222static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
 223static const int viper_isa_irq_map[] = {
 224	0,		/* ISA irq #0, invalid */
 225	0,		/* ISA irq #1, invalid */
 226	0,		/* ISA irq #2, invalid */
 227	1 << 0,		/* ISA irq #3 */
 228	1 << 1,		/* ISA irq #4 */
 229	1 << 2,		/* ISA irq #5 */
 230	1 << 3,		/* ISA irq #6 */
 231	1 << 4,		/* ISA irq #7 */
 232	0,		/* ISA irq #8, invalid */
 233	1 << 8,		/* ISA irq #9 */
 234	1 << 5,		/* ISA irq #10 */
 235	1 << 6,		/* ISA irq #11 */
 236	1 << 7,		/* ISA irq #12 */
 237	0,		/* ISA irq #13, invalid */
 238	1 << 9,		/* ISA irq #14 */
 239	1 << 10,	/* ISA irq #15 */
 240};
 241
 242static inline int viper_irq_to_bitmask(unsigned int irq)
 243{
 244	return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
 245}
 246
 247static inline int viper_bit_to_irq(int bit)
 248{
 249	return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
 250}
 251
 252static void viper_ack_irq(struct irq_data *d)
 253{
 254	int viper_irq = viper_irq_to_bitmask(d->irq);
 255
 256	if (viper_irq & 0xff)
 257		VIPER_LO_IRQ_STATUS = viper_irq;
 258	else
 259		VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
 260}
 261
 262static void viper_mask_irq(struct irq_data *d)
 263{
 264	viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
 265}
 266
 267static void viper_unmask_irq(struct irq_data *d)
 268{
 269	viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
 270}
 271
 272static inline unsigned long viper_irq_pending(void)
 273{
 274	return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
 275			viper_irq_enabled_mask;
 276}
 277
 278static void viper_irq_handler(struct irq_desc *desc)
 279{
 280	unsigned int irq;
 281	unsigned long pending;
 282
 283	pending = viper_irq_pending();
 284	do {
 285		/* we're in a chained irq handler,
 286		 * so ack the interrupt by hand */
 287		desc->irq_data.chip->irq_ack(&desc->irq_data);
 288
 289		if (likely(pending)) {
 290			irq = viper_bit_to_irq(__ffs(pending));
 291			generic_handle_irq(irq);
 292		}
 293		pending = viper_irq_pending();
 294	} while (pending);
 295}
 296
 297static struct irq_chip viper_irq_chip = {
 298	.name		= "ISA",
 299	.irq_ack	= viper_ack_irq,
 300	.irq_mask	= viper_mask_irq,
 301	.irq_unmask	= viper_unmask_irq
 302};
 303
 304static void __init viper_init_irq(void)
 305{
 306	int level;
 307	int isa_irq;
 308
 309	pxa25x_init_irq();
 310
 311	/* setup ISA IRQs */
 312	for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
 313		isa_irq = viper_bit_to_irq(level);
 314		irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
 315					 handle_edge_irq);
 316		irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
 317	}
 318
 319	irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
 320				viper_irq_handler);
 321	irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
 322}
 323
 324/* Flat Panel */
 325static struct pxafb_mode_info fb_mode_info[] = {
 326	{
 327		.pixclock	= 157500,
 328
 329		.xres		= 320,
 330		.yres		= 240,
 331
 332		.bpp		= 16,
 333
 334		.hsync_len	= 63,
 335		.left_margin	= 7,
 336		.right_margin	= 13,
 337
 338		.vsync_len	= 20,
 339		.upper_margin	= 0,
 340		.lower_margin	= 0,
 341
 342		.sync		= 0,
 343	},
 344};
 345
 346static struct pxafb_mach_info fb_info = {
 347	.modes			= fb_mode_info,
 348	.num_modes		= 1,
 349	.lcd_conn		= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
 350};
 351
 352static struct pwm_lookup viper_pwm_lookup[] = {
 353	PWM_LOOKUP("pxa25x-pwm.0", 0, "pwm-backlight.0", NULL, 1000000,
 354		   PWM_POLARITY_NORMAL),
 355};
 356
 357static int viper_backlight_init(struct device *dev)
 358{
 359	int ret;
 360
 361	/* GPIO9 and 10 control FB backlight. Initialise to off */
 362	ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
 363	if (ret)
 364		goto err_request_bckl;
 365
 366	ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
 367	if (ret)
 368		goto err_request_lcd;
 369
 370	ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
 371	if (ret)
 372		goto err_dir;
 373
 374	ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
 375	if (ret)
 376		goto err_dir;
 377
 378	return 0;
 379
 380err_dir:
 381	gpio_free(VIPER_LCD_EN_GPIO);
 382err_request_lcd:
 383	gpio_free(VIPER_BCKLIGHT_EN_GPIO);
 384err_request_bckl:
 385	dev_err(dev, "Failed to setup LCD GPIOs\n");
 386
 387	return ret;
 388}
 389
 390static int viper_backlight_notify(struct device *dev, int brightness)
 391{
 392	gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
 393	gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
 394
 395	return brightness;
 396}
 397
 398static void viper_backlight_exit(struct device *dev)
 399{
 400	gpio_free(VIPER_LCD_EN_GPIO);
 401	gpio_free(VIPER_BCKLIGHT_EN_GPIO);
 402}
 403
 404static struct platform_pwm_backlight_data viper_backlight_data = {
 405	.max_brightness	= 100,
 406	.dft_brightness	= 100,
 407	.init		= viper_backlight_init,
 408	.notify		= viper_backlight_notify,
 409	.exit		= viper_backlight_exit,
 410};
 411
 412static struct platform_device viper_backlight_device = {
 413	.name		= "pwm-backlight",
 414	.dev		= {
 415		.parent		= &pxa25x_device_pwm0.dev,
 416		.platform_data	= &viper_backlight_data,
 417	},
 418};
 419
 420/* Ethernet */
 421static struct resource smc91x_resources[] = {
 422	[0] = {
 423		.name	= "smc91x-regs",
 424		.start  = VIPER_ETH_PHYS + 0x300,
 425		.end    = VIPER_ETH_PHYS + 0x30f,
 426		.flags  = IORESOURCE_MEM,
 427	},
 428	[1] = {
 429		.start  = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
 430		.end    = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
 431		.flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 432	},
 433	[2] = {
 434		.name	= "smc91x-data32",
 435		.start  = VIPER_ETH_DATA_PHYS,
 436		.end    = VIPER_ETH_DATA_PHYS + 3,
 437		.flags  = IORESOURCE_MEM,
 438	},
 439};
 440
 441static struct smc91x_platdata viper_smc91x_info = {
 442	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
 443	.leda	= RPC_LED_100_10,
 444	.ledb	= RPC_LED_TX_RX,
 445};
 446
 447static struct platform_device smc91x_device = {
 448	.name		= "smc91x",
 449	.id		= -1,
 450	.num_resources  = ARRAY_SIZE(smc91x_resources),
 451	.resource       = smc91x_resources,
 452	.dev		= {
 453		.platform_data	= &viper_smc91x_info,
 454	},
 455};
 456
 457/* i2c */
 458static struct gpiod_lookup_table viper_i2c_gpiod_table = {
 459	.dev_id		= "i2c-gpio.1",
 460	.table		= {
 461		GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SDA_GPIO,
 462				NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
 463		GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SCL_GPIO,
 464				NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
 465	},
 466};
 467
 468static struct i2c_gpio_platform_data i2c_bus_data = {
 469	.udelay  = 10,
 470	.timeout = HZ,
 471};
 472
 473static struct platform_device i2c_bus_device = {
 474	.name		= "i2c-gpio",
 475	.id		= 1, /* pxa2xx-i2c is bus 0, so start at 1 */
 476	.dev = {
 477		.platform_data = &i2c_bus_data,
 478	}
 479};
 480
 481static struct i2c_board_info __initdata viper_i2c_devices[] = {
 482	{
 483		I2C_BOARD_INFO("ds1338", 0x68),
 484	},
 485};
 486
 487/*
 488 * Serial configuration:
 489 * You can either have the standard PXA ports driven by the PXA driver,
 490 * or all the ports (PXA + 16850) driven by the 8250 driver.
 491 * Choose your poison.
 492 */
 493
 494static struct resource viper_serial_resources[] = {
 495#ifndef CONFIG_SERIAL_PXA
 496	{
 497		.start	= 0x40100000,
 498		.end	= 0x4010001f,
 499		.flags	= IORESOURCE_MEM,
 500	},
 501	{
 502		.start	= 0x40200000,
 503		.end	= 0x4020001f,
 504		.flags	= IORESOURCE_MEM,
 505	},
 506	{
 507		.start	= 0x40700000,
 508		.end	= 0x4070001f,
 509		.flags	= IORESOURCE_MEM,
 510	},
 511	{
 512		.start	= VIPER_UARTA_PHYS,
 513		.end	= VIPER_UARTA_PHYS + 0xf,
 514		.flags	= IORESOURCE_MEM,
 515	},
 516	{
 517		.start	= VIPER_UARTB_PHYS,
 518		.end	= VIPER_UARTB_PHYS + 0xf,
 519		.flags	= IORESOURCE_MEM,
 520	},
 521#else
 522	{
 523		0,
 524	},
 525#endif
 526};
 527
 528static struct plat_serial8250_port serial_platform_data[] = {
 529#ifndef CONFIG_SERIAL_PXA
 530	/* Internal UARTs */
 531	{
 532		.membase	= (void *)&FFUART,
 533		.mapbase	= __PREG(FFUART),
 534		.irq		= IRQ_FFUART,
 535		.uartclk	= 921600 * 16,
 536		.regshift	= 2,
 537		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 538		.iotype		= UPIO_MEM,
 539	},
 540	{
 541		.membase	= (void *)&BTUART,
 542		.mapbase	= __PREG(BTUART),
 543		.irq		= IRQ_BTUART,
 544		.uartclk	= 921600 * 16,
 545		.regshift	= 2,
 546		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 547		.iotype		= UPIO_MEM,
 548	},
 549	{
 550		.membase	= (void *)&STUART,
 551		.mapbase	= __PREG(STUART),
 552		.irq		= IRQ_STUART,
 553		.uartclk	= 921600 * 16,
 554		.regshift	= 2,
 555		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 556		.iotype		= UPIO_MEM,
 557	},
 558	/* External UARTs */
 559	{
 560		.mapbase	= VIPER_UARTA_PHYS,
 561		.irq		= PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
 562		.irqflags	= IRQF_TRIGGER_RISING,
 563		.uartclk	= 1843200,
 564		.regshift	= 1,
 565		.iotype		= UPIO_MEM,
 566		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP |
 567				  UPF_SKIP_TEST,
 568	},
 569	{
 570		.mapbase	= VIPER_UARTB_PHYS,
 571		.irq		= PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
 572		.irqflags	= IRQF_TRIGGER_RISING,
 573		.uartclk	= 1843200,
 574		.regshift	= 1,
 575		.iotype		= UPIO_MEM,
 576		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP |
 577				  UPF_SKIP_TEST,
 578	},
 579#endif
 580	{ },
 581};
 582
 583static struct platform_device serial_device = {
 584	.name			= "serial8250",
 585	.id			= 0,
 586	.dev			= {
 587		.platform_data	= serial_platform_data,
 588	},
 589	.num_resources		= ARRAY_SIZE(viper_serial_resources),
 590	.resource		= viper_serial_resources,
 591};
 592
 593/* USB */
 594static void isp116x_delay(struct device *dev, int delay)
 595{
 596	ndelay(delay);
 597}
 598
 599static struct resource isp116x_resources[] = {
 600	[0] = { /* DATA */
 601		.start  = VIPER_USB_PHYS + 0,
 602		.end    = VIPER_USB_PHYS + 1,
 603		.flags  = IORESOURCE_MEM,
 604	},
 605	[1] = { /* ADDR */
 606		.start  = VIPER_USB_PHYS + 2,
 607		.end    = VIPER_USB_PHYS + 3,
 608		.flags  = IORESOURCE_MEM,
 609	},
 610	[2] = {
 611		.start  = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
 612		.end    = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
 613		.flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 614	},
 615};
 616
 617/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
 618static struct isp116x_platform_data isp116x_platform_data = {
 619	/* Enable internal resistors on downstream ports */
 620	.sel15Kres		= 1,
 621	/* On-chip overcurrent protection */
 622	.oc_enable		= 1,
 623	/* INT output polarity */
 624	.int_act_high		= 1,
 625	/* INT edge or level triggered */
 626	.int_edge_triggered	= 0,
 627
 628	/* WAKEUP pin connected - NOT SUPPORTED  */
 629	/* .remote_wakeup_connected = 0, */
 630	/* Wakeup by devices on usb bus enabled */
 631	.remote_wakeup_enable	= 0,
 632	.delay			= isp116x_delay,
 633};
 634
 635static struct platform_device isp116x_device = {
 636	.name			= "isp116x-hcd",
 637	.id			= -1,
 638	.num_resources  	= ARRAY_SIZE(isp116x_resources),
 639	.resource       	= isp116x_resources,
 640	.dev			= {
 641		.platform_data	= &isp116x_platform_data,
 642	},
 643
 644};
 645
 646/* MTD */
 647static struct resource mtd_resources[] = {
 648	[0] = {	/* RedBoot config + filesystem flash */
 649		.start	= VIPER_FLASH_PHYS,
 650		.end	= VIPER_FLASH_PHYS + SZ_32M - 1,
 651		.flags	= IORESOURCE_MEM,
 652	},
 653	[1] = {	/* Boot flash */
 654		.start	= VIPER_BOOT_PHYS,
 655		.end	= VIPER_BOOT_PHYS + SZ_1M - 1,
 656		.flags	= IORESOURCE_MEM,
 657	},
 658	[2] = { /*
 659		 * SRAM size is actually 256KB, 8bits, with a sparse mapping
 660		 * (each byte is on a 16bit boundary).
 661		 */
 662		.start	= _VIPER_SRAM_BASE,
 663		.end	= _VIPER_SRAM_BASE + SZ_512K - 1,
 664		.flags	= IORESOURCE_MEM,
 665	},
 666};
 667
 668static struct mtd_partition viper_boot_flash_partition = {
 669	.name		= "RedBoot",
 670	.size		= SZ_1M,
 671	.offset		= 0,
 672	.mask_flags	= MTD_WRITEABLE,	/* force R/O */
 673};
 674
 675static struct physmap_flash_data viper_flash_data[] = {
 676	[0] = {
 677		.width		= 2,
 678		.parts		= NULL,
 679		.nr_parts	= 0,
 680	},
 681	[1] = {
 682		.width		= 2,
 683		.parts		= &viper_boot_flash_partition,
 684		.nr_parts	= 1,
 685	},
 686};
 687
 688static struct platform_device viper_mtd_devices[] = {
 689	[0] = {
 690		.name		= "physmap-flash",
 691		.id		= 0,
 692		.dev		= {
 693			.platform_data	= &viper_flash_data[0],
 694		},
 695		.resource	= &mtd_resources[0],
 696		.num_resources	= 1,
 697	},
 698	[1] = {
 699		.name		= "physmap-flash",
 700		.id		= 1,
 701		.dev		= {
 702			.platform_data	= &viper_flash_data[1],
 703		},
 704		.resource	= &mtd_resources[1],
 705		.num_resources	= 1,
 706	},
 707};
 708
 709static struct platform_device *viper_devs[] __initdata = {
 710	&smc91x_device,
 711	&i2c_bus_device,
 712	&serial_device,
 713	&isp116x_device,
 714	&viper_mtd_devices[0],
 715	&viper_mtd_devices[1],
 716	&viper_backlight_device,
 717	&viper_pcmcia_device,
 718};
 719
 720static mfp_cfg_t viper_pin_config[] __initdata = {
 721	/* Chip selects */
 722	GPIO15_nCS_1,
 723	GPIO78_nCS_2,
 724	GPIO79_nCS_3,
 725	GPIO80_nCS_4,
 726	GPIO33_nCS_5,
 727
 728	/* AC97 */
 729	GPIO28_AC97_BITCLK,
 730	GPIO29_AC97_SDATA_IN_0,
 731	GPIO30_AC97_SDATA_OUT,
 732	GPIO31_AC97_SYNC,
 733
 734	/* FP Backlight */
 735	GPIO9_GPIO, 				/* VIPER_BCKLIGHT_EN_GPIO */
 736	GPIO10_GPIO,				/* VIPER_LCD_EN_GPIO */
 737	GPIO16_PWM0_OUT,
 738
 739	/* Ethernet PHY Ready */
 740	GPIO18_RDY,
 741
 742	/* Serial shutdown */
 743	GPIO12_GPIO | MFP_LPM_DRIVE_HIGH,	/* VIPER_UART_SHDN_GPIO */
 744
 745	/* Compact-Flash / PC104 */
 746	GPIO48_nPOE,
 747	GPIO49_nPWE,
 748	GPIO50_nPIOR,
 749	GPIO51_nPIOW,
 750	GPIO52_nPCE_1,
 751	GPIO53_nPCE_2,
 752	GPIO54_nPSKTSEL,
 753	GPIO55_nPREG,
 754	GPIO56_nPWAIT,
 755	GPIO57_nIOIS16,
 756	GPIO8_GPIO,				/* VIPER_CF_RDY_GPIO */
 757	GPIO32_GPIO,				/* VIPER_CF_CD_GPIO */
 758	GPIO82_GPIO,				/* VIPER_CF_POWER_GPIO */
 759
 760	/* Integrated UPS control */
 761	GPIO20_GPIO,				/* VIPER_UPS_GPIO */
 762
 763	/* Vcc regulator control */
 764	GPIO6_GPIO,				/* VIPER_PSU_DATA_GPIO */
 765	GPIO11_GPIO,				/* VIPER_PSU_CLK_GPIO */
 766	GPIO19_GPIO,				/* VIPER_PSU_nCS_LD_GPIO */
 767
 768	/* i2c busses */
 769	GPIO26_GPIO,				/* VIPER_TPM_I2C_SDA_GPIO */
 770	GPIO27_GPIO,				/* VIPER_TPM_I2C_SCL_GPIO */
 771	GPIO83_GPIO,				/* VIPER_RTC_I2C_SDA_GPIO */
 772	GPIO84_GPIO,				/* VIPER_RTC_I2C_SCL_GPIO */
 773
 774	/* PC/104 Interrupt */
 775	GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,	/* VIPER_CPLD_GPIO */
 776};
 777
 778static unsigned long viper_tpm;
 779
 780static int __init viper_tpm_setup(char *str)
 781{
 782	return kstrtoul(str, 10, &viper_tpm) >= 0;
 783}
 784
 785__setup("tpm=", viper_tpm_setup);
 786
 787struct gpiod_lookup_table viper_tpm_i2c_gpiod_table = {
 788	.dev_id = "i2c-gpio.2",
 789	.table = {
 790		GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SDA_GPIO,
 791				NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
 792		GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SCL_GPIO,
 793				NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
 794	},
 795};
 796
 797static void __init viper_tpm_init(void)
 798{
 799	struct platform_device *tpm_device;
 800	struct i2c_gpio_platform_data i2c_tpm_data = {
 801		.udelay  = 10,
 802		.timeout = HZ,
 803	};
 804	char *errstr;
 805
 806	/* Allocate TPM i2c bus if requested */
 807	if (!viper_tpm)
 808		return;
 809
 810	gpiod_add_lookup_table(&viper_tpm_i2c_gpiod_table);
 811	tpm_device = platform_device_alloc("i2c-gpio", 2);
 812	if (tpm_device) {
 813		if (!platform_device_add_data(tpm_device,
 814					      &i2c_tpm_data,
 815					      sizeof(i2c_tpm_data))) {
 816			if (platform_device_add(tpm_device)) {
 817				errstr = "register TPM i2c bus";
 818				goto error_free_tpm;
 819			}
 820		} else {
 821			errstr = "allocate TPM i2c bus data";
 822			goto error_free_tpm;
 823		}
 824	} else {
 825		errstr = "allocate TPM i2c device";
 826		goto error_tpm;
 827	}
 828
 829	return;
 830
 831error_free_tpm:
 832	kfree(tpm_device);
 833error_tpm:
 834	pr_err("viper: Couldn't %s, giving up\n", errstr);
 835}
 836
 837static void __init viper_init_vcore_gpios(void)
 838{
 839	if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
 840		goto err_request_data;
 841
 842	if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
 843		goto err_request_clk;
 844
 845	if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
 846		goto err_request_cs;
 847
 848	if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
 849	    gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
 850	    gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
 851		goto err_dir;
 852
 853	/* c/should assume redboot set the correct level ??? */
 854	viper_set_core_cpu_voltage(pxa25x_get_clk_frequency_khz(0), 1);
 855
 856	return;
 857
 858err_dir:
 859	gpio_free(VIPER_PSU_nCS_LD_GPIO);
 860err_request_cs:
 861	gpio_free(VIPER_PSU_CLK_GPIO);
 862err_request_clk:
 863	gpio_free(VIPER_PSU_DATA_GPIO);
 864err_request_data:
 865	pr_err("viper: Failed to setup vcore control GPIOs\n");
 866}
 867
 868static void __init viper_init_serial_gpio(void)
 869{
 870	if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
 871		goto err_request;
 872
 873	if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
 874		goto err_dir;
 875
 876	return;
 877
 878err_dir:
 879	gpio_free(VIPER_UART_SHDN_GPIO);
 880err_request:
 881	pr_err("viper: Failed to setup UART shutdown GPIO\n");
 882}
 883
 884#ifdef CONFIG_CPU_FREQ
 885static int viper_cpufreq_notifier(struct notifier_block *nb,
 886				  unsigned long val, void *data)
 887{
 888	struct cpufreq_freqs *freq = data;
 889
 890	/* TODO: Adjust timings??? */
 891
 892	switch (val) {
 893	case CPUFREQ_PRECHANGE:
 894		if (freq->old < freq->new) {
 895			/* we are getting faster so raise the voltage
 896			 * before we change freq */
 897			viper_set_core_cpu_voltage(freq->new, 0);
 898		}
 899		break;
 900	case CPUFREQ_POSTCHANGE:
 901		if (freq->old > freq->new) {
 902			/* we are slowing down so drop the power
 903			 * after we change freq */
 904			viper_set_core_cpu_voltage(freq->new, 0);
 905		}
 906		break;
 907	default:
 908		/* ignore */
 909		break;
 910	}
 911
 912	return 0;
 913}
 914
 915static struct notifier_block viper_cpufreq_notifier_block = {
 916	.notifier_call  = viper_cpufreq_notifier
 917};
 918
 919static void __init viper_init_cpufreq(void)
 920{
 921	if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
 922				      CPUFREQ_TRANSITION_NOTIFIER))
 923		pr_err("viper: Failed to setup cpufreq notifier\n");
 924}
 925#else
 926static inline void viper_init_cpufreq(void) {}
 927#endif
 928
 929static void viper_power_off(void)
 930{
 931	pr_notice("Shutting off UPS\n");
 932	gpio_set_value(VIPER_UPS_GPIO, 1);
 933	/* Spin to death... */
 934	while (1);
 935}
 936
 937static void __init viper_init(void)
 938{
 939	u8 version;
 940
 941	pm_power_off = viper_power_off;
 942
 943	pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
 944
 945	pxa_set_ffuart_info(NULL);
 946	pxa_set_btuart_info(NULL);
 947	pxa_set_stuart_info(NULL);
 948
 949	/* Wake-up serial console */
 950	viper_init_serial_gpio();
 951
 952	pxa_set_fb_info(NULL, &fb_info);
 953
 954	/* v1 hardware cannot use the datacs line */
 955	version = viper_hw_version();
 956	if (version == 0)
 957		smc91x_device.num_resources--;
 958
 959	pxa_set_i2c_info(NULL);
 960	gpiod_add_lookup_table(&viper_i2c_gpiod_table);
 961	pwm_add_table(viper_pwm_lookup, ARRAY_SIZE(viper_pwm_lookup));
 962	platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
 963
 964	viper_init_vcore_gpios();
 965	viper_init_cpufreq();
 966
 967	register_syscore_ops(&viper_cpu_syscore_ops);
 968
 969	if (version) {
 970		pr_info("viper: hardware v%di%d detected. "
 971			"CPLD revision %d.\n",
 972			VIPER_BOARD_VERSION(version),
 973			VIPER_BOARD_ISSUE(version),
 974			VIPER_CPLD_REVISION(version));
 975		system_rev = (VIPER_BOARD_VERSION(version) << 8) |
 976			     (VIPER_BOARD_ISSUE(version) << 4) |
 977			     VIPER_CPLD_REVISION(version);
 978	} else {
 979		pr_info("viper: No version register.\n");
 980	}
 981
 982	i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
 983
 984	viper_tpm_init();
 985	pxa_set_ac97_info(NULL);
 986}
 987
 988static struct map_desc viper_io_desc[] __initdata = {
 989	{
 990		.virtual = VIPER_CPLD_BASE,
 991		.pfn     = __phys_to_pfn(VIPER_CPLD_PHYS),
 992		.length  = 0x00300000,
 993		.type    = MT_DEVICE,
 994	},
 995	{
 996		.virtual = VIPER_PC104IO_BASE,
 997		.pfn     = __phys_to_pfn(0x30000000),
 998		.length  = 0x00800000,
 999		.type    = MT_DEVICE,
1000	},
1001	{
1002		/*
1003		 * ISA I/O space mapping:
1004		 * -  ports 0x0000-0x0fff are PC/104
1005		 * -  ports 0x10000-0x10fff are PCMCIA slot 1
1006		 * -  ports 0x11000-0x11fff are PC/104
1007		 */
1008		.virtual = PCI_IO_VIRT_BASE,
1009		.pfn     = __phys_to_pfn(0x30000000),
1010		.length  = 0x1000,
1011		.type    = MT_DEVICE,
1012	},
1013};
1014
1015static void __init viper_map_io(void)
1016{
1017	pxa25x_map_io();
1018
1019	iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
1020
1021	PCFR |= PCFR_OPDE;
1022}
1023
1024MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
1025	/* Maintainer: Marc Zyngier <maz@misterjones.org> */
1026	.atag_offset	= 0x100,
1027	.map_io		= viper_map_io,
1028	.nr_irqs	= PXA_NR_IRQS,
1029	.init_irq	= viper_init_irq,
1030	.handle_irq	= pxa25x_handle_irq,
1031	.init_time	= pxa_timer_init,
1032	.init_machine	= viper_init,
1033	.restart	= pxa_restart,
1034MACHINE_END