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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * omap_hwmod implementation for OMAP2/3/4
4 *
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
7 *
8 * Paul Walmsley, Benoît Cousson, Kevin Hilman
9 *
10 * Created in collaboration with (alphabetical order): Thara Gopinath,
11 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
12 * Sawant, Santosh Shilimkar, Richard Woodruff
13 *
14 * Introduction
15 * ------------
16 * One way to view an OMAP SoC is as a collection of largely unrelated
17 * IP blocks connected by interconnects. The IP blocks include
18 * devices such as ARM processors, audio serial interfaces, UARTs,
19 * etc. Some of these devices, like the DSP, are created by TI;
20 * others, like the SGX, largely originate from external vendors. In
21 * TI's documentation, on-chip devices are referred to as "OMAP
22 * modules." Some of these IP blocks are identical across several
23 * OMAP versions. Others are revised frequently.
24 *
25 * These OMAP modules are tied together by various interconnects.
26 * Most of the address and data flow between modules is via OCP-based
27 * interconnects such as the L3 and L4 buses; but there are other
28 * interconnects that distribute the hardware clock tree, handle idle
29 * and reset signaling, supply power, and connect the modules to
30 * various pads or balls on the OMAP package.
31 *
32 * OMAP hwmod provides a consistent way to describe the on-chip
33 * hardware blocks and their integration into the rest of the chip.
34 * This description can be automatically generated from the TI
35 * hardware database. OMAP hwmod provides a standard, consistent API
36 * to reset, enable, idle, and disable these hardware blocks. And
37 * hwmod provides a way for other core code, such as the Linux device
38 * code or the OMAP power management and address space mapping code,
39 * to query the hardware database.
40 *
41 * Using hwmod
42 * -----------
43 * Drivers won't call hwmod functions directly. That is done by the
44 * omap_device code, and in rare occasions, by custom integration code
45 * in arch/arm/ *omap*. The omap_device code includes functions to
46 * build a struct platform_device using omap_hwmod data, and that is
47 * currently how hwmod data is communicated to drivers and to the
48 * Linux driver model. Most drivers will call omap_hwmod functions only
49 * indirectly, via pm_runtime*() functions.
50 *
51 * From a layering perspective, here is where the OMAP hwmod code
52 * fits into the kernel software stack:
53 *
54 * +-------------------------------+
55 * | Device driver code |
56 * | (e.g., drivers/) |
57 * +-------------------------------+
58 * | Linux driver model |
59 * | (platform_device / |
60 * | platform_driver data/code) |
61 * +-------------------------------+
62 * | OMAP core-driver integration |
63 * |(arch/arm/mach-omap2/devices.c)|
64 * +-------------------------------+
65 * | omap_device code |
66 * | (../plat-omap/omap_device.c) |
67 * +-------------------------------+
68 * ----> | omap_hwmod code/data | <-----
69 * | (../mach-omap2/omap_hwmod*) |
70 * +-------------------------------+
71 * | OMAP clock/PRCM/register fns |
72 * | ({read,write}l_relaxed, clk*) |
73 * +-------------------------------+
74 *
75 * Device drivers should not contain any OMAP-specific code or data in
76 * them. They should only contain code to operate the IP block that
77 * the driver is responsible for. This is because these IP blocks can
78 * also appear in other SoCs, either from TI (such as DaVinci) or from
79 * other manufacturers; and drivers should be reusable across other
80 * platforms.
81 *
82 * The OMAP hwmod code also will attempt to reset and idle all on-chip
83 * devices upon boot. The goal here is for the kernel to be
84 * completely self-reliant and independent from bootloaders. This is
85 * to ensure a repeatable configuration, both to ensure consistent
86 * runtime behavior, and to make it easier for others to reproduce
87 * bugs.
88 *
89 * OMAP module activity states
90 * ---------------------------
91 * The hwmod code considers modules to be in one of several activity
92 * states. IP blocks start out in an UNKNOWN state, then once they
93 * are registered via the hwmod code, proceed to the REGISTERED state.
94 * Once their clock names are resolved to clock pointers, the module
95 * enters the CLKS_INITED state; and finally, once the module has been
96 * reset and the integration registers programmed, the INITIALIZED state
97 * is entered. The hwmod code will then place the module into either
98 * the IDLE state to save power, or in the case of a critical system
99 * module, the ENABLED state.
100 *
101 * OMAP core integration code can then call omap_hwmod*() functions
102 * directly to move the module between the IDLE, ENABLED, and DISABLED
103 * states, as needed. This is done during both the PM idle loop, and
104 * in the OMAP core integration code's implementation of the PM runtime
105 * functions.
106 *
107 * References
108 * ----------
109 * This is a partial list.
110 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
111 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
112 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
113 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
114 * - Open Core Protocol Specification 2.2
115 *
116 * To do:
117 * - handle IO mapping
118 * - bus throughput & module latency measurement code
119 *
120 * XXX add tests at the beginning of each function to ensure the hwmod is
121 * in the appropriate state
122 * XXX error return values should be checked to ensure that they are
123 * appropriate
124 */
125#undef DEBUG
126
127#include <linux/kernel.h>
128#include <linux/errno.h>
129#include <linux/io.h>
130#include <linux/clk.h>
131#include <linux/clk-provider.h>
132#include <linux/delay.h>
133#include <linux/err.h>
134#include <linux/list.h>
135#include <linux/mutex.h>
136#include <linux/spinlock.h>
137#include <linux/slab.h>
138#include <linux/cpu.h>
139#include <linux/of.h>
140#include <linux/of_address.h>
141#include <linux/memblock.h>
142
143#include <linux/platform_data/ti-sysc.h>
144
145#include <dt-bindings/bus/ti-sysc.h>
146
147#include <asm/system_misc.h>
148
149#include "clock.h"
150#include "omap_hwmod.h"
151
152#include "soc.h"
153#include "common.h"
154#include "clockdomain.h"
155#include "hdq1w.h"
156#include "mmc.h"
157#include "powerdomain.h"
158#include "cm2xxx.h"
159#include "cm3xxx.h"
160#include "cm33xx.h"
161#include "prm.h"
162#include "prm3xxx.h"
163#include "prm44xx.h"
164#include "prm33xx.h"
165#include "prminst44xx.h"
166#include "pm.h"
167#include "wd_timer.h"
168
169/* Name of the OMAP hwmod for the MPU */
170#define MPU_INITIATOR_NAME "mpu"
171
172/*
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
175 */
176#define LINKS_PER_OCP_IF 2
177
178/*
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
181 */
182#define OMAP4_RST_CTRL_ST_OFFSET 4
183
184/*
185 * Maximum length for module clock handle names
186 */
187#define MOD_CLK_MAX_NAME_LEN 32
188
189/**
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @num_addrs: number of base address ranges for the provider
192 * @addr: base address(es) for the provider
193 * @size: size(s) of the provider address space(s)
194 * @node: device node associated with the provider
195 * @link: list link
196 */
197struct clkctrl_provider {
198 int num_addrs;
199 u32 *addr;
200 u32 *size;
201 struct device_node *node;
202 struct list_head link;
203};
204
205static LIST_HEAD(clkctrl_providers);
206
207/**
208 * struct omap_hwmod_reset - IP specific reset functions
209 * @match: string to match against the module name
210 * @len: number of characters to match
211 * @reset: IP specific reset function
212 *
213 * Used only in cases where struct omap_hwmod is dynamically allocated.
214 */
215struct omap_hwmod_reset {
216 const char *match;
217 int len;
218 int (*reset)(struct omap_hwmod *oh);
219};
220
221/**
222 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
223 * @enable_module: function to enable a module (via MODULEMODE)
224 * @disable_module: function to disable a module (via MODULEMODE)
225 *
226 * XXX Eventually this functionality will be hidden inside the PRM/CM
227 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
228 * conditionals in this code.
229 */
230struct omap_hwmod_soc_ops {
231 void (*enable_module)(struct omap_hwmod *oh);
232 int (*disable_module)(struct omap_hwmod *oh);
233 int (*wait_target_ready)(struct omap_hwmod *oh);
234 int (*assert_hardreset)(struct omap_hwmod *oh,
235 struct omap_hwmod_rst_info *ohri);
236 int (*deassert_hardreset)(struct omap_hwmod *oh,
237 struct omap_hwmod_rst_info *ohri);
238 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
239 struct omap_hwmod_rst_info *ohri);
240 int (*init_clkdm)(struct omap_hwmod *oh);
241 void (*update_context_lost)(struct omap_hwmod *oh);
242 int (*get_context_lost)(struct omap_hwmod *oh);
243 int (*disable_direct_prcm)(struct omap_hwmod *oh);
244 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
245};
246
247/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
248static struct omap_hwmod_soc_ops soc_ops;
249
250/* omap_hwmod_list contains all registered struct omap_hwmods */
251static LIST_HEAD(omap_hwmod_list);
252static DEFINE_MUTEX(list_lock);
253
254/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
255static struct omap_hwmod *mpu_oh;
256
257/* inited: set to true once the hwmod code is initialized */
258static bool inited;
259
260/* Private functions */
261
262/**
263 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
264 * @oh: struct omap_hwmod *
265 *
266 * Load the current value of the hwmod OCP_SYSCONFIG register into the
267 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
268 * OCP_SYSCONFIG register or 0 upon success.
269 */
270static int _update_sysc_cache(struct omap_hwmod *oh)
271{
272 if (!oh->class->sysc) {
273 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
274 return -EINVAL;
275 }
276
277 /* XXX ensure module interface clock is up */
278
279 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
280
281 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
282 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
283
284 return 0;
285}
286
287/**
288 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
289 * @v: OCP_SYSCONFIG value to write
290 * @oh: struct omap_hwmod *
291 *
292 * Write @v into the module class' OCP_SYSCONFIG register, if it has
293 * one. No return value.
294 */
295static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
296{
297 if (!oh->class->sysc) {
298 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
299 return;
300 }
301
302 /* XXX ensure module interface clock is up */
303
304 /* Module might have lost context, always update cache and register */
305 oh->_sysc_cache = v;
306
307 /*
308 * Some IP blocks (such as RTC) require unlocking of IP before
309 * accessing its registers. If a function pointer is present
310 * to unlock, then call it before accessing sysconfig and
311 * call lock after writing sysconfig.
312 */
313 if (oh->class->unlock)
314 oh->class->unlock(oh);
315
316 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
317
318 if (oh->class->lock)
319 oh->class->lock(oh);
320}
321
322/**
323 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
324 * @oh: struct omap_hwmod *
325 * @standbymode: MIDLEMODE field bits
326 * @v: pointer to register contents to modify
327 *
328 * Update the master standby mode bits in @v to be @standbymode for
329 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
330 * upon error or 0 upon success.
331 */
332static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
333 u32 *v)
334{
335 u32 mstandby_mask;
336 u8 mstandby_shift;
337
338 if (!oh->class->sysc ||
339 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
340 return -EINVAL;
341
342 if (!oh->class->sysc->sysc_fields) {
343 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
344 return -EINVAL;
345 }
346
347 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
348 mstandby_mask = (0x3 << mstandby_shift);
349
350 *v &= ~mstandby_mask;
351 *v |= __ffs(standbymode) << mstandby_shift;
352
353 return 0;
354}
355
356/**
357 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
358 * @oh: struct omap_hwmod *
359 * @idlemode: SIDLEMODE field bits
360 * @v: pointer to register contents to modify
361 *
362 * Update the slave idle mode bits in @v to be @idlemode for the @oh
363 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
364 * or 0 upon success.
365 */
366static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
367{
368 u32 sidle_mask;
369 u8 sidle_shift;
370
371 if (!oh->class->sysc ||
372 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
373 return -EINVAL;
374
375 if (!oh->class->sysc->sysc_fields) {
376 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
377 return -EINVAL;
378 }
379
380 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
381 sidle_mask = (0x3 << sidle_shift);
382
383 *v &= ~sidle_mask;
384 *v |= __ffs(idlemode) << sidle_shift;
385
386 return 0;
387}
388
389/**
390 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
391 * @oh: struct omap_hwmod *
392 * @clockact: CLOCKACTIVITY field bits
393 * @v: pointer to register contents to modify
394 *
395 * Update the clockactivity mode bits in @v to be @clockact for the
396 * @oh hwmod. Used for additional powersaving on some modules. Does
397 * not write to the hardware. Returns -EINVAL upon error or 0 upon
398 * success.
399 */
400static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
401{
402 u32 clkact_mask;
403 u8 clkact_shift;
404
405 if (!oh->class->sysc ||
406 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
407 return -EINVAL;
408
409 if (!oh->class->sysc->sysc_fields) {
410 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
411 return -EINVAL;
412 }
413
414 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
415 clkact_mask = (0x3 << clkact_shift);
416
417 *v &= ~clkact_mask;
418 *v |= clockact << clkact_shift;
419
420 return 0;
421}
422
423/**
424 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
425 * @oh: struct omap_hwmod *
426 * @v: pointer to register contents to modify
427 *
428 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
429 * error or 0 upon success.
430 */
431static int _set_softreset(struct omap_hwmod *oh, u32 *v)
432{
433 u32 softrst_mask;
434
435 if (!oh->class->sysc ||
436 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
437 return -EINVAL;
438
439 if (!oh->class->sysc->sysc_fields) {
440 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
441 return -EINVAL;
442 }
443
444 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
445
446 *v |= softrst_mask;
447
448 return 0;
449}
450
451/**
452 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
453 * @oh: struct omap_hwmod *
454 * @v: pointer to register contents to modify
455 *
456 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
457 * error or 0 upon success.
458 */
459static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
460{
461 u32 softrst_mask;
462
463 if (!oh->class->sysc ||
464 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
465 return -EINVAL;
466
467 if (!oh->class->sysc->sysc_fields) {
468 WARN(1,
469 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
470 oh->name);
471 return -EINVAL;
472 }
473
474 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
475
476 *v &= ~softrst_mask;
477
478 return 0;
479}
480
481/**
482 * _wait_softreset_complete - wait for an OCP softreset to complete
483 * @oh: struct omap_hwmod * to wait on
484 *
485 * Wait until the IP block represented by @oh reports that its OCP
486 * softreset is complete. This can be triggered by software (see
487 * _ocp_softreset()) or by hardware upon returning from off-mode (one
488 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
489 * microseconds. Returns the number of microseconds waited.
490 */
491static int _wait_softreset_complete(struct omap_hwmod *oh)
492{
493 struct omap_hwmod_class_sysconfig *sysc;
494 u32 softrst_mask;
495 int c = 0;
496
497 sysc = oh->class->sysc;
498
499 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
500 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
501 & SYSS_RESETDONE_MASK),
502 MAX_MODULE_SOFTRESET_WAIT, c);
503 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
504 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
505 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
506 & softrst_mask),
507 MAX_MODULE_SOFTRESET_WAIT, c);
508 }
509
510 return c;
511}
512
513/**
514 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
515 * @oh: struct omap_hwmod *
516 *
517 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
518 * of some modules. When the DMA must perform read/write accesses, the
519 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
520 * for power management, software must set the DMADISABLE bit back to 1.
521 *
522 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
523 * error or 0 upon success.
524 */
525static int _set_dmadisable(struct omap_hwmod *oh)
526{
527 u32 v;
528 u32 dmadisable_mask;
529
530 if (!oh->class->sysc ||
531 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
532 return -EINVAL;
533
534 if (!oh->class->sysc->sysc_fields) {
535 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
536 return -EINVAL;
537 }
538
539 /* clocks must be on for this operation */
540 if (oh->_state != _HWMOD_STATE_ENABLED) {
541 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
542 return -EINVAL;
543 }
544
545 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
546
547 v = oh->_sysc_cache;
548 dmadisable_mask =
549 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
550 v |= dmadisable_mask;
551 _write_sysconfig(v, oh);
552
553 return 0;
554}
555
556/**
557 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
558 * @oh: struct omap_hwmod *
559 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
560 * @v: pointer to register contents to modify
561 *
562 * Update the module autoidle bit in @v to be @autoidle for the @oh
563 * hwmod. The autoidle bit controls whether the module can gate
564 * internal clocks automatically when it isn't doing anything; the
565 * exact function of this bit varies on a per-module basis. This
566 * function does not write to the hardware. Returns -EINVAL upon
567 * error or 0 upon success.
568 */
569static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
570 u32 *v)
571{
572 u32 autoidle_mask;
573 u8 autoidle_shift;
574
575 if (!oh->class->sysc ||
576 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
577 return -EINVAL;
578
579 if (!oh->class->sysc->sysc_fields) {
580 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
581 return -EINVAL;
582 }
583
584 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
585 autoidle_mask = (0x1 << autoidle_shift);
586
587 *v &= ~autoidle_mask;
588 *v |= autoidle << autoidle_shift;
589
590 return 0;
591}
592
593/**
594 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
595 * @oh: struct omap_hwmod *
596 *
597 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
598 * upon error or 0 upon success.
599 */
600static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
601{
602 if (!oh->class->sysc ||
603 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
604 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
605 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
606 return -EINVAL;
607
608 if (!oh->class->sysc->sysc_fields) {
609 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
610 return -EINVAL;
611 }
612
613 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
614 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
615
616 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
617 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
618 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
619 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
620
621 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
622
623 return 0;
624}
625
626static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
627{
628 struct clk_hw_omap *clk;
629
630 if (!oh)
631 return NULL;
632
633 if (oh->clkdm) {
634 return oh->clkdm;
635 } else if (oh->_clk) {
636 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
637 return NULL;
638 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
639 return clk->clkdm;
640 }
641 return NULL;
642}
643
644/**
645 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
646 * @oh: struct omap_hwmod *
647 *
648 * Prevent the hardware module @oh from entering idle while the
649 * hardare module initiator @init_oh is active. Useful when a module
650 * will be accessed by a particular initiator (e.g., if a module will
651 * be accessed by the IVA, there should be a sleepdep between the IVA
652 * initiator and the module). Only applies to modules in smart-idle
653 * mode. If the clockdomain is marked as not needing autodeps, return
654 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
655 * passes along clkdm_add_sleepdep() value upon success.
656 */
657static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
658{
659 struct clockdomain *clkdm, *init_clkdm;
660
661 clkdm = _get_clkdm(oh);
662 init_clkdm = _get_clkdm(init_oh);
663
664 if (!clkdm || !init_clkdm)
665 return -EINVAL;
666
667 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
668 return 0;
669
670 return clkdm_add_sleepdep(clkdm, init_clkdm);
671}
672
673/**
674 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
675 * @oh: struct omap_hwmod *
676 *
677 * Allow the hardware module @oh to enter idle while the hardare
678 * module initiator @init_oh is active. Useful when a module will not
679 * be accessed by a particular initiator (e.g., if a module will not
680 * be accessed by the IVA, there should be no sleepdep between the IVA
681 * initiator and the module). Only applies to modules in smart-idle
682 * mode. If the clockdomain is marked as not needing autodeps, return
683 * 0 without doing anything. Returns -EINVAL upon error or passes
684 * along clkdm_del_sleepdep() value upon success.
685 */
686static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
687{
688 struct clockdomain *clkdm, *init_clkdm;
689
690 clkdm = _get_clkdm(oh);
691 init_clkdm = _get_clkdm(init_oh);
692
693 if (!clkdm || !init_clkdm)
694 return -EINVAL;
695
696 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
697 return 0;
698
699 return clkdm_del_sleepdep(clkdm, init_clkdm);
700}
701
702static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
703 { .compatible = "ti,clkctrl" },
704 { }
705};
706
707static int __init _setup_clkctrl_provider(struct device_node *np)
708{
709 const __be32 *addrp;
710 struct clkctrl_provider *provider;
711 u64 size;
712 int i;
713
714 provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
715 if (!provider)
716 return -ENOMEM;
717
718 provider->node = np;
719
720 provider->num_addrs =
721 of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
722
723 provider->addr =
724 memblock_alloc(sizeof(void *) * provider->num_addrs,
725 SMP_CACHE_BYTES);
726 if (!provider->addr)
727 return -ENOMEM;
728
729 provider->size =
730 memblock_alloc(sizeof(u32) * provider->num_addrs,
731 SMP_CACHE_BYTES);
732 if (!provider->size)
733 return -ENOMEM;
734
735 for (i = 0; i < provider->num_addrs; i++) {
736 addrp = of_get_address(np, i, &size, NULL);
737 provider->addr[i] = (u32)of_translate_address(np, addrp);
738 provider->size[i] = size;
739 pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
740 provider->addr[i] + provider->size[i]);
741 }
742
743 list_add(&provider->link, &clkctrl_providers);
744
745 return 0;
746}
747
748static int __init _init_clkctrl_providers(void)
749{
750 struct device_node *np;
751 int ret = 0;
752
753 for_each_matching_node(np, ti_clkctrl_match_table) {
754 ret = _setup_clkctrl_provider(np);
755 if (ret) {
756 of_node_put(np);
757 break;
758 }
759 }
760
761 return ret;
762}
763
764static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
765{
766 if (!oh->prcm.omap4.modulemode)
767 return 0;
768
769 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
770 oh->clkdm->cm_inst,
771 oh->prcm.omap4.clkctrl_offs);
772}
773
774static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
775{
776 struct clkctrl_provider *provider;
777 struct clk *clk;
778 u32 addr;
779
780 if (!soc_ops.xlate_clkctrl)
781 return NULL;
782
783 addr = soc_ops.xlate_clkctrl(oh);
784 if (!addr)
785 return NULL;
786
787 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
788
789 list_for_each_entry(provider, &clkctrl_providers, link) {
790 int i;
791
792 for (i = 0; i < provider->num_addrs; i++) {
793 if (provider->addr[i] <= addr &&
794 provider->addr[i] + provider->size[i] > addr) {
795 struct of_phandle_args clkspec;
796
797 clkspec.np = provider->node;
798 clkspec.args_count = 2;
799 clkspec.args[0] = addr - provider->addr[0];
800 clkspec.args[1] = 0;
801
802 clk = of_clk_get_from_provider(&clkspec);
803
804 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
805 __func__, oh->name, clk,
806 clkspec.args[0], provider->node);
807
808 return clk;
809 }
810 }
811 }
812
813 return NULL;
814}
815
816/**
817 * _init_main_clk - get a struct clk * for the hwmod's main functional clk
818 * @oh: struct omap_hwmod *
819 *
820 * Called from _init_clocks(). Populates the @oh _clk (main
821 * functional clock pointer) if a clock matching the hwmod name is found,
822 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
823 */
824static int _init_main_clk(struct omap_hwmod *oh)
825{
826 int ret = 0;
827 struct clk *clk = NULL;
828
829 clk = _lookup_clkctrl_clk(oh);
830
831 if (!IS_ERR_OR_NULL(clk)) {
832 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
833 __clk_get_name(clk), oh->name);
834 oh->main_clk = __clk_get_name(clk);
835 oh->_clk = clk;
836 soc_ops.disable_direct_prcm(oh);
837 } else {
838 if (!oh->main_clk)
839 return 0;
840
841 oh->_clk = clk_get(NULL, oh->main_clk);
842 }
843
844 if (IS_ERR(oh->_clk)) {
845 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
846 oh->name, oh->main_clk);
847 return -EINVAL;
848 }
849 /*
850 * HACK: This needs a re-visit once clk_prepare() is implemented
851 * to do something meaningful. Today its just a no-op.
852 * If clk_prepare() is used at some point to do things like
853 * voltage scaling etc, then this would have to be moved to
854 * some point where subsystems like i2c and pmic become
855 * available.
856 */
857 clk_prepare(oh->_clk);
858
859 if (!_get_clkdm(oh))
860 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
861 oh->name, oh->main_clk);
862
863 return ret;
864}
865
866/**
867 * _init_interface_clks - get a struct clk * for the hwmod's interface clks
868 * @oh: struct omap_hwmod *
869 *
870 * Called from _init_clocks(). Populates the @oh OCP slave interface
871 * clock pointers. Returns 0 on success or -EINVAL on error.
872 */
873static int _init_interface_clks(struct omap_hwmod *oh)
874{
875 struct omap_hwmod_ocp_if *os;
876 struct clk *c;
877 int ret = 0;
878
879 list_for_each_entry(os, &oh->slave_ports, node) {
880 if (!os->clk)
881 continue;
882
883 c = clk_get(NULL, os->clk);
884 if (IS_ERR(c)) {
885 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
886 oh->name, os->clk);
887 ret = -EINVAL;
888 continue;
889 }
890 os->_clk = c;
891 /*
892 * HACK: This needs a re-visit once clk_prepare() is implemented
893 * to do something meaningful. Today its just a no-op.
894 * If clk_prepare() is used at some point to do things like
895 * voltage scaling etc, then this would have to be moved to
896 * some point where subsystems like i2c and pmic become
897 * available.
898 */
899 clk_prepare(os->_clk);
900 }
901
902 return ret;
903}
904
905/**
906 * _init_opt_clk - get a struct clk * for the hwmod's optional clocks
907 * @oh: struct omap_hwmod *
908 *
909 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
910 * clock pointers. Returns 0 on success or -EINVAL on error.
911 */
912static int _init_opt_clks(struct omap_hwmod *oh)
913{
914 struct omap_hwmod_opt_clk *oc;
915 struct clk *c;
916 int i;
917 int ret = 0;
918
919 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
920 c = clk_get(NULL, oc->clk);
921 if (IS_ERR(c)) {
922 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
923 oh->name, oc->clk);
924 ret = -EINVAL;
925 continue;
926 }
927 oc->_clk = c;
928 /*
929 * HACK: This needs a re-visit once clk_prepare() is implemented
930 * to do something meaningful. Today its just a no-op.
931 * If clk_prepare() is used at some point to do things like
932 * voltage scaling etc, then this would have to be moved to
933 * some point where subsystems like i2c and pmic become
934 * available.
935 */
936 clk_prepare(oc->_clk);
937 }
938
939 return ret;
940}
941
942static void _enable_optional_clocks(struct omap_hwmod *oh)
943{
944 struct omap_hwmod_opt_clk *oc;
945 int i;
946
947 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
948
949 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
950 if (oc->_clk) {
951 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
952 __clk_get_name(oc->_clk));
953 clk_enable(oc->_clk);
954 }
955}
956
957static void _disable_optional_clocks(struct omap_hwmod *oh)
958{
959 struct omap_hwmod_opt_clk *oc;
960 int i;
961
962 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
963
964 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
965 if (oc->_clk) {
966 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
967 __clk_get_name(oc->_clk));
968 clk_disable(oc->_clk);
969 }
970}
971
972/**
973 * _enable_clocks - enable hwmod main clock and interface clocks
974 * @oh: struct omap_hwmod *
975 *
976 * Enables all clocks necessary for register reads and writes to succeed
977 * on the hwmod @oh. Returns 0.
978 */
979static int _enable_clocks(struct omap_hwmod *oh)
980{
981 struct omap_hwmod_ocp_if *os;
982
983 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
984
985 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
986 _enable_optional_clocks(oh);
987
988 if (oh->_clk)
989 clk_enable(oh->_clk);
990
991 list_for_each_entry(os, &oh->slave_ports, node) {
992 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
993 omap2_clk_deny_idle(os->_clk);
994 clk_enable(os->_clk);
995 }
996 }
997
998 /* The opt clocks are controlled by the device driver. */
999
1000 return 0;
1001}
1002
1003/**
1004 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1005 * @oh: struct omap_hwmod *
1006 */
1007static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1008{
1009 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1010 return true;
1011
1012 return false;
1013}
1014
1015/**
1016 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1017 * @oh: struct omap_hwmod *
1018 */
1019static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1020{
1021 if (oh->prcm.omap4.clkctrl_offs)
1022 return true;
1023
1024 if (!oh->prcm.omap4.clkctrl_offs &&
1025 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1026 return true;
1027
1028 return false;
1029}
1030
1031/**
1032 * _disable_clocks - disable hwmod main clock and interface clocks
1033 * @oh: struct omap_hwmod *
1034 *
1035 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1036 */
1037static int _disable_clocks(struct omap_hwmod *oh)
1038{
1039 struct omap_hwmod_ocp_if *os;
1040
1041 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1042
1043 if (oh->_clk)
1044 clk_disable(oh->_clk);
1045
1046 list_for_each_entry(os, &oh->slave_ports, node) {
1047 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1048 clk_disable(os->_clk);
1049 omap2_clk_allow_idle(os->_clk);
1050 }
1051 }
1052
1053 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1054 _disable_optional_clocks(oh);
1055
1056 /* The opt clocks are controlled by the device driver. */
1057
1058 return 0;
1059}
1060
1061/**
1062 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1063 * @oh: struct omap_hwmod *
1064 *
1065 * Enables the PRCM module mode related to the hwmod @oh.
1066 * No return value.
1067 */
1068static void _omap4_enable_module(struct omap_hwmod *oh)
1069{
1070 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1071 _omap4_clkctrl_managed_by_clkfwk(oh))
1072 return;
1073
1074 pr_debug("omap_hwmod: %s: %s: %d\n",
1075 oh->name, __func__, oh->prcm.omap4.modulemode);
1076
1077 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1078 oh->clkdm->prcm_partition,
1079 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1080}
1081
1082/**
1083 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1084 * @oh: struct omap_hwmod *
1085 *
1086 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1087 * does not have an IDLEST bit or if the module successfully enters
1088 * slave idle; otherwise, pass along the return value of the
1089 * appropriate *_cm*_wait_module_idle() function.
1090 */
1091static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1092{
1093 if (!oh)
1094 return -EINVAL;
1095
1096 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1097 return 0;
1098
1099 if (oh->flags & HWMOD_NO_IDLEST)
1100 return 0;
1101
1102 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1103 return 0;
1104
1105 if (!_omap4_has_clkctrl_clock(oh))
1106 return 0;
1107
1108 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1109 oh->clkdm->cm_inst,
1110 oh->prcm.omap4.clkctrl_offs, 0);
1111}
1112
1113/**
1114 * _save_mpu_port_index - find and save the index to @oh's MPU port
1115 * @oh: struct omap_hwmod *
1116 *
1117 * Determines the array index of the OCP slave port that the MPU uses
1118 * to address the device, and saves it into the struct omap_hwmod.
1119 * Intended to be called during hwmod registration only. No return
1120 * value.
1121 */
1122static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1123{
1124 struct omap_hwmod_ocp_if *os = NULL;
1125
1126 if (!oh)
1127 return;
1128
1129 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1130
1131 list_for_each_entry(os, &oh->slave_ports, node) {
1132 if (os->user & OCP_USER_MPU) {
1133 oh->_mpu_port = os;
1134 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1135 break;
1136 }
1137 }
1138
1139 return;
1140}
1141
1142/**
1143 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1144 * @oh: struct omap_hwmod *
1145 *
1146 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1147 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1148 * communicate with the IP block. This interface need not be directly
1149 * connected to the MPU (and almost certainly is not), but is directly
1150 * connected to the IP block represented by @oh. Returns a pointer
1151 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1152 * error or if there does not appear to be a path from the MPU to this
1153 * IP block.
1154 */
1155static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1156{
1157 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1158 return NULL;
1159
1160 return oh->_mpu_port;
1161};
1162
1163/**
1164 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1165 * @oh: struct omap_hwmod *
1166 *
1167 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1168 * by @oh is set to indicate to the PRCM that the IP block is active.
1169 * Usually this means placing the module into smart-idle mode and
1170 * smart-standby, but if there is a bug in the automatic idle handling
1171 * for the IP block, it may need to be placed into the force-idle or
1172 * no-idle variants of these modes. No return value.
1173 */
1174static void _enable_sysc(struct omap_hwmod *oh)
1175{
1176 u8 idlemode, sf;
1177 u32 v;
1178 bool clkdm_act;
1179 struct clockdomain *clkdm;
1180
1181 if (!oh->class->sysc)
1182 return;
1183
1184 /*
1185 * Wait until reset has completed, this is needed as the IP
1186 * block is reset automatically by hardware in some cases
1187 * (off-mode for example), and the drivers require the
1188 * IP to be ready when they access it
1189 */
1190 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1191 _enable_optional_clocks(oh);
1192 _wait_softreset_complete(oh);
1193 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1194 _disable_optional_clocks(oh);
1195
1196 v = oh->_sysc_cache;
1197 sf = oh->class->sysc->sysc_flags;
1198
1199 clkdm = _get_clkdm(oh);
1200 if (sf & SYSC_HAS_SIDLEMODE) {
1201 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1202 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1203 idlemode = HWMOD_IDLEMODE_NO;
1204 } else {
1205 if (sf & SYSC_HAS_ENAWAKEUP)
1206 _enable_wakeup(oh, &v);
1207 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1208 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1209 else
1210 idlemode = HWMOD_IDLEMODE_SMART;
1211 }
1212
1213 /*
1214 * This is special handling for some IPs like
1215 * 32k sync timer. Force them to idle!
1216 */
1217 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1218 if (clkdm_act && !(oh->class->sysc->idlemodes &
1219 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1220 idlemode = HWMOD_IDLEMODE_FORCE;
1221
1222 _set_slave_idlemode(oh, idlemode, &v);
1223 }
1224
1225 if (sf & SYSC_HAS_MIDLEMODE) {
1226 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1227 idlemode = HWMOD_IDLEMODE_FORCE;
1228 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1229 idlemode = HWMOD_IDLEMODE_NO;
1230 } else {
1231 if (sf & SYSC_HAS_ENAWAKEUP)
1232 _enable_wakeup(oh, &v);
1233 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1234 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1235 else
1236 idlemode = HWMOD_IDLEMODE_SMART;
1237 }
1238 _set_master_standbymode(oh, idlemode, &v);
1239 }
1240
1241 /*
1242 * XXX The clock framework should handle this, by
1243 * calling into this code. But this must wait until the
1244 * clock structures are tagged with omap_hwmod entries
1245 */
1246 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1247 (sf & SYSC_HAS_CLOCKACTIVITY))
1248 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1249
1250 _write_sysconfig(v, oh);
1251
1252 /*
1253 * Set the autoidle bit only after setting the smartidle bit
1254 * Setting this will not have any impact on the other modules.
1255 */
1256 if (sf & SYSC_HAS_AUTOIDLE) {
1257 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1258 0 : 1;
1259 _set_module_autoidle(oh, idlemode, &v);
1260 _write_sysconfig(v, oh);
1261 }
1262}
1263
1264/**
1265 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1266 * @oh: struct omap_hwmod *
1267 *
1268 * If module is marked as SWSUP_SIDLE, force the module into slave
1269 * idle; otherwise, configure it for smart-idle. If module is marked
1270 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1271 * configure it for smart-standby. No return value.
1272 */
1273static void _idle_sysc(struct omap_hwmod *oh)
1274{
1275 u8 idlemode, sf;
1276 u32 v;
1277
1278 if (!oh->class->sysc)
1279 return;
1280
1281 v = oh->_sysc_cache;
1282 sf = oh->class->sysc->sysc_flags;
1283
1284 if (sf & SYSC_HAS_SIDLEMODE) {
1285 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1286 idlemode = HWMOD_IDLEMODE_FORCE;
1287 } else {
1288 if (sf & SYSC_HAS_ENAWAKEUP)
1289 _enable_wakeup(oh, &v);
1290 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1291 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1292 else
1293 idlemode = HWMOD_IDLEMODE_SMART;
1294 }
1295 _set_slave_idlemode(oh, idlemode, &v);
1296 }
1297
1298 if (sf & SYSC_HAS_MIDLEMODE) {
1299 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1300 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1301 idlemode = HWMOD_IDLEMODE_FORCE;
1302 } else {
1303 if (sf & SYSC_HAS_ENAWAKEUP)
1304 _enable_wakeup(oh, &v);
1305 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1306 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1307 else
1308 idlemode = HWMOD_IDLEMODE_SMART;
1309 }
1310 _set_master_standbymode(oh, idlemode, &v);
1311 }
1312
1313 /* If the cached value is the same as the new value, skip the write */
1314 if (oh->_sysc_cache != v)
1315 _write_sysconfig(v, oh);
1316}
1317
1318/**
1319 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1320 * @oh: struct omap_hwmod *
1321 *
1322 * Force the module into slave idle and master suspend. No return
1323 * value.
1324 */
1325static void _shutdown_sysc(struct omap_hwmod *oh)
1326{
1327 u32 v;
1328 u8 sf;
1329
1330 if (!oh->class->sysc)
1331 return;
1332
1333 v = oh->_sysc_cache;
1334 sf = oh->class->sysc->sysc_flags;
1335
1336 if (sf & SYSC_HAS_SIDLEMODE)
1337 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1338
1339 if (sf & SYSC_HAS_MIDLEMODE)
1340 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1341
1342 if (sf & SYSC_HAS_AUTOIDLE)
1343 _set_module_autoidle(oh, 1, &v);
1344
1345 _write_sysconfig(v, oh);
1346}
1347
1348/**
1349 * _lookup - find an omap_hwmod by name
1350 * @name: find an omap_hwmod by name
1351 *
1352 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1353 */
1354static struct omap_hwmod *_lookup(const char *name)
1355{
1356 struct omap_hwmod *oh, *temp_oh;
1357
1358 oh = NULL;
1359
1360 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1361 if (!strcmp(name, temp_oh->name)) {
1362 oh = temp_oh;
1363 break;
1364 }
1365 }
1366
1367 return oh;
1368}
1369
1370/**
1371 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1372 * @oh: struct omap_hwmod *
1373 *
1374 * Convert a clockdomain name stored in a struct omap_hwmod into a
1375 * clockdomain pointer, and save it into the struct omap_hwmod.
1376 * Return -EINVAL if the clkdm_name lookup failed.
1377 */
1378static int _init_clkdm(struct omap_hwmod *oh)
1379{
1380 if (!oh->clkdm_name) {
1381 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1382 return 0;
1383 }
1384
1385 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1386 if (!oh->clkdm) {
1387 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1388 oh->name, oh->clkdm_name);
1389 return 0;
1390 }
1391
1392 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1393 oh->name, oh->clkdm_name);
1394
1395 return 0;
1396}
1397
1398/**
1399 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1400 * well the clockdomain.
1401 * @oh: struct omap_hwmod *
1402 * @np: device_node mapped to this hwmod
1403 *
1404 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1405 * Resolves all clock names embedded in the hwmod. Returns 0 on
1406 * success, or a negative error code on failure.
1407 */
1408static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1409{
1410 int ret = 0;
1411
1412 if (oh->_state != _HWMOD_STATE_REGISTERED)
1413 return 0;
1414
1415 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1416
1417 if (soc_ops.init_clkdm)
1418 ret |= soc_ops.init_clkdm(oh);
1419
1420 ret |= _init_main_clk(oh);
1421 ret |= _init_interface_clks(oh);
1422 ret |= _init_opt_clks(oh);
1423
1424 if (!ret)
1425 oh->_state = _HWMOD_STATE_CLKS_INITED;
1426 else
1427 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1428
1429 return ret;
1430}
1431
1432/**
1433 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1434 * @oh: struct omap_hwmod *
1435 * @name: name of the reset line in the context of this hwmod
1436 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1437 *
1438 * Return the bit position of the reset line that match the
1439 * input name. Return -ENOENT if not found.
1440 */
1441static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1442 struct omap_hwmod_rst_info *ohri)
1443{
1444 int i;
1445
1446 for (i = 0; i < oh->rst_lines_cnt; i++) {
1447 const char *rst_line = oh->rst_lines[i].name;
1448 if (!strcmp(rst_line, name)) {
1449 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1450 ohri->st_shift = oh->rst_lines[i].st_shift;
1451 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1452 oh->name, __func__, rst_line, ohri->rst_shift,
1453 ohri->st_shift);
1454
1455 return 0;
1456 }
1457 }
1458
1459 return -ENOENT;
1460}
1461
1462/**
1463 * _assert_hardreset - assert the HW reset line of submodules
1464 * contained in the hwmod module.
1465 * @oh: struct omap_hwmod *
1466 * @name: name of the reset line to lookup and assert
1467 *
1468 * Some IP like dsp, ipu or iva contain processor that require an HW
1469 * reset line to be assert / deassert in order to enable fully the IP.
1470 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1471 * asserting the hardreset line on the currently-booted SoC, or passes
1472 * along the return value from _lookup_hardreset() or the SoC's
1473 * assert_hardreset code.
1474 */
1475static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1476{
1477 struct omap_hwmod_rst_info ohri;
1478 int ret = -EINVAL;
1479
1480 if (!oh)
1481 return -EINVAL;
1482
1483 if (!soc_ops.assert_hardreset)
1484 return -ENOSYS;
1485
1486 ret = _lookup_hardreset(oh, name, &ohri);
1487 if (ret < 0)
1488 return ret;
1489
1490 ret = soc_ops.assert_hardreset(oh, &ohri);
1491
1492 return ret;
1493}
1494
1495/**
1496 * _deassert_hardreset - deassert the HW reset line of submodules contained
1497 * in the hwmod module.
1498 * @oh: struct omap_hwmod *
1499 * @name: name of the reset line to look up and deassert
1500 *
1501 * Some IP like dsp, ipu or iva contain processor that require an HW
1502 * reset line to be assert / deassert in order to enable fully the IP.
1503 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1504 * deasserting the hardreset line on the currently-booted SoC, or passes
1505 * along the return value from _lookup_hardreset() or the SoC's
1506 * deassert_hardreset code.
1507 */
1508static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1509{
1510 struct omap_hwmod_rst_info ohri;
1511 int ret = -EINVAL;
1512
1513 if (!oh)
1514 return -EINVAL;
1515
1516 if (!soc_ops.deassert_hardreset)
1517 return -ENOSYS;
1518
1519 ret = _lookup_hardreset(oh, name, &ohri);
1520 if (ret < 0)
1521 return ret;
1522
1523 if (oh->clkdm) {
1524 /*
1525 * A clockdomain must be in SW_SUP otherwise reset
1526 * might not be completed. The clockdomain can be set
1527 * in HW_AUTO only when the module become ready.
1528 */
1529 clkdm_deny_idle(oh->clkdm);
1530 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1531 if (ret) {
1532 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1533 oh->name, oh->clkdm->name, ret);
1534 return ret;
1535 }
1536 }
1537
1538 _enable_clocks(oh);
1539 if (soc_ops.enable_module)
1540 soc_ops.enable_module(oh);
1541
1542 ret = soc_ops.deassert_hardreset(oh, &ohri);
1543
1544 if (soc_ops.disable_module)
1545 soc_ops.disable_module(oh);
1546 _disable_clocks(oh);
1547
1548 if (ret == -EBUSY)
1549 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1550
1551 if (oh->clkdm) {
1552 /*
1553 * Set the clockdomain to HW_AUTO, assuming that the
1554 * previous state was HW_AUTO.
1555 */
1556 clkdm_allow_idle(oh->clkdm);
1557
1558 clkdm_hwmod_disable(oh->clkdm, oh);
1559 }
1560
1561 return ret;
1562}
1563
1564/**
1565 * _read_hardreset - read the HW reset line state of submodules
1566 * contained in the hwmod module
1567 * @oh: struct omap_hwmod *
1568 * @name: name of the reset line to look up and read
1569 *
1570 * Return the state of the reset line. Returns -EINVAL if @oh is
1571 * null, -ENOSYS if we have no way of reading the hardreset line
1572 * status on the currently-booted SoC, or passes along the return
1573 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1574 * code.
1575 */
1576static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1577{
1578 struct omap_hwmod_rst_info ohri;
1579 int ret = -EINVAL;
1580
1581 if (!oh)
1582 return -EINVAL;
1583
1584 if (!soc_ops.is_hardreset_asserted)
1585 return -ENOSYS;
1586
1587 ret = _lookup_hardreset(oh, name, &ohri);
1588 if (ret < 0)
1589 return ret;
1590
1591 return soc_ops.is_hardreset_asserted(oh, &ohri);
1592}
1593
1594/**
1595 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1596 * @oh: struct omap_hwmod *
1597 *
1598 * If all hardreset lines associated with @oh are asserted, then return true.
1599 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1600 * associated with @oh are asserted, then return false.
1601 * This function is used to avoid executing some parts of the IP block
1602 * enable/disable sequence if its hardreset line is set.
1603 */
1604static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1605{
1606 int i, rst_cnt = 0;
1607
1608 if (oh->rst_lines_cnt == 0)
1609 return false;
1610
1611 for (i = 0; i < oh->rst_lines_cnt; i++)
1612 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1613 rst_cnt++;
1614
1615 if (oh->rst_lines_cnt == rst_cnt)
1616 return true;
1617
1618 return false;
1619}
1620
1621/**
1622 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1623 * hard-reset
1624 * @oh: struct omap_hwmod *
1625 *
1626 * If any hardreset lines associated with @oh are asserted, then
1627 * return true. Otherwise, if no hardreset lines associated with @oh
1628 * are asserted, or if @oh has no hardreset lines, then return false.
1629 * This function is used to avoid executing some parts of the IP block
1630 * enable/disable sequence if any hardreset line is set.
1631 */
1632static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1633{
1634 int rst_cnt = 0;
1635 int i;
1636
1637 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1638 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1639 rst_cnt++;
1640
1641 return (rst_cnt) ? true : false;
1642}
1643
1644/**
1645 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1646 * @oh: struct omap_hwmod *
1647 *
1648 * Disable the PRCM module mode related to the hwmod @oh.
1649 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1650 */
1651static int _omap4_disable_module(struct omap_hwmod *oh)
1652{
1653 int v;
1654
1655 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1656 _omap4_clkctrl_managed_by_clkfwk(oh))
1657 return -EINVAL;
1658
1659 /*
1660 * Since integration code might still be doing something, only
1661 * disable if all lines are under hardreset.
1662 */
1663 if (_are_any_hardreset_lines_asserted(oh))
1664 return 0;
1665
1666 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1667
1668 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1669 oh->prcm.omap4.clkctrl_offs);
1670
1671 v = _omap4_wait_target_disable(oh);
1672 if (v)
1673 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1674 oh->name);
1675
1676 return 0;
1677}
1678
1679/**
1680 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1681 * @oh: struct omap_hwmod *
1682 *
1683 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1684 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1685 * reset this way, -EINVAL if the hwmod is in the wrong state,
1686 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1687 *
1688 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1689 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1690 * use the SYSCONFIG softreset bit to provide the status.
1691 *
1692 * Note that some IP like McBSP do have reset control but don't have
1693 * reset status.
1694 */
1695static int _ocp_softreset(struct omap_hwmod *oh)
1696{
1697 u32 v;
1698 int c = 0;
1699 int ret = 0;
1700
1701 if (!oh->class->sysc ||
1702 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1703 return -ENOENT;
1704
1705 /* clocks must be on for this operation */
1706 if (oh->_state != _HWMOD_STATE_ENABLED) {
1707 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1708 oh->name);
1709 return -EINVAL;
1710 }
1711
1712 /* For some modules, all optionnal clocks need to be enabled as well */
1713 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1714 _enable_optional_clocks(oh);
1715
1716 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1717
1718 v = oh->_sysc_cache;
1719 ret = _set_softreset(oh, &v);
1720 if (ret)
1721 goto dis_opt_clks;
1722
1723 _write_sysconfig(v, oh);
1724
1725 if (oh->class->sysc->srst_udelay)
1726 udelay(oh->class->sysc->srst_udelay);
1727
1728 c = _wait_softreset_complete(oh);
1729 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1730 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1731 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1732 ret = -ETIMEDOUT;
1733 goto dis_opt_clks;
1734 } else {
1735 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1736 }
1737
1738 ret = _clear_softreset(oh, &v);
1739 if (ret)
1740 goto dis_opt_clks;
1741
1742 _write_sysconfig(v, oh);
1743
1744 /*
1745 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1746 * _wait_target_ready() or _reset()
1747 */
1748
1749dis_opt_clks:
1750 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1751 _disable_optional_clocks(oh);
1752
1753 return ret;
1754}
1755
1756/**
1757 * _reset - reset an omap_hwmod
1758 * @oh: struct omap_hwmod *
1759 *
1760 * Resets an omap_hwmod @oh. If the module has a custom reset
1761 * function pointer defined, then call it to reset the IP block, and
1762 * pass along its return value to the caller. Otherwise, if the IP
1763 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1764 * associated with it, call a function to reset the IP block via that
1765 * method, and pass along the return value to the caller. Finally, if
1766 * the IP block has some hardreset lines associated with it, assert
1767 * all of those, but do _not_ deassert them. (This is because driver
1768 * authors have expressed an apparent requirement to control the
1769 * deassertion of the hardreset lines themselves.)
1770 *
1771 * The default software reset mechanism for most OMAP IP blocks is
1772 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1773 * hwmods cannot be reset via this method. Some are not targets and
1774 * therefore have no OCP header registers to access. Others (like the
1775 * IVA) have idiosyncratic reset sequences. So for these relatively
1776 * rare cases, custom reset code can be supplied in the struct
1777 * omap_hwmod_class .reset function pointer.
1778 *
1779 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1780 * does not prevent idling of the system. This is necessary for cases
1781 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1782 * kernel without disabling dma.
1783 *
1784 * Passes along the return value from either _ocp_softreset() or the
1785 * custom reset function - these must return -EINVAL if the hwmod
1786 * cannot be reset this way or if the hwmod is in the wrong state,
1787 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1788 */
1789static int _reset(struct omap_hwmod *oh)
1790{
1791 int i, r;
1792
1793 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1794
1795 if (oh->class->reset) {
1796 r = oh->class->reset(oh);
1797 } else {
1798 if (oh->rst_lines_cnt > 0) {
1799 for (i = 0; i < oh->rst_lines_cnt; i++)
1800 _assert_hardreset(oh, oh->rst_lines[i].name);
1801 return 0;
1802 } else {
1803 r = _ocp_softreset(oh);
1804 if (r == -ENOENT)
1805 r = 0;
1806 }
1807 }
1808
1809 _set_dmadisable(oh);
1810
1811 /*
1812 * OCP_SYSCONFIG bits need to be reprogrammed after a
1813 * softreset. The _enable() function should be split to avoid
1814 * the rewrite of the OCP_SYSCONFIG register.
1815 */
1816 if (oh->class->sysc) {
1817 _update_sysc_cache(oh);
1818 _enable_sysc(oh);
1819 }
1820
1821 return r;
1822}
1823
1824/**
1825 * _omap4_update_context_lost - increment hwmod context loss counter if
1826 * hwmod context was lost, and clear hardware context loss reg
1827 * @oh: hwmod to check for context loss
1828 *
1829 * If the PRCM indicates that the hwmod @oh lost context, increment
1830 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1831 * bits. No return value.
1832 */
1833static void _omap4_update_context_lost(struct omap_hwmod *oh)
1834{
1835 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1836 return;
1837
1838 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1839 oh->clkdm->pwrdm.ptr->prcm_offs,
1840 oh->prcm.omap4.context_offs))
1841 return;
1842
1843 oh->prcm.omap4.context_lost_counter++;
1844 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1845 oh->clkdm->pwrdm.ptr->prcm_offs,
1846 oh->prcm.omap4.context_offs);
1847}
1848
1849/**
1850 * _omap4_get_context_lost - get context loss counter for a hwmod
1851 * @oh: hwmod to get context loss counter for
1852 *
1853 * Returns the in-memory context loss counter for a hwmod.
1854 */
1855static int _omap4_get_context_lost(struct omap_hwmod *oh)
1856{
1857 return oh->prcm.omap4.context_lost_counter;
1858}
1859
1860/**
1861 * _enable - enable an omap_hwmod
1862 * @oh: struct omap_hwmod *
1863 *
1864 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1865 * register target. Returns -EINVAL if the hwmod is in the wrong
1866 * state or passes along the return value of _wait_target_ready().
1867 */
1868static int _enable(struct omap_hwmod *oh)
1869{
1870 int r;
1871
1872 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1873
1874 /*
1875 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1876 * state at init.
1877 */
1878 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1879 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1880 return 0;
1881 }
1882
1883 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1884 oh->_state != _HWMOD_STATE_IDLE &&
1885 oh->_state != _HWMOD_STATE_DISABLED) {
1886 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1887 oh->name);
1888 return -EINVAL;
1889 }
1890
1891 /*
1892 * If an IP block contains HW reset lines and all of them are
1893 * asserted, we let integration code associated with that
1894 * block handle the enable. We've received very little
1895 * information on what those driver authors need, and until
1896 * detailed information is provided and the driver code is
1897 * posted to the public lists, this is probably the best we
1898 * can do.
1899 */
1900 if (_are_all_hardreset_lines_asserted(oh))
1901 return 0;
1902
1903 _add_initiator_dep(oh, mpu_oh);
1904
1905 if (oh->clkdm) {
1906 /*
1907 * A clockdomain must be in SW_SUP before enabling
1908 * completely the module. The clockdomain can be set
1909 * in HW_AUTO only when the module become ready.
1910 */
1911 clkdm_deny_idle(oh->clkdm);
1912 r = clkdm_hwmod_enable(oh->clkdm, oh);
1913 if (r) {
1914 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1915 oh->name, oh->clkdm->name, r);
1916 return r;
1917 }
1918 }
1919
1920 _enable_clocks(oh);
1921 if (soc_ops.enable_module)
1922 soc_ops.enable_module(oh);
1923 if (oh->flags & HWMOD_BLOCK_WFI)
1924 cpu_idle_poll_ctrl(true);
1925
1926 if (soc_ops.update_context_lost)
1927 soc_ops.update_context_lost(oh);
1928
1929 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1930 -EINVAL;
1931 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1932 clkdm_allow_idle(oh->clkdm);
1933
1934 if (!r) {
1935 oh->_state = _HWMOD_STATE_ENABLED;
1936
1937 /* Access the sysconfig only if the target is ready */
1938 if (oh->class->sysc) {
1939 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1940 _update_sysc_cache(oh);
1941 _enable_sysc(oh);
1942 }
1943 } else {
1944 if (soc_ops.disable_module)
1945 soc_ops.disable_module(oh);
1946 _disable_clocks(oh);
1947 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1948 oh->name, r);
1949
1950 if (oh->clkdm)
1951 clkdm_hwmod_disable(oh->clkdm, oh);
1952 }
1953
1954 return r;
1955}
1956
1957/**
1958 * _idle - idle an omap_hwmod
1959 * @oh: struct omap_hwmod *
1960 *
1961 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1962 * no further work. Returns -EINVAL if the hwmod is in the wrong
1963 * state or returns 0.
1964 */
1965static int _idle(struct omap_hwmod *oh)
1966{
1967 if (oh->flags & HWMOD_NO_IDLE) {
1968 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1969 return 0;
1970 }
1971
1972 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1973
1974 if (_are_all_hardreset_lines_asserted(oh))
1975 return 0;
1976
1977 if (oh->_state != _HWMOD_STATE_ENABLED) {
1978 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1979 oh->name);
1980 return -EINVAL;
1981 }
1982
1983 if (oh->class->sysc)
1984 _idle_sysc(oh);
1985 _del_initiator_dep(oh, mpu_oh);
1986
1987 /*
1988 * If HWMOD_CLKDM_NOAUTO is set then we don't
1989 * deny idle the clkdm again since idle was already denied
1990 * in _enable()
1991 */
1992 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1993 clkdm_deny_idle(oh->clkdm);
1994
1995 if (oh->flags & HWMOD_BLOCK_WFI)
1996 cpu_idle_poll_ctrl(false);
1997 if (soc_ops.disable_module)
1998 soc_ops.disable_module(oh);
1999
2000 /*
2001 * The module must be in idle mode before disabling any parents
2002 * clocks. Otherwise, the parent clock might be disabled before
2003 * the module transition is done, and thus will prevent the
2004 * transition to complete properly.
2005 */
2006 _disable_clocks(oh);
2007 if (oh->clkdm) {
2008 clkdm_allow_idle(oh->clkdm);
2009 clkdm_hwmod_disable(oh->clkdm, oh);
2010 }
2011
2012 oh->_state = _HWMOD_STATE_IDLE;
2013
2014 return 0;
2015}
2016
2017/**
2018 * _shutdown - shutdown an omap_hwmod
2019 * @oh: struct omap_hwmod *
2020 *
2021 * Shut down an omap_hwmod @oh. This should be called when the driver
2022 * used for the hwmod is removed or unloaded or if the driver is not
2023 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2024 * state or returns 0.
2025 */
2026static int _shutdown(struct omap_hwmod *oh)
2027{
2028 int ret, i;
2029 u8 prev_state;
2030
2031 if (_are_all_hardreset_lines_asserted(oh))
2032 return 0;
2033
2034 if (oh->_state != _HWMOD_STATE_IDLE &&
2035 oh->_state != _HWMOD_STATE_ENABLED) {
2036 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2037 oh->name);
2038 return -EINVAL;
2039 }
2040
2041 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2042
2043 if (oh->class->pre_shutdown) {
2044 prev_state = oh->_state;
2045 if (oh->_state == _HWMOD_STATE_IDLE)
2046 _enable(oh);
2047 ret = oh->class->pre_shutdown(oh);
2048 if (ret) {
2049 if (prev_state == _HWMOD_STATE_IDLE)
2050 _idle(oh);
2051 return ret;
2052 }
2053 }
2054
2055 if (oh->class->sysc) {
2056 if (oh->_state == _HWMOD_STATE_IDLE)
2057 _enable(oh);
2058 _shutdown_sysc(oh);
2059 }
2060
2061 /* clocks and deps are already disabled in idle */
2062 if (oh->_state == _HWMOD_STATE_ENABLED) {
2063 _del_initiator_dep(oh, mpu_oh);
2064 /* XXX what about the other system initiators here? dma, dsp */
2065 if (oh->flags & HWMOD_BLOCK_WFI)
2066 cpu_idle_poll_ctrl(false);
2067 if (soc_ops.disable_module)
2068 soc_ops.disable_module(oh);
2069 _disable_clocks(oh);
2070 if (oh->clkdm)
2071 clkdm_hwmod_disable(oh->clkdm, oh);
2072 }
2073 /* XXX Should this code also force-disable the optional clocks? */
2074
2075 for (i = 0; i < oh->rst_lines_cnt; i++)
2076 _assert_hardreset(oh, oh->rst_lines[i].name);
2077
2078 oh->_state = _HWMOD_STATE_DISABLED;
2079
2080 return 0;
2081}
2082
2083static int of_dev_find_hwmod(struct device_node *np,
2084 struct omap_hwmod *oh)
2085{
2086 int count, i, res;
2087 const char *p;
2088
2089 count = of_property_count_strings(np, "ti,hwmods");
2090 if (count < 1)
2091 return -ENODEV;
2092
2093 for (i = 0; i < count; i++) {
2094 res = of_property_read_string_index(np, "ti,hwmods",
2095 i, &p);
2096 if (res)
2097 continue;
2098 if (!strcmp(p, oh->name)) {
2099 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2100 np, i, oh->name);
2101 return i;
2102 }
2103 }
2104
2105 return -ENODEV;
2106}
2107
2108/**
2109 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2110 * @np: struct device_node *
2111 * @oh: struct omap_hwmod *
2112 * @index: index of the entry found
2113 * @found: struct device_node * found or NULL
2114 *
2115 * Parse the dt blob and find out needed hwmod. Recursive function is
2116 * implemented to take care hierarchical dt blob parsing.
2117 * Return: Returns 0 on success, -ENODEV when not found.
2118 */
2119static int of_dev_hwmod_lookup(struct device_node *np,
2120 struct omap_hwmod *oh,
2121 int *index,
2122 struct device_node **found)
2123{
2124 struct device_node *np0 = NULL;
2125 int res;
2126
2127 res = of_dev_find_hwmod(np, oh);
2128 if (res >= 0) {
2129 *found = np;
2130 *index = res;
2131 return 0;
2132 }
2133
2134 for_each_child_of_node(np, np0) {
2135 struct device_node *fc;
2136 int i;
2137
2138 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2139 if (res == 0) {
2140 *found = fc;
2141 *index = i;
2142 of_node_put(np0);
2143 return 0;
2144 }
2145 }
2146
2147 *found = NULL;
2148 *index = 0;
2149
2150 return -ENODEV;
2151}
2152
2153/**
2154 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2155 *
2156 * @oh: struct omap_hwmod *
2157 * @np: struct device_node *
2158 *
2159 * Fix up module register offsets for modules with mpu_rt_idx.
2160 * Only needed for cpsw with interconnect target module defined
2161 * in device tree while still using legacy hwmod platform data
2162 * for rev, sysc and syss registers.
2163 *
2164 * Can be removed when all cpsw hwmod platform data has been
2165 * dropped.
2166 */
2167static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2168 struct device_node *np,
2169 struct resource *res)
2170{
2171 struct device_node *child = NULL;
2172 int error;
2173
2174 child = of_get_next_child(np, child);
2175 if (!child)
2176 return;
2177
2178 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2179 if (error)
2180 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2181 __func__, error);
2182}
2183
2184/**
2185 * omap_hwmod_parse_module_range - map module IO range from device tree
2186 * @oh: struct omap_hwmod *
2187 * @np: struct device_node *
2188 *
2189 * Parse the device tree range an interconnect target module provides
2190 * for it's child device IP blocks. This way we can support the old
2191 * "ti,hwmods" property with just dts data without a need for platform
2192 * data for IO resources. And we don't need all the child IP device
2193 * nodes available in the dts.
2194 */
2195int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2196 struct device_node *np,
2197 struct resource *res)
2198{
2199 struct property *prop;
2200 const __be32 *ranges;
2201 const char *name;
2202 u32 nr_addr, nr_size;
2203 u64 base, size;
2204 int len, error;
2205
2206 if (!res)
2207 return -EINVAL;
2208
2209 ranges = of_get_property(np, "ranges", &len);
2210 if (!ranges)
2211 return -ENOENT;
2212
2213 len /= sizeof(*ranges);
2214
2215 if (len < 3)
2216 return -EINVAL;
2217
2218 of_property_for_each_string(np, "compatible", prop, name)
2219 if (!strncmp("ti,sysc-", name, 8))
2220 break;
2221
2222 if (!name)
2223 return -ENOENT;
2224
2225 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2226 if (error)
2227 return -ENOENT;
2228
2229 error = of_property_read_u32(np, "#size-cells", &nr_size);
2230 if (error)
2231 return -ENOENT;
2232
2233 if (nr_addr != 1 || nr_size != 1) {
2234 pr_err("%s: invalid range for %s->%pOFn\n", __func__,
2235 oh->name, np);
2236 return -EINVAL;
2237 }
2238
2239 ranges++;
2240 base = of_translate_address(np, ranges++);
2241 size = be32_to_cpup(ranges);
2242
2243 pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2244 oh->name, np, base, size);
2245
2246 if (oh && oh->mpu_rt_idx) {
2247 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2248
2249 return 0;
2250 }
2251
2252 res->start = base;
2253 res->end = base + size - 1;
2254 res->flags = IORESOURCE_MEM;
2255
2256 return 0;
2257}
2258
2259/**
2260 * _init_mpu_rt_base - populate the virtual address for a hwmod
2261 * @oh: struct omap_hwmod * to locate the virtual address
2262 * @data: (unused, caller should pass NULL)
2263 * @index: index of the reg entry iospace in device tree
2264 * @np: struct device_node * of the IP block's device node in the DT data
2265 *
2266 * Cache the virtual address used by the MPU to access this IP block's
2267 * registers. This address is needed early so the OCP registers that
2268 * are part of the device's address space can be ioremapped properly.
2269 *
2270 * If SYSC access is not needed, the registers will not be remapped
2271 * and non-availability of MPU access is not treated as an error.
2272 *
2273 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2274 * -ENXIO on absent or invalid register target address space.
2275 */
2276static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2277 int index, struct device_node *np)
2278{
2279 void __iomem *va_start = NULL;
2280 struct resource res;
2281 int error;
2282
2283 if (!oh)
2284 return -EINVAL;
2285
2286 _save_mpu_port_index(oh);
2287
2288 /* if we don't need sysc access we don't need to ioremap */
2289 if (!oh->class->sysc)
2290 return 0;
2291
2292 /* we can't continue without MPU PORT if we need sysc access */
2293 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2294 return -ENXIO;
2295
2296 if (!np) {
2297 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2298 return -ENXIO;
2299 }
2300
2301 /* Do we have a dts range for the interconnect target module? */
2302 error = omap_hwmod_parse_module_range(oh, np, &res);
2303 if (!error)
2304 va_start = ioremap(res.start, resource_size(&res));
2305
2306 /* No ranges, rely on device reg entry */
2307 if (!va_start)
2308 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2309 if (!va_start) {
2310 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2311 oh->name, index, np);
2312 return -ENXIO;
2313 }
2314
2315 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2316 oh->name, va_start);
2317
2318 oh->_mpu_rt_va = va_start;
2319 return 0;
2320}
2321
2322static void __init parse_module_flags(struct omap_hwmod *oh,
2323 struct device_node *np)
2324{
2325 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2326 oh->flags |= HWMOD_INIT_NO_RESET;
2327 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2328 oh->flags |= HWMOD_INIT_NO_IDLE;
2329 if (of_find_property(np, "ti,no-idle", NULL))
2330 oh->flags |= HWMOD_NO_IDLE;
2331}
2332
2333/**
2334 * _init - initialize internal data for the hwmod @oh
2335 * @oh: struct omap_hwmod *
2336 * @n: (unused)
2337 *
2338 * Look up the clocks and the address space used by the MPU to access
2339 * registers belonging to the hwmod @oh. @oh must already be
2340 * registered at this point. This is the first of two phases for
2341 * hwmod initialization. Code called here does not touch any hardware
2342 * registers, it simply prepares internal data structures. Returns 0
2343 * upon success or if the hwmod isn't registered or if the hwmod's
2344 * address space is not defined, or -EINVAL upon failure.
2345 */
2346static int __init _init(struct omap_hwmod *oh, void *data)
2347{
2348 int r, index;
2349 struct device_node *np = NULL;
2350 struct device_node *bus;
2351
2352 if (oh->_state != _HWMOD_STATE_REGISTERED)
2353 return 0;
2354
2355 bus = of_find_node_by_name(NULL, "ocp");
2356 if (!bus)
2357 return -ENODEV;
2358
2359 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2360 if (r)
2361 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2362 else if (np && index)
2363 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2364 oh->name, np);
2365
2366 r = _init_mpu_rt_base(oh, NULL, index, np);
2367 if (r < 0) {
2368 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2369 oh->name);
2370 return 0;
2371 }
2372
2373 r = _init_clocks(oh, np);
2374 if (r < 0) {
2375 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2376 return -EINVAL;
2377 }
2378
2379 if (np) {
2380 struct device_node *child;
2381
2382 parse_module_flags(oh, np);
2383 child = of_get_next_child(np, NULL);
2384 if (child)
2385 parse_module_flags(oh, child);
2386 }
2387
2388 oh->_state = _HWMOD_STATE_INITIALIZED;
2389
2390 return 0;
2391}
2392
2393/**
2394 * _setup_iclk_autoidle - configure an IP block's interface clocks
2395 * @oh: struct omap_hwmod *
2396 *
2397 * Set up the module's interface clocks. XXX This function is still mostly
2398 * a stub; implementing this properly requires iclk autoidle usecounting in
2399 * the clock code. No return value.
2400 */
2401static void _setup_iclk_autoidle(struct omap_hwmod *oh)
2402{
2403 struct omap_hwmod_ocp_if *os;
2404
2405 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2406 return;
2407
2408 list_for_each_entry(os, &oh->slave_ports, node) {
2409 if (!os->_clk)
2410 continue;
2411
2412 if (os->flags & OCPIF_SWSUP_IDLE) {
2413 /*
2414 * we might have multiple users of one iclk with
2415 * different requirements, disable autoidle when
2416 * the module is enabled, e.g. dss iclk
2417 */
2418 } else {
2419 /* we are enabling autoidle afterwards anyways */
2420 clk_enable(os->_clk);
2421 }
2422 }
2423
2424 return;
2425}
2426
2427/**
2428 * _setup_reset - reset an IP block during the setup process
2429 * @oh: struct omap_hwmod *
2430 *
2431 * Reset the IP block corresponding to the hwmod @oh during the setup
2432 * process. The IP block is first enabled so it can be successfully
2433 * reset. Returns 0 upon success or a negative error code upon
2434 * failure.
2435 */
2436static int _setup_reset(struct omap_hwmod *oh)
2437{
2438 int r = 0;
2439
2440 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2441 return -EINVAL;
2442
2443 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2444 return -EPERM;
2445
2446 if (oh->rst_lines_cnt == 0) {
2447 r = _enable(oh);
2448 if (r) {
2449 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2450 oh->name, oh->_state);
2451 return -EINVAL;
2452 }
2453 }
2454
2455 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2456 r = _reset(oh);
2457
2458 return r;
2459}
2460
2461/**
2462 * _setup_postsetup - transition to the appropriate state after _setup
2463 * @oh: struct omap_hwmod *
2464 *
2465 * Place an IP block represented by @oh into a "post-setup" state --
2466 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2467 * this function is called at the end of _setup().) The postsetup
2468 * state for an IP block can be changed by calling
2469 * omap_hwmod_enter_postsetup_state() early in the boot process,
2470 * before one of the omap_hwmod_setup*() functions are called for the
2471 * IP block.
2472 *
2473 * The IP block stays in this state until a PM runtime-based driver is
2474 * loaded for that IP block. A post-setup state of IDLE is
2475 * appropriate for almost all IP blocks with runtime PM-enabled
2476 * drivers, since those drivers are able to enable the IP block. A
2477 * post-setup state of ENABLED is appropriate for kernels with PM
2478 * runtime disabled. The DISABLED state is appropriate for unusual IP
2479 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2480 * included, since the WDTIMER starts running on reset and will reset
2481 * the MPU if left active.
2482 *
2483 * This post-setup mechanism is deprecated. Once all of the OMAP
2484 * drivers have been converted to use PM runtime, and all of the IP
2485 * block data and interconnect data is available to the hwmod code, it
2486 * should be possible to replace this mechanism with a "lazy reset"
2487 * arrangement. In a "lazy reset" setup, each IP block is enabled
2488 * when the driver first probes, then all remaining IP blocks without
2489 * drivers are either shut down or enabled after the drivers have
2490 * loaded. However, this cannot take place until the above
2491 * preconditions have been met, since otherwise the late reset code
2492 * has no way of knowing which IP blocks are in use by drivers, and
2493 * which ones are unused.
2494 *
2495 * No return value.
2496 */
2497static void _setup_postsetup(struct omap_hwmod *oh)
2498{
2499 u8 postsetup_state;
2500
2501 if (oh->rst_lines_cnt > 0)
2502 return;
2503
2504 postsetup_state = oh->_postsetup_state;
2505 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2506 postsetup_state = _HWMOD_STATE_ENABLED;
2507
2508 /*
2509 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2510 * it should be set by the core code as a runtime flag during startup
2511 */
2512 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2513 (postsetup_state == _HWMOD_STATE_IDLE)) {
2514 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2515 postsetup_state = _HWMOD_STATE_ENABLED;
2516 }
2517
2518 if (postsetup_state == _HWMOD_STATE_IDLE)
2519 _idle(oh);
2520 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2521 _shutdown(oh);
2522 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2523 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2524 oh->name, postsetup_state);
2525
2526 return;
2527}
2528
2529/**
2530 * _setup - prepare IP block hardware for use
2531 * @oh: struct omap_hwmod *
2532 * @n: (unused, pass NULL)
2533 *
2534 * Configure the IP block represented by @oh. This may include
2535 * enabling the IP block, resetting it, and placing it into a
2536 * post-setup state, depending on the type of IP block and applicable
2537 * flags. IP blocks are reset to prevent any previous configuration
2538 * by the bootloader or previous operating system from interfering
2539 * with power management or other parts of the system. The reset can
2540 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2541 * two phases for hwmod initialization. Code called here generally
2542 * affects the IP block hardware, or system integration hardware
2543 * associated with the IP block. Returns 0.
2544 */
2545static int _setup(struct omap_hwmod *oh, void *data)
2546{
2547 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2548 return 0;
2549
2550 if (oh->parent_hwmod) {
2551 int r;
2552
2553 r = _enable(oh->parent_hwmod);
2554 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2555 oh->name, oh->parent_hwmod->name);
2556 }
2557
2558 _setup_iclk_autoidle(oh);
2559
2560 if (!_setup_reset(oh))
2561 _setup_postsetup(oh);
2562
2563 if (oh->parent_hwmod) {
2564 u8 postsetup_state;
2565
2566 postsetup_state = oh->parent_hwmod->_postsetup_state;
2567
2568 if (postsetup_state == _HWMOD_STATE_IDLE)
2569 _idle(oh->parent_hwmod);
2570 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2571 _shutdown(oh->parent_hwmod);
2572 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2573 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2574 oh->parent_hwmod->name, postsetup_state);
2575 }
2576
2577 return 0;
2578}
2579
2580/**
2581 * _register - register a struct omap_hwmod
2582 * @oh: struct omap_hwmod *
2583 *
2584 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2585 * already has been registered by the same name; -EINVAL if the
2586 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2587 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2588 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2589 * success.
2590 *
2591 * XXX The data should be copied into bootmem, so the original data
2592 * should be marked __initdata and freed after init. This would allow
2593 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2594 * that the copy process would be relatively complex due to the large number
2595 * of substructures.
2596 */
2597static int _register(struct omap_hwmod *oh)
2598{
2599 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2600 (oh->_state != _HWMOD_STATE_UNKNOWN))
2601 return -EINVAL;
2602
2603 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2604
2605 if (_lookup(oh->name))
2606 return -EEXIST;
2607
2608 list_add_tail(&oh->node, &omap_hwmod_list);
2609
2610 INIT_LIST_HEAD(&oh->slave_ports);
2611 spin_lock_init(&oh->_lock);
2612 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2613
2614 oh->_state = _HWMOD_STATE_REGISTERED;
2615
2616 /*
2617 * XXX Rather than doing a strcmp(), this should test a flag
2618 * set in the hwmod data, inserted by the autogenerator code.
2619 */
2620 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2621 mpu_oh = oh;
2622
2623 return 0;
2624}
2625
2626/**
2627 * _add_link - add an interconnect between two IP blocks
2628 * @oi: pointer to a struct omap_hwmod_ocp_if record
2629 *
2630 * Add struct omap_hwmod_link records connecting the slave IP block
2631 * specified in @oi->slave to @oi. This code is assumed to run before
2632 * preemption or SMP has been enabled, thus avoiding the need for
2633 * locking in this code. Changes to this assumption will require
2634 * additional locking. Returns 0.
2635 */
2636static int _add_link(struct omap_hwmod_ocp_if *oi)
2637{
2638 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2639 oi->slave->name);
2640
2641 list_add(&oi->node, &oi->slave->slave_ports);
2642 oi->slave->slaves_cnt++;
2643
2644 return 0;
2645}
2646
2647/**
2648 * _register_link - register a struct omap_hwmod_ocp_if
2649 * @oi: struct omap_hwmod_ocp_if *
2650 *
2651 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2652 * has already been registered; -EINVAL if @oi is NULL or if the
2653 * record pointed to by @oi is missing required fields; or 0 upon
2654 * success.
2655 *
2656 * XXX The data should be copied into bootmem, so the original data
2657 * should be marked __initdata and freed after init. This would allow
2658 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2659 */
2660static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2661{
2662 if (!oi || !oi->master || !oi->slave || !oi->user)
2663 return -EINVAL;
2664
2665 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2666 return -EEXIST;
2667
2668 pr_debug("omap_hwmod: registering link from %s to %s\n",
2669 oi->master->name, oi->slave->name);
2670
2671 /*
2672 * Register the connected hwmods, if they haven't been
2673 * registered already
2674 */
2675 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2676 _register(oi->master);
2677
2678 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2679 _register(oi->slave);
2680
2681 _add_link(oi);
2682
2683 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2684
2685 return 0;
2686}
2687
2688/* Static functions intended only for use in soc_ops field function pointers */
2689
2690/**
2691 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2692 * @oh: struct omap_hwmod *
2693 *
2694 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2695 * does not have an IDLEST bit or if the module successfully leaves
2696 * slave idle; otherwise, pass along the return value of the
2697 * appropriate *_cm*_wait_module_ready() function.
2698 */
2699static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2700{
2701 if (!oh)
2702 return -EINVAL;
2703
2704 if (oh->flags & HWMOD_NO_IDLEST)
2705 return 0;
2706
2707 if (!_find_mpu_rt_port(oh))
2708 return 0;
2709
2710 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2711
2712 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2713 oh->prcm.omap2.idlest_reg_id,
2714 oh->prcm.omap2.idlest_idle_bit);
2715}
2716
2717/**
2718 * _omap4_wait_target_ready - wait for a module to leave slave idle
2719 * @oh: struct omap_hwmod *
2720 *
2721 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2722 * does not have an IDLEST bit or if the module successfully leaves
2723 * slave idle; otherwise, pass along the return value of the
2724 * appropriate *_cm*_wait_module_ready() function.
2725 */
2726static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2727{
2728 if (!oh)
2729 return -EINVAL;
2730
2731 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2732 return 0;
2733
2734 if (!_find_mpu_rt_port(oh))
2735 return 0;
2736
2737 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2738 return 0;
2739
2740 if (!_omap4_has_clkctrl_clock(oh))
2741 return 0;
2742
2743 /* XXX check module SIDLEMODE, hardreset status */
2744
2745 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2746 oh->clkdm->cm_inst,
2747 oh->prcm.omap4.clkctrl_offs, 0);
2748}
2749
2750/**
2751 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2752 * @oh: struct omap_hwmod * to assert hardreset
2753 * @ohri: hardreset line data
2754 *
2755 * Call omap2_prm_assert_hardreset() with parameters extracted from
2756 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2757 * use as an soc_ops function pointer. Passes along the return value
2758 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2759 * for removal when the PRM code is moved into drivers/.
2760 */
2761static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2762 struct omap_hwmod_rst_info *ohri)
2763{
2764 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2765 oh->prcm.omap2.module_offs, 0);
2766}
2767
2768/**
2769 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2770 * @oh: struct omap_hwmod * to deassert hardreset
2771 * @ohri: hardreset line data
2772 *
2773 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2774 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2775 * use as an soc_ops function pointer. Passes along the return value
2776 * from omap2_prm_deassert_hardreset(). XXX This function is
2777 * scheduled for removal when the PRM code is moved into drivers/.
2778 */
2779static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2780 struct omap_hwmod_rst_info *ohri)
2781{
2782 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2783 oh->prcm.omap2.module_offs, 0, 0);
2784}
2785
2786/**
2787 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2788 * @oh: struct omap_hwmod * to test hardreset
2789 * @ohri: hardreset line data
2790 *
2791 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2792 * from the hwmod @oh and the hardreset line data @ohri. Only
2793 * intended for use as an soc_ops function pointer. Passes along the
2794 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2795 * function is scheduled for removal when the PRM code is moved into
2796 * drivers/.
2797 */
2798static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2799 struct omap_hwmod_rst_info *ohri)
2800{
2801 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2802 oh->prcm.omap2.module_offs, 0);
2803}
2804
2805/**
2806 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2807 * @oh: struct omap_hwmod * to assert hardreset
2808 * @ohri: hardreset line data
2809 *
2810 * Call omap4_prminst_assert_hardreset() with parameters extracted
2811 * from the hwmod @oh and the hardreset line data @ohri. Only
2812 * intended for use as an soc_ops function pointer. Passes along the
2813 * return value from omap4_prminst_assert_hardreset(). XXX This
2814 * function is scheduled for removal when the PRM code is moved into
2815 * drivers/.
2816 */
2817static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2818 struct omap_hwmod_rst_info *ohri)
2819{
2820 if (!oh->clkdm)
2821 return -EINVAL;
2822
2823 return omap_prm_assert_hardreset(ohri->rst_shift,
2824 oh->clkdm->pwrdm.ptr->prcm_partition,
2825 oh->clkdm->pwrdm.ptr->prcm_offs,
2826 oh->prcm.omap4.rstctrl_offs);
2827}
2828
2829/**
2830 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2831 * @oh: struct omap_hwmod * to deassert hardreset
2832 * @ohri: hardreset line data
2833 *
2834 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2835 * from the hwmod @oh and the hardreset line data @ohri. Only
2836 * intended for use as an soc_ops function pointer. Passes along the
2837 * return value from omap4_prminst_deassert_hardreset(). XXX This
2838 * function is scheduled for removal when the PRM code is moved into
2839 * drivers/.
2840 */
2841static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2842 struct omap_hwmod_rst_info *ohri)
2843{
2844 if (!oh->clkdm)
2845 return -EINVAL;
2846
2847 if (ohri->st_shift)
2848 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2849 oh->name, ohri->name);
2850 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2851 oh->clkdm->pwrdm.ptr->prcm_partition,
2852 oh->clkdm->pwrdm.ptr->prcm_offs,
2853 oh->prcm.omap4.rstctrl_offs,
2854 oh->prcm.omap4.rstctrl_offs +
2855 OMAP4_RST_CTRL_ST_OFFSET);
2856}
2857
2858/**
2859 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2860 * @oh: struct omap_hwmod * to test hardreset
2861 * @ohri: hardreset line data
2862 *
2863 * Call omap4_prminst_is_hardreset_asserted() with parameters
2864 * extracted from the hwmod @oh and the hardreset line data @ohri.
2865 * Only intended for use as an soc_ops function pointer. Passes along
2866 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2867 * This function is scheduled for removal when the PRM code is moved
2868 * into drivers/.
2869 */
2870static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2871 struct omap_hwmod_rst_info *ohri)
2872{
2873 if (!oh->clkdm)
2874 return -EINVAL;
2875
2876 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2877 oh->clkdm->pwrdm.ptr->
2878 prcm_partition,
2879 oh->clkdm->pwrdm.ptr->prcm_offs,
2880 oh->prcm.omap4.rstctrl_offs);
2881}
2882
2883/**
2884 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2885 * @oh: struct omap_hwmod * to disable control for
2886 *
2887 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2888 * will be using its main_clk to enable/disable the module. Returns
2889 * 0 if successful.
2890 */
2891static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2892{
2893 if (!oh)
2894 return -EINVAL;
2895
2896 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2897
2898 return 0;
2899}
2900
2901/**
2902 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2903 * @oh: struct omap_hwmod * to deassert hardreset
2904 * @ohri: hardreset line data
2905 *
2906 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2907 * from the hwmod @oh and the hardreset line data @ohri. Only
2908 * intended for use as an soc_ops function pointer. Passes along the
2909 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2910 * function is scheduled for removal when the PRM code is moved into
2911 * drivers/.
2912 */
2913static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2914 struct omap_hwmod_rst_info *ohri)
2915{
2916 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2917 oh->clkdm->pwrdm.ptr->prcm_partition,
2918 oh->clkdm->pwrdm.ptr->prcm_offs,
2919 oh->prcm.omap4.rstctrl_offs,
2920 oh->prcm.omap4.rstst_offs);
2921}
2922
2923/* Public functions */
2924
2925u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2926{
2927 if (oh->flags & HWMOD_16BIT_REG)
2928 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2929 else
2930 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2931}
2932
2933void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2934{
2935 if (oh->flags & HWMOD_16BIT_REG)
2936 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2937 else
2938 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2939}
2940
2941/**
2942 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2943 * @oh: struct omap_hwmod *
2944 *
2945 * This is a public function exposed to drivers. Some drivers may need to do
2946 * some settings before and after resetting the device. Those drivers after
2947 * doing the necessary settings could use this function to start a reset by
2948 * setting the SYSCONFIG.SOFTRESET bit.
2949 */
2950int omap_hwmod_softreset(struct omap_hwmod *oh)
2951{
2952 u32 v;
2953 int ret;
2954
2955 if (!oh || !(oh->_sysc_cache))
2956 return -EINVAL;
2957
2958 v = oh->_sysc_cache;
2959 ret = _set_softreset(oh, &v);
2960 if (ret)
2961 goto error;
2962 _write_sysconfig(v, oh);
2963
2964 ret = _clear_softreset(oh, &v);
2965 if (ret)
2966 goto error;
2967 _write_sysconfig(v, oh);
2968
2969error:
2970 return ret;
2971}
2972
2973/**
2974 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2975 * @name: name of the omap_hwmod to look up
2976 *
2977 * Given a @name of an omap_hwmod, return a pointer to the registered
2978 * struct omap_hwmod *, or NULL upon error.
2979 */
2980struct omap_hwmod *omap_hwmod_lookup(const char *name)
2981{
2982 struct omap_hwmod *oh;
2983
2984 if (!name)
2985 return NULL;
2986
2987 oh = _lookup(name);
2988
2989 return oh;
2990}
2991
2992/**
2993 * omap_hwmod_for_each - call function for each registered omap_hwmod
2994 * @fn: pointer to a callback function
2995 * @data: void * data to pass to callback function
2996 *
2997 * Call @fn for each registered omap_hwmod, passing @data to each
2998 * function. @fn must return 0 for success or any other value for
2999 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3000 * will stop and the non-zero return value will be passed to the
3001 * caller of omap_hwmod_for_each(). @fn is called with
3002 * omap_hwmod_for_each() held.
3003 */
3004int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3005 void *data)
3006{
3007 struct omap_hwmod *temp_oh;
3008 int ret = 0;
3009
3010 if (!fn)
3011 return -EINVAL;
3012
3013 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3014 ret = (*fn)(temp_oh, data);
3015 if (ret)
3016 break;
3017 }
3018
3019 return ret;
3020}
3021
3022/**
3023 * omap_hwmod_register_links - register an array of hwmod links
3024 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3025 *
3026 * Intended to be called early in boot before the clock framework is
3027 * initialized. If @ois is not null, will register all omap_hwmods
3028 * listed in @ois that are valid for this chip. Returns -EINVAL if
3029 * omap_hwmod_init() hasn't been called before calling this function,
3030 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3031 * success.
3032 */
3033int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3034{
3035 int r, i;
3036
3037 if (!inited)
3038 return -EINVAL;
3039
3040 if (!ois)
3041 return 0;
3042
3043 if (ois[0] == NULL) /* Empty list */
3044 return 0;
3045
3046 i = 0;
3047 do {
3048 r = _register_link(ois[i]);
3049 WARN(r && r != -EEXIST,
3050 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3051 ois[i]->master->name, ois[i]->slave->name, r);
3052 } while (ois[++i]);
3053
3054 return 0;
3055}
3056
3057/**
3058 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3059 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3060 *
3061 * If the hwmod data corresponding to the MPU subsystem IP block
3062 * hasn't been initialized and set up yet, do so now. This must be
3063 * done first since sleep dependencies may be added from other hwmods
3064 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3065 * return value.
3066 */
3067static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3068{
3069 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3070 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3071 __func__, MPU_INITIATOR_NAME);
3072 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3073 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3074}
3075
3076/**
3077 * omap_hwmod_setup_one - set up a single hwmod
3078 * @oh_name: const char * name of the already-registered hwmod to set up
3079 *
3080 * Initialize and set up a single hwmod. Intended to be used for a
3081 * small number of early devices, such as the timer IP blocks used for
3082 * the scheduler clock. Must be called after omap2_clk_init().
3083 * Resolves the struct clk names to struct clk pointers for each
3084 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3085 * -EINVAL upon error or 0 upon success.
3086 */
3087int __init omap_hwmod_setup_one(const char *oh_name)
3088{
3089 struct omap_hwmod *oh;
3090
3091 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3092
3093 oh = _lookup(oh_name);
3094 if (!oh) {
3095 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3096 return -EINVAL;
3097 }
3098
3099 _ensure_mpu_hwmod_is_setup(oh);
3100
3101 _init(oh, NULL);
3102 _setup(oh, NULL);
3103
3104 return 0;
3105}
3106
3107static void omap_hwmod_check_one(struct device *dev,
3108 const char *name, s8 v1, u8 v2)
3109{
3110 if (v1 < 0)
3111 return;
3112
3113 if (v1 != v2)
3114 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3115}
3116
3117/**
3118 * omap_hwmod_check_sysc - check sysc against platform sysc
3119 * @dev: struct device
3120 * @data: module data
3121 * @sysc_fields: new sysc configuration
3122 */
3123static int omap_hwmod_check_sysc(struct device *dev,
3124 const struct ti_sysc_module_data *data,
3125 struct sysc_regbits *sysc_fields)
3126{
3127 const struct sysc_regbits *regbits = data->cap->regbits;
3128
3129 omap_hwmod_check_one(dev, "dmadisable_shift",
3130 regbits->dmadisable_shift,
3131 sysc_fields->dmadisable_shift);
3132 omap_hwmod_check_one(dev, "midle_shift",
3133 regbits->midle_shift,
3134 sysc_fields->midle_shift);
3135 omap_hwmod_check_one(dev, "sidle_shift",
3136 regbits->sidle_shift,
3137 sysc_fields->sidle_shift);
3138 omap_hwmod_check_one(dev, "clkact_shift",
3139 regbits->clkact_shift,
3140 sysc_fields->clkact_shift);
3141 omap_hwmod_check_one(dev, "enwkup_shift",
3142 regbits->enwkup_shift,
3143 sysc_fields->enwkup_shift);
3144 omap_hwmod_check_one(dev, "srst_shift",
3145 regbits->srst_shift,
3146 sysc_fields->srst_shift);
3147 omap_hwmod_check_one(dev, "autoidle_shift",
3148 regbits->autoidle_shift,
3149 sysc_fields->autoidle_shift);
3150
3151 return 0;
3152}
3153
3154/**
3155 * omap_hwmod_init_regbits - init sysconfig specific register bits
3156 * @dev: struct device
3157 * @oh: module
3158 * @data: module data
3159 * @sysc_fields: new sysc configuration
3160 */
3161static int omap_hwmod_init_regbits(struct device *dev, struct omap_hwmod *oh,
3162 const struct ti_sysc_module_data *data,
3163 struct sysc_regbits **sysc_fields)
3164{
3165 switch (data->cap->type) {
3166 case TI_SYSC_OMAP2:
3167 case TI_SYSC_OMAP2_TIMER:
3168 *sysc_fields = &omap_hwmod_sysc_type1;
3169 break;
3170 case TI_SYSC_OMAP3_SHAM:
3171 *sysc_fields = &omap3_sham_sysc_fields;
3172 break;
3173 case TI_SYSC_OMAP3_AES:
3174 *sysc_fields = &omap3xxx_aes_sysc_fields;
3175 break;
3176 case TI_SYSC_OMAP4:
3177 case TI_SYSC_OMAP4_TIMER:
3178 *sysc_fields = &omap_hwmod_sysc_type2;
3179 break;
3180 case TI_SYSC_OMAP4_SIMPLE:
3181 *sysc_fields = &omap_hwmod_sysc_type3;
3182 break;
3183 case TI_SYSC_OMAP34XX_SR:
3184 *sysc_fields = &omap34xx_sr_sysc_fields;
3185 break;
3186 case TI_SYSC_OMAP36XX_SR:
3187 *sysc_fields = &omap36xx_sr_sysc_fields;
3188 break;
3189 case TI_SYSC_OMAP4_SR:
3190 *sysc_fields = &omap36xx_sr_sysc_fields;
3191 break;
3192 case TI_SYSC_OMAP4_MCASP:
3193 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3194 break;
3195 case TI_SYSC_OMAP4_USB_HOST_FS:
3196 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3197 break;
3198 default:
3199 *sysc_fields = NULL;
3200 if (!oh->class->sysc->sysc_fields)
3201 return 0;
3202
3203 dev_err(dev, "sysc_fields not found\n");
3204
3205 return -EINVAL;
3206 }
3207
3208 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3209}
3210
3211/**
3212 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3213 * @dev: struct device
3214 * @data: module data
3215 * @rev_offs: revision register offset
3216 * @sysc_offs: sysc register offset
3217 * @syss_offs: syss register offset
3218 */
3219static int omap_hwmod_init_reg_offs(struct device *dev,
3220 const struct ti_sysc_module_data *data,
3221 s32 *rev_offs, s32 *sysc_offs,
3222 s32 *syss_offs)
3223{
3224 *rev_offs = -ENODEV;
3225 *sysc_offs = 0;
3226 *syss_offs = 0;
3227
3228 if (data->offsets[SYSC_REVISION] >= 0)
3229 *rev_offs = data->offsets[SYSC_REVISION];
3230
3231 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3232 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3233
3234 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3235 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3236
3237 return 0;
3238}
3239
3240/**
3241 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3242 * @dev: struct device
3243 * @data: module data
3244 * @sysc_flags: module configuration
3245 */
3246static int omap_hwmod_init_sysc_flags(struct device *dev,
3247 const struct ti_sysc_module_data *data,
3248 u32 *sysc_flags)
3249{
3250 *sysc_flags = 0;
3251
3252 switch (data->cap->type) {
3253 case TI_SYSC_OMAP2:
3254 case TI_SYSC_OMAP2_TIMER:
3255 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3256 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3257 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3258 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3259 *sysc_flags |= SYSC_HAS_EMUFREE;
3260 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3261 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3262 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3263 *sysc_flags |= SYSC_HAS_SOFTRESET;
3264 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3265 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3266 break;
3267 case TI_SYSC_OMAP4:
3268 case TI_SYSC_OMAP4_TIMER:
3269 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3270 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3271 *sysc_flags |= SYSC_HAS_DMADISABLE;
3272 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3273 *sysc_flags |= SYSC_HAS_EMUFREE;
3274 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3275 *sysc_flags |= SYSC_HAS_SOFTRESET;
3276 break;
3277 case TI_SYSC_OMAP34XX_SR:
3278 case TI_SYSC_OMAP36XX_SR:
3279 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3280 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3281 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3282 break;
3283 default:
3284 if (data->cap->regbits->emufree_shift >= 0)
3285 *sysc_flags |= SYSC_HAS_EMUFREE;
3286 if (data->cap->regbits->enwkup_shift >= 0)
3287 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3288 if (data->cap->regbits->srst_shift >= 0)
3289 *sysc_flags |= SYSC_HAS_SOFTRESET;
3290 if (data->cap->regbits->autoidle_shift >= 0)
3291 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3292 break;
3293 }
3294
3295 if (data->cap->regbits->midle_shift >= 0 &&
3296 data->cfg->midlemodes)
3297 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3298
3299 if (data->cap->regbits->sidle_shift >= 0 &&
3300 data->cfg->sidlemodes)
3301 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3302
3303 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3304 *sysc_flags |= SYSC_NO_CACHE;
3305 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3306 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3307
3308 if (data->cfg->syss_mask & 1)
3309 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3310
3311 return 0;
3312}
3313
3314/**
3315 * omap_hwmod_init_idlemodes - initialize module idle modes
3316 * @dev: struct device
3317 * @data: module data
3318 * @idlemodes: module supported idle modes
3319 */
3320static int omap_hwmod_init_idlemodes(struct device *dev,
3321 const struct ti_sysc_module_data *data,
3322 u32 *idlemodes)
3323{
3324 *idlemodes = 0;
3325
3326 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3327 *idlemodes |= MSTANDBY_FORCE;
3328 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3329 *idlemodes |= MSTANDBY_NO;
3330 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3331 *idlemodes |= MSTANDBY_SMART;
3332 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3333 *idlemodes |= MSTANDBY_SMART_WKUP;
3334
3335 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3336 *idlemodes |= SIDLE_FORCE;
3337 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3338 *idlemodes |= SIDLE_NO;
3339 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3340 *idlemodes |= SIDLE_SMART;
3341 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3342 *idlemodes |= SIDLE_SMART_WKUP;
3343
3344 return 0;
3345}
3346
3347/**
3348 * omap_hwmod_check_module - check new module against platform data
3349 * @dev: struct device
3350 * @oh: module
3351 * @data: new module data
3352 * @sysc_fields: sysc register bits
3353 * @rev_offs: revision register offset
3354 * @sysc_offs: sysconfig register offset
3355 * @syss_offs: sysstatus register offset
3356 * @sysc_flags: sysc specific flags
3357 * @idlemodes: sysc supported idlemodes
3358 */
3359static int omap_hwmod_check_module(struct device *dev,
3360 struct omap_hwmod *oh,
3361 const struct ti_sysc_module_data *data,
3362 struct sysc_regbits *sysc_fields,
3363 s32 rev_offs, s32 sysc_offs,
3364 s32 syss_offs, u32 sysc_flags,
3365 u32 idlemodes)
3366{
3367 if (!oh->class->sysc)
3368 return -ENODEV;
3369
3370 if (oh->class->sysc->sysc_fields &&
3371 sysc_fields != oh->class->sysc->sysc_fields)
3372 dev_warn(dev, "sysc_fields mismatch\n");
3373
3374 if (rev_offs != oh->class->sysc->rev_offs)
3375 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3376 oh->class->sysc->rev_offs);
3377 if (sysc_offs != oh->class->sysc->sysc_offs)
3378 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3379 oh->class->sysc->sysc_offs);
3380 if (syss_offs != oh->class->sysc->syss_offs)
3381 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3382 oh->class->sysc->syss_offs);
3383
3384 if (sysc_flags != oh->class->sysc->sysc_flags)
3385 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3386 oh->class->sysc->sysc_flags);
3387
3388 if (idlemodes != oh->class->sysc->idlemodes)
3389 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3390 oh->class->sysc->idlemodes);
3391
3392 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3393 dev_warn(dev, "srst_udelay %i != %i\n",
3394 data->cfg->srst_udelay,
3395 oh->class->sysc->srst_udelay);
3396
3397 return 0;
3398}
3399
3400/**
3401 * omap_hwmod_allocate_module - allocate new module
3402 * @dev: struct device
3403 * @oh: module
3404 * @sysc_fields: sysc register bits
3405 * @clockdomain: clockdomain
3406 * @rev_offs: revision register offset
3407 * @sysc_offs: sysconfig register offset
3408 * @syss_offs: sysstatus register offset
3409 * @sysc_flags: sysc specific flags
3410 * @idlemodes: sysc supported idlemodes
3411 *
3412 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3413 */
3414static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3415 const struct ti_sysc_module_data *data,
3416 struct sysc_regbits *sysc_fields,
3417 struct clockdomain *clkdm,
3418 s32 rev_offs, s32 sysc_offs,
3419 s32 syss_offs, u32 sysc_flags,
3420 u32 idlemodes)
3421{
3422 struct omap_hwmod_class_sysconfig *sysc;
3423 struct omap_hwmod_class *class = NULL;
3424 struct omap_hwmod_ocp_if *oi = NULL;
3425 void __iomem *regs = NULL;
3426 unsigned long flags;
3427
3428 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3429 if (!sysc)
3430 return -ENOMEM;
3431
3432 sysc->sysc_fields = sysc_fields;
3433 sysc->rev_offs = rev_offs;
3434 sysc->sysc_offs = sysc_offs;
3435 sysc->syss_offs = syss_offs;
3436 sysc->sysc_flags = sysc_flags;
3437 sysc->idlemodes = idlemodes;
3438 sysc->srst_udelay = data->cfg->srst_udelay;
3439
3440 if (!oh->_mpu_rt_va) {
3441 regs = ioremap(data->module_pa,
3442 data->module_size);
3443 if (!regs)
3444 goto out_free_sysc;
3445 }
3446
3447 /*
3448 * We may need a new oh->class as the other devices in the same class
3449 * may not yet have ioremapped their registers.
3450 */
3451 if (oh->class->name && strcmp(oh->class->name, data->name)) {
3452 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3453 if (!class)
3454 goto out_unmap;
3455 }
3456
3457 if (list_empty(&oh->slave_ports)) {
3458 oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
3459 if (!oi)
3460 goto out_free_class;
3461
3462 /*
3463 * Note that we assume interconnect interface clocks will be
3464 * managed by the interconnect driver for OCPIF_SWSUP_IDLE case
3465 * on omap24xx and omap3.
3466 */
3467 oi->slave = oh;
3468 oi->user = OCP_USER_MPU | OCP_USER_SDMA;
3469 }
3470
3471 spin_lock_irqsave(&oh->_lock, flags);
3472 if (regs)
3473 oh->_mpu_rt_va = regs;
3474 if (class)
3475 oh->class = class;
3476 oh->class->sysc = sysc;
3477 if (oi)
3478 _add_link(oi);
3479 if (clkdm)
3480 oh->clkdm = clkdm;
3481 oh->_state = _HWMOD_STATE_INITIALIZED;
3482 oh->_postsetup_state = _HWMOD_STATE_DEFAULT;
3483 _setup(oh, NULL);
3484 spin_unlock_irqrestore(&oh->_lock, flags);
3485
3486 return 0;
3487
3488out_free_class:
3489 kfree(class);
3490out_unmap:
3491 iounmap(regs);
3492out_free_sysc:
3493 kfree(sysc);
3494 return -ENOMEM;
3495}
3496
3497static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
3498 { .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
3499};
3500
3501static const struct omap_hwmod_reset omap_reset_quirks[] = {
3502 { .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
3503 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3504 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3505 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
3506};
3507
3508static void
3509omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh,
3510 const struct ti_sysc_module_data *data,
3511 const struct omap_hwmod_reset *quirks,
3512 int quirks_sz)
3513{
3514 const struct omap_hwmod_reset *quirk;
3515 int i;
3516
3517 for (i = 0; i < quirks_sz; i++) {
3518 quirk = &quirks[i];
3519 if (!strncmp(data->name, quirk->match, quirk->len)) {
3520 oh->class->reset = quirk->reset;
3521
3522 return;
3523 }
3524 }
3525}
3526
3527static void
3528omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh,
3529 const struct ti_sysc_module_data *data)
3530{
3531 if (soc_is_omap24xx())
3532 omap_hwmod_init_reset_quirk(dev, oh, data,
3533 omap24xx_reset_quirks,
3534 ARRAY_SIZE(omap24xx_reset_quirks));
3535
3536 omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks,
3537 ARRAY_SIZE(omap_reset_quirks));
3538}
3539
3540/**
3541 * omap_hwmod_init_module - initialize new module
3542 * @dev: struct device
3543 * @data: module data
3544 * @cookie: cookie for the caller to use for later calls
3545 */
3546int omap_hwmod_init_module(struct device *dev,
3547 const struct ti_sysc_module_data *data,
3548 struct ti_sysc_cookie *cookie)
3549{
3550 struct omap_hwmod *oh;
3551 struct sysc_regbits *sysc_fields;
3552 s32 rev_offs, sysc_offs, syss_offs;
3553 u32 sysc_flags, idlemodes;
3554 int error;
3555
3556 if (!dev || !data || !data->name || !cookie)
3557 return -EINVAL;
3558
3559 oh = _lookup(data->name);
3560 if (!oh) {
3561 oh = kzalloc(sizeof(*oh), GFP_KERNEL);
3562 if (!oh)
3563 return -ENOMEM;
3564
3565 oh->name = data->name;
3566 oh->_state = _HWMOD_STATE_UNKNOWN;
3567 lockdep_register_key(&oh->hwmod_key);
3568
3569 /* Unused, can be handled by PRM driver handling resets */
3570 oh->prcm.omap4.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT;
3571
3572 oh->class = kzalloc(sizeof(*oh->class), GFP_KERNEL);
3573 if (!oh->class) {
3574 kfree(oh);
3575 return -ENOMEM;
3576 }
3577
3578 omap_hwmod_init_reset_quirks(dev, oh, data);
3579
3580 oh->class->name = data->name;
3581 mutex_lock(&list_lock);
3582 error = _register(oh);
3583 mutex_unlock(&list_lock);
3584 }
3585
3586 cookie->data = oh;
3587
3588 error = omap_hwmod_init_regbits(dev, oh, data, &sysc_fields);
3589 if (error)
3590 return error;
3591
3592 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3593 &sysc_offs, &syss_offs);
3594 if (error)
3595 return error;
3596
3597 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3598 if (error)
3599 return error;
3600
3601 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3602 if (error)
3603 return error;
3604
3605 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE)
3606 oh->flags |= HWMOD_NO_IDLE;
3607 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3608 oh->flags |= HWMOD_INIT_NO_IDLE;
3609 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3610 oh->flags |= HWMOD_INIT_NO_RESET;
3611 if (data->cfg->quirks & SYSC_QUIRK_USE_CLOCKACT)
3612 oh->flags |= HWMOD_SET_DEFAULT_CLOCKACT;
3613 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE)
3614 oh->flags |= HWMOD_SWSUP_SIDLE;
3615 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT)
3616 oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
3617 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
3618 oh->flags |= HWMOD_SWSUP_MSTANDBY;
3619 if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO)
3620 oh->flags |= HWMOD_CLKDM_NOAUTO;
3621
3622 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3623 rev_offs, sysc_offs, syss_offs,
3624 sysc_flags, idlemodes);
3625 if (!error)
3626 return error;
3627
3628 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3629 cookie->clkdm, rev_offs,
3630 sysc_offs, syss_offs,
3631 sysc_flags, idlemodes);
3632}
3633
3634/**
3635 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3636 *
3637 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3638 * early concole so that hwmod core doesn't reset and keep it in idle
3639 * that specific uart.
3640 */
3641#ifdef CONFIG_SERIAL_EARLYCON
3642static void __init omap_hwmod_setup_earlycon_flags(void)
3643{
3644 struct device_node *np;
3645 struct omap_hwmod *oh;
3646 const char *uart;
3647
3648 np = of_find_node_by_path("/chosen");
3649 if (np) {
3650 uart = of_get_property(np, "stdout-path", NULL);
3651 if (uart) {
3652 np = of_find_node_by_path(uart);
3653 if (np) {
3654 uart = of_get_property(np, "ti,hwmods", NULL);
3655 oh = omap_hwmod_lookup(uart);
3656 if (!oh) {
3657 uart = of_get_property(np->parent,
3658 "ti,hwmods",
3659 NULL);
3660 oh = omap_hwmod_lookup(uart);
3661 }
3662 if (oh)
3663 oh->flags |= DEBUG_OMAPUART_FLAGS;
3664 }
3665 }
3666 }
3667}
3668#endif
3669
3670/**
3671 * omap_hwmod_setup_all - set up all registered IP blocks
3672 *
3673 * Initialize and set up all IP blocks registered with the hwmod code.
3674 * Must be called after omap2_clk_init(). Resolves the struct clk
3675 * names to struct clk pointers for each registered omap_hwmod. Also
3676 * calls _setup() on each hwmod. Returns 0 upon success.
3677 */
3678static int __init omap_hwmod_setup_all(void)
3679{
3680 if (!inited)
3681 return 0;
3682
3683 _ensure_mpu_hwmod_is_setup(NULL);
3684
3685 omap_hwmod_for_each(_init, NULL);
3686#ifdef CONFIG_SERIAL_EARLYCON
3687 omap_hwmod_setup_earlycon_flags();
3688#endif
3689 omap_hwmod_for_each(_setup, NULL);
3690
3691 return 0;
3692}
3693omap_postcore_initcall(omap_hwmod_setup_all);
3694
3695/**
3696 * omap_hwmod_enable - enable an omap_hwmod
3697 * @oh: struct omap_hwmod *
3698 *
3699 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3700 * Returns -EINVAL on error or passes along the return value from _enable().
3701 */
3702int omap_hwmod_enable(struct omap_hwmod *oh)
3703{
3704 int r;
3705 unsigned long flags;
3706
3707 if (!oh)
3708 return -EINVAL;
3709
3710 spin_lock_irqsave(&oh->_lock, flags);
3711 r = _enable(oh);
3712 spin_unlock_irqrestore(&oh->_lock, flags);
3713
3714 return r;
3715}
3716
3717/**
3718 * omap_hwmod_idle - idle an omap_hwmod
3719 * @oh: struct omap_hwmod *
3720 *
3721 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3722 * Returns -EINVAL on error or passes along the return value from _idle().
3723 */
3724int omap_hwmod_idle(struct omap_hwmod *oh)
3725{
3726 int r;
3727 unsigned long flags;
3728
3729 if (!oh)
3730 return -EINVAL;
3731
3732 spin_lock_irqsave(&oh->_lock, flags);
3733 r = _idle(oh);
3734 spin_unlock_irqrestore(&oh->_lock, flags);
3735
3736 return r;
3737}
3738
3739/**
3740 * omap_hwmod_shutdown - shutdown an omap_hwmod
3741 * @oh: struct omap_hwmod *
3742 *
3743 * Shutdown an omap_hwmod @oh. Intended to be called by
3744 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3745 * the return value from _shutdown().
3746 */
3747int omap_hwmod_shutdown(struct omap_hwmod *oh)
3748{
3749 int r;
3750 unsigned long flags;
3751
3752 if (!oh)
3753 return -EINVAL;
3754
3755 spin_lock_irqsave(&oh->_lock, flags);
3756 r = _shutdown(oh);
3757 spin_unlock_irqrestore(&oh->_lock, flags);
3758
3759 return r;
3760}
3761
3762/*
3763 * IP block data retrieval functions
3764 */
3765
3766/**
3767 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3768 * @oh: struct omap_hwmod *
3769 *
3770 * Return the powerdomain pointer associated with the OMAP module
3771 * @oh's main clock. If @oh does not have a main clk, return the
3772 * powerdomain associated with the interface clock associated with the
3773 * module's MPU port. (XXX Perhaps this should use the SDMA port
3774 * instead?) Returns NULL on error, or a struct powerdomain * on
3775 * success.
3776 */
3777struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3778{
3779 struct clk *c;
3780 struct omap_hwmod_ocp_if *oi;
3781 struct clockdomain *clkdm;
3782 struct clk_hw_omap *clk;
3783 struct clk_hw *hw;
3784
3785 if (!oh)
3786 return NULL;
3787
3788 if (oh->clkdm)
3789 return oh->clkdm->pwrdm.ptr;
3790
3791 if (oh->_clk) {
3792 c = oh->_clk;
3793 } else {
3794 oi = _find_mpu_rt_port(oh);
3795 if (!oi)
3796 return NULL;
3797 c = oi->_clk;
3798 }
3799
3800 hw = __clk_get_hw(c);
3801 if (!hw)
3802 return NULL;
3803
3804 clk = to_clk_hw_omap(hw);
3805 if (!clk)
3806 return NULL;
3807
3808 clkdm = clk->clkdm;
3809 if (!clkdm)
3810 return NULL;
3811
3812 return clkdm->pwrdm.ptr;
3813}
3814
3815/**
3816 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3817 * @oh: struct omap_hwmod *
3818 *
3819 * Returns the virtual address corresponding to the beginning of the
3820 * module's register target, in the address range that is intended to
3821 * be used by the MPU. Returns the virtual address upon success or NULL
3822 * upon error.
3823 */
3824void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3825{
3826 if (!oh)
3827 return NULL;
3828
3829 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3830 return NULL;
3831
3832 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3833 return NULL;
3834
3835 return oh->_mpu_rt_va;
3836}
3837
3838/*
3839 * XXX what about functions for drivers to save/restore ocp_sysconfig
3840 * for context save/restore operations?
3841 */
3842
3843/**
3844 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3845 * contained in the hwmod module.
3846 * @oh: struct omap_hwmod *
3847 * @name: name of the reset line to lookup and assert
3848 *
3849 * Some IP like dsp, ipu or iva contain processor that require
3850 * an HW reset line to be assert / deassert in order to enable fully
3851 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3852 * yet supported on this OMAP; otherwise, passes along the return value
3853 * from _assert_hardreset().
3854 */
3855int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3856{
3857 int ret;
3858 unsigned long flags;
3859
3860 if (!oh)
3861 return -EINVAL;
3862
3863 spin_lock_irqsave(&oh->_lock, flags);
3864 ret = _assert_hardreset(oh, name);
3865 spin_unlock_irqrestore(&oh->_lock, flags);
3866
3867 return ret;
3868}
3869
3870/**
3871 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3872 * contained in the hwmod module.
3873 * @oh: struct omap_hwmod *
3874 * @name: name of the reset line to look up and deassert
3875 *
3876 * Some IP like dsp, ipu or iva contain processor that require
3877 * an HW reset line to be assert / deassert in order to enable fully
3878 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3879 * yet supported on this OMAP; otherwise, passes along the return value
3880 * from _deassert_hardreset().
3881 */
3882int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3883{
3884 int ret;
3885 unsigned long flags;
3886
3887 if (!oh)
3888 return -EINVAL;
3889
3890 spin_lock_irqsave(&oh->_lock, flags);
3891 ret = _deassert_hardreset(oh, name);
3892 spin_unlock_irqrestore(&oh->_lock, flags);
3893
3894 return ret;
3895}
3896
3897/**
3898 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3899 * @classname: struct omap_hwmod_class name to search for
3900 * @fn: callback function pointer to call for each hwmod in class @classname
3901 * @user: arbitrary context data to pass to the callback function
3902 *
3903 * For each omap_hwmod of class @classname, call @fn.
3904 * If the callback function returns something other than
3905 * zero, the iterator is terminated, and the callback function's return
3906 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3907 * if @classname or @fn are NULL, or passes back the error code from @fn.
3908 */
3909int omap_hwmod_for_each_by_class(const char *classname,
3910 int (*fn)(struct omap_hwmod *oh,
3911 void *user),
3912 void *user)
3913{
3914 struct omap_hwmod *temp_oh;
3915 int ret = 0;
3916
3917 if (!classname || !fn)
3918 return -EINVAL;
3919
3920 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3921 __func__, classname);
3922
3923 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3924 if (!strcmp(temp_oh->class->name, classname)) {
3925 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3926 __func__, temp_oh->name);
3927 ret = (*fn)(temp_oh, user);
3928 if (ret)
3929 break;
3930 }
3931 }
3932
3933 if (ret)
3934 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3935 __func__, ret);
3936
3937 return ret;
3938}
3939
3940/**
3941 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3942 * @oh: struct omap_hwmod *
3943 * @state: state that _setup() should leave the hwmod in
3944 *
3945 * Sets the hwmod state that @oh will enter at the end of _setup()
3946 * (called by omap_hwmod_setup_*()). See also the documentation
3947 * for _setup_postsetup(), above. Returns 0 upon success or
3948 * -EINVAL if there is a problem with the arguments or if the hwmod is
3949 * in the wrong state.
3950 */
3951int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3952{
3953 int ret;
3954 unsigned long flags;
3955
3956 if (!oh)
3957 return -EINVAL;
3958
3959 if (state != _HWMOD_STATE_DISABLED &&
3960 state != _HWMOD_STATE_ENABLED &&
3961 state != _HWMOD_STATE_IDLE)
3962 return -EINVAL;
3963
3964 spin_lock_irqsave(&oh->_lock, flags);
3965
3966 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3967 ret = -EINVAL;
3968 goto ohsps_unlock;
3969 }
3970
3971 oh->_postsetup_state = state;
3972 ret = 0;
3973
3974ohsps_unlock:
3975 spin_unlock_irqrestore(&oh->_lock, flags);
3976
3977 return ret;
3978}
3979
3980/**
3981 * omap_hwmod_get_context_loss_count - get lost context count
3982 * @oh: struct omap_hwmod *
3983 *
3984 * Returns the context loss count of associated @oh
3985 * upon success, or zero if no context loss data is available.
3986 *
3987 * On OMAP4, this queries the per-hwmod context loss register,
3988 * assuming one exists. If not, or on OMAP2/3, this queries the
3989 * enclosing powerdomain context loss count.
3990 */
3991int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3992{
3993 struct powerdomain *pwrdm;
3994 int ret = 0;
3995
3996 if (soc_ops.get_context_lost)
3997 return soc_ops.get_context_lost(oh);
3998
3999 pwrdm = omap_hwmod_get_pwrdm(oh);
4000 if (pwrdm)
4001 ret = pwrdm_get_context_loss_count(pwrdm);
4002
4003 return ret;
4004}
4005
4006/**
4007 * omap_hwmod_init - initialize the hwmod code
4008 *
4009 * Sets up some function pointers needed by the hwmod code to operate on the
4010 * currently-booted SoC. Intended to be called once during kernel init
4011 * before any hwmods are registered. No return value.
4012 */
4013void __init omap_hwmod_init(void)
4014{
4015 if (cpu_is_omap24xx()) {
4016 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4017 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4018 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4019 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4020 } else if (cpu_is_omap34xx()) {
4021 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4022 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4023 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4024 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4025 soc_ops.init_clkdm = _init_clkdm;
4026 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4027 soc_ops.enable_module = _omap4_enable_module;
4028 soc_ops.disable_module = _omap4_disable_module;
4029 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4030 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4031 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4032 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4033 soc_ops.init_clkdm = _init_clkdm;
4034 soc_ops.update_context_lost = _omap4_update_context_lost;
4035 soc_ops.get_context_lost = _omap4_get_context_lost;
4036 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4037 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4038 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
4039 soc_is_am43xx()) {
4040 soc_ops.enable_module = _omap4_enable_module;
4041 soc_ops.disable_module = _omap4_disable_module;
4042 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4043 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4044 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4045 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4046 soc_ops.init_clkdm = _init_clkdm;
4047 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4048 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4049 } else {
4050 WARN(1, "omap_hwmod: unknown SoC type\n");
4051 }
4052
4053 _init_clkctrl_providers();
4054
4055 inited = true;
4056}
4057
4058/**
4059 * omap_hwmod_get_main_clk - get pointer to main clock name
4060 * @oh: struct omap_hwmod *
4061 *
4062 * Returns the main clock name assocated with @oh upon success,
4063 * or NULL if @oh is NULL.
4064 */
4065const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4066{
4067 if (!oh)
4068 return NULL;
4069
4070 return oh->main_clk;
4071}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * omap_hwmod implementation for OMAP2/3/4
4 *
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
7 *
8 * Paul Walmsley, Benoît Cousson, Kevin Hilman
9 *
10 * Created in collaboration with (alphabetical order): Thara Gopinath,
11 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
12 * Sawant, Santosh Shilimkar, Richard Woodruff
13 *
14 * Introduction
15 * ------------
16 * One way to view an OMAP SoC is as a collection of largely unrelated
17 * IP blocks connected by interconnects. The IP blocks include
18 * devices such as ARM processors, audio serial interfaces, UARTs,
19 * etc. Some of these devices, like the DSP, are created by TI;
20 * others, like the SGX, largely originate from external vendors. In
21 * TI's documentation, on-chip devices are referred to as "OMAP
22 * modules." Some of these IP blocks are identical across several
23 * OMAP versions. Others are revised frequently.
24 *
25 * These OMAP modules are tied together by various interconnects.
26 * Most of the address and data flow between modules is via OCP-based
27 * interconnects such as the L3 and L4 buses; but there are other
28 * interconnects that distribute the hardware clock tree, handle idle
29 * and reset signaling, supply power, and connect the modules to
30 * various pads or balls on the OMAP package.
31 *
32 * OMAP hwmod provides a consistent way to describe the on-chip
33 * hardware blocks and their integration into the rest of the chip.
34 * This description can be automatically generated from the TI
35 * hardware database. OMAP hwmod provides a standard, consistent API
36 * to reset, enable, idle, and disable these hardware blocks. And
37 * hwmod provides a way for other core code, such as the Linux device
38 * code or the OMAP power management and address space mapping code,
39 * to query the hardware database.
40 *
41 * Using hwmod
42 * -----------
43 * Drivers won't call hwmod functions directly. That is done by the
44 * omap_device code, and in rare occasions, by custom integration code
45 * in arch/arm/ *omap*. The omap_device code includes functions to
46 * build a struct platform_device using omap_hwmod data, and that is
47 * currently how hwmod data is communicated to drivers and to the
48 * Linux driver model. Most drivers will call omap_hwmod functions only
49 * indirectly, via pm_runtime*() functions.
50 *
51 * From a layering perspective, here is where the OMAP hwmod code
52 * fits into the kernel software stack:
53 *
54 * +-------------------------------+
55 * | Device driver code |
56 * | (e.g., drivers/) |
57 * +-------------------------------+
58 * | Linux driver model |
59 * | (platform_device / |
60 * | platform_driver data/code) |
61 * +-------------------------------+
62 * | OMAP core-driver integration |
63 * |(arch/arm/mach-omap2/devices.c)|
64 * +-------------------------------+
65 * | omap_device code |
66 * | (../plat-omap/omap_device.c) |
67 * +-------------------------------+
68 * ----> | omap_hwmod code/data | <-----
69 * | (../mach-omap2/omap_hwmod*) |
70 * +-------------------------------+
71 * | OMAP clock/PRCM/register fns |
72 * | ({read,write}l_relaxed, clk*) |
73 * +-------------------------------+
74 *
75 * Device drivers should not contain any OMAP-specific code or data in
76 * them. They should only contain code to operate the IP block that
77 * the driver is responsible for. This is because these IP blocks can
78 * also appear in other SoCs, either from TI (such as DaVinci) or from
79 * other manufacturers; and drivers should be reusable across other
80 * platforms.
81 *
82 * The OMAP hwmod code also will attempt to reset and idle all on-chip
83 * devices upon boot. The goal here is for the kernel to be
84 * completely self-reliant and independent from bootloaders. This is
85 * to ensure a repeatable configuration, both to ensure consistent
86 * runtime behavior, and to make it easier for others to reproduce
87 * bugs.
88 *
89 * OMAP module activity states
90 * ---------------------------
91 * The hwmod code considers modules to be in one of several activity
92 * states. IP blocks start out in an UNKNOWN state, then once they
93 * are registered via the hwmod code, proceed to the REGISTERED state.
94 * Once their clock names are resolved to clock pointers, the module
95 * enters the CLKS_INITED state; and finally, once the module has been
96 * reset and the integration registers programmed, the INITIALIZED state
97 * is entered. The hwmod code will then place the module into either
98 * the IDLE state to save power, or in the case of a critical system
99 * module, the ENABLED state.
100 *
101 * OMAP core integration code can then call omap_hwmod*() functions
102 * directly to move the module between the IDLE, ENABLED, and DISABLED
103 * states, as needed. This is done during both the PM idle loop, and
104 * in the OMAP core integration code's implementation of the PM runtime
105 * functions.
106 *
107 * References
108 * ----------
109 * This is a partial list.
110 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
111 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
112 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
113 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
114 * - Open Core Protocol Specification 2.2
115 *
116 * To do:
117 * - handle IO mapping
118 * - bus throughput & module latency measurement code
119 *
120 * XXX add tests at the beginning of each function to ensure the hwmod is
121 * in the appropriate state
122 * XXX error return values should be checked to ensure that they are
123 * appropriate
124 */
125#undef DEBUG
126
127#include <linux/kernel.h>
128#include <linux/errno.h>
129#include <linux/io.h>
130#include <linux/clk.h>
131#include <linux/clk-provider.h>
132#include <linux/delay.h>
133#include <linux/err.h>
134#include <linux/list.h>
135#include <linux/mutex.h>
136#include <linux/spinlock.h>
137#include <linux/slab.h>
138#include <linux/cpu.h>
139#include <linux/of.h>
140#include <linux/of_address.h>
141#include <linux/memblock.h>
142
143#include <linux/platform_data/ti-sysc.h>
144
145#include <dt-bindings/bus/ti-sysc.h>
146
147#include <asm/system_misc.h>
148
149#include "clock.h"
150#include "omap_hwmod.h"
151
152#include "soc.h"
153#include "common.h"
154#include "clockdomain.h"
155#include "hdq1w.h"
156#include "mmc.h"
157#include "powerdomain.h"
158#include "cm2xxx.h"
159#include "cm3xxx.h"
160#include "cm33xx.h"
161#include "prm.h"
162#include "prm3xxx.h"
163#include "prm44xx.h"
164#include "prm33xx.h"
165#include "prminst44xx.h"
166#include "pm.h"
167#include "wd_timer.h"
168
169/* Name of the OMAP hwmod for the MPU */
170#define MPU_INITIATOR_NAME "mpu"
171
172/*
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
175 */
176#define LINKS_PER_OCP_IF 2
177
178/*
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
181 */
182#define OMAP4_RST_CTRL_ST_OFFSET 4
183
184/*
185 * Maximum length for module clock handle names
186 */
187#define MOD_CLK_MAX_NAME_LEN 32
188
189/**
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @num_addrs: number of base address ranges for the provider
192 * @addr: base address(es) for the provider
193 * @size: size(s) of the provider address space(s)
194 * @node: device node associated with the provider
195 * @link: list link
196 */
197struct clkctrl_provider {
198 int num_addrs;
199 u32 *addr;
200 u32 *size;
201 struct device_node *node;
202 struct list_head link;
203};
204
205static LIST_HEAD(clkctrl_providers);
206
207/**
208 * struct omap_hwmod_reset - IP specific reset functions
209 * @match: string to match against the module name
210 * @len: number of characters to match
211 * @reset: IP specific reset function
212 *
213 * Used only in cases where struct omap_hwmod is dynamically allocated.
214 */
215struct omap_hwmod_reset {
216 const char *match;
217 int len;
218 int (*reset)(struct omap_hwmod *oh);
219};
220
221/**
222 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
223 * @enable_module: function to enable a module (via MODULEMODE)
224 * @disable_module: function to disable a module (via MODULEMODE)
225 *
226 * XXX Eventually this functionality will be hidden inside the PRM/CM
227 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
228 * conditionals in this code.
229 */
230struct omap_hwmod_soc_ops {
231 void (*enable_module)(struct omap_hwmod *oh);
232 int (*disable_module)(struct omap_hwmod *oh);
233 int (*wait_target_ready)(struct omap_hwmod *oh);
234 int (*assert_hardreset)(struct omap_hwmod *oh,
235 struct omap_hwmod_rst_info *ohri);
236 int (*deassert_hardreset)(struct omap_hwmod *oh,
237 struct omap_hwmod_rst_info *ohri);
238 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
239 struct omap_hwmod_rst_info *ohri);
240 int (*init_clkdm)(struct omap_hwmod *oh);
241 void (*update_context_lost)(struct omap_hwmod *oh);
242 int (*get_context_lost)(struct omap_hwmod *oh);
243 int (*disable_direct_prcm)(struct omap_hwmod *oh);
244 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
245};
246
247/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
248static struct omap_hwmod_soc_ops soc_ops;
249
250/* omap_hwmod_list contains all registered struct omap_hwmods */
251static LIST_HEAD(omap_hwmod_list);
252static DEFINE_MUTEX(list_lock);
253
254/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
255static struct omap_hwmod *mpu_oh;
256
257/* inited: set to true once the hwmod code is initialized */
258static bool inited;
259
260/* Private functions */
261
262/**
263 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
264 * @oh: struct omap_hwmod *
265 *
266 * Load the current value of the hwmod OCP_SYSCONFIG register into the
267 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
268 * OCP_SYSCONFIG register or 0 upon success.
269 */
270static int _update_sysc_cache(struct omap_hwmod *oh)
271{
272 if (!oh->class->sysc) {
273 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
274 return -EINVAL;
275 }
276
277 /* XXX ensure module interface clock is up */
278
279 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
280
281 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
282 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
283
284 return 0;
285}
286
287/**
288 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
289 * @v: OCP_SYSCONFIG value to write
290 * @oh: struct omap_hwmod *
291 *
292 * Write @v into the module class' OCP_SYSCONFIG register, if it has
293 * one. No return value.
294 */
295static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
296{
297 if (!oh->class->sysc) {
298 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
299 return;
300 }
301
302 /* XXX ensure module interface clock is up */
303
304 /* Module might have lost context, always update cache and register */
305 oh->_sysc_cache = v;
306
307 /*
308 * Some IP blocks (such as RTC) require unlocking of IP before
309 * accessing its registers. If a function pointer is present
310 * to unlock, then call it before accessing sysconfig and
311 * call lock after writing sysconfig.
312 */
313 if (oh->class->unlock)
314 oh->class->unlock(oh);
315
316 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
317
318 if (oh->class->lock)
319 oh->class->lock(oh);
320}
321
322/**
323 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
324 * @oh: struct omap_hwmod *
325 * @standbymode: MIDLEMODE field bits
326 * @v: pointer to register contents to modify
327 *
328 * Update the master standby mode bits in @v to be @standbymode for
329 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
330 * upon error or 0 upon success.
331 */
332static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
333 u32 *v)
334{
335 u32 mstandby_mask;
336 u8 mstandby_shift;
337
338 if (!oh->class->sysc ||
339 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
340 return -EINVAL;
341
342 if (!oh->class->sysc->sysc_fields) {
343 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
344 return -EINVAL;
345 }
346
347 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
348 mstandby_mask = (0x3 << mstandby_shift);
349
350 *v &= ~mstandby_mask;
351 *v |= __ffs(standbymode) << mstandby_shift;
352
353 return 0;
354}
355
356/**
357 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
358 * @oh: struct omap_hwmod *
359 * @idlemode: SIDLEMODE field bits
360 * @v: pointer to register contents to modify
361 *
362 * Update the slave idle mode bits in @v to be @idlemode for the @oh
363 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
364 * or 0 upon success.
365 */
366static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
367{
368 u32 sidle_mask;
369 u8 sidle_shift;
370
371 if (!oh->class->sysc ||
372 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
373 return -EINVAL;
374
375 if (!oh->class->sysc->sysc_fields) {
376 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
377 return -EINVAL;
378 }
379
380 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
381 sidle_mask = (0x3 << sidle_shift);
382
383 *v &= ~sidle_mask;
384 *v |= __ffs(idlemode) << sidle_shift;
385
386 return 0;
387}
388
389/**
390 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
391 * @oh: struct omap_hwmod *
392 * @clockact: CLOCKACTIVITY field bits
393 * @v: pointer to register contents to modify
394 *
395 * Update the clockactivity mode bits in @v to be @clockact for the
396 * @oh hwmod. Used for additional powersaving on some modules. Does
397 * not write to the hardware. Returns -EINVAL upon error or 0 upon
398 * success.
399 */
400static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
401{
402 u32 clkact_mask;
403 u8 clkact_shift;
404
405 if (!oh->class->sysc ||
406 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
407 return -EINVAL;
408
409 if (!oh->class->sysc->sysc_fields) {
410 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
411 return -EINVAL;
412 }
413
414 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
415 clkact_mask = (0x3 << clkact_shift);
416
417 *v &= ~clkact_mask;
418 *v |= clockact << clkact_shift;
419
420 return 0;
421}
422
423/**
424 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
425 * @oh: struct omap_hwmod *
426 * @v: pointer to register contents to modify
427 *
428 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
429 * error or 0 upon success.
430 */
431static int _set_softreset(struct omap_hwmod *oh, u32 *v)
432{
433 u32 softrst_mask;
434
435 if (!oh->class->sysc ||
436 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
437 return -EINVAL;
438
439 if (!oh->class->sysc->sysc_fields) {
440 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
441 return -EINVAL;
442 }
443
444 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
445
446 *v |= softrst_mask;
447
448 return 0;
449}
450
451/**
452 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
453 * @oh: struct omap_hwmod *
454 * @v: pointer to register contents to modify
455 *
456 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
457 * error or 0 upon success.
458 */
459static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
460{
461 u32 softrst_mask;
462
463 if (!oh->class->sysc ||
464 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
465 return -EINVAL;
466
467 if (!oh->class->sysc->sysc_fields) {
468 WARN(1,
469 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
470 oh->name);
471 return -EINVAL;
472 }
473
474 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
475
476 *v &= ~softrst_mask;
477
478 return 0;
479}
480
481/**
482 * _wait_softreset_complete - wait for an OCP softreset to complete
483 * @oh: struct omap_hwmod * to wait on
484 *
485 * Wait until the IP block represented by @oh reports that its OCP
486 * softreset is complete. This can be triggered by software (see
487 * _ocp_softreset()) or by hardware upon returning from off-mode (one
488 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
489 * microseconds. Returns the number of microseconds waited.
490 */
491static int _wait_softreset_complete(struct omap_hwmod *oh)
492{
493 struct omap_hwmod_class_sysconfig *sysc;
494 u32 softrst_mask;
495 int c = 0;
496
497 sysc = oh->class->sysc;
498
499 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
500 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
501 & SYSS_RESETDONE_MASK),
502 MAX_MODULE_SOFTRESET_WAIT, c);
503 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
504 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
505 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
506 & softrst_mask),
507 MAX_MODULE_SOFTRESET_WAIT, c);
508 }
509
510 return c;
511}
512
513/**
514 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
515 * @oh: struct omap_hwmod *
516 *
517 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
518 * of some modules. When the DMA must perform read/write accesses, the
519 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
520 * for power management, software must set the DMADISABLE bit back to 1.
521 *
522 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
523 * error or 0 upon success.
524 */
525static int _set_dmadisable(struct omap_hwmod *oh)
526{
527 u32 v;
528 u32 dmadisable_mask;
529
530 if (!oh->class->sysc ||
531 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
532 return -EINVAL;
533
534 if (!oh->class->sysc->sysc_fields) {
535 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
536 return -EINVAL;
537 }
538
539 /* clocks must be on for this operation */
540 if (oh->_state != _HWMOD_STATE_ENABLED) {
541 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
542 return -EINVAL;
543 }
544
545 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
546
547 v = oh->_sysc_cache;
548 dmadisable_mask =
549 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
550 v |= dmadisable_mask;
551 _write_sysconfig(v, oh);
552
553 return 0;
554}
555
556/**
557 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
558 * @oh: struct omap_hwmod *
559 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
560 * @v: pointer to register contents to modify
561 *
562 * Update the module autoidle bit in @v to be @autoidle for the @oh
563 * hwmod. The autoidle bit controls whether the module can gate
564 * internal clocks automatically when it isn't doing anything; the
565 * exact function of this bit varies on a per-module basis. This
566 * function does not write to the hardware. Returns -EINVAL upon
567 * error or 0 upon success.
568 */
569static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
570 u32 *v)
571{
572 u32 autoidle_mask;
573 u8 autoidle_shift;
574
575 if (!oh->class->sysc ||
576 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
577 return -EINVAL;
578
579 if (!oh->class->sysc->sysc_fields) {
580 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
581 return -EINVAL;
582 }
583
584 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
585 autoidle_mask = (0x1 << autoidle_shift);
586
587 *v &= ~autoidle_mask;
588 *v |= autoidle << autoidle_shift;
589
590 return 0;
591}
592
593/**
594 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
595 * @oh: struct omap_hwmod *
596 *
597 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
598 * upon error or 0 upon success.
599 */
600static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
601{
602 if (!oh->class->sysc ||
603 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
604 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
605 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
606 return -EINVAL;
607
608 if (!oh->class->sysc->sysc_fields) {
609 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
610 return -EINVAL;
611 }
612
613 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
614 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
615
616 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
617 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
618 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
619 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
620
621 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
622
623 return 0;
624}
625
626static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
627{
628 struct clk_hw_omap *clk;
629
630 if (!oh)
631 return NULL;
632
633 if (oh->clkdm) {
634 return oh->clkdm;
635 } else if (oh->_clk) {
636 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
637 return NULL;
638 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
639 return clk->clkdm;
640 }
641 return NULL;
642}
643
644/**
645 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
646 * @oh: struct omap_hwmod *
647 *
648 * Prevent the hardware module @oh from entering idle while the
649 * hardare module initiator @init_oh is active. Useful when a module
650 * will be accessed by a particular initiator (e.g., if a module will
651 * be accessed by the IVA, there should be a sleepdep between the IVA
652 * initiator and the module). Only applies to modules in smart-idle
653 * mode. If the clockdomain is marked as not needing autodeps, return
654 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
655 * passes along clkdm_add_sleepdep() value upon success.
656 */
657static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
658{
659 struct clockdomain *clkdm, *init_clkdm;
660
661 clkdm = _get_clkdm(oh);
662 init_clkdm = _get_clkdm(init_oh);
663
664 if (!clkdm || !init_clkdm)
665 return -EINVAL;
666
667 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
668 return 0;
669
670 return clkdm_add_sleepdep(clkdm, init_clkdm);
671}
672
673/**
674 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
675 * @oh: struct omap_hwmod *
676 *
677 * Allow the hardware module @oh to enter idle while the hardare
678 * module initiator @init_oh is active. Useful when a module will not
679 * be accessed by a particular initiator (e.g., if a module will not
680 * be accessed by the IVA, there should be no sleepdep between the IVA
681 * initiator and the module). Only applies to modules in smart-idle
682 * mode. If the clockdomain is marked as not needing autodeps, return
683 * 0 without doing anything. Returns -EINVAL upon error or passes
684 * along clkdm_del_sleepdep() value upon success.
685 */
686static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
687{
688 struct clockdomain *clkdm, *init_clkdm;
689
690 clkdm = _get_clkdm(oh);
691 init_clkdm = _get_clkdm(init_oh);
692
693 if (!clkdm || !init_clkdm)
694 return -EINVAL;
695
696 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
697 return 0;
698
699 return clkdm_del_sleepdep(clkdm, init_clkdm);
700}
701
702static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
703 { .compatible = "ti,clkctrl" },
704 { }
705};
706
707static int __init _setup_clkctrl_provider(struct device_node *np)
708{
709 const __be32 *addrp;
710 struct clkctrl_provider *provider;
711 u64 size;
712 int i;
713
714 provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
715 if (!provider)
716 return -ENOMEM;
717
718 provider->node = np;
719
720 provider->num_addrs =
721 of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
722
723 provider->addr =
724 memblock_alloc(sizeof(void *) * provider->num_addrs,
725 SMP_CACHE_BYTES);
726 if (!provider->addr)
727 return -ENOMEM;
728
729 provider->size =
730 memblock_alloc(sizeof(u32) * provider->num_addrs,
731 SMP_CACHE_BYTES);
732 if (!provider->size)
733 return -ENOMEM;
734
735 for (i = 0; i < provider->num_addrs; i++) {
736 addrp = of_get_address(np, i, &size, NULL);
737 provider->addr[i] = (u32)of_translate_address(np, addrp);
738 provider->size[i] = size;
739 pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
740 provider->addr[i] + provider->size[i]);
741 }
742
743 list_add(&provider->link, &clkctrl_providers);
744
745 return 0;
746}
747
748static int __init _init_clkctrl_providers(void)
749{
750 struct device_node *np;
751 int ret = 0;
752
753 for_each_matching_node(np, ti_clkctrl_match_table) {
754 ret = _setup_clkctrl_provider(np);
755 if (ret)
756 break;
757 }
758
759 return ret;
760}
761
762static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
763{
764 if (!oh->prcm.omap4.modulemode)
765 return 0;
766
767 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
768 oh->clkdm->cm_inst,
769 oh->prcm.omap4.clkctrl_offs);
770}
771
772static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
773{
774 struct clkctrl_provider *provider;
775 struct clk *clk;
776 u32 addr;
777
778 if (!soc_ops.xlate_clkctrl)
779 return NULL;
780
781 addr = soc_ops.xlate_clkctrl(oh);
782 if (!addr)
783 return NULL;
784
785 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
786
787 list_for_each_entry(provider, &clkctrl_providers, link) {
788 int i;
789
790 for (i = 0; i < provider->num_addrs; i++) {
791 if (provider->addr[i] <= addr &&
792 provider->addr[i] + provider->size[i] > addr) {
793 struct of_phandle_args clkspec;
794
795 clkspec.np = provider->node;
796 clkspec.args_count = 2;
797 clkspec.args[0] = addr - provider->addr[0];
798 clkspec.args[1] = 0;
799
800 clk = of_clk_get_from_provider(&clkspec);
801
802 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
803 __func__, oh->name, clk,
804 clkspec.args[0], provider->node);
805
806 return clk;
807 }
808 }
809 }
810
811 return NULL;
812}
813
814/**
815 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
816 * @oh: struct omap_hwmod *
817 *
818 * Called from _init_clocks(). Populates the @oh _clk (main
819 * functional clock pointer) if a clock matching the hwmod name is found,
820 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
821 */
822static int _init_main_clk(struct omap_hwmod *oh)
823{
824 int ret = 0;
825 struct clk *clk = NULL;
826
827 clk = _lookup_clkctrl_clk(oh);
828
829 if (!IS_ERR_OR_NULL(clk)) {
830 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
831 __clk_get_name(clk), oh->name);
832 oh->main_clk = __clk_get_name(clk);
833 oh->_clk = clk;
834 soc_ops.disable_direct_prcm(oh);
835 } else {
836 if (!oh->main_clk)
837 return 0;
838
839 oh->_clk = clk_get(NULL, oh->main_clk);
840 }
841
842 if (IS_ERR(oh->_clk)) {
843 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
844 oh->name, oh->main_clk);
845 return -EINVAL;
846 }
847 /*
848 * HACK: This needs a re-visit once clk_prepare() is implemented
849 * to do something meaningful. Today its just a no-op.
850 * If clk_prepare() is used at some point to do things like
851 * voltage scaling etc, then this would have to be moved to
852 * some point where subsystems like i2c and pmic become
853 * available.
854 */
855 clk_prepare(oh->_clk);
856
857 if (!_get_clkdm(oh))
858 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
859 oh->name, oh->main_clk);
860
861 return ret;
862}
863
864/**
865 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
866 * @oh: struct omap_hwmod *
867 *
868 * Called from _init_clocks(). Populates the @oh OCP slave interface
869 * clock pointers. Returns 0 on success or -EINVAL on error.
870 */
871static int _init_interface_clks(struct omap_hwmod *oh)
872{
873 struct omap_hwmod_ocp_if *os;
874 struct clk *c;
875 int ret = 0;
876
877 list_for_each_entry(os, &oh->slave_ports, node) {
878 if (!os->clk)
879 continue;
880
881 c = clk_get(NULL, os->clk);
882 if (IS_ERR(c)) {
883 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
884 oh->name, os->clk);
885 ret = -EINVAL;
886 continue;
887 }
888 os->_clk = c;
889 /*
890 * HACK: This needs a re-visit once clk_prepare() is implemented
891 * to do something meaningful. Today its just a no-op.
892 * If clk_prepare() is used at some point to do things like
893 * voltage scaling etc, then this would have to be moved to
894 * some point where subsystems like i2c and pmic become
895 * available.
896 */
897 clk_prepare(os->_clk);
898 }
899
900 return ret;
901}
902
903/**
904 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
905 * @oh: struct omap_hwmod *
906 *
907 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
908 * clock pointers. Returns 0 on success or -EINVAL on error.
909 */
910static int _init_opt_clks(struct omap_hwmod *oh)
911{
912 struct omap_hwmod_opt_clk *oc;
913 struct clk *c;
914 int i;
915 int ret = 0;
916
917 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
918 c = clk_get(NULL, oc->clk);
919 if (IS_ERR(c)) {
920 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
921 oh->name, oc->clk);
922 ret = -EINVAL;
923 continue;
924 }
925 oc->_clk = c;
926 /*
927 * HACK: This needs a re-visit once clk_prepare() is implemented
928 * to do something meaningful. Today its just a no-op.
929 * If clk_prepare() is used at some point to do things like
930 * voltage scaling etc, then this would have to be moved to
931 * some point where subsystems like i2c and pmic become
932 * available.
933 */
934 clk_prepare(oc->_clk);
935 }
936
937 return ret;
938}
939
940static void _enable_optional_clocks(struct omap_hwmod *oh)
941{
942 struct omap_hwmod_opt_clk *oc;
943 int i;
944
945 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
946
947 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
948 if (oc->_clk) {
949 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
950 __clk_get_name(oc->_clk));
951 clk_enable(oc->_clk);
952 }
953}
954
955static void _disable_optional_clocks(struct omap_hwmod *oh)
956{
957 struct omap_hwmod_opt_clk *oc;
958 int i;
959
960 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
961
962 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
963 if (oc->_clk) {
964 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
965 __clk_get_name(oc->_clk));
966 clk_disable(oc->_clk);
967 }
968}
969
970/**
971 * _enable_clocks - enable hwmod main clock and interface clocks
972 * @oh: struct omap_hwmod *
973 *
974 * Enables all clocks necessary for register reads and writes to succeed
975 * on the hwmod @oh. Returns 0.
976 */
977static int _enable_clocks(struct omap_hwmod *oh)
978{
979 struct omap_hwmod_ocp_if *os;
980
981 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
982
983 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
984 _enable_optional_clocks(oh);
985
986 if (oh->_clk)
987 clk_enable(oh->_clk);
988
989 list_for_each_entry(os, &oh->slave_ports, node) {
990 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
991 omap2_clk_deny_idle(os->_clk);
992 clk_enable(os->_clk);
993 }
994 }
995
996 /* The opt clocks are controlled by the device driver. */
997
998 return 0;
999}
1000
1001/**
1002 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1003 * @oh: struct omap_hwmod *
1004 */
1005static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1006{
1007 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1008 return true;
1009
1010 return false;
1011}
1012
1013/**
1014 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1015 * @oh: struct omap_hwmod *
1016 */
1017static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1018{
1019 if (oh->prcm.omap4.clkctrl_offs)
1020 return true;
1021
1022 if (!oh->prcm.omap4.clkctrl_offs &&
1023 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1024 return true;
1025
1026 return false;
1027}
1028
1029/**
1030 * _disable_clocks - disable hwmod main clock and interface clocks
1031 * @oh: struct omap_hwmod *
1032 *
1033 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1034 */
1035static int _disable_clocks(struct omap_hwmod *oh)
1036{
1037 struct omap_hwmod_ocp_if *os;
1038
1039 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1040
1041 if (oh->_clk)
1042 clk_disable(oh->_clk);
1043
1044 list_for_each_entry(os, &oh->slave_ports, node) {
1045 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1046 clk_disable(os->_clk);
1047 omap2_clk_allow_idle(os->_clk);
1048 }
1049 }
1050
1051 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1052 _disable_optional_clocks(oh);
1053
1054 /* The opt clocks are controlled by the device driver. */
1055
1056 return 0;
1057}
1058
1059/**
1060 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1061 * @oh: struct omap_hwmod *
1062 *
1063 * Enables the PRCM module mode related to the hwmod @oh.
1064 * No return value.
1065 */
1066static void _omap4_enable_module(struct omap_hwmod *oh)
1067{
1068 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1069 _omap4_clkctrl_managed_by_clkfwk(oh))
1070 return;
1071
1072 pr_debug("omap_hwmod: %s: %s: %d\n",
1073 oh->name, __func__, oh->prcm.omap4.modulemode);
1074
1075 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1076 oh->clkdm->prcm_partition,
1077 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1078}
1079
1080/**
1081 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1082 * @oh: struct omap_hwmod *
1083 *
1084 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1085 * does not have an IDLEST bit or if the module successfully enters
1086 * slave idle; otherwise, pass along the return value of the
1087 * appropriate *_cm*_wait_module_idle() function.
1088 */
1089static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1090{
1091 if (!oh)
1092 return -EINVAL;
1093
1094 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1095 return 0;
1096
1097 if (oh->flags & HWMOD_NO_IDLEST)
1098 return 0;
1099
1100 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1101 return 0;
1102
1103 if (!_omap4_has_clkctrl_clock(oh))
1104 return 0;
1105
1106 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1107 oh->clkdm->cm_inst,
1108 oh->prcm.omap4.clkctrl_offs, 0);
1109}
1110
1111/**
1112 * _save_mpu_port_index - find and save the index to @oh's MPU port
1113 * @oh: struct omap_hwmod *
1114 *
1115 * Determines the array index of the OCP slave port that the MPU uses
1116 * to address the device, and saves it into the struct omap_hwmod.
1117 * Intended to be called during hwmod registration only. No return
1118 * value.
1119 */
1120static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1121{
1122 struct omap_hwmod_ocp_if *os = NULL;
1123
1124 if (!oh)
1125 return;
1126
1127 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1128
1129 list_for_each_entry(os, &oh->slave_ports, node) {
1130 if (os->user & OCP_USER_MPU) {
1131 oh->_mpu_port = os;
1132 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1133 break;
1134 }
1135 }
1136
1137 return;
1138}
1139
1140/**
1141 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1142 * @oh: struct omap_hwmod *
1143 *
1144 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1145 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1146 * communicate with the IP block. This interface need not be directly
1147 * connected to the MPU (and almost certainly is not), but is directly
1148 * connected to the IP block represented by @oh. Returns a pointer
1149 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1150 * error or if there does not appear to be a path from the MPU to this
1151 * IP block.
1152 */
1153static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1154{
1155 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1156 return NULL;
1157
1158 return oh->_mpu_port;
1159};
1160
1161/**
1162 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1163 * @oh: struct omap_hwmod *
1164 *
1165 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1166 * by @oh is set to indicate to the PRCM that the IP block is active.
1167 * Usually this means placing the module into smart-idle mode and
1168 * smart-standby, but if there is a bug in the automatic idle handling
1169 * for the IP block, it may need to be placed into the force-idle or
1170 * no-idle variants of these modes. No return value.
1171 */
1172static void _enable_sysc(struct omap_hwmod *oh)
1173{
1174 u8 idlemode, sf;
1175 u32 v;
1176 bool clkdm_act;
1177 struct clockdomain *clkdm;
1178
1179 if (!oh->class->sysc)
1180 return;
1181
1182 /*
1183 * Wait until reset has completed, this is needed as the IP
1184 * block is reset automatically by hardware in some cases
1185 * (off-mode for example), and the drivers require the
1186 * IP to be ready when they access it
1187 */
1188 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1189 _enable_optional_clocks(oh);
1190 _wait_softreset_complete(oh);
1191 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1192 _disable_optional_clocks(oh);
1193
1194 v = oh->_sysc_cache;
1195 sf = oh->class->sysc->sysc_flags;
1196
1197 clkdm = _get_clkdm(oh);
1198 if (sf & SYSC_HAS_SIDLEMODE) {
1199 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1200 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1201 idlemode = HWMOD_IDLEMODE_NO;
1202 } else {
1203 if (sf & SYSC_HAS_ENAWAKEUP)
1204 _enable_wakeup(oh, &v);
1205 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1206 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1207 else
1208 idlemode = HWMOD_IDLEMODE_SMART;
1209 }
1210
1211 /*
1212 * This is special handling for some IPs like
1213 * 32k sync timer. Force them to idle!
1214 */
1215 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1216 if (clkdm_act && !(oh->class->sysc->idlemodes &
1217 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1218 idlemode = HWMOD_IDLEMODE_FORCE;
1219
1220 _set_slave_idlemode(oh, idlemode, &v);
1221 }
1222
1223 if (sf & SYSC_HAS_MIDLEMODE) {
1224 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1225 idlemode = HWMOD_IDLEMODE_FORCE;
1226 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1227 idlemode = HWMOD_IDLEMODE_NO;
1228 } else {
1229 if (sf & SYSC_HAS_ENAWAKEUP)
1230 _enable_wakeup(oh, &v);
1231 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1232 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1233 else
1234 idlemode = HWMOD_IDLEMODE_SMART;
1235 }
1236 _set_master_standbymode(oh, idlemode, &v);
1237 }
1238
1239 /*
1240 * XXX The clock framework should handle this, by
1241 * calling into this code. But this must wait until the
1242 * clock structures are tagged with omap_hwmod entries
1243 */
1244 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1245 (sf & SYSC_HAS_CLOCKACTIVITY))
1246 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1247
1248 _write_sysconfig(v, oh);
1249
1250 /*
1251 * Set the autoidle bit only after setting the smartidle bit
1252 * Setting this will not have any impact on the other modules.
1253 */
1254 if (sf & SYSC_HAS_AUTOIDLE) {
1255 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1256 0 : 1;
1257 _set_module_autoidle(oh, idlemode, &v);
1258 _write_sysconfig(v, oh);
1259 }
1260}
1261
1262/**
1263 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1264 * @oh: struct omap_hwmod *
1265 *
1266 * If module is marked as SWSUP_SIDLE, force the module into slave
1267 * idle; otherwise, configure it for smart-idle. If module is marked
1268 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1269 * configure it for smart-standby. No return value.
1270 */
1271static void _idle_sysc(struct omap_hwmod *oh)
1272{
1273 u8 idlemode, sf;
1274 u32 v;
1275
1276 if (!oh->class->sysc)
1277 return;
1278
1279 v = oh->_sysc_cache;
1280 sf = oh->class->sysc->sysc_flags;
1281
1282 if (sf & SYSC_HAS_SIDLEMODE) {
1283 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1284 idlemode = HWMOD_IDLEMODE_FORCE;
1285 } else {
1286 if (sf & SYSC_HAS_ENAWAKEUP)
1287 _enable_wakeup(oh, &v);
1288 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1289 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1290 else
1291 idlemode = HWMOD_IDLEMODE_SMART;
1292 }
1293 _set_slave_idlemode(oh, idlemode, &v);
1294 }
1295
1296 if (sf & SYSC_HAS_MIDLEMODE) {
1297 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1298 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1299 idlemode = HWMOD_IDLEMODE_FORCE;
1300 } else {
1301 if (sf & SYSC_HAS_ENAWAKEUP)
1302 _enable_wakeup(oh, &v);
1303 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1304 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1305 else
1306 idlemode = HWMOD_IDLEMODE_SMART;
1307 }
1308 _set_master_standbymode(oh, idlemode, &v);
1309 }
1310
1311 /* If the cached value is the same as the new value, skip the write */
1312 if (oh->_sysc_cache != v)
1313 _write_sysconfig(v, oh);
1314}
1315
1316/**
1317 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1318 * @oh: struct omap_hwmod *
1319 *
1320 * Force the module into slave idle and master suspend. No return
1321 * value.
1322 */
1323static void _shutdown_sysc(struct omap_hwmod *oh)
1324{
1325 u32 v;
1326 u8 sf;
1327
1328 if (!oh->class->sysc)
1329 return;
1330
1331 v = oh->_sysc_cache;
1332 sf = oh->class->sysc->sysc_flags;
1333
1334 if (sf & SYSC_HAS_SIDLEMODE)
1335 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1336
1337 if (sf & SYSC_HAS_MIDLEMODE)
1338 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1339
1340 if (sf & SYSC_HAS_AUTOIDLE)
1341 _set_module_autoidle(oh, 1, &v);
1342
1343 _write_sysconfig(v, oh);
1344}
1345
1346/**
1347 * _lookup - find an omap_hwmod by name
1348 * @name: find an omap_hwmod by name
1349 *
1350 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1351 */
1352static struct omap_hwmod *_lookup(const char *name)
1353{
1354 struct omap_hwmod *oh, *temp_oh;
1355
1356 oh = NULL;
1357
1358 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1359 if (!strcmp(name, temp_oh->name)) {
1360 oh = temp_oh;
1361 break;
1362 }
1363 }
1364
1365 return oh;
1366}
1367
1368/**
1369 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1370 * @oh: struct omap_hwmod *
1371 *
1372 * Convert a clockdomain name stored in a struct omap_hwmod into a
1373 * clockdomain pointer, and save it into the struct omap_hwmod.
1374 * Return -EINVAL if the clkdm_name lookup failed.
1375 */
1376static int _init_clkdm(struct omap_hwmod *oh)
1377{
1378 if (!oh->clkdm_name) {
1379 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1380 return 0;
1381 }
1382
1383 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1384 if (!oh->clkdm) {
1385 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1386 oh->name, oh->clkdm_name);
1387 return 0;
1388 }
1389
1390 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1391 oh->name, oh->clkdm_name);
1392
1393 return 0;
1394}
1395
1396/**
1397 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1398 * well the clockdomain.
1399 * @oh: struct omap_hwmod *
1400 * @np: device_node mapped to this hwmod
1401 *
1402 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1403 * Resolves all clock names embedded in the hwmod. Returns 0 on
1404 * success, or a negative error code on failure.
1405 */
1406static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1407{
1408 int ret = 0;
1409
1410 if (oh->_state != _HWMOD_STATE_REGISTERED)
1411 return 0;
1412
1413 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1414
1415 if (soc_ops.init_clkdm)
1416 ret |= soc_ops.init_clkdm(oh);
1417
1418 ret |= _init_main_clk(oh);
1419 ret |= _init_interface_clks(oh);
1420 ret |= _init_opt_clks(oh);
1421
1422 if (!ret)
1423 oh->_state = _HWMOD_STATE_CLKS_INITED;
1424 else
1425 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1426
1427 return ret;
1428}
1429
1430/**
1431 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1432 * @oh: struct omap_hwmod *
1433 * @name: name of the reset line in the context of this hwmod
1434 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1435 *
1436 * Return the bit position of the reset line that match the
1437 * input name. Return -ENOENT if not found.
1438 */
1439static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1440 struct omap_hwmod_rst_info *ohri)
1441{
1442 int i;
1443
1444 for (i = 0; i < oh->rst_lines_cnt; i++) {
1445 const char *rst_line = oh->rst_lines[i].name;
1446 if (!strcmp(rst_line, name)) {
1447 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1448 ohri->st_shift = oh->rst_lines[i].st_shift;
1449 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1450 oh->name, __func__, rst_line, ohri->rst_shift,
1451 ohri->st_shift);
1452
1453 return 0;
1454 }
1455 }
1456
1457 return -ENOENT;
1458}
1459
1460/**
1461 * _assert_hardreset - assert the HW reset line of submodules
1462 * contained in the hwmod module.
1463 * @oh: struct omap_hwmod *
1464 * @name: name of the reset line to lookup and assert
1465 *
1466 * Some IP like dsp, ipu or iva contain processor that require an HW
1467 * reset line to be assert / deassert in order to enable fully the IP.
1468 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1469 * asserting the hardreset line on the currently-booted SoC, or passes
1470 * along the return value from _lookup_hardreset() or the SoC's
1471 * assert_hardreset code.
1472 */
1473static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1474{
1475 struct omap_hwmod_rst_info ohri;
1476 int ret = -EINVAL;
1477
1478 if (!oh)
1479 return -EINVAL;
1480
1481 if (!soc_ops.assert_hardreset)
1482 return -ENOSYS;
1483
1484 ret = _lookup_hardreset(oh, name, &ohri);
1485 if (ret < 0)
1486 return ret;
1487
1488 ret = soc_ops.assert_hardreset(oh, &ohri);
1489
1490 return ret;
1491}
1492
1493/**
1494 * _deassert_hardreset - deassert the HW reset line of submodules contained
1495 * in the hwmod module.
1496 * @oh: struct omap_hwmod *
1497 * @name: name of the reset line to look up and deassert
1498 *
1499 * Some IP like dsp, ipu or iva contain processor that require an HW
1500 * reset line to be assert / deassert in order to enable fully the IP.
1501 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1502 * deasserting the hardreset line on the currently-booted SoC, or passes
1503 * along the return value from _lookup_hardreset() or the SoC's
1504 * deassert_hardreset code.
1505 */
1506static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1507{
1508 struct omap_hwmod_rst_info ohri;
1509 int ret = -EINVAL;
1510
1511 if (!oh)
1512 return -EINVAL;
1513
1514 if (!soc_ops.deassert_hardreset)
1515 return -ENOSYS;
1516
1517 ret = _lookup_hardreset(oh, name, &ohri);
1518 if (ret < 0)
1519 return ret;
1520
1521 if (oh->clkdm) {
1522 /*
1523 * A clockdomain must be in SW_SUP otherwise reset
1524 * might not be completed. The clockdomain can be set
1525 * in HW_AUTO only when the module become ready.
1526 */
1527 clkdm_deny_idle(oh->clkdm);
1528 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1529 if (ret) {
1530 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1531 oh->name, oh->clkdm->name, ret);
1532 return ret;
1533 }
1534 }
1535
1536 _enable_clocks(oh);
1537 if (soc_ops.enable_module)
1538 soc_ops.enable_module(oh);
1539
1540 ret = soc_ops.deassert_hardreset(oh, &ohri);
1541
1542 if (soc_ops.disable_module)
1543 soc_ops.disable_module(oh);
1544 _disable_clocks(oh);
1545
1546 if (ret == -EBUSY)
1547 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1548
1549 if (oh->clkdm) {
1550 /*
1551 * Set the clockdomain to HW_AUTO, assuming that the
1552 * previous state was HW_AUTO.
1553 */
1554 clkdm_allow_idle(oh->clkdm);
1555
1556 clkdm_hwmod_disable(oh->clkdm, oh);
1557 }
1558
1559 return ret;
1560}
1561
1562/**
1563 * _read_hardreset - read the HW reset line state of submodules
1564 * contained in the hwmod module
1565 * @oh: struct omap_hwmod *
1566 * @name: name of the reset line to look up and read
1567 *
1568 * Return the state of the reset line. Returns -EINVAL if @oh is
1569 * null, -ENOSYS if we have no way of reading the hardreset line
1570 * status on the currently-booted SoC, or passes along the return
1571 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1572 * code.
1573 */
1574static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1575{
1576 struct omap_hwmod_rst_info ohri;
1577 int ret = -EINVAL;
1578
1579 if (!oh)
1580 return -EINVAL;
1581
1582 if (!soc_ops.is_hardreset_asserted)
1583 return -ENOSYS;
1584
1585 ret = _lookup_hardreset(oh, name, &ohri);
1586 if (ret < 0)
1587 return ret;
1588
1589 return soc_ops.is_hardreset_asserted(oh, &ohri);
1590}
1591
1592/**
1593 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1594 * @oh: struct omap_hwmod *
1595 *
1596 * If all hardreset lines associated with @oh are asserted, then return true.
1597 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1598 * associated with @oh are asserted, then return false.
1599 * This function is used to avoid executing some parts of the IP block
1600 * enable/disable sequence if its hardreset line is set.
1601 */
1602static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1603{
1604 int i, rst_cnt = 0;
1605
1606 if (oh->rst_lines_cnt == 0)
1607 return false;
1608
1609 for (i = 0; i < oh->rst_lines_cnt; i++)
1610 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1611 rst_cnt++;
1612
1613 if (oh->rst_lines_cnt == rst_cnt)
1614 return true;
1615
1616 return false;
1617}
1618
1619/**
1620 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1621 * hard-reset
1622 * @oh: struct omap_hwmod *
1623 *
1624 * If any hardreset lines associated with @oh are asserted, then
1625 * return true. Otherwise, if no hardreset lines associated with @oh
1626 * are asserted, or if @oh has no hardreset lines, then return false.
1627 * This function is used to avoid executing some parts of the IP block
1628 * enable/disable sequence if any hardreset line is set.
1629 */
1630static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1631{
1632 int rst_cnt = 0;
1633 int i;
1634
1635 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1636 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1637 rst_cnt++;
1638
1639 return (rst_cnt) ? true : false;
1640}
1641
1642/**
1643 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1644 * @oh: struct omap_hwmod *
1645 *
1646 * Disable the PRCM module mode related to the hwmod @oh.
1647 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1648 */
1649static int _omap4_disable_module(struct omap_hwmod *oh)
1650{
1651 int v;
1652
1653 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1654 _omap4_clkctrl_managed_by_clkfwk(oh))
1655 return -EINVAL;
1656
1657 /*
1658 * Since integration code might still be doing something, only
1659 * disable if all lines are under hardreset.
1660 */
1661 if (_are_any_hardreset_lines_asserted(oh))
1662 return 0;
1663
1664 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1665
1666 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1667 oh->prcm.omap4.clkctrl_offs);
1668
1669 v = _omap4_wait_target_disable(oh);
1670 if (v)
1671 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1672 oh->name);
1673
1674 return 0;
1675}
1676
1677/**
1678 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1679 * @oh: struct omap_hwmod *
1680 *
1681 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1682 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1683 * reset this way, -EINVAL if the hwmod is in the wrong state,
1684 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1685 *
1686 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1687 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1688 * use the SYSCONFIG softreset bit to provide the status.
1689 *
1690 * Note that some IP like McBSP do have reset control but don't have
1691 * reset status.
1692 */
1693static int _ocp_softreset(struct omap_hwmod *oh)
1694{
1695 u32 v;
1696 int c = 0;
1697 int ret = 0;
1698
1699 if (!oh->class->sysc ||
1700 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1701 return -ENOENT;
1702
1703 /* clocks must be on for this operation */
1704 if (oh->_state != _HWMOD_STATE_ENABLED) {
1705 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1706 oh->name);
1707 return -EINVAL;
1708 }
1709
1710 /* For some modules, all optionnal clocks need to be enabled as well */
1711 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1712 _enable_optional_clocks(oh);
1713
1714 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1715
1716 v = oh->_sysc_cache;
1717 ret = _set_softreset(oh, &v);
1718 if (ret)
1719 goto dis_opt_clks;
1720
1721 _write_sysconfig(v, oh);
1722
1723 if (oh->class->sysc->srst_udelay)
1724 udelay(oh->class->sysc->srst_udelay);
1725
1726 c = _wait_softreset_complete(oh);
1727 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1728 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1729 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1730 ret = -ETIMEDOUT;
1731 goto dis_opt_clks;
1732 } else {
1733 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1734 }
1735
1736 ret = _clear_softreset(oh, &v);
1737 if (ret)
1738 goto dis_opt_clks;
1739
1740 _write_sysconfig(v, oh);
1741
1742 /*
1743 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1744 * _wait_target_ready() or _reset()
1745 */
1746
1747dis_opt_clks:
1748 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1749 _disable_optional_clocks(oh);
1750
1751 return ret;
1752}
1753
1754/**
1755 * _reset - reset an omap_hwmod
1756 * @oh: struct omap_hwmod *
1757 *
1758 * Resets an omap_hwmod @oh. If the module has a custom reset
1759 * function pointer defined, then call it to reset the IP block, and
1760 * pass along its return value to the caller. Otherwise, if the IP
1761 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1762 * associated with it, call a function to reset the IP block via that
1763 * method, and pass along the return value to the caller. Finally, if
1764 * the IP block has some hardreset lines associated with it, assert
1765 * all of those, but do _not_ deassert them. (This is because driver
1766 * authors have expressed an apparent requirement to control the
1767 * deassertion of the hardreset lines themselves.)
1768 *
1769 * The default software reset mechanism for most OMAP IP blocks is
1770 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1771 * hwmods cannot be reset via this method. Some are not targets and
1772 * therefore have no OCP header registers to access. Others (like the
1773 * IVA) have idiosyncratic reset sequences. So for these relatively
1774 * rare cases, custom reset code can be supplied in the struct
1775 * omap_hwmod_class .reset function pointer.
1776 *
1777 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1778 * does not prevent idling of the system. This is necessary for cases
1779 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1780 * kernel without disabling dma.
1781 *
1782 * Passes along the return value from either _ocp_softreset() or the
1783 * custom reset function - these must return -EINVAL if the hwmod
1784 * cannot be reset this way or if the hwmod is in the wrong state,
1785 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1786 */
1787static int _reset(struct omap_hwmod *oh)
1788{
1789 int i, r;
1790
1791 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1792
1793 if (oh->class->reset) {
1794 r = oh->class->reset(oh);
1795 } else {
1796 if (oh->rst_lines_cnt > 0) {
1797 for (i = 0; i < oh->rst_lines_cnt; i++)
1798 _assert_hardreset(oh, oh->rst_lines[i].name);
1799 return 0;
1800 } else {
1801 r = _ocp_softreset(oh);
1802 if (r == -ENOENT)
1803 r = 0;
1804 }
1805 }
1806
1807 _set_dmadisable(oh);
1808
1809 /*
1810 * OCP_SYSCONFIG bits need to be reprogrammed after a
1811 * softreset. The _enable() function should be split to avoid
1812 * the rewrite of the OCP_SYSCONFIG register.
1813 */
1814 if (oh->class->sysc) {
1815 _update_sysc_cache(oh);
1816 _enable_sysc(oh);
1817 }
1818
1819 return r;
1820}
1821
1822/**
1823 * _omap4_update_context_lost - increment hwmod context loss counter if
1824 * hwmod context was lost, and clear hardware context loss reg
1825 * @oh: hwmod to check for context loss
1826 *
1827 * If the PRCM indicates that the hwmod @oh lost context, increment
1828 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1829 * bits. No return value.
1830 */
1831static void _omap4_update_context_lost(struct omap_hwmod *oh)
1832{
1833 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1834 return;
1835
1836 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1837 oh->clkdm->pwrdm.ptr->prcm_offs,
1838 oh->prcm.omap4.context_offs))
1839 return;
1840
1841 oh->prcm.omap4.context_lost_counter++;
1842 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1843 oh->clkdm->pwrdm.ptr->prcm_offs,
1844 oh->prcm.omap4.context_offs);
1845}
1846
1847/**
1848 * _omap4_get_context_lost - get context loss counter for a hwmod
1849 * @oh: hwmod to get context loss counter for
1850 *
1851 * Returns the in-memory context loss counter for a hwmod.
1852 */
1853static int _omap4_get_context_lost(struct omap_hwmod *oh)
1854{
1855 return oh->prcm.omap4.context_lost_counter;
1856}
1857
1858/**
1859 * _enable - enable an omap_hwmod
1860 * @oh: struct omap_hwmod *
1861 *
1862 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1863 * register target. Returns -EINVAL if the hwmod is in the wrong
1864 * state or passes along the return value of _wait_target_ready().
1865 */
1866static int _enable(struct omap_hwmod *oh)
1867{
1868 int r;
1869
1870 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1871
1872 /*
1873 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1874 * state at init.
1875 */
1876 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1877 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1878 return 0;
1879 }
1880
1881 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1882 oh->_state != _HWMOD_STATE_IDLE &&
1883 oh->_state != _HWMOD_STATE_DISABLED) {
1884 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1885 oh->name);
1886 return -EINVAL;
1887 }
1888
1889 /*
1890 * If an IP block contains HW reset lines and all of them are
1891 * asserted, we let integration code associated with that
1892 * block handle the enable. We've received very little
1893 * information on what those driver authors need, and until
1894 * detailed information is provided and the driver code is
1895 * posted to the public lists, this is probably the best we
1896 * can do.
1897 */
1898 if (_are_all_hardreset_lines_asserted(oh))
1899 return 0;
1900
1901 _add_initiator_dep(oh, mpu_oh);
1902
1903 if (oh->clkdm) {
1904 /*
1905 * A clockdomain must be in SW_SUP before enabling
1906 * completely the module. The clockdomain can be set
1907 * in HW_AUTO only when the module become ready.
1908 */
1909 clkdm_deny_idle(oh->clkdm);
1910 r = clkdm_hwmod_enable(oh->clkdm, oh);
1911 if (r) {
1912 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1913 oh->name, oh->clkdm->name, r);
1914 return r;
1915 }
1916 }
1917
1918 _enable_clocks(oh);
1919 if (soc_ops.enable_module)
1920 soc_ops.enable_module(oh);
1921 if (oh->flags & HWMOD_BLOCK_WFI)
1922 cpu_idle_poll_ctrl(true);
1923
1924 if (soc_ops.update_context_lost)
1925 soc_ops.update_context_lost(oh);
1926
1927 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1928 -EINVAL;
1929 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1930 clkdm_allow_idle(oh->clkdm);
1931
1932 if (!r) {
1933 oh->_state = _HWMOD_STATE_ENABLED;
1934
1935 /* Access the sysconfig only if the target is ready */
1936 if (oh->class->sysc) {
1937 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1938 _update_sysc_cache(oh);
1939 _enable_sysc(oh);
1940 }
1941 } else {
1942 if (soc_ops.disable_module)
1943 soc_ops.disable_module(oh);
1944 _disable_clocks(oh);
1945 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1946 oh->name, r);
1947
1948 if (oh->clkdm)
1949 clkdm_hwmod_disable(oh->clkdm, oh);
1950 }
1951
1952 return r;
1953}
1954
1955/**
1956 * _idle - idle an omap_hwmod
1957 * @oh: struct omap_hwmod *
1958 *
1959 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1960 * no further work. Returns -EINVAL if the hwmod is in the wrong
1961 * state or returns 0.
1962 */
1963static int _idle(struct omap_hwmod *oh)
1964{
1965 if (oh->flags & HWMOD_NO_IDLE) {
1966 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1967 return 0;
1968 }
1969
1970 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1971
1972 if (_are_all_hardreset_lines_asserted(oh))
1973 return 0;
1974
1975 if (oh->_state != _HWMOD_STATE_ENABLED) {
1976 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1977 oh->name);
1978 return -EINVAL;
1979 }
1980
1981 if (oh->class->sysc)
1982 _idle_sysc(oh);
1983 _del_initiator_dep(oh, mpu_oh);
1984
1985 /*
1986 * If HWMOD_CLKDM_NOAUTO is set then we don't
1987 * deny idle the clkdm again since idle was already denied
1988 * in _enable()
1989 */
1990 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1991 clkdm_deny_idle(oh->clkdm);
1992
1993 if (oh->flags & HWMOD_BLOCK_WFI)
1994 cpu_idle_poll_ctrl(false);
1995 if (soc_ops.disable_module)
1996 soc_ops.disable_module(oh);
1997
1998 /*
1999 * The module must be in idle mode before disabling any parents
2000 * clocks. Otherwise, the parent clock might be disabled before
2001 * the module transition is done, and thus will prevent the
2002 * transition to complete properly.
2003 */
2004 _disable_clocks(oh);
2005 if (oh->clkdm) {
2006 clkdm_allow_idle(oh->clkdm);
2007 clkdm_hwmod_disable(oh->clkdm, oh);
2008 }
2009
2010 oh->_state = _HWMOD_STATE_IDLE;
2011
2012 return 0;
2013}
2014
2015/**
2016 * _shutdown - shutdown an omap_hwmod
2017 * @oh: struct omap_hwmod *
2018 *
2019 * Shut down an omap_hwmod @oh. This should be called when the driver
2020 * used for the hwmod is removed or unloaded or if the driver is not
2021 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2022 * state or returns 0.
2023 */
2024static int _shutdown(struct omap_hwmod *oh)
2025{
2026 int ret, i;
2027 u8 prev_state;
2028
2029 if (_are_all_hardreset_lines_asserted(oh))
2030 return 0;
2031
2032 if (oh->_state != _HWMOD_STATE_IDLE &&
2033 oh->_state != _HWMOD_STATE_ENABLED) {
2034 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2035 oh->name);
2036 return -EINVAL;
2037 }
2038
2039 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2040
2041 if (oh->class->pre_shutdown) {
2042 prev_state = oh->_state;
2043 if (oh->_state == _HWMOD_STATE_IDLE)
2044 _enable(oh);
2045 ret = oh->class->pre_shutdown(oh);
2046 if (ret) {
2047 if (prev_state == _HWMOD_STATE_IDLE)
2048 _idle(oh);
2049 return ret;
2050 }
2051 }
2052
2053 if (oh->class->sysc) {
2054 if (oh->_state == _HWMOD_STATE_IDLE)
2055 _enable(oh);
2056 _shutdown_sysc(oh);
2057 }
2058
2059 /* clocks and deps are already disabled in idle */
2060 if (oh->_state == _HWMOD_STATE_ENABLED) {
2061 _del_initiator_dep(oh, mpu_oh);
2062 /* XXX what about the other system initiators here? dma, dsp */
2063 if (oh->flags & HWMOD_BLOCK_WFI)
2064 cpu_idle_poll_ctrl(false);
2065 if (soc_ops.disable_module)
2066 soc_ops.disable_module(oh);
2067 _disable_clocks(oh);
2068 if (oh->clkdm)
2069 clkdm_hwmod_disable(oh->clkdm, oh);
2070 }
2071 /* XXX Should this code also force-disable the optional clocks? */
2072
2073 for (i = 0; i < oh->rst_lines_cnt; i++)
2074 _assert_hardreset(oh, oh->rst_lines[i].name);
2075
2076 oh->_state = _HWMOD_STATE_DISABLED;
2077
2078 return 0;
2079}
2080
2081static int of_dev_find_hwmod(struct device_node *np,
2082 struct omap_hwmod *oh)
2083{
2084 int count, i, res;
2085 const char *p;
2086
2087 count = of_property_count_strings(np, "ti,hwmods");
2088 if (count < 1)
2089 return -ENODEV;
2090
2091 for (i = 0; i < count; i++) {
2092 res = of_property_read_string_index(np, "ti,hwmods",
2093 i, &p);
2094 if (res)
2095 continue;
2096 if (!strcmp(p, oh->name)) {
2097 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2098 np, i, oh->name);
2099 return i;
2100 }
2101 }
2102
2103 return -ENODEV;
2104}
2105
2106/**
2107 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2108 * @np: struct device_node *
2109 * @oh: struct omap_hwmod *
2110 * @index: index of the entry found
2111 * @found: struct device_node * found or NULL
2112 *
2113 * Parse the dt blob and find out needed hwmod. Recursive function is
2114 * implemented to take care hierarchical dt blob parsing.
2115 * Return: Returns 0 on success, -ENODEV when not found.
2116 */
2117static int of_dev_hwmod_lookup(struct device_node *np,
2118 struct omap_hwmod *oh,
2119 int *index,
2120 struct device_node **found)
2121{
2122 struct device_node *np0 = NULL;
2123 int res;
2124
2125 res = of_dev_find_hwmod(np, oh);
2126 if (res >= 0) {
2127 *found = np;
2128 *index = res;
2129 return 0;
2130 }
2131
2132 for_each_child_of_node(np, np0) {
2133 struct device_node *fc;
2134 int i;
2135
2136 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2137 if (res == 0) {
2138 *found = fc;
2139 *index = i;
2140 of_node_put(np0);
2141 return 0;
2142 }
2143 }
2144
2145 *found = NULL;
2146 *index = 0;
2147
2148 return -ENODEV;
2149}
2150
2151/**
2152 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2153 *
2154 * @oh: struct omap_hwmod *
2155 * @np: struct device_node *
2156 *
2157 * Fix up module register offsets for modules with mpu_rt_idx.
2158 * Only needed for cpsw with interconnect target module defined
2159 * in device tree while still using legacy hwmod platform data
2160 * for rev, sysc and syss registers.
2161 *
2162 * Can be removed when all cpsw hwmod platform data has been
2163 * dropped.
2164 */
2165static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2166 struct device_node *np,
2167 struct resource *res)
2168{
2169 struct device_node *child = NULL;
2170 int error;
2171
2172 child = of_get_next_child(np, child);
2173 if (!child)
2174 return;
2175
2176 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2177 if (error)
2178 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2179 __func__, error);
2180}
2181
2182/**
2183 * omap_hwmod_parse_module_range - map module IO range from device tree
2184 * @oh: struct omap_hwmod *
2185 * @np: struct device_node *
2186 *
2187 * Parse the device tree range an interconnect target module provides
2188 * for it's child device IP blocks. This way we can support the old
2189 * "ti,hwmods" property with just dts data without a need for platform
2190 * data for IO resources. And we don't need all the child IP device
2191 * nodes available in the dts.
2192 */
2193int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2194 struct device_node *np,
2195 struct resource *res)
2196{
2197 struct property *prop;
2198 const __be32 *ranges;
2199 const char *name;
2200 u32 nr_addr, nr_size;
2201 u64 base, size;
2202 int len, error;
2203
2204 if (!res)
2205 return -EINVAL;
2206
2207 ranges = of_get_property(np, "ranges", &len);
2208 if (!ranges)
2209 return -ENOENT;
2210
2211 len /= sizeof(*ranges);
2212
2213 if (len < 3)
2214 return -EINVAL;
2215
2216 of_property_for_each_string(np, "compatible", prop, name)
2217 if (!strncmp("ti,sysc-", name, 8))
2218 break;
2219
2220 if (!name)
2221 return -ENOENT;
2222
2223 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2224 if (error)
2225 return -ENOENT;
2226
2227 error = of_property_read_u32(np, "#size-cells", &nr_size);
2228 if (error)
2229 return -ENOENT;
2230
2231 if (nr_addr != 1 || nr_size != 1) {
2232 pr_err("%s: invalid range for %s->%pOFn\n", __func__,
2233 oh->name, np);
2234 return -EINVAL;
2235 }
2236
2237 ranges++;
2238 base = of_translate_address(np, ranges++);
2239 size = be32_to_cpup(ranges);
2240
2241 pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2242 oh->name, np, base, size);
2243
2244 if (oh && oh->mpu_rt_idx) {
2245 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2246
2247 return 0;
2248 }
2249
2250 res->start = base;
2251 res->end = base + size - 1;
2252 res->flags = IORESOURCE_MEM;
2253
2254 return 0;
2255}
2256
2257/**
2258 * _init_mpu_rt_base - populate the virtual address for a hwmod
2259 * @oh: struct omap_hwmod * to locate the virtual address
2260 * @data: (unused, caller should pass NULL)
2261 * @index: index of the reg entry iospace in device tree
2262 * @np: struct device_node * of the IP block's device node in the DT data
2263 *
2264 * Cache the virtual address used by the MPU to access this IP block's
2265 * registers. This address is needed early so the OCP registers that
2266 * are part of the device's address space can be ioremapped properly.
2267 *
2268 * If SYSC access is not needed, the registers will not be remapped
2269 * and non-availability of MPU access is not treated as an error.
2270 *
2271 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2272 * -ENXIO on absent or invalid register target address space.
2273 */
2274static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2275 int index, struct device_node *np)
2276{
2277 void __iomem *va_start = NULL;
2278 struct resource res;
2279 int error;
2280
2281 if (!oh)
2282 return -EINVAL;
2283
2284 _save_mpu_port_index(oh);
2285
2286 /* if we don't need sysc access we don't need to ioremap */
2287 if (!oh->class->sysc)
2288 return 0;
2289
2290 /* we can't continue without MPU PORT if we need sysc access */
2291 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2292 return -ENXIO;
2293
2294 if (!np) {
2295 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2296 return -ENXIO;
2297 }
2298
2299 /* Do we have a dts range for the interconnect target module? */
2300 error = omap_hwmod_parse_module_range(oh, np, &res);
2301 if (!error)
2302 va_start = ioremap(res.start, resource_size(&res));
2303
2304 /* No ranges, rely on device reg entry */
2305 if (!va_start)
2306 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2307 if (!va_start) {
2308 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2309 oh->name, index, np);
2310 return -ENXIO;
2311 }
2312
2313 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2314 oh->name, va_start);
2315
2316 oh->_mpu_rt_va = va_start;
2317 return 0;
2318}
2319
2320static void __init parse_module_flags(struct omap_hwmod *oh,
2321 struct device_node *np)
2322{
2323 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2324 oh->flags |= HWMOD_INIT_NO_RESET;
2325 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2326 oh->flags |= HWMOD_INIT_NO_IDLE;
2327 if (of_find_property(np, "ti,no-idle", NULL))
2328 oh->flags |= HWMOD_NO_IDLE;
2329}
2330
2331/**
2332 * _init - initialize internal data for the hwmod @oh
2333 * @oh: struct omap_hwmod *
2334 * @n: (unused)
2335 *
2336 * Look up the clocks and the address space used by the MPU to access
2337 * registers belonging to the hwmod @oh. @oh must already be
2338 * registered at this point. This is the first of two phases for
2339 * hwmod initialization. Code called here does not touch any hardware
2340 * registers, it simply prepares internal data structures. Returns 0
2341 * upon success or if the hwmod isn't registered or if the hwmod's
2342 * address space is not defined, or -EINVAL upon failure.
2343 */
2344static int __init _init(struct omap_hwmod *oh, void *data)
2345{
2346 int r, index;
2347 struct device_node *np = NULL;
2348 struct device_node *bus;
2349
2350 if (oh->_state != _HWMOD_STATE_REGISTERED)
2351 return 0;
2352
2353 bus = of_find_node_by_name(NULL, "ocp");
2354 if (!bus)
2355 return -ENODEV;
2356
2357 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2358 if (r)
2359 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2360 else if (np && index)
2361 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2362 oh->name, np);
2363
2364 r = _init_mpu_rt_base(oh, NULL, index, np);
2365 if (r < 0) {
2366 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2367 oh->name);
2368 return 0;
2369 }
2370
2371 r = _init_clocks(oh, np);
2372 if (r < 0) {
2373 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2374 return -EINVAL;
2375 }
2376
2377 if (np) {
2378 struct device_node *child;
2379
2380 parse_module_flags(oh, np);
2381 child = of_get_next_child(np, NULL);
2382 if (child)
2383 parse_module_flags(oh, child);
2384 }
2385
2386 oh->_state = _HWMOD_STATE_INITIALIZED;
2387
2388 return 0;
2389}
2390
2391/**
2392 * _setup_iclk_autoidle - configure an IP block's interface clocks
2393 * @oh: struct omap_hwmod *
2394 *
2395 * Set up the module's interface clocks. XXX This function is still mostly
2396 * a stub; implementing this properly requires iclk autoidle usecounting in
2397 * the clock code. No return value.
2398 */
2399static void _setup_iclk_autoidle(struct omap_hwmod *oh)
2400{
2401 struct omap_hwmod_ocp_if *os;
2402
2403 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2404 return;
2405
2406 list_for_each_entry(os, &oh->slave_ports, node) {
2407 if (!os->_clk)
2408 continue;
2409
2410 if (os->flags & OCPIF_SWSUP_IDLE) {
2411 /*
2412 * we might have multiple users of one iclk with
2413 * different requirements, disable autoidle when
2414 * the module is enabled, e.g. dss iclk
2415 */
2416 } else {
2417 /* we are enabling autoidle afterwards anyways */
2418 clk_enable(os->_clk);
2419 }
2420 }
2421
2422 return;
2423}
2424
2425/**
2426 * _setup_reset - reset an IP block during the setup process
2427 * @oh: struct omap_hwmod *
2428 *
2429 * Reset the IP block corresponding to the hwmod @oh during the setup
2430 * process. The IP block is first enabled so it can be successfully
2431 * reset. Returns 0 upon success or a negative error code upon
2432 * failure.
2433 */
2434static int _setup_reset(struct omap_hwmod *oh)
2435{
2436 int r = 0;
2437
2438 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2439 return -EINVAL;
2440
2441 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2442 return -EPERM;
2443
2444 if (oh->rst_lines_cnt == 0) {
2445 r = _enable(oh);
2446 if (r) {
2447 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2448 oh->name, oh->_state);
2449 return -EINVAL;
2450 }
2451 }
2452
2453 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2454 r = _reset(oh);
2455
2456 return r;
2457}
2458
2459/**
2460 * _setup_postsetup - transition to the appropriate state after _setup
2461 * @oh: struct omap_hwmod *
2462 *
2463 * Place an IP block represented by @oh into a "post-setup" state --
2464 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2465 * this function is called at the end of _setup().) The postsetup
2466 * state for an IP block can be changed by calling
2467 * omap_hwmod_enter_postsetup_state() early in the boot process,
2468 * before one of the omap_hwmod_setup*() functions are called for the
2469 * IP block.
2470 *
2471 * The IP block stays in this state until a PM runtime-based driver is
2472 * loaded for that IP block. A post-setup state of IDLE is
2473 * appropriate for almost all IP blocks with runtime PM-enabled
2474 * drivers, since those drivers are able to enable the IP block. A
2475 * post-setup state of ENABLED is appropriate for kernels with PM
2476 * runtime disabled. The DISABLED state is appropriate for unusual IP
2477 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2478 * included, since the WDTIMER starts running on reset and will reset
2479 * the MPU if left active.
2480 *
2481 * This post-setup mechanism is deprecated. Once all of the OMAP
2482 * drivers have been converted to use PM runtime, and all of the IP
2483 * block data and interconnect data is available to the hwmod code, it
2484 * should be possible to replace this mechanism with a "lazy reset"
2485 * arrangement. In a "lazy reset" setup, each IP block is enabled
2486 * when the driver first probes, then all remaining IP blocks without
2487 * drivers are either shut down or enabled after the drivers have
2488 * loaded. However, this cannot take place until the above
2489 * preconditions have been met, since otherwise the late reset code
2490 * has no way of knowing which IP blocks are in use by drivers, and
2491 * which ones are unused.
2492 *
2493 * No return value.
2494 */
2495static void _setup_postsetup(struct omap_hwmod *oh)
2496{
2497 u8 postsetup_state;
2498
2499 if (oh->rst_lines_cnt > 0)
2500 return;
2501
2502 postsetup_state = oh->_postsetup_state;
2503 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2504 postsetup_state = _HWMOD_STATE_ENABLED;
2505
2506 /*
2507 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2508 * it should be set by the core code as a runtime flag during startup
2509 */
2510 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2511 (postsetup_state == _HWMOD_STATE_IDLE)) {
2512 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2513 postsetup_state = _HWMOD_STATE_ENABLED;
2514 }
2515
2516 if (postsetup_state == _HWMOD_STATE_IDLE)
2517 _idle(oh);
2518 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2519 _shutdown(oh);
2520 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2521 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2522 oh->name, postsetup_state);
2523
2524 return;
2525}
2526
2527/**
2528 * _setup - prepare IP block hardware for use
2529 * @oh: struct omap_hwmod *
2530 * @n: (unused, pass NULL)
2531 *
2532 * Configure the IP block represented by @oh. This may include
2533 * enabling the IP block, resetting it, and placing it into a
2534 * post-setup state, depending on the type of IP block and applicable
2535 * flags. IP blocks are reset to prevent any previous configuration
2536 * by the bootloader or previous operating system from interfering
2537 * with power management or other parts of the system. The reset can
2538 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2539 * two phases for hwmod initialization. Code called here generally
2540 * affects the IP block hardware, or system integration hardware
2541 * associated with the IP block. Returns 0.
2542 */
2543static int _setup(struct omap_hwmod *oh, void *data)
2544{
2545 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2546 return 0;
2547
2548 if (oh->parent_hwmod) {
2549 int r;
2550
2551 r = _enable(oh->parent_hwmod);
2552 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2553 oh->name, oh->parent_hwmod->name);
2554 }
2555
2556 _setup_iclk_autoidle(oh);
2557
2558 if (!_setup_reset(oh))
2559 _setup_postsetup(oh);
2560
2561 if (oh->parent_hwmod) {
2562 u8 postsetup_state;
2563
2564 postsetup_state = oh->parent_hwmod->_postsetup_state;
2565
2566 if (postsetup_state == _HWMOD_STATE_IDLE)
2567 _idle(oh->parent_hwmod);
2568 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2569 _shutdown(oh->parent_hwmod);
2570 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2571 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2572 oh->parent_hwmod->name, postsetup_state);
2573 }
2574
2575 return 0;
2576}
2577
2578/**
2579 * _register - register a struct omap_hwmod
2580 * @oh: struct omap_hwmod *
2581 *
2582 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2583 * already has been registered by the same name; -EINVAL if the
2584 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2585 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2586 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2587 * success.
2588 *
2589 * XXX The data should be copied into bootmem, so the original data
2590 * should be marked __initdata and freed after init. This would allow
2591 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2592 * that the copy process would be relatively complex due to the large number
2593 * of substructures.
2594 */
2595static int _register(struct omap_hwmod *oh)
2596{
2597 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2598 (oh->_state != _HWMOD_STATE_UNKNOWN))
2599 return -EINVAL;
2600
2601 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2602
2603 if (_lookup(oh->name))
2604 return -EEXIST;
2605
2606 list_add_tail(&oh->node, &omap_hwmod_list);
2607
2608 INIT_LIST_HEAD(&oh->slave_ports);
2609 spin_lock_init(&oh->_lock);
2610 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2611
2612 oh->_state = _HWMOD_STATE_REGISTERED;
2613
2614 /*
2615 * XXX Rather than doing a strcmp(), this should test a flag
2616 * set in the hwmod data, inserted by the autogenerator code.
2617 */
2618 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2619 mpu_oh = oh;
2620
2621 return 0;
2622}
2623
2624/**
2625 * _add_link - add an interconnect between two IP blocks
2626 * @oi: pointer to a struct omap_hwmod_ocp_if record
2627 *
2628 * Add struct omap_hwmod_link records connecting the slave IP block
2629 * specified in @oi->slave to @oi. This code is assumed to run before
2630 * preemption or SMP has been enabled, thus avoiding the need for
2631 * locking in this code. Changes to this assumption will require
2632 * additional locking. Returns 0.
2633 */
2634static int _add_link(struct omap_hwmod_ocp_if *oi)
2635{
2636 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2637 oi->slave->name);
2638
2639 list_add(&oi->node, &oi->slave->slave_ports);
2640 oi->slave->slaves_cnt++;
2641
2642 return 0;
2643}
2644
2645/**
2646 * _register_link - register a struct omap_hwmod_ocp_if
2647 * @oi: struct omap_hwmod_ocp_if *
2648 *
2649 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2650 * has already been registered; -EINVAL if @oi is NULL or if the
2651 * record pointed to by @oi is missing required fields; or 0 upon
2652 * success.
2653 *
2654 * XXX The data should be copied into bootmem, so the original data
2655 * should be marked __initdata and freed after init. This would allow
2656 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2657 */
2658static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2659{
2660 if (!oi || !oi->master || !oi->slave || !oi->user)
2661 return -EINVAL;
2662
2663 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2664 return -EEXIST;
2665
2666 pr_debug("omap_hwmod: registering link from %s to %s\n",
2667 oi->master->name, oi->slave->name);
2668
2669 /*
2670 * Register the connected hwmods, if they haven't been
2671 * registered already
2672 */
2673 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2674 _register(oi->master);
2675
2676 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2677 _register(oi->slave);
2678
2679 _add_link(oi);
2680
2681 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2682
2683 return 0;
2684}
2685
2686/* Static functions intended only for use in soc_ops field function pointers */
2687
2688/**
2689 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2690 * @oh: struct omap_hwmod *
2691 *
2692 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2693 * does not have an IDLEST bit or if the module successfully leaves
2694 * slave idle; otherwise, pass along the return value of the
2695 * appropriate *_cm*_wait_module_ready() function.
2696 */
2697static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2698{
2699 if (!oh)
2700 return -EINVAL;
2701
2702 if (oh->flags & HWMOD_NO_IDLEST)
2703 return 0;
2704
2705 if (!_find_mpu_rt_port(oh))
2706 return 0;
2707
2708 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2709
2710 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2711 oh->prcm.omap2.idlest_reg_id,
2712 oh->prcm.omap2.idlest_idle_bit);
2713}
2714
2715/**
2716 * _omap4_wait_target_ready - wait for a module to leave slave idle
2717 * @oh: struct omap_hwmod *
2718 *
2719 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2720 * does not have an IDLEST bit or if the module successfully leaves
2721 * slave idle; otherwise, pass along the return value of the
2722 * appropriate *_cm*_wait_module_ready() function.
2723 */
2724static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2725{
2726 if (!oh)
2727 return -EINVAL;
2728
2729 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2730 return 0;
2731
2732 if (!_find_mpu_rt_port(oh))
2733 return 0;
2734
2735 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2736 return 0;
2737
2738 if (!_omap4_has_clkctrl_clock(oh))
2739 return 0;
2740
2741 /* XXX check module SIDLEMODE, hardreset status */
2742
2743 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2744 oh->clkdm->cm_inst,
2745 oh->prcm.omap4.clkctrl_offs, 0);
2746}
2747
2748/**
2749 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2750 * @oh: struct omap_hwmod * to assert hardreset
2751 * @ohri: hardreset line data
2752 *
2753 * Call omap2_prm_assert_hardreset() with parameters extracted from
2754 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2755 * use as an soc_ops function pointer. Passes along the return value
2756 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2757 * for removal when the PRM code is moved into drivers/.
2758 */
2759static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2760 struct omap_hwmod_rst_info *ohri)
2761{
2762 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2763 oh->prcm.omap2.module_offs, 0);
2764}
2765
2766/**
2767 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2768 * @oh: struct omap_hwmod * to deassert hardreset
2769 * @ohri: hardreset line data
2770 *
2771 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2772 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2773 * use as an soc_ops function pointer. Passes along the return value
2774 * from omap2_prm_deassert_hardreset(). XXX This function is
2775 * scheduled for removal when the PRM code is moved into drivers/.
2776 */
2777static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2778 struct omap_hwmod_rst_info *ohri)
2779{
2780 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2781 oh->prcm.omap2.module_offs, 0, 0);
2782}
2783
2784/**
2785 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2786 * @oh: struct omap_hwmod * to test hardreset
2787 * @ohri: hardreset line data
2788 *
2789 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2790 * from the hwmod @oh and the hardreset line data @ohri. Only
2791 * intended for use as an soc_ops function pointer. Passes along the
2792 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2793 * function is scheduled for removal when the PRM code is moved into
2794 * drivers/.
2795 */
2796static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2797 struct omap_hwmod_rst_info *ohri)
2798{
2799 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2800 oh->prcm.omap2.module_offs, 0);
2801}
2802
2803/**
2804 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2805 * @oh: struct omap_hwmod * to assert hardreset
2806 * @ohri: hardreset line data
2807 *
2808 * Call omap4_prminst_assert_hardreset() with parameters extracted
2809 * from the hwmod @oh and the hardreset line data @ohri. Only
2810 * intended for use as an soc_ops function pointer. Passes along the
2811 * return value from omap4_prminst_assert_hardreset(). XXX This
2812 * function is scheduled for removal when the PRM code is moved into
2813 * drivers/.
2814 */
2815static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2816 struct omap_hwmod_rst_info *ohri)
2817{
2818 if (!oh->clkdm)
2819 return -EINVAL;
2820
2821 return omap_prm_assert_hardreset(ohri->rst_shift,
2822 oh->clkdm->pwrdm.ptr->prcm_partition,
2823 oh->clkdm->pwrdm.ptr->prcm_offs,
2824 oh->prcm.omap4.rstctrl_offs);
2825}
2826
2827/**
2828 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2829 * @oh: struct omap_hwmod * to deassert hardreset
2830 * @ohri: hardreset line data
2831 *
2832 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2833 * from the hwmod @oh and the hardreset line data @ohri. Only
2834 * intended for use as an soc_ops function pointer. Passes along the
2835 * return value from omap4_prminst_deassert_hardreset(). XXX This
2836 * function is scheduled for removal when the PRM code is moved into
2837 * drivers/.
2838 */
2839static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2840 struct omap_hwmod_rst_info *ohri)
2841{
2842 if (!oh->clkdm)
2843 return -EINVAL;
2844
2845 if (ohri->st_shift)
2846 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2847 oh->name, ohri->name);
2848 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2849 oh->clkdm->pwrdm.ptr->prcm_partition,
2850 oh->clkdm->pwrdm.ptr->prcm_offs,
2851 oh->prcm.omap4.rstctrl_offs,
2852 oh->prcm.omap4.rstctrl_offs +
2853 OMAP4_RST_CTRL_ST_OFFSET);
2854}
2855
2856/**
2857 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2858 * @oh: struct omap_hwmod * to test hardreset
2859 * @ohri: hardreset line data
2860 *
2861 * Call omap4_prminst_is_hardreset_asserted() with parameters
2862 * extracted from the hwmod @oh and the hardreset line data @ohri.
2863 * Only intended for use as an soc_ops function pointer. Passes along
2864 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2865 * This function is scheduled for removal when the PRM code is moved
2866 * into drivers/.
2867 */
2868static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2869 struct omap_hwmod_rst_info *ohri)
2870{
2871 if (!oh->clkdm)
2872 return -EINVAL;
2873
2874 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2875 oh->clkdm->pwrdm.ptr->
2876 prcm_partition,
2877 oh->clkdm->pwrdm.ptr->prcm_offs,
2878 oh->prcm.omap4.rstctrl_offs);
2879}
2880
2881/**
2882 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2883 * @oh: struct omap_hwmod * to disable control for
2884 *
2885 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2886 * will be using its main_clk to enable/disable the module. Returns
2887 * 0 if successful.
2888 */
2889static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2890{
2891 if (!oh)
2892 return -EINVAL;
2893
2894 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2895
2896 return 0;
2897}
2898
2899/**
2900 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2901 * @oh: struct omap_hwmod * to deassert hardreset
2902 * @ohri: hardreset line data
2903 *
2904 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2905 * from the hwmod @oh and the hardreset line data @ohri. Only
2906 * intended for use as an soc_ops function pointer. Passes along the
2907 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2908 * function is scheduled for removal when the PRM code is moved into
2909 * drivers/.
2910 */
2911static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2912 struct omap_hwmod_rst_info *ohri)
2913{
2914 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2915 oh->clkdm->pwrdm.ptr->prcm_partition,
2916 oh->clkdm->pwrdm.ptr->prcm_offs,
2917 oh->prcm.omap4.rstctrl_offs,
2918 oh->prcm.omap4.rstst_offs);
2919}
2920
2921/* Public functions */
2922
2923u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2924{
2925 if (oh->flags & HWMOD_16BIT_REG)
2926 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2927 else
2928 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2929}
2930
2931void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2932{
2933 if (oh->flags & HWMOD_16BIT_REG)
2934 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2935 else
2936 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2937}
2938
2939/**
2940 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2941 * @oh: struct omap_hwmod *
2942 *
2943 * This is a public function exposed to drivers. Some drivers may need to do
2944 * some settings before and after resetting the device. Those drivers after
2945 * doing the necessary settings could use this function to start a reset by
2946 * setting the SYSCONFIG.SOFTRESET bit.
2947 */
2948int omap_hwmod_softreset(struct omap_hwmod *oh)
2949{
2950 u32 v;
2951 int ret;
2952
2953 if (!oh || !(oh->_sysc_cache))
2954 return -EINVAL;
2955
2956 v = oh->_sysc_cache;
2957 ret = _set_softreset(oh, &v);
2958 if (ret)
2959 goto error;
2960 _write_sysconfig(v, oh);
2961
2962 ret = _clear_softreset(oh, &v);
2963 if (ret)
2964 goto error;
2965 _write_sysconfig(v, oh);
2966
2967error:
2968 return ret;
2969}
2970
2971/**
2972 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2973 * @name: name of the omap_hwmod to look up
2974 *
2975 * Given a @name of an omap_hwmod, return a pointer to the registered
2976 * struct omap_hwmod *, or NULL upon error.
2977 */
2978struct omap_hwmod *omap_hwmod_lookup(const char *name)
2979{
2980 struct omap_hwmod *oh;
2981
2982 if (!name)
2983 return NULL;
2984
2985 oh = _lookup(name);
2986
2987 return oh;
2988}
2989
2990/**
2991 * omap_hwmod_for_each - call function for each registered omap_hwmod
2992 * @fn: pointer to a callback function
2993 * @data: void * data to pass to callback function
2994 *
2995 * Call @fn for each registered omap_hwmod, passing @data to each
2996 * function. @fn must return 0 for success or any other value for
2997 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2998 * will stop and the non-zero return value will be passed to the
2999 * caller of omap_hwmod_for_each(). @fn is called with
3000 * omap_hwmod_for_each() held.
3001 */
3002int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3003 void *data)
3004{
3005 struct omap_hwmod *temp_oh;
3006 int ret = 0;
3007
3008 if (!fn)
3009 return -EINVAL;
3010
3011 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3012 ret = (*fn)(temp_oh, data);
3013 if (ret)
3014 break;
3015 }
3016
3017 return ret;
3018}
3019
3020/**
3021 * omap_hwmod_register_links - register an array of hwmod links
3022 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3023 *
3024 * Intended to be called early in boot before the clock framework is
3025 * initialized. If @ois is not null, will register all omap_hwmods
3026 * listed in @ois that are valid for this chip. Returns -EINVAL if
3027 * omap_hwmod_init() hasn't been called before calling this function,
3028 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3029 * success.
3030 */
3031int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3032{
3033 int r, i;
3034
3035 if (!inited)
3036 return -EINVAL;
3037
3038 if (!ois)
3039 return 0;
3040
3041 if (ois[0] == NULL) /* Empty list */
3042 return 0;
3043
3044 i = 0;
3045 do {
3046 r = _register_link(ois[i]);
3047 WARN(r && r != -EEXIST,
3048 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3049 ois[i]->master->name, ois[i]->slave->name, r);
3050 } while (ois[++i]);
3051
3052 return 0;
3053}
3054
3055/**
3056 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3057 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3058 *
3059 * If the hwmod data corresponding to the MPU subsystem IP block
3060 * hasn't been initialized and set up yet, do so now. This must be
3061 * done first since sleep dependencies may be added from other hwmods
3062 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3063 * return value.
3064 */
3065static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3066{
3067 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3068 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3069 __func__, MPU_INITIATOR_NAME);
3070 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3071 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3072}
3073
3074/**
3075 * omap_hwmod_setup_one - set up a single hwmod
3076 * @oh_name: const char * name of the already-registered hwmod to set up
3077 *
3078 * Initialize and set up a single hwmod. Intended to be used for a
3079 * small number of early devices, such as the timer IP blocks used for
3080 * the scheduler clock. Must be called after omap2_clk_init().
3081 * Resolves the struct clk names to struct clk pointers for each
3082 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3083 * -EINVAL upon error or 0 upon success.
3084 */
3085int __init omap_hwmod_setup_one(const char *oh_name)
3086{
3087 struct omap_hwmod *oh;
3088
3089 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3090
3091 oh = _lookup(oh_name);
3092 if (!oh) {
3093 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3094 return -EINVAL;
3095 }
3096
3097 _ensure_mpu_hwmod_is_setup(oh);
3098
3099 _init(oh, NULL);
3100 _setup(oh, NULL);
3101
3102 return 0;
3103}
3104
3105static void omap_hwmod_check_one(struct device *dev,
3106 const char *name, s8 v1, u8 v2)
3107{
3108 if (v1 < 0)
3109 return;
3110
3111 if (v1 != v2)
3112 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3113}
3114
3115/**
3116 * omap_hwmod_check_sysc - check sysc against platform sysc
3117 * @dev: struct device
3118 * @data: module data
3119 * @sysc_fields: new sysc configuration
3120 */
3121static int omap_hwmod_check_sysc(struct device *dev,
3122 const struct ti_sysc_module_data *data,
3123 struct sysc_regbits *sysc_fields)
3124{
3125 const struct sysc_regbits *regbits = data->cap->regbits;
3126
3127 omap_hwmod_check_one(dev, "dmadisable_shift",
3128 regbits->dmadisable_shift,
3129 sysc_fields->dmadisable_shift);
3130 omap_hwmod_check_one(dev, "midle_shift",
3131 regbits->midle_shift,
3132 sysc_fields->midle_shift);
3133 omap_hwmod_check_one(dev, "sidle_shift",
3134 regbits->sidle_shift,
3135 sysc_fields->sidle_shift);
3136 omap_hwmod_check_one(dev, "clkact_shift",
3137 regbits->clkact_shift,
3138 sysc_fields->clkact_shift);
3139 omap_hwmod_check_one(dev, "enwkup_shift",
3140 regbits->enwkup_shift,
3141 sysc_fields->enwkup_shift);
3142 omap_hwmod_check_one(dev, "srst_shift",
3143 regbits->srst_shift,
3144 sysc_fields->srst_shift);
3145 omap_hwmod_check_one(dev, "autoidle_shift",
3146 regbits->autoidle_shift,
3147 sysc_fields->autoidle_shift);
3148
3149 return 0;
3150}
3151
3152/**
3153 * omap_hwmod_init_regbits - init sysconfig specific register bits
3154 * @dev: struct device
3155 * @oh: module
3156 * @data: module data
3157 * @sysc_fields: new sysc configuration
3158 */
3159static int omap_hwmod_init_regbits(struct device *dev, struct omap_hwmod *oh,
3160 const struct ti_sysc_module_data *data,
3161 struct sysc_regbits **sysc_fields)
3162{
3163 switch (data->cap->type) {
3164 case TI_SYSC_OMAP2:
3165 case TI_SYSC_OMAP2_TIMER:
3166 *sysc_fields = &omap_hwmod_sysc_type1;
3167 break;
3168 case TI_SYSC_OMAP3_SHAM:
3169 *sysc_fields = &omap3_sham_sysc_fields;
3170 break;
3171 case TI_SYSC_OMAP3_AES:
3172 *sysc_fields = &omap3xxx_aes_sysc_fields;
3173 break;
3174 case TI_SYSC_OMAP4:
3175 case TI_SYSC_OMAP4_TIMER:
3176 *sysc_fields = &omap_hwmod_sysc_type2;
3177 break;
3178 case TI_SYSC_OMAP4_SIMPLE:
3179 *sysc_fields = &omap_hwmod_sysc_type3;
3180 break;
3181 case TI_SYSC_OMAP34XX_SR:
3182 *sysc_fields = &omap34xx_sr_sysc_fields;
3183 break;
3184 case TI_SYSC_OMAP36XX_SR:
3185 *sysc_fields = &omap36xx_sr_sysc_fields;
3186 break;
3187 case TI_SYSC_OMAP4_SR:
3188 *sysc_fields = &omap36xx_sr_sysc_fields;
3189 break;
3190 case TI_SYSC_OMAP4_MCASP:
3191 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3192 break;
3193 case TI_SYSC_OMAP4_USB_HOST_FS:
3194 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3195 break;
3196 default:
3197 *sysc_fields = NULL;
3198 if (!oh->class->sysc->sysc_fields)
3199 return 0;
3200
3201 dev_err(dev, "sysc_fields not found\n");
3202
3203 return -EINVAL;
3204 }
3205
3206 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3207}
3208
3209/**
3210 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3211 * @dev: struct device
3212 * @data: module data
3213 * @rev_offs: revision register offset
3214 * @sysc_offs: sysc register offset
3215 * @syss_offs: syss register offset
3216 */
3217static int omap_hwmod_init_reg_offs(struct device *dev,
3218 const struct ti_sysc_module_data *data,
3219 s32 *rev_offs, s32 *sysc_offs,
3220 s32 *syss_offs)
3221{
3222 *rev_offs = -ENODEV;
3223 *sysc_offs = 0;
3224 *syss_offs = 0;
3225
3226 if (data->offsets[SYSC_REVISION] >= 0)
3227 *rev_offs = data->offsets[SYSC_REVISION];
3228
3229 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3230 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3231
3232 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3233 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3234
3235 return 0;
3236}
3237
3238/**
3239 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3240 * @dev: struct device
3241 * @data: module data
3242 * @sysc_flags: module configuration
3243 */
3244static int omap_hwmod_init_sysc_flags(struct device *dev,
3245 const struct ti_sysc_module_data *data,
3246 u32 *sysc_flags)
3247{
3248 *sysc_flags = 0;
3249
3250 switch (data->cap->type) {
3251 case TI_SYSC_OMAP2:
3252 case TI_SYSC_OMAP2_TIMER:
3253 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3254 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3255 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3256 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3257 *sysc_flags |= SYSC_HAS_EMUFREE;
3258 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3259 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3260 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3261 *sysc_flags |= SYSC_HAS_SOFTRESET;
3262 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3263 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3264 break;
3265 case TI_SYSC_OMAP4:
3266 case TI_SYSC_OMAP4_TIMER:
3267 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3268 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3269 *sysc_flags |= SYSC_HAS_DMADISABLE;
3270 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3271 *sysc_flags |= SYSC_HAS_EMUFREE;
3272 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3273 *sysc_flags |= SYSC_HAS_SOFTRESET;
3274 break;
3275 case TI_SYSC_OMAP34XX_SR:
3276 case TI_SYSC_OMAP36XX_SR:
3277 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3278 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3279 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3280 break;
3281 default:
3282 if (data->cap->regbits->emufree_shift >= 0)
3283 *sysc_flags |= SYSC_HAS_EMUFREE;
3284 if (data->cap->regbits->enwkup_shift >= 0)
3285 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3286 if (data->cap->regbits->srst_shift >= 0)
3287 *sysc_flags |= SYSC_HAS_SOFTRESET;
3288 if (data->cap->regbits->autoidle_shift >= 0)
3289 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3290 break;
3291 }
3292
3293 if (data->cap->regbits->midle_shift >= 0 &&
3294 data->cfg->midlemodes)
3295 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3296
3297 if (data->cap->regbits->sidle_shift >= 0 &&
3298 data->cfg->sidlemodes)
3299 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3300
3301 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3302 *sysc_flags |= SYSC_NO_CACHE;
3303 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3304 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3305
3306 if (data->cfg->syss_mask & 1)
3307 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3308
3309 return 0;
3310}
3311
3312/**
3313 * omap_hwmod_init_idlemodes - initialize module idle modes
3314 * @dev: struct device
3315 * @data: module data
3316 * @idlemodes: module supported idle modes
3317 */
3318static int omap_hwmod_init_idlemodes(struct device *dev,
3319 const struct ti_sysc_module_data *data,
3320 u32 *idlemodes)
3321{
3322 *idlemodes = 0;
3323
3324 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3325 *idlemodes |= MSTANDBY_FORCE;
3326 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3327 *idlemodes |= MSTANDBY_NO;
3328 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3329 *idlemodes |= MSTANDBY_SMART;
3330 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3331 *idlemodes |= MSTANDBY_SMART_WKUP;
3332
3333 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3334 *idlemodes |= SIDLE_FORCE;
3335 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3336 *idlemodes |= SIDLE_NO;
3337 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3338 *idlemodes |= SIDLE_SMART;
3339 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3340 *idlemodes |= SIDLE_SMART_WKUP;
3341
3342 return 0;
3343}
3344
3345/**
3346 * omap_hwmod_check_module - check new module against platform data
3347 * @dev: struct device
3348 * @oh: module
3349 * @data: new module data
3350 * @sysc_fields: sysc register bits
3351 * @rev_offs: revision register offset
3352 * @sysc_offs: sysconfig register offset
3353 * @syss_offs: sysstatus register offset
3354 * @sysc_flags: sysc specific flags
3355 * @idlemodes: sysc supported idlemodes
3356 */
3357static int omap_hwmod_check_module(struct device *dev,
3358 struct omap_hwmod *oh,
3359 const struct ti_sysc_module_data *data,
3360 struct sysc_regbits *sysc_fields,
3361 s32 rev_offs, s32 sysc_offs,
3362 s32 syss_offs, u32 sysc_flags,
3363 u32 idlemodes)
3364{
3365 if (!oh->class->sysc)
3366 return -ENODEV;
3367
3368 if (oh->class->sysc->sysc_fields &&
3369 sysc_fields != oh->class->sysc->sysc_fields)
3370 dev_warn(dev, "sysc_fields mismatch\n");
3371
3372 if (rev_offs != oh->class->sysc->rev_offs)
3373 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3374 oh->class->sysc->rev_offs);
3375 if (sysc_offs != oh->class->sysc->sysc_offs)
3376 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3377 oh->class->sysc->sysc_offs);
3378 if (syss_offs != oh->class->sysc->syss_offs)
3379 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3380 oh->class->sysc->syss_offs);
3381
3382 if (sysc_flags != oh->class->sysc->sysc_flags)
3383 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3384 oh->class->sysc->sysc_flags);
3385
3386 if (idlemodes != oh->class->sysc->idlemodes)
3387 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3388 oh->class->sysc->idlemodes);
3389
3390 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3391 dev_warn(dev, "srst_udelay %i != %i\n",
3392 data->cfg->srst_udelay,
3393 oh->class->sysc->srst_udelay);
3394
3395 return 0;
3396}
3397
3398/**
3399 * omap_hwmod_allocate_module - allocate new module
3400 * @dev: struct device
3401 * @oh: module
3402 * @sysc_fields: sysc register bits
3403 * @clockdomain: clockdomain
3404 * @rev_offs: revision register offset
3405 * @sysc_offs: sysconfig register offset
3406 * @syss_offs: sysstatus register offset
3407 * @sysc_flags: sysc specific flags
3408 * @idlemodes: sysc supported idlemodes
3409 *
3410 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3411 */
3412static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3413 const struct ti_sysc_module_data *data,
3414 struct sysc_regbits *sysc_fields,
3415 struct clockdomain *clkdm,
3416 s32 rev_offs, s32 sysc_offs,
3417 s32 syss_offs, u32 sysc_flags,
3418 u32 idlemodes)
3419{
3420 struct omap_hwmod_class_sysconfig *sysc;
3421 struct omap_hwmod_class *class = NULL;
3422 struct omap_hwmod_ocp_if *oi = NULL;
3423 void __iomem *regs = NULL;
3424 unsigned long flags;
3425
3426 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3427 if (!sysc)
3428 return -ENOMEM;
3429
3430 sysc->sysc_fields = sysc_fields;
3431 sysc->rev_offs = rev_offs;
3432 sysc->sysc_offs = sysc_offs;
3433 sysc->syss_offs = syss_offs;
3434 sysc->sysc_flags = sysc_flags;
3435 sysc->idlemodes = idlemodes;
3436 sysc->srst_udelay = data->cfg->srst_udelay;
3437
3438 if (!oh->_mpu_rt_va) {
3439 regs = ioremap(data->module_pa,
3440 data->module_size);
3441 if (!regs)
3442 goto out_free_sysc;
3443 }
3444
3445 /*
3446 * We may need a new oh->class as the other devices in the same class
3447 * may not yet have ioremapped their registers.
3448 */
3449 if (oh->class->name && strcmp(oh->class->name, data->name)) {
3450 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3451 if (!class)
3452 goto out_unmap;
3453 }
3454
3455 if (list_empty(&oh->slave_ports)) {
3456 oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
3457 if (!oi)
3458 goto out_free_class;
3459
3460 /*
3461 * Note that we assume interconnect interface clocks will be
3462 * managed by the interconnect driver for OCPIF_SWSUP_IDLE case
3463 * on omap24xx and omap3.
3464 */
3465 oi->slave = oh;
3466 oi->user = OCP_USER_MPU | OCP_USER_SDMA;
3467 }
3468
3469 spin_lock_irqsave(&oh->_lock, flags);
3470 if (regs)
3471 oh->_mpu_rt_va = regs;
3472 if (class)
3473 oh->class = class;
3474 oh->class->sysc = sysc;
3475 if (oi)
3476 _add_link(oi);
3477 if (clkdm)
3478 oh->clkdm = clkdm;
3479 oh->_state = _HWMOD_STATE_INITIALIZED;
3480 oh->_postsetup_state = _HWMOD_STATE_DEFAULT;
3481 _setup(oh, NULL);
3482 spin_unlock_irqrestore(&oh->_lock, flags);
3483
3484 return 0;
3485
3486out_free_class:
3487 kfree(class);
3488out_unmap:
3489 iounmap(regs);
3490out_free_sysc:
3491 kfree(sysc);
3492 return -ENOMEM;
3493}
3494
3495static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
3496 { .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
3497};
3498
3499static const struct omap_hwmod_reset omap_reset_quirks[] = {
3500 { .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
3501 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3502 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3503 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
3504};
3505
3506static void
3507omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh,
3508 const struct ti_sysc_module_data *data,
3509 const struct omap_hwmod_reset *quirks,
3510 int quirks_sz)
3511{
3512 const struct omap_hwmod_reset *quirk;
3513 int i;
3514
3515 for (i = 0; i < quirks_sz; i++) {
3516 quirk = &quirks[i];
3517 if (!strncmp(data->name, quirk->match, quirk->len)) {
3518 oh->class->reset = quirk->reset;
3519
3520 return;
3521 }
3522 }
3523}
3524
3525static void
3526omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh,
3527 const struct ti_sysc_module_data *data)
3528{
3529 if (soc_is_omap24xx())
3530 omap_hwmod_init_reset_quirk(dev, oh, data,
3531 omap24xx_reset_quirks,
3532 ARRAY_SIZE(omap24xx_reset_quirks));
3533
3534 omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks,
3535 ARRAY_SIZE(omap_reset_quirks));
3536}
3537
3538/**
3539 * omap_hwmod_init_module - initialize new module
3540 * @dev: struct device
3541 * @data: module data
3542 * @cookie: cookie for the caller to use for later calls
3543 */
3544int omap_hwmod_init_module(struct device *dev,
3545 const struct ti_sysc_module_data *data,
3546 struct ti_sysc_cookie *cookie)
3547{
3548 struct omap_hwmod *oh;
3549 struct sysc_regbits *sysc_fields;
3550 s32 rev_offs, sysc_offs, syss_offs;
3551 u32 sysc_flags, idlemodes;
3552 int error;
3553
3554 if (!dev || !data || !data->name || !cookie)
3555 return -EINVAL;
3556
3557 oh = _lookup(data->name);
3558 if (!oh) {
3559 oh = kzalloc(sizeof(*oh), GFP_KERNEL);
3560 if (!oh)
3561 return -ENOMEM;
3562
3563 oh->name = data->name;
3564 oh->_state = _HWMOD_STATE_UNKNOWN;
3565 lockdep_register_key(&oh->hwmod_key);
3566
3567 /* Unused, can be handled by PRM driver handling resets */
3568 oh->prcm.omap4.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT;
3569
3570 oh->class = kzalloc(sizeof(*oh->class), GFP_KERNEL);
3571 if (!oh->class) {
3572 kfree(oh);
3573 return -ENOMEM;
3574 }
3575
3576 omap_hwmod_init_reset_quirks(dev, oh, data);
3577
3578 oh->class->name = data->name;
3579 mutex_lock(&list_lock);
3580 error = _register(oh);
3581 mutex_unlock(&list_lock);
3582 }
3583
3584 cookie->data = oh;
3585
3586 error = omap_hwmod_init_regbits(dev, oh, data, &sysc_fields);
3587 if (error)
3588 return error;
3589
3590 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3591 &sysc_offs, &syss_offs);
3592 if (error)
3593 return error;
3594
3595 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3596 if (error)
3597 return error;
3598
3599 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3600 if (error)
3601 return error;
3602
3603 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE)
3604 oh->flags |= HWMOD_NO_IDLE;
3605 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3606 oh->flags |= HWMOD_INIT_NO_IDLE;
3607 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3608 oh->flags |= HWMOD_INIT_NO_RESET;
3609 if (data->cfg->quirks & SYSC_QUIRK_USE_CLOCKACT)
3610 oh->flags |= HWMOD_SET_DEFAULT_CLOCKACT;
3611 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE)
3612 oh->flags |= HWMOD_SWSUP_SIDLE;
3613 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT)
3614 oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
3615 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
3616 oh->flags |= HWMOD_SWSUP_MSTANDBY;
3617 if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO)
3618 oh->flags |= HWMOD_CLKDM_NOAUTO;
3619
3620 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3621 rev_offs, sysc_offs, syss_offs,
3622 sysc_flags, idlemodes);
3623 if (!error)
3624 return error;
3625
3626 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3627 cookie->clkdm, rev_offs,
3628 sysc_offs, syss_offs,
3629 sysc_flags, idlemodes);
3630}
3631
3632/**
3633 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3634 *
3635 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3636 * early concole so that hwmod core doesn't reset and keep it in idle
3637 * that specific uart.
3638 */
3639#ifdef CONFIG_SERIAL_EARLYCON
3640static void __init omap_hwmod_setup_earlycon_flags(void)
3641{
3642 struct device_node *np;
3643 struct omap_hwmod *oh;
3644 const char *uart;
3645
3646 np = of_find_node_by_path("/chosen");
3647 if (np) {
3648 uart = of_get_property(np, "stdout-path", NULL);
3649 if (uart) {
3650 np = of_find_node_by_path(uart);
3651 if (np) {
3652 uart = of_get_property(np, "ti,hwmods", NULL);
3653 oh = omap_hwmod_lookup(uart);
3654 if (!oh) {
3655 uart = of_get_property(np->parent,
3656 "ti,hwmods",
3657 NULL);
3658 oh = omap_hwmod_lookup(uart);
3659 }
3660 if (oh)
3661 oh->flags |= DEBUG_OMAPUART_FLAGS;
3662 }
3663 }
3664 }
3665}
3666#endif
3667
3668/**
3669 * omap_hwmod_setup_all - set up all registered IP blocks
3670 *
3671 * Initialize and set up all IP blocks registered with the hwmod code.
3672 * Must be called after omap2_clk_init(). Resolves the struct clk
3673 * names to struct clk pointers for each registered omap_hwmod. Also
3674 * calls _setup() on each hwmod. Returns 0 upon success.
3675 */
3676static int __init omap_hwmod_setup_all(void)
3677{
3678 if (!inited)
3679 return 0;
3680
3681 _ensure_mpu_hwmod_is_setup(NULL);
3682
3683 omap_hwmod_for_each(_init, NULL);
3684#ifdef CONFIG_SERIAL_EARLYCON
3685 omap_hwmod_setup_earlycon_flags();
3686#endif
3687 omap_hwmod_for_each(_setup, NULL);
3688
3689 return 0;
3690}
3691omap_postcore_initcall(omap_hwmod_setup_all);
3692
3693/**
3694 * omap_hwmod_enable - enable an omap_hwmod
3695 * @oh: struct omap_hwmod *
3696 *
3697 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3698 * Returns -EINVAL on error or passes along the return value from _enable().
3699 */
3700int omap_hwmod_enable(struct omap_hwmod *oh)
3701{
3702 int r;
3703 unsigned long flags;
3704
3705 if (!oh)
3706 return -EINVAL;
3707
3708 spin_lock_irqsave(&oh->_lock, flags);
3709 r = _enable(oh);
3710 spin_unlock_irqrestore(&oh->_lock, flags);
3711
3712 return r;
3713}
3714
3715/**
3716 * omap_hwmod_idle - idle an omap_hwmod
3717 * @oh: struct omap_hwmod *
3718 *
3719 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3720 * Returns -EINVAL on error or passes along the return value from _idle().
3721 */
3722int omap_hwmod_idle(struct omap_hwmod *oh)
3723{
3724 int r;
3725 unsigned long flags;
3726
3727 if (!oh)
3728 return -EINVAL;
3729
3730 spin_lock_irqsave(&oh->_lock, flags);
3731 r = _idle(oh);
3732 spin_unlock_irqrestore(&oh->_lock, flags);
3733
3734 return r;
3735}
3736
3737/**
3738 * omap_hwmod_shutdown - shutdown an omap_hwmod
3739 * @oh: struct omap_hwmod *
3740 *
3741 * Shutdown an omap_hwmod @oh. Intended to be called by
3742 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3743 * the return value from _shutdown().
3744 */
3745int omap_hwmod_shutdown(struct omap_hwmod *oh)
3746{
3747 int r;
3748 unsigned long flags;
3749
3750 if (!oh)
3751 return -EINVAL;
3752
3753 spin_lock_irqsave(&oh->_lock, flags);
3754 r = _shutdown(oh);
3755 spin_unlock_irqrestore(&oh->_lock, flags);
3756
3757 return r;
3758}
3759
3760/*
3761 * IP block data retrieval functions
3762 */
3763
3764/**
3765 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3766 * @oh: struct omap_hwmod *
3767 *
3768 * Return the powerdomain pointer associated with the OMAP module
3769 * @oh's main clock. If @oh does not have a main clk, return the
3770 * powerdomain associated with the interface clock associated with the
3771 * module's MPU port. (XXX Perhaps this should use the SDMA port
3772 * instead?) Returns NULL on error, or a struct powerdomain * on
3773 * success.
3774 */
3775struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3776{
3777 struct clk *c;
3778 struct omap_hwmod_ocp_if *oi;
3779 struct clockdomain *clkdm;
3780 struct clk_hw_omap *clk;
3781 struct clk_hw *hw;
3782
3783 if (!oh)
3784 return NULL;
3785
3786 if (oh->clkdm)
3787 return oh->clkdm->pwrdm.ptr;
3788
3789 if (oh->_clk) {
3790 c = oh->_clk;
3791 } else {
3792 oi = _find_mpu_rt_port(oh);
3793 if (!oi)
3794 return NULL;
3795 c = oi->_clk;
3796 }
3797
3798 hw = __clk_get_hw(c);
3799 if (!hw)
3800 return NULL;
3801
3802 clk = to_clk_hw_omap(hw);
3803 if (!clk)
3804 return NULL;
3805
3806 clkdm = clk->clkdm;
3807 if (!clkdm)
3808 return NULL;
3809
3810 return clkdm->pwrdm.ptr;
3811}
3812
3813/**
3814 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3815 * @oh: struct omap_hwmod *
3816 *
3817 * Returns the virtual address corresponding to the beginning of the
3818 * module's register target, in the address range that is intended to
3819 * be used by the MPU. Returns the virtual address upon success or NULL
3820 * upon error.
3821 */
3822void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3823{
3824 if (!oh)
3825 return NULL;
3826
3827 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3828 return NULL;
3829
3830 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3831 return NULL;
3832
3833 return oh->_mpu_rt_va;
3834}
3835
3836/*
3837 * XXX what about functions for drivers to save/restore ocp_sysconfig
3838 * for context save/restore operations?
3839 */
3840
3841/**
3842 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3843 * contained in the hwmod module.
3844 * @oh: struct omap_hwmod *
3845 * @name: name of the reset line to lookup and assert
3846 *
3847 * Some IP like dsp, ipu or iva contain processor that require
3848 * an HW reset line to be assert / deassert in order to enable fully
3849 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3850 * yet supported on this OMAP; otherwise, passes along the return value
3851 * from _assert_hardreset().
3852 */
3853int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3854{
3855 int ret;
3856 unsigned long flags;
3857
3858 if (!oh)
3859 return -EINVAL;
3860
3861 spin_lock_irqsave(&oh->_lock, flags);
3862 ret = _assert_hardreset(oh, name);
3863 spin_unlock_irqrestore(&oh->_lock, flags);
3864
3865 return ret;
3866}
3867
3868/**
3869 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3870 * contained in the hwmod module.
3871 * @oh: struct omap_hwmod *
3872 * @name: name of the reset line to look up and deassert
3873 *
3874 * Some IP like dsp, ipu or iva contain processor that require
3875 * an HW reset line to be assert / deassert in order to enable fully
3876 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3877 * yet supported on this OMAP; otherwise, passes along the return value
3878 * from _deassert_hardreset().
3879 */
3880int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3881{
3882 int ret;
3883 unsigned long flags;
3884
3885 if (!oh)
3886 return -EINVAL;
3887
3888 spin_lock_irqsave(&oh->_lock, flags);
3889 ret = _deassert_hardreset(oh, name);
3890 spin_unlock_irqrestore(&oh->_lock, flags);
3891
3892 return ret;
3893}
3894
3895/**
3896 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3897 * @classname: struct omap_hwmod_class name to search for
3898 * @fn: callback function pointer to call for each hwmod in class @classname
3899 * @user: arbitrary context data to pass to the callback function
3900 *
3901 * For each omap_hwmod of class @classname, call @fn.
3902 * If the callback function returns something other than
3903 * zero, the iterator is terminated, and the callback function's return
3904 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3905 * if @classname or @fn are NULL, or passes back the error code from @fn.
3906 */
3907int omap_hwmod_for_each_by_class(const char *classname,
3908 int (*fn)(struct omap_hwmod *oh,
3909 void *user),
3910 void *user)
3911{
3912 struct omap_hwmod *temp_oh;
3913 int ret = 0;
3914
3915 if (!classname || !fn)
3916 return -EINVAL;
3917
3918 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3919 __func__, classname);
3920
3921 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3922 if (!strcmp(temp_oh->class->name, classname)) {
3923 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3924 __func__, temp_oh->name);
3925 ret = (*fn)(temp_oh, user);
3926 if (ret)
3927 break;
3928 }
3929 }
3930
3931 if (ret)
3932 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3933 __func__, ret);
3934
3935 return ret;
3936}
3937
3938/**
3939 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3940 * @oh: struct omap_hwmod *
3941 * @state: state that _setup() should leave the hwmod in
3942 *
3943 * Sets the hwmod state that @oh will enter at the end of _setup()
3944 * (called by omap_hwmod_setup_*()). See also the documentation
3945 * for _setup_postsetup(), above. Returns 0 upon success or
3946 * -EINVAL if there is a problem with the arguments or if the hwmod is
3947 * in the wrong state.
3948 */
3949int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3950{
3951 int ret;
3952 unsigned long flags;
3953
3954 if (!oh)
3955 return -EINVAL;
3956
3957 if (state != _HWMOD_STATE_DISABLED &&
3958 state != _HWMOD_STATE_ENABLED &&
3959 state != _HWMOD_STATE_IDLE)
3960 return -EINVAL;
3961
3962 spin_lock_irqsave(&oh->_lock, flags);
3963
3964 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3965 ret = -EINVAL;
3966 goto ohsps_unlock;
3967 }
3968
3969 oh->_postsetup_state = state;
3970 ret = 0;
3971
3972ohsps_unlock:
3973 spin_unlock_irqrestore(&oh->_lock, flags);
3974
3975 return ret;
3976}
3977
3978/**
3979 * omap_hwmod_get_context_loss_count - get lost context count
3980 * @oh: struct omap_hwmod *
3981 *
3982 * Returns the context loss count of associated @oh
3983 * upon success, or zero if no context loss data is available.
3984 *
3985 * On OMAP4, this queries the per-hwmod context loss register,
3986 * assuming one exists. If not, or on OMAP2/3, this queries the
3987 * enclosing powerdomain context loss count.
3988 */
3989int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3990{
3991 struct powerdomain *pwrdm;
3992 int ret = 0;
3993
3994 if (soc_ops.get_context_lost)
3995 return soc_ops.get_context_lost(oh);
3996
3997 pwrdm = omap_hwmod_get_pwrdm(oh);
3998 if (pwrdm)
3999 ret = pwrdm_get_context_loss_count(pwrdm);
4000
4001 return ret;
4002}
4003
4004/**
4005 * omap_hwmod_init - initialize the hwmod code
4006 *
4007 * Sets up some function pointers needed by the hwmod code to operate on the
4008 * currently-booted SoC. Intended to be called once during kernel init
4009 * before any hwmods are registered. No return value.
4010 */
4011void __init omap_hwmod_init(void)
4012{
4013 if (cpu_is_omap24xx()) {
4014 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4015 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4016 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4017 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4018 } else if (cpu_is_omap34xx()) {
4019 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4020 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4021 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4022 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4023 soc_ops.init_clkdm = _init_clkdm;
4024 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4025 soc_ops.enable_module = _omap4_enable_module;
4026 soc_ops.disable_module = _omap4_disable_module;
4027 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4028 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4029 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4030 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4031 soc_ops.init_clkdm = _init_clkdm;
4032 soc_ops.update_context_lost = _omap4_update_context_lost;
4033 soc_ops.get_context_lost = _omap4_get_context_lost;
4034 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4035 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4036 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
4037 soc_is_am43xx()) {
4038 soc_ops.enable_module = _omap4_enable_module;
4039 soc_ops.disable_module = _omap4_disable_module;
4040 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4041 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4042 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4043 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4044 soc_ops.init_clkdm = _init_clkdm;
4045 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4046 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4047 } else {
4048 WARN(1, "omap_hwmod: unknown SoC type\n");
4049 }
4050
4051 _init_clkctrl_providers();
4052
4053 inited = true;
4054}
4055
4056/**
4057 * omap_hwmod_get_main_clk - get pointer to main clock name
4058 * @oh: struct omap_hwmod *
4059 *
4060 * Returns the main clock name assocated with @oh upon success,
4061 * or NULL if @oh is NULL.
4062 */
4063const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4064{
4065 if (!oh)
4066 return NULL;
4067
4068 return oh->main_clk;
4069}