1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * Copyright (C) 2016 PHYTEC Messtechnik GmbH
 4 * Author: Christian Hemp <c.hemp@phytec.de>
 5 */
 6
 7/dts-v1/;
 8#include "imx6ul.dtsi"
 9#include "imx6ul-phytec-phycore-som.dtsi"
10#include "imx6ul-phytec-segin.dtsi"
11#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
12#include "imx6ul-phytec-segin-peb-av-02.dtsi"
13#include "imx6ul-phytec-segin-peb-wlbt-05.dtsi"
14
15/ {
16	model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with NAND";
17	compatible = "phytec,imx6ul-pbacd10-nand", "phytec,imx6ul-pbacd10",
18		     "phytec,imx6ul-pcl063", "fsl,imx6ul";
19};
20
21&adc1 {
22	status = "okay";
23};
24
25&can1 {
26	status = "okay";
27};
28
29&tlv320 {
30	status = "okay";
31};
32
33&ecspi3 {
34	status = "okay";
35};
36
37&ethphy1 {
38	status = "okay";
39};
40
41&ethphy2 {
42	status = "okay";
43};
44
45&fec1 {
46	status = "okay";
47};
48
49&fec2 {
50	status = "okay";
51};
52
53&gpmi {
54	status = "okay";
55};
56
57&i2c_rtc {
58	status = "okay";
59};
60
61&reg_can1_en {
62	status = "okay";
63};
64
65&reg_sound_1v8 {
66	status = "okay";
67};
68
69&reg_sound_3v3 {
70	status = "okay";
71};
72
73&sai2 {
74	status = "okay";
75};
76
77&sound {
78	status = "okay";
79};
80
81&uart5 {
82	status = "okay";
83};
84
85&usbotg1 {
86	status = "okay";
87};
88
89&usbotg2 {
90	status = "okay";
91};
92
93&usdhc1 {
94	status = "okay";
95};

 1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * Copyright (C) 2016 PHYTEC Messtechnik GmbH
 4 * Author: Christian Hemp <c.hemp@phytec.de>
 5 */
 6
 7/dts-v1/;
 8#include "imx6ul.dtsi"
 9#include "imx6ul-phytec-phycore-som.dtsi"
10#include "imx6ul-phytec-segin.dtsi"
11#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
12#include "imx6ul-phytec-segin-peb-av-02.dtsi"
 
13
14/ {
15	model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with NAND";
16	compatible = "phytec,imx6ul-pbacd10-nand", "phytec,imx6ul-pbacd10",
17		     "phytec,imx6ul-pcl063", "fsl,imx6ul";
18};
19
20&adc1 {
21	status = "okay";
22};
23
24&can1 {
25	status = "okay";
26};
27
28&tlv320 {
29	status = "okay";
30};
31
32&ecspi3 {
33	status = "okay";
34};
35
36&ethphy1 {
37	status = "okay";
38};
39
40&ethphy2 {
41	status = "okay";
42};
43
44&fec1 {
45	status = "okay";
46};
47
48&fec2 {
49	status = "okay";
50};
51
52&gpmi {
53	status = "okay";
54};
55
56&i2c_rtc {
57	status = "okay";
58};
59
60&reg_can1_en {
61	status = "okay";
62};
63
64&reg_sound_1v8 {
65	status = "okay";
66};
67
68&reg_sound_3v3 {
69	status = "okay";
70};
71
72&sai2 {
73	status = "okay";
74};
75
76&sound {
77	status = "okay";
78};
79
80&uart5 {
81	status = "okay";
82};
83
84&usbotg1 {
85	status = "okay";
86};
87
88&usbotg2 {
89	status = "okay";
90};
91
92&usdhc1 {
93	status = "okay";
94};