1/*
  2 * TXx9 ACLC AC97 driver
  3 *
  4 * Copyright (C) 2009 Atsushi Nemoto
  5 *
  6 * Based on RBTX49xx patch from CELF patch archive.
  7 * (C) Copyright TOSHIBA CORPORATION 2004-2006
  8 *
  9 * This program is free software; you can redistribute it and/or modify
 10 * it under the terms of the GNU General Public License version 2 as
 11 * published by the Free Software Foundation.
 12 */
 13
 14#include <linux/init.h>
 15#include <linux/module.h>
 16#include <linux/delay.h>
 17#include <linux/interrupt.h>
 18#include <linux/io.h>
 19#include <linux/gfp.h>
 20#include <sound/core.h>
 21#include <sound/pcm.h>
 22#include <sound/soc.h>
 23#include "txx9aclc.h"
 24
 25#define AC97_DIR	\
 26	(SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
 27
 28#define AC97_RATES	\
 29	SNDRV_PCM_RATE_8000_48000
 30
 31#ifdef __BIG_ENDIAN
 32#define AC97_FMTS	SNDRV_PCM_FMTBIT_S16_BE
 33#else
 34#define AC97_FMTS	SNDRV_PCM_FMTBIT_S16_LE
 35#endif
 36
 37static DECLARE_WAIT_QUEUE_HEAD(ac97_waitq);
 38
 39/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
 40static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
 41
 42static int txx9aclc_regready(struct txx9aclc_plat_drvdata *drvdata)
 43{
 44	return __raw_readl(drvdata->base + ACINTSTS) & ACINT_REGACCRDY;
 45}
 46
 47/* AC97 controller reads codec register */
 48static unsigned short txx9aclc_ac97_read(struct snd_ac97 *ac97,
 49					 unsigned short reg)
 50{
 51	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
 52	void __iomem *base = drvdata->base;
 53	u32 dat;
 54
 55	if (!(__raw_readl(base + ACINTSTS) & ACINT_CODECRDY(ac97->num)))
 56		return 0xffff;
 57	reg |= ac97->num << 7;
 58	dat = (reg << ACREGACC_REG_SHIFT) | ACREGACC_READ;
 59	__raw_writel(dat, base + ACREGACC);
 60	__raw_writel(ACINT_REGACCRDY, base + ACINTEN);
 61	if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(txx9aclc_drvdata), HZ)) {
 62		__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
 63		printk(KERN_ERR "ac97 read timeout (reg %#x)\n", reg);
 64		dat = 0xffff;
 65		goto done;
 66	}
 67	dat = __raw_readl(base + ACREGACC);
 68	if (((dat >> ACREGACC_REG_SHIFT) & 0xff) != reg) {
 69		printk(KERN_ERR "reg mismatch %x with %x\n",
 70			dat, reg);
 71		dat = 0xffff;
 72		goto done;
 73	}
 74	dat = (dat >> ACREGACC_DAT_SHIFT) & 0xffff;
 75done:
 76	__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
 77	return dat;
 78}
 79
 80/* AC97 controller writes to codec register */
 81static void txx9aclc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
 82				unsigned short val)
 83{
 84	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
 85	void __iomem *base = drvdata->base;
 86
 87	__raw_writel(((reg | (ac97->num << 7)) << ACREGACC_REG_SHIFT) |
 88		     (val << ACREGACC_DAT_SHIFT),
 89		     base + ACREGACC);
 90	__raw_writel(ACINT_REGACCRDY, base + ACINTEN);
 91	if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(txx9aclc_drvdata), HZ)) {
 92		printk(KERN_ERR
 93			"ac97 write timeout (reg %#x)\n", reg);
 94	}
 95	__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
 96}
 97
 98static void txx9aclc_ac97_cold_reset(struct snd_ac97 *ac97)
 99{
100	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
101	void __iomem *base = drvdata->base;
102	u32 ready = ACINT_CODECRDY(ac97->num) | ACINT_REGACCRDY;
103
104	__raw_writel(ACCTL_ENLINK, base + ACCTLDIS);
105	mmiowb();
106	udelay(1);
107	__raw_writel(ACCTL_ENLINK, base + ACCTLEN);
108	/* wait for primary codec ready status */
109	__raw_writel(ready, base + ACINTEN);
110	if (!wait_event_timeout(ac97_waitq,
111				(__raw_readl(base + ACINTSTS) & ready) == ready,
112				HZ)) {
113		dev_err(&ac97->dev, "primary codec is not ready "
114			"(status %#x)\n",
115			__raw_readl(base + ACINTSTS));
116	}
117	__raw_writel(ACINT_REGACCRDY, base + ACINTSTS);
118	__raw_writel(ready, base + ACINTDIS);
119}
120
121/* AC97 controller operations */
122static struct snd_ac97_bus_ops txx9aclc_ac97_ops = {
123	.read		= txx9aclc_ac97_read,
124	.write		= txx9aclc_ac97_write,
125	.reset		= txx9aclc_ac97_cold_reset,
126};
127
128static irqreturn_t txx9aclc_ac97_irq(int irq, void *dev_id)
129{
130	struct txx9aclc_plat_drvdata *drvdata = dev_id;
131	void __iomem *base = drvdata->base;
132
133	__raw_writel(__raw_readl(base + ACINTMSTS), base + ACINTDIS);
134	wake_up(&ac97_waitq);
135	return IRQ_HANDLED;
136}
137
138static int txx9aclc_ac97_probe(struct snd_soc_dai *dai)
139{
140	txx9aclc_drvdata = snd_soc_dai_get_drvdata(dai);
141	return 0;
142}
143
144static int txx9aclc_ac97_remove(struct snd_soc_dai *dai)
145{
146	struct txx9aclc_plat_drvdata *drvdata = snd_soc_dai_get_drvdata(dai);
147
148	/* disable AC-link */
149	__raw_writel(ACCTL_ENLINK, drvdata->base + ACCTLDIS);
150	txx9aclc_drvdata = NULL;
151	return 0;
152}
153
154static struct snd_soc_dai_driver txx9aclc_ac97_dai = {
155	.bus_control		= true,
156	.probe			= txx9aclc_ac97_probe,
157	.remove			= txx9aclc_ac97_remove,
158	.playback = {
159		.rates		= AC97_RATES,
160		.formats	= AC97_FMTS,
161		.channels_min	= 2,
162		.channels_max	= 2,
163	},
164	.capture = {
165		.rates		= AC97_RATES,
166		.formats	= AC97_FMTS,
167		.channels_min	= 2,
168		.channels_max	= 2,
169	},
170};
171
172static const struct snd_soc_component_driver txx9aclc_ac97_component = {
173	.name		= "txx9aclc-ac97",
174};
175
176static int txx9aclc_ac97_dev_probe(struct platform_device *pdev)
177{
178	struct txx9aclc_plat_drvdata *drvdata;
179	struct resource *r;
180	int err;
181	int irq;
182
183	irq = platform_get_irq(pdev, 0);
184	if (irq < 0)
185		return irq;
186
187	drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
188	if (!drvdata)
189		return -ENOMEM;
190
191	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
192	drvdata->base = devm_ioremap_resource(&pdev->dev, r);
193	if (IS_ERR(drvdata->base))
194		return PTR_ERR(drvdata->base);
195
196	platform_set_drvdata(pdev, drvdata);
197	drvdata->physbase = r->start;
198	if (sizeof(drvdata->physbase) > sizeof(r->start) &&
199	    r->start >= TXX9_DIRECTMAP_BASE &&
200	    r->start < TXX9_DIRECTMAP_BASE + 0x400000)
201		drvdata->physbase |= 0xf00000000ull;
202	err = devm_request_irq(&pdev->dev, irq, txx9aclc_ac97_irq,
203			       0, dev_name(&pdev->dev), drvdata);
204	if (err < 0)
205		return err;
206
207	err = snd_soc_set_ac97_ops(&txx9aclc_ac97_ops);
208	if (err < 0)
209		return err;
210
211	return snd_soc_register_component(&pdev->dev, &txx9aclc_ac97_component,
212					  &txx9aclc_ac97_dai, 1);
213}
214
215static int txx9aclc_ac97_dev_remove(struct platform_device *pdev)
216{
217	snd_soc_unregister_component(&pdev->dev);
218	snd_soc_set_ac97_ops(NULL);
219	return 0;
220}
221
222static struct platform_driver txx9aclc_ac97_driver = {
223	.probe		= txx9aclc_ac97_dev_probe,
224	.remove		= txx9aclc_ac97_dev_remove,
225	.driver		= {
226		.name	= "txx9aclc-ac97",
227	},
228};
229
230module_platform_driver(txx9aclc_ac97_driver);
231
232MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
233MODULE_DESCRIPTION("TXx9 ACLC AC97 driver");
234MODULE_LICENSE("GPL");
235MODULE_ALIAS("platform:txx9aclc-ac97");