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v6.2
   1/* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) */
   2/*
   3 *  Video for Linux Two controls header file
   4 *
   5 *  Copyright (C) 1999-2012 the contributors
   6 *
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
   7 *  The contents of this header was split off from videodev2.h. All control
   8 *  definitions should be added to this header, which is included by
   9 *  videodev2.h.
  10 */
  11
  12#ifndef __LINUX_V4L2_CONTROLS_H
  13#define __LINUX_V4L2_CONTROLS_H
  14
  15#include <linux/const.h>
  16#include <linux/types.h>
  17
  18/* Control classes */
  19#define V4L2_CTRL_CLASS_USER		0x00980000	/* Old-style 'user' controls */
  20#define V4L2_CTRL_CLASS_CODEC		0x00990000	/* Stateful codec controls */
  21#define V4L2_CTRL_CLASS_CAMERA		0x009a0000	/* Camera class controls */
  22#define V4L2_CTRL_CLASS_FM_TX		0x009b0000	/* FM Modulator controls */
  23#define V4L2_CTRL_CLASS_FLASH		0x009c0000	/* Camera flash controls */
  24#define V4L2_CTRL_CLASS_JPEG		0x009d0000	/* JPEG-compression controls */
  25#define V4L2_CTRL_CLASS_IMAGE_SOURCE	0x009e0000	/* Image source controls */
  26#define V4L2_CTRL_CLASS_IMAGE_PROC	0x009f0000	/* Image processing controls */
  27#define V4L2_CTRL_CLASS_DV		0x00a00000	/* Digital Video controls */
  28#define V4L2_CTRL_CLASS_FM_RX		0x00a10000	/* FM Receiver controls */
  29#define V4L2_CTRL_CLASS_RF_TUNER	0x00a20000	/* RF tuner controls */
  30#define V4L2_CTRL_CLASS_DETECT		0x00a30000	/* Detection controls */
  31#define V4L2_CTRL_CLASS_CODEC_STATELESS 0x00a40000	/* Stateless codecs controls */
  32#define V4L2_CTRL_CLASS_COLORIMETRY	0x00a50000	/* Colorimetry controls */
  33
  34/* User-class control IDs */
  35
  36#define V4L2_CID_BASE			(V4L2_CTRL_CLASS_USER | 0x900)
  37#define V4L2_CID_USER_BASE		V4L2_CID_BASE
  38#define V4L2_CID_USER_CLASS		(V4L2_CTRL_CLASS_USER | 1)
  39#define V4L2_CID_BRIGHTNESS		(V4L2_CID_BASE+0)
  40#define V4L2_CID_CONTRAST		(V4L2_CID_BASE+1)
  41#define V4L2_CID_SATURATION		(V4L2_CID_BASE+2)
  42#define V4L2_CID_HUE			(V4L2_CID_BASE+3)
  43#define V4L2_CID_AUDIO_VOLUME		(V4L2_CID_BASE+5)
  44#define V4L2_CID_AUDIO_BALANCE		(V4L2_CID_BASE+6)
  45#define V4L2_CID_AUDIO_BASS		(V4L2_CID_BASE+7)
  46#define V4L2_CID_AUDIO_TREBLE		(V4L2_CID_BASE+8)
  47#define V4L2_CID_AUDIO_MUTE		(V4L2_CID_BASE+9)
  48#define V4L2_CID_AUDIO_LOUDNESS		(V4L2_CID_BASE+10)
  49#define V4L2_CID_BLACK_LEVEL		(V4L2_CID_BASE+11) /* Deprecated */
  50#define V4L2_CID_AUTO_WHITE_BALANCE	(V4L2_CID_BASE+12)
  51#define V4L2_CID_DO_WHITE_BALANCE	(V4L2_CID_BASE+13)
  52#define V4L2_CID_RED_BALANCE		(V4L2_CID_BASE+14)
  53#define V4L2_CID_BLUE_BALANCE		(V4L2_CID_BASE+15)
  54#define V4L2_CID_GAMMA			(V4L2_CID_BASE+16)
  55#define V4L2_CID_WHITENESS		(V4L2_CID_GAMMA) /* Deprecated */
  56#define V4L2_CID_EXPOSURE		(V4L2_CID_BASE+17)
  57#define V4L2_CID_AUTOGAIN		(V4L2_CID_BASE+18)
  58#define V4L2_CID_GAIN			(V4L2_CID_BASE+19)
  59#define V4L2_CID_HFLIP			(V4L2_CID_BASE+20)
  60#define V4L2_CID_VFLIP			(V4L2_CID_BASE+21)
  61
  62#define V4L2_CID_POWER_LINE_FREQUENCY	(V4L2_CID_BASE+24)
  63enum v4l2_power_line_frequency {
  64	V4L2_CID_POWER_LINE_FREQUENCY_DISABLED	= 0,
  65	V4L2_CID_POWER_LINE_FREQUENCY_50HZ	= 1,
  66	V4L2_CID_POWER_LINE_FREQUENCY_60HZ	= 2,
  67	V4L2_CID_POWER_LINE_FREQUENCY_AUTO	= 3,
  68};
  69#define V4L2_CID_HUE_AUTO			(V4L2_CID_BASE+25)
  70#define V4L2_CID_WHITE_BALANCE_TEMPERATURE	(V4L2_CID_BASE+26)
  71#define V4L2_CID_SHARPNESS			(V4L2_CID_BASE+27)
  72#define V4L2_CID_BACKLIGHT_COMPENSATION		(V4L2_CID_BASE+28)
  73#define V4L2_CID_CHROMA_AGC                     (V4L2_CID_BASE+29)
  74#define V4L2_CID_COLOR_KILLER                   (V4L2_CID_BASE+30)
  75#define V4L2_CID_COLORFX			(V4L2_CID_BASE+31)
  76enum v4l2_colorfx {
  77	V4L2_COLORFX_NONE			= 0,
  78	V4L2_COLORFX_BW				= 1,
  79	V4L2_COLORFX_SEPIA			= 2,
  80	V4L2_COLORFX_NEGATIVE			= 3,
  81	V4L2_COLORFX_EMBOSS			= 4,
  82	V4L2_COLORFX_SKETCH			= 5,
  83	V4L2_COLORFX_SKY_BLUE			= 6,
  84	V4L2_COLORFX_GRASS_GREEN		= 7,
  85	V4L2_COLORFX_SKIN_WHITEN		= 8,
  86	V4L2_COLORFX_VIVID			= 9,
  87	V4L2_COLORFX_AQUA			= 10,
  88	V4L2_COLORFX_ART_FREEZE			= 11,
  89	V4L2_COLORFX_SILHOUETTE			= 12,
  90	V4L2_COLORFX_SOLARIZATION		= 13,
  91	V4L2_COLORFX_ANTIQUE			= 14,
  92	V4L2_COLORFX_SET_CBCR			= 15,
  93	V4L2_COLORFX_SET_RGB			= 16,
  94};
  95#define V4L2_CID_AUTOBRIGHTNESS			(V4L2_CID_BASE+32)
  96#define V4L2_CID_BAND_STOP_FILTER		(V4L2_CID_BASE+33)
  97
  98#define V4L2_CID_ROTATE				(V4L2_CID_BASE+34)
  99#define V4L2_CID_BG_COLOR			(V4L2_CID_BASE+35)
 100
 101#define V4L2_CID_CHROMA_GAIN                    (V4L2_CID_BASE+36)
 102
 103#define V4L2_CID_ILLUMINATORS_1			(V4L2_CID_BASE+37)
 104#define V4L2_CID_ILLUMINATORS_2			(V4L2_CID_BASE+38)
 105
 106#define V4L2_CID_MIN_BUFFERS_FOR_CAPTURE	(V4L2_CID_BASE+39)
 107#define V4L2_CID_MIN_BUFFERS_FOR_OUTPUT		(V4L2_CID_BASE+40)
 108
 109#define V4L2_CID_ALPHA_COMPONENT		(V4L2_CID_BASE+41)
 110#define V4L2_CID_COLORFX_CBCR			(V4L2_CID_BASE+42)
 111#define V4L2_CID_COLORFX_RGB			(V4L2_CID_BASE+43)
 112
 113/* last CID + 1 */
 114#define V4L2_CID_LASTP1                         (V4L2_CID_BASE+44)
 115
 116/* USER-class private control IDs */
 117
 118/* The base for the meye driver controls. See linux/meye.h for the list
 119 * of controls. We reserve 16 controls for this driver. */
 120#define V4L2_CID_USER_MEYE_BASE			(V4L2_CID_USER_BASE + 0x1000)
 121
 122/* The base for the bttv driver controls.
 123 * We reserve 32 controls for this driver. */
 124#define V4L2_CID_USER_BTTV_BASE			(V4L2_CID_USER_BASE + 0x1010)
 125
 126
 127/* The base for the s2255 driver controls.
 128 * We reserve 16 controls for this driver. */
 129#define V4L2_CID_USER_S2255_BASE		(V4L2_CID_USER_BASE + 0x1030)
 130
 131/*
 132 * The base for the si476x driver controls. See include/media/drv-intf/si476x.h
 133 * for the list of controls. Total of 16 controls is reserved for this driver
 134 */
 135#define V4L2_CID_USER_SI476X_BASE		(V4L2_CID_USER_BASE + 0x1040)
 136
 137/* The base for the TI VPE driver controls. Total of 16 controls is reserved for
 138 * this driver */
 139#define V4L2_CID_USER_TI_VPE_BASE		(V4L2_CID_USER_BASE + 0x1050)
 140
 141/* The base for the saa7134 driver controls.
 142 * We reserve 16 controls for this driver. */
 143#define V4L2_CID_USER_SAA7134_BASE		(V4L2_CID_USER_BASE + 0x1060)
 144
 145/* The base for the adv7180 driver controls.
 146 * We reserve 16 controls for this driver. */
 147#define V4L2_CID_USER_ADV7180_BASE		(V4L2_CID_USER_BASE + 0x1070)
 148
 149/* The base for the tc358743 driver controls.
 150 * We reserve 16 controls for this driver. */
 151#define V4L2_CID_USER_TC358743_BASE		(V4L2_CID_USER_BASE + 0x1080)
 152
 153/* The base for the max217x driver controls.
 154 * We reserve 32 controls for this driver
 155 */
 156#define V4L2_CID_USER_MAX217X_BASE		(V4L2_CID_USER_BASE + 0x1090)
 157
 158/* The base for the imx driver controls.
 159 * We reserve 16 controls for this driver. */
 160#define V4L2_CID_USER_IMX_BASE			(V4L2_CID_USER_BASE + 0x10b0)
 161
 162/*
 163 * The base for the atmel isc driver controls.
 164 * We reserve 32 controls for this driver.
 165 */
 166#define V4L2_CID_USER_ATMEL_ISC_BASE		(V4L2_CID_USER_BASE + 0x10c0)
 167
 168/*
 169 * The base for the CODA driver controls.
 170 * We reserve 16 controls for this driver.
 171 */
 172#define V4L2_CID_USER_CODA_BASE			(V4L2_CID_USER_BASE + 0x10e0)
 173/*
 174 * The base for MIPI CCS driver controls.
 175 * We reserve 128 controls for this driver.
 176 */
 177#define V4L2_CID_USER_CCS_BASE			(V4L2_CID_USER_BASE + 0x10f0)
 178/*
 179 * The base for Allegro driver controls.
 180 * We reserve 16 controls for this driver.
 181 */
 182#define V4L2_CID_USER_ALLEGRO_BASE		(V4L2_CID_USER_BASE + 0x1170)
 183
 184/*
 185 * The base for the isl7998x driver controls.
 186 * We reserve 16 controls for this driver.
 187 */
 188#define V4L2_CID_USER_ISL7998X_BASE		(V4L2_CID_USER_BASE + 0x1180)
 189
 190/*
 191 * The base for DW100 driver controls.
 192 * We reserve 16 controls for this driver.
 193 */
 194#define V4L2_CID_USER_DW100_BASE		(V4L2_CID_USER_BASE + 0x1190)
 195
 196/*
 197 * The base for Aspeed driver controls.
 198 * We reserve 16 controls for this driver.
 199 */
 200#define V4L2_CID_USER_ASPEED_BASE		(V4L2_CID_USER_BASE + 0x11a0)
 201
 202/* MPEG-class control IDs */
 203/* The MPEG controls are applicable to all codec controls
 204 * and the 'MPEG' part of the define is historical */
 205
 206#define V4L2_CID_CODEC_BASE			(V4L2_CTRL_CLASS_CODEC | 0x900)
 207#define V4L2_CID_CODEC_CLASS			(V4L2_CTRL_CLASS_CODEC | 1)
 208
 209/*  MPEG streams, specific to multiplexed streams */
 210#define V4L2_CID_MPEG_STREAM_TYPE		(V4L2_CID_CODEC_BASE+0)
 211enum v4l2_mpeg_stream_type {
 212	V4L2_MPEG_STREAM_TYPE_MPEG2_PS   = 0, /* MPEG-2 program stream */
 213	V4L2_MPEG_STREAM_TYPE_MPEG2_TS   = 1, /* MPEG-2 transport stream */
 214	V4L2_MPEG_STREAM_TYPE_MPEG1_SS   = 2, /* MPEG-1 system stream */
 215	V4L2_MPEG_STREAM_TYPE_MPEG2_DVD  = 3, /* MPEG-2 DVD-compatible stream */
 216	V4L2_MPEG_STREAM_TYPE_MPEG1_VCD  = 4, /* MPEG-1 VCD-compatible stream */
 217	V4L2_MPEG_STREAM_TYPE_MPEG2_SVCD = 5, /* MPEG-2 SVCD-compatible stream */
 218};
 219#define V4L2_CID_MPEG_STREAM_PID_PMT		(V4L2_CID_CODEC_BASE+1)
 220#define V4L2_CID_MPEG_STREAM_PID_AUDIO		(V4L2_CID_CODEC_BASE+2)
 221#define V4L2_CID_MPEG_STREAM_PID_VIDEO		(V4L2_CID_CODEC_BASE+3)
 222#define V4L2_CID_MPEG_STREAM_PID_PCR		(V4L2_CID_CODEC_BASE+4)
 223#define V4L2_CID_MPEG_STREAM_PES_ID_AUDIO	(V4L2_CID_CODEC_BASE+5)
 224#define V4L2_CID_MPEG_STREAM_PES_ID_VIDEO	(V4L2_CID_CODEC_BASE+6)
 225#define V4L2_CID_MPEG_STREAM_VBI_FMT		(V4L2_CID_CODEC_BASE+7)
 226enum v4l2_mpeg_stream_vbi_fmt {
 227	V4L2_MPEG_STREAM_VBI_FMT_NONE = 0,  /* No VBI in the MPEG stream */
 228	V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1,  /* VBI in private packets, IVTV format */
 229};
 230
 231/*  MPEG audio controls specific to multiplexed streams  */
 232#define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ	(V4L2_CID_CODEC_BASE+100)
 233enum v4l2_mpeg_audio_sampling_freq {
 234	V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0,
 235	V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000 = 1,
 236	V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000 = 2,
 237};
 238#define V4L2_CID_MPEG_AUDIO_ENCODING		(V4L2_CID_CODEC_BASE+101)
 239enum v4l2_mpeg_audio_encoding {
 240	V4L2_MPEG_AUDIO_ENCODING_LAYER_1 = 0,
 241	V4L2_MPEG_AUDIO_ENCODING_LAYER_2 = 1,
 242	V4L2_MPEG_AUDIO_ENCODING_LAYER_3 = 2,
 243	V4L2_MPEG_AUDIO_ENCODING_AAC     = 3,
 244	V4L2_MPEG_AUDIO_ENCODING_AC3     = 4,
 245};
 246#define V4L2_CID_MPEG_AUDIO_L1_BITRATE		(V4L2_CID_CODEC_BASE+102)
 247enum v4l2_mpeg_audio_l1_bitrate {
 248	V4L2_MPEG_AUDIO_L1_BITRATE_32K  = 0,
 249	V4L2_MPEG_AUDIO_L1_BITRATE_64K  = 1,
 250	V4L2_MPEG_AUDIO_L1_BITRATE_96K  = 2,
 251	V4L2_MPEG_AUDIO_L1_BITRATE_128K = 3,
 252	V4L2_MPEG_AUDIO_L1_BITRATE_160K = 4,
 253	V4L2_MPEG_AUDIO_L1_BITRATE_192K = 5,
 254	V4L2_MPEG_AUDIO_L1_BITRATE_224K = 6,
 255	V4L2_MPEG_AUDIO_L1_BITRATE_256K = 7,
 256	V4L2_MPEG_AUDIO_L1_BITRATE_288K = 8,
 257	V4L2_MPEG_AUDIO_L1_BITRATE_320K = 9,
 258	V4L2_MPEG_AUDIO_L1_BITRATE_352K = 10,
 259	V4L2_MPEG_AUDIO_L1_BITRATE_384K = 11,
 260	V4L2_MPEG_AUDIO_L1_BITRATE_416K = 12,
 261	V4L2_MPEG_AUDIO_L1_BITRATE_448K = 13,
 262};
 263#define V4L2_CID_MPEG_AUDIO_L2_BITRATE		(V4L2_CID_CODEC_BASE+103)
 264enum v4l2_mpeg_audio_l2_bitrate {
 265	V4L2_MPEG_AUDIO_L2_BITRATE_32K  = 0,
 266	V4L2_MPEG_AUDIO_L2_BITRATE_48K  = 1,
 267	V4L2_MPEG_AUDIO_L2_BITRATE_56K  = 2,
 268	V4L2_MPEG_AUDIO_L2_BITRATE_64K  = 3,
 269	V4L2_MPEG_AUDIO_L2_BITRATE_80K  = 4,
 270	V4L2_MPEG_AUDIO_L2_BITRATE_96K  = 5,
 271	V4L2_MPEG_AUDIO_L2_BITRATE_112K = 6,
 272	V4L2_MPEG_AUDIO_L2_BITRATE_128K = 7,
 273	V4L2_MPEG_AUDIO_L2_BITRATE_160K = 8,
 274	V4L2_MPEG_AUDIO_L2_BITRATE_192K = 9,
 275	V4L2_MPEG_AUDIO_L2_BITRATE_224K = 10,
 276	V4L2_MPEG_AUDIO_L2_BITRATE_256K = 11,
 277	V4L2_MPEG_AUDIO_L2_BITRATE_320K = 12,
 278	V4L2_MPEG_AUDIO_L2_BITRATE_384K = 13,
 279};
 280#define V4L2_CID_MPEG_AUDIO_L3_BITRATE		(V4L2_CID_CODEC_BASE+104)
 281enum v4l2_mpeg_audio_l3_bitrate {
 282	V4L2_MPEG_AUDIO_L3_BITRATE_32K  = 0,
 283	V4L2_MPEG_AUDIO_L3_BITRATE_40K  = 1,
 284	V4L2_MPEG_AUDIO_L3_BITRATE_48K  = 2,
 285	V4L2_MPEG_AUDIO_L3_BITRATE_56K  = 3,
 286	V4L2_MPEG_AUDIO_L3_BITRATE_64K  = 4,
 287	V4L2_MPEG_AUDIO_L3_BITRATE_80K  = 5,
 288	V4L2_MPEG_AUDIO_L3_BITRATE_96K  = 6,
 289	V4L2_MPEG_AUDIO_L3_BITRATE_112K = 7,
 290	V4L2_MPEG_AUDIO_L3_BITRATE_128K = 8,
 291	V4L2_MPEG_AUDIO_L3_BITRATE_160K = 9,
 292	V4L2_MPEG_AUDIO_L3_BITRATE_192K = 10,
 293	V4L2_MPEG_AUDIO_L3_BITRATE_224K = 11,
 294	V4L2_MPEG_AUDIO_L3_BITRATE_256K = 12,
 295	V4L2_MPEG_AUDIO_L3_BITRATE_320K = 13,
 296};
 297#define V4L2_CID_MPEG_AUDIO_MODE		(V4L2_CID_CODEC_BASE+105)
 298enum v4l2_mpeg_audio_mode {
 299	V4L2_MPEG_AUDIO_MODE_STEREO       = 0,
 300	V4L2_MPEG_AUDIO_MODE_JOINT_STEREO = 1,
 301	V4L2_MPEG_AUDIO_MODE_DUAL         = 2,
 302	V4L2_MPEG_AUDIO_MODE_MONO         = 3,
 303};
 304#define V4L2_CID_MPEG_AUDIO_MODE_EXTENSION	(V4L2_CID_CODEC_BASE+106)
 305enum v4l2_mpeg_audio_mode_extension {
 306	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_4  = 0,
 307	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_8  = 1,
 308	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_12 = 2,
 309	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_16 = 3,
 310};
 311#define V4L2_CID_MPEG_AUDIO_EMPHASIS		(V4L2_CID_CODEC_BASE+107)
 312enum v4l2_mpeg_audio_emphasis {
 313	V4L2_MPEG_AUDIO_EMPHASIS_NONE         = 0,
 314	V4L2_MPEG_AUDIO_EMPHASIS_50_DIV_15_uS = 1,
 315	V4L2_MPEG_AUDIO_EMPHASIS_CCITT_J17    = 2,
 316};
 317#define V4L2_CID_MPEG_AUDIO_CRC			(V4L2_CID_CODEC_BASE+108)
 318enum v4l2_mpeg_audio_crc {
 319	V4L2_MPEG_AUDIO_CRC_NONE  = 0,
 320	V4L2_MPEG_AUDIO_CRC_CRC16 = 1,
 321};
 322#define V4L2_CID_MPEG_AUDIO_MUTE		(V4L2_CID_CODEC_BASE+109)
 323#define V4L2_CID_MPEG_AUDIO_AAC_BITRATE		(V4L2_CID_CODEC_BASE+110)
 324#define V4L2_CID_MPEG_AUDIO_AC3_BITRATE		(V4L2_CID_CODEC_BASE+111)
 325enum v4l2_mpeg_audio_ac3_bitrate {
 326	V4L2_MPEG_AUDIO_AC3_BITRATE_32K  = 0,
 327	V4L2_MPEG_AUDIO_AC3_BITRATE_40K  = 1,
 328	V4L2_MPEG_AUDIO_AC3_BITRATE_48K  = 2,
 329	V4L2_MPEG_AUDIO_AC3_BITRATE_56K  = 3,
 330	V4L2_MPEG_AUDIO_AC3_BITRATE_64K  = 4,
 331	V4L2_MPEG_AUDIO_AC3_BITRATE_80K  = 5,
 332	V4L2_MPEG_AUDIO_AC3_BITRATE_96K  = 6,
 333	V4L2_MPEG_AUDIO_AC3_BITRATE_112K = 7,
 334	V4L2_MPEG_AUDIO_AC3_BITRATE_128K = 8,
 335	V4L2_MPEG_AUDIO_AC3_BITRATE_160K = 9,
 336	V4L2_MPEG_AUDIO_AC3_BITRATE_192K = 10,
 337	V4L2_MPEG_AUDIO_AC3_BITRATE_224K = 11,
 338	V4L2_MPEG_AUDIO_AC3_BITRATE_256K = 12,
 339	V4L2_MPEG_AUDIO_AC3_BITRATE_320K = 13,
 340	V4L2_MPEG_AUDIO_AC3_BITRATE_384K = 14,
 341	V4L2_MPEG_AUDIO_AC3_BITRATE_448K = 15,
 342	V4L2_MPEG_AUDIO_AC3_BITRATE_512K = 16,
 343	V4L2_MPEG_AUDIO_AC3_BITRATE_576K = 17,
 344	V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18,
 345};
 346#define V4L2_CID_MPEG_AUDIO_DEC_PLAYBACK	(V4L2_CID_CODEC_BASE+112)
 347enum v4l2_mpeg_audio_dec_playback {
 348	V4L2_MPEG_AUDIO_DEC_PLAYBACK_AUTO	    = 0,
 349	V4L2_MPEG_AUDIO_DEC_PLAYBACK_STEREO	    = 1,
 350	V4L2_MPEG_AUDIO_DEC_PLAYBACK_LEFT	    = 2,
 351	V4L2_MPEG_AUDIO_DEC_PLAYBACK_RIGHT	    = 3,
 352	V4L2_MPEG_AUDIO_DEC_PLAYBACK_MONO	    = 4,
 353	V4L2_MPEG_AUDIO_DEC_PLAYBACK_SWAPPED_STEREO = 5,
 354};
 355#define V4L2_CID_MPEG_AUDIO_DEC_MULTILINGUAL_PLAYBACK (V4L2_CID_CODEC_BASE+113)
 356
 357/*  MPEG video controls specific to multiplexed streams */
 358#define V4L2_CID_MPEG_VIDEO_ENCODING		(V4L2_CID_CODEC_BASE+200)
 359enum v4l2_mpeg_video_encoding {
 360	V4L2_MPEG_VIDEO_ENCODING_MPEG_1     = 0,
 361	V4L2_MPEG_VIDEO_ENCODING_MPEG_2     = 1,
 362	V4L2_MPEG_VIDEO_ENCODING_MPEG_4_AVC = 2,
 363};
 364#define V4L2_CID_MPEG_VIDEO_ASPECT		(V4L2_CID_CODEC_BASE+201)
 365enum v4l2_mpeg_video_aspect {
 366	V4L2_MPEG_VIDEO_ASPECT_1x1     = 0,
 367	V4L2_MPEG_VIDEO_ASPECT_4x3     = 1,
 368	V4L2_MPEG_VIDEO_ASPECT_16x9    = 2,
 369	V4L2_MPEG_VIDEO_ASPECT_221x100 = 3,
 370};
 371#define V4L2_CID_MPEG_VIDEO_B_FRAMES		(V4L2_CID_CODEC_BASE+202)
 372#define V4L2_CID_MPEG_VIDEO_GOP_SIZE		(V4L2_CID_CODEC_BASE+203)
 373#define V4L2_CID_MPEG_VIDEO_GOP_CLOSURE		(V4L2_CID_CODEC_BASE+204)
 374#define V4L2_CID_MPEG_VIDEO_PULLDOWN		(V4L2_CID_CODEC_BASE+205)
 375#define V4L2_CID_MPEG_VIDEO_BITRATE_MODE	(V4L2_CID_CODEC_BASE+206)
 376enum v4l2_mpeg_video_bitrate_mode {
 377	V4L2_MPEG_VIDEO_BITRATE_MODE_VBR = 0,
 378	V4L2_MPEG_VIDEO_BITRATE_MODE_CBR = 1,
 379	V4L2_MPEG_VIDEO_BITRATE_MODE_CQ  = 2,
 380};
 381#define V4L2_CID_MPEG_VIDEO_BITRATE		(V4L2_CID_CODEC_BASE+207)
 382#define V4L2_CID_MPEG_VIDEO_BITRATE_PEAK	(V4L2_CID_CODEC_BASE+208)
 383#define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_CODEC_BASE+209)
 384#define V4L2_CID_MPEG_VIDEO_MUTE		(V4L2_CID_CODEC_BASE+210)
 385#define V4L2_CID_MPEG_VIDEO_MUTE_YUV		(V4L2_CID_CODEC_BASE+211)
 386#define V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE		(V4L2_CID_CODEC_BASE+212)
 387#define V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER	(V4L2_CID_CODEC_BASE+213)
 388#define V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB		(V4L2_CID_CODEC_BASE+214)
 389#define V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE			(V4L2_CID_CODEC_BASE+215)
 390#define V4L2_CID_MPEG_VIDEO_HEADER_MODE				(V4L2_CID_CODEC_BASE+216)
 391enum v4l2_mpeg_video_header_mode {
 392	V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE			= 0,
 393	V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME	= 1,
 394
 395};
 396#define V4L2_CID_MPEG_VIDEO_MAX_REF_PIC			(V4L2_CID_CODEC_BASE+217)
 397#define V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE		(V4L2_CID_CODEC_BASE+218)
 398#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES	(V4L2_CID_CODEC_BASE+219)
 399#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB		(V4L2_CID_CODEC_BASE+220)
 400#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE		(V4L2_CID_CODEC_BASE+221)
 401enum v4l2_mpeg_video_multi_slice_mode {
 402	V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE		= 0,
 403	V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB		= 1,
 404	V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES	= 2,
 405#ifndef __KERNEL__
 406	/* Kept for backwards compatibility reasons. Stupid typo... */
 407	V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB		= 1,
 408	V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES	= 2,
 409#endif
 410};
 411#define V4L2_CID_MPEG_VIDEO_VBV_SIZE			(V4L2_CID_CODEC_BASE+222)
 412#define V4L2_CID_MPEG_VIDEO_DEC_PTS			(V4L2_CID_CODEC_BASE+223)
 413#define V4L2_CID_MPEG_VIDEO_DEC_FRAME			(V4L2_CID_CODEC_BASE+224)
 414#define V4L2_CID_MPEG_VIDEO_VBV_DELAY			(V4L2_CID_CODEC_BASE+225)
 415#define V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER		(V4L2_CID_CODEC_BASE+226)
 416#define V4L2_CID_MPEG_VIDEO_MV_H_SEARCH_RANGE		(V4L2_CID_CODEC_BASE+227)
 417#define V4L2_CID_MPEG_VIDEO_MV_V_SEARCH_RANGE		(V4L2_CID_CODEC_BASE+228)
 418#define V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME		(V4L2_CID_CODEC_BASE+229)
 419#define V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID	(V4L2_CID_CODEC_BASE+230)
 420#define V4L2_CID_MPEG_VIDEO_AU_DELIMITER		(V4L2_CID_CODEC_BASE+231)
 421#define V4L2_CID_MPEG_VIDEO_LTR_COUNT			(V4L2_CID_CODEC_BASE+232)
 422#define V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX		(V4L2_CID_CODEC_BASE+233)
 423#define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES		(V4L2_CID_CODEC_BASE+234)
 424#define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR		(V4L2_CID_CODEC_BASE+235)
 425#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD	(V4L2_CID_CODEC_BASE+236)
 426#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE	(V4L2_CID_CODEC_BASE+237)
 427enum v4l2_mpeg_video_intra_refresh_period_type {
 428	V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM	= 0,
 429	V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC	= 1,
 430};
 431
 432/* CIDs for the MPEG-2 Part 2 (H.262) codec */
 433#define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL			(V4L2_CID_CODEC_BASE+270)
 434enum v4l2_mpeg_video_mpeg2_level {
 435	V4L2_MPEG_VIDEO_MPEG2_LEVEL_LOW		= 0,
 436	V4L2_MPEG_VIDEO_MPEG2_LEVEL_MAIN	= 1,
 437	V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH_1440	= 2,
 438	V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH	= 3,
 439};
 440#define V4L2_CID_MPEG_VIDEO_MPEG2_PROFILE		(V4L2_CID_CODEC_BASE+271)
 441enum v4l2_mpeg_video_mpeg2_profile {
 442	V4L2_MPEG_VIDEO_MPEG2_PROFILE_SIMPLE				= 0,
 443	V4L2_MPEG_VIDEO_MPEG2_PROFILE_MAIN				= 1,
 444	V4L2_MPEG_VIDEO_MPEG2_PROFILE_SNR_SCALABLE			= 2,
 445	V4L2_MPEG_VIDEO_MPEG2_PROFILE_SPATIALLY_SCALABLE		= 3,
 446	V4L2_MPEG_VIDEO_MPEG2_PROFILE_HIGH				= 4,
 447	V4L2_MPEG_VIDEO_MPEG2_PROFILE_MULTIVIEW				= 5,
 448};
 449
 450/* CIDs for the FWHT codec as used by the vicodec driver. */
 451#define V4L2_CID_FWHT_I_FRAME_QP             (V4L2_CID_CODEC_BASE + 290)
 452#define V4L2_CID_FWHT_P_FRAME_QP             (V4L2_CID_CODEC_BASE + 291)
 453
 454#define V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP		(V4L2_CID_CODEC_BASE+300)
 455#define V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP		(V4L2_CID_CODEC_BASE+301)
 456#define V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP		(V4L2_CID_CODEC_BASE+302)
 457#define V4L2_CID_MPEG_VIDEO_H263_MIN_QP			(V4L2_CID_CODEC_BASE+303)
 458#define V4L2_CID_MPEG_VIDEO_H263_MAX_QP			(V4L2_CID_CODEC_BASE+304)
 459#define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP		(V4L2_CID_CODEC_BASE+350)
 460#define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP		(V4L2_CID_CODEC_BASE+351)
 461#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP		(V4L2_CID_CODEC_BASE+352)
 462#define V4L2_CID_MPEG_VIDEO_H264_MIN_QP			(V4L2_CID_CODEC_BASE+353)
 463#define V4L2_CID_MPEG_VIDEO_H264_MAX_QP			(V4L2_CID_CODEC_BASE+354)
 464#define V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM		(V4L2_CID_CODEC_BASE+355)
 465#define V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE		(V4L2_CID_CODEC_BASE+356)
 466#define V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE		(V4L2_CID_CODEC_BASE+357)
 467enum v4l2_mpeg_video_h264_entropy_mode {
 468	V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC	= 0,
 469	V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC	= 1,
 470};
 471#define V4L2_CID_MPEG_VIDEO_H264_I_PERIOD		(V4L2_CID_CODEC_BASE+358)
 472#define V4L2_CID_MPEG_VIDEO_H264_LEVEL			(V4L2_CID_CODEC_BASE+359)
 473enum v4l2_mpeg_video_h264_level {
 474	V4L2_MPEG_VIDEO_H264_LEVEL_1_0	= 0,
 475	V4L2_MPEG_VIDEO_H264_LEVEL_1B	= 1,
 476	V4L2_MPEG_VIDEO_H264_LEVEL_1_1	= 2,
 477	V4L2_MPEG_VIDEO_H264_LEVEL_1_2	= 3,
 478	V4L2_MPEG_VIDEO_H264_LEVEL_1_3	= 4,
 479	V4L2_MPEG_VIDEO_H264_LEVEL_2_0	= 5,
 480	V4L2_MPEG_VIDEO_H264_LEVEL_2_1	= 6,
 481	V4L2_MPEG_VIDEO_H264_LEVEL_2_2	= 7,
 482	V4L2_MPEG_VIDEO_H264_LEVEL_3_0	= 8,
 483	V4L2_MPEG_VIDEO_H264_LEVEL_3_1	= 9,
 484	V4L2_MPEG_VIDEO_H264_LEVEL_3_2	= 10,
 485	V4L2_MPEG_VIDEO_H264_LEVEL_4_0	= 11,
 486	V4L2_MPEG_VIDEO_H264_LEVEL_4_1	= 12,
 487	V4L2_MPEG_VIDEO_H264_LEVEL_4_2	= 13,
 488	V4L2_MPEG_VIDEO_H264_LEVEL_5_0	= 14,
 489	V4L2_MPEG_VIDEO_H264_LEVEL_5_1	= 15,
 490	V4L2_MPEG_VIDEO_H264_LEVEL_5_2	= 16,
 491	V4L2_MPEG_VIDEO_H264_LEVEL_6_0	= 17,
 492	V4L2_MPEG_VIDEO_H264_LEVEL_6_1	= 18,
 493	V4L2_MPEG_VIDEO_H264_LEVEL_6_2	= 19,
 494};
 495#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA	(V4L2_CID_CODEC_BASE+360)
 496#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA	(V4L2_CID_CODEC_BASE+361)
 497#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE	(V4L2_CID_CODEC_BASE+362)
 498enum v4l2_mpeg_video_h264_loop_filter_mode {
 499	V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED				= 0,
 500	V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED				= 1,
 501	V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY	= 2,
 502};
 503#define V4L2_CID_MPEG_VIDEO_H264_PROFILE		(V4L2_CID_CODEC_BASE+363)
 504enum v4l2_mpeg_video_h264_profile {
 505	V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE			= 0,
 506	V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE	= 1,
 507	V4L2_MPEG_VIDEO_H264_PROFILE_MAIN			= 2,
 508	V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED			= 3,
 509	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH			= 4,
 510	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10			= 5,
 511	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422			= 6,
 512	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE	= 7,
 513	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10_INTRA		= 8,
 514	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422_INTRA		= 9,
 515	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_INTRA		= 10,
 516	V4L2_MPEG_VIDEO_H264_PROFILE_CAVLC_444_INTRA		= 11,
 517	V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_BASELINE		= 12,
 518	V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH		= 13,
 519	V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA	= 14,
 520	V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH		= 15,
 521	V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH		= 16,
 522	V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH		= 17,
 523};
 524#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT	(V4L2_CID_CODEC_BASE+364)
 525#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH	(V4L2_CID_CODEC_BASE+365)
 526#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE		(V4L2_CID_CODEC_BASE+366)
 527#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC		(V4L2_CID_CODEC_BASE+367)
 528enum v4l2_mpeg_video_h264_vui_sar_idc {
 529	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED	= 0,
 530	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1		= 1,
 531	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11		= 2,
 532	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11		= 3,
 533	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11		= 4,
 534	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33		= 5,
 535	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11		= 6,
 536	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11		= 7,
 537	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11		= 8,
 538	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33		= 9,
 539	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11		= 10,
 540	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11		= 11,
 541	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33		= 12,
 542	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99		= 13,
 543	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3		= 14,
 544	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2		= 15,
 545	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1		= 16,
 546	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED	= 17,
 547};
 548#define V4L2_CID_MPEG_VIDEO_H264_SEI_FRAME_PACKING		(V4L2_CID_CODEC_BASE+368)
 549#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_CURRENT_FRAME_0		(V4L2_CID_CODEC_BASE+369)
 550#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE	(V4L2_CID_CODEC_BASE+370)
 551enum v4l2_mpeg_video_h264_sei_fp_arrangement_type {
 552	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_CHECKERBOARD	= 0,
 553	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_COLUMN		= 1,
 554	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_ROW		= 2,
 555	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_SIDE_BY_SIDE	= 3,
 556	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_TOP_BOTTOM		= 4,
 557	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_TEMPORAL		= 5,
 558};
 559#define V4L2_CID_MPEG_VIDEO_H264_FMO			(V4L2_CID_CODEC_BASE+371)
 560#define V4L2_CID_MPEG_VIDEO_H264_FMO_MAP_TYPE		(V4L2_CID_CODEC_BASE+372)
 561enum v4l2_mpeg_video_h264_fmo_map_type {
 562	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_INTERLEAVED_SLICES		= 0,
 563	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_SCATTERED_SLICES		= 1,
 564	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_FOREGROUND_WITH_LEFT_OVER	= 2,
 565	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_BOX_OUT			= 3,
 566	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_RASTER_SCAN			= 4,
 567	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_WIPE_SCAN			= 5,
 568	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_EXPLICIT			= 6,
 569};
 570#define V4L2_CID_MPEG_VIDEO_H264_FMO_SLICE_GROUP	(V4L2_CID_CODEC_BASE+373)
 571#define V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_DIRECTION	(V4L2_CID_CODEC_BASE+374)
 572enum v4l2_mpeg_video_h264_fmo_change_dir {
 573	V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_RIGHT	= 0,
 574	V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_LEFT	= 1,
 575};
 576#define V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_RATE	(V4L2_CID_CODEC_BASE+375)
 577#define V4L2_CID_MPEG_VIDEO_H264_FMO_RUN_LENGTH		(V4L2_CID_CODEC_BASE+376)
 578#define V4L2_CID_MPEG_VIDEO_H264_ASO			(V4L2_CID_CODEC_BASE+377)
 579#define V4L2_CID_MPEG_VIDEO_H264_ASO_SLICE_ORDER	(V4L2_CID_CODEC_BASE+378)
 580#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING		(V4L2_CID_CODEC_BASE+379)
 581#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE	(V4L2_CID_CODEC_BASE+380)
 582enum v4l2_mpeg_video_h264_hierarchical_coding_type {
 583	V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B	= 0,
 584	V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P	= 1,
 585};
 586#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER	(V4L2_CID_CODEC_BASE+381)
 587#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP	(V4L2_CID_CODEC_BASE+382)
 588#define V4L2_CID_MPEG_VIDEO_H264_CONSTRAINED_INTRA_PREDICTION	(V4L2_CID_CODEC_BASE+383)
 589#define V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET		(V4L2_CID_CODEC_BASE+384)
 590#define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP	(V4L2_CID_CODEC_BASE+385)
 591#define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP	(V4L2_CID_CODEC_BASE+386)
 592#define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP	(V4L2_CID_CODEC_BASE+387)
 593#define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP	(V4L2_CID_CODEC_BASE+388)
 594#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP	(V4L2_CID_CODEC_BASE+389)
 595#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP	(V4L2_CID_CODEC_BASE+390)
 596#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR	(V4L2_CID_CODEC_BASE+391)
 597#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR	(V4L2_CID_CODEC_BASE+392)
 598#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR	(V4L2_CID_CODEC_BASE+393)
 599#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR	(V4L2_CID_CODEC_BASE+394)
 600#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR	(V4L2_CID_CODEC_BASE+395)
 601#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR	(V4L2_CID_CODEC_BASE+396)
 602#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L6_BR	(V4L2_CID_CODEC_BASE+397)
 603#define V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP	(V4L2_CID_CODEC_BASE+400)
 604#define V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP	(V4L2_CID_CODEC_BASE+401)
 605#define V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP	(V4L2_CID_CODEC_BASE+402)
 606#define V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP	(V4L2_CID_CODEC_BASE+403)
 607#define V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP	(V4L2_CID_CODEC_BASE+404)
 608#define V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL		(V4L2_CID_CODEC_BASE+405)
 609enum v4l2_mpeg_video_mpeg4_level {
 610	V4L2_MPEG_VIDEO_MPEG4_LEVEL_0	= 0,
 611	V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B	= 1,
 612	V4L2_MPEG_VIDEO_MPEG4_LEVEL_1	= 2,
 613	V4L2_MPEG_VIDEO_MPEG4_LEVEL_2	= 3,
 614	V4L2_MPEG_VIDEO_MPEG4_LEVEL_3	= 4,
 615	V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B	= 5,
 616	V4L2_MPEG_VIDEO_MPEG4_LEVEL_4	= 6,
 617	V4L2_MPEG_VIDEO_MPEG4_LEVEL_5	= 7,
 618};
 619#define V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE	(V4L2_CID_CODEC_BASE+406)
 620enum v4l2_mpeg_video_mpeg4_profile {
 621	V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE				= 0,
 622	V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE			= 1,
 623	V4L2_MPEG_VIDEO_MPEG4_PROFILE_CORE				= 2,
 624	V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE_SCALABLE			= 3,
 625	V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY	= 4,
 626};
 627#define V4L2_CID_MPEG_VIDEO_MPEG4_QPEL		(V4L2_CID_CODEC_BASE+407)
 628
 629/*  Control IDs for VP8 streams
 630 *  Although VP8 is not part of MPEG we add these controls to the MPEG class
 631 *  as that class is already handling other video compression standards
 632 */
 633#define V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS		(V4L2_CID_CODEC_BASE+500)
 634enum v4l2_vp8_num_partitions {
 635	V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION	= 0,
 636	V4L2_CID_MPEG_VIDEO_VPX_2_PARTITIONS	= 1,
 637	V4L2_CID_MPEG_VIDEO_VPX_4_PARTITIONS	= 2,
 638	V4L2_CID_MPEG_VIDEO_VPX_8_PARTITIONS	= 3,
 639};
 640#define V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4		(V4L2_CID_CODEC_BASE+501)
 641#define V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES		(V4L2_CID_CODEC_BASE+502)
 642enum v4l2_vp8_num_ref_frames {
 643	V4L2_CID_MPEG_VIDEO_VPX_1_REF_FRAME	= 0,
 644	V4L2_CID_MPEG_VIDEO_VPX_2_REF_FRAME	= 1,
 645	V4L2_CID_MPEG_VIDEO_VPX_3_REF_FRAME	= 2,
 646};
 647#define V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL		(V4L2_CID_CODEC_BASE+503)
 648#define V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS	(V4L2_CID_CODEC_BASE+504)
 649#define V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD	(V4L2_CID_CODEC_BASE+505)
 650#define V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL	(V4L2_CID_CODEC_BASE+506)
 651enum v4l2_vp8_golden_frame_sel {
 652	V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV		= 0,
 653	V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_REF_PERIOD	= 1,
 654};
 655#define V4L2_CID_MPEG_VIDEO_VPX_MIN_QP			(V4L2_CID_CODEC_BASE+507)
 656#define V4L2_CID_MPEG_VIDEO_VPX_MAX_QP			(V4L2_CID_CODEC_BASE+508)
 657#define V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP		(V4L2_CID_CODEC_BASE+509)
 658#define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP		(V4L2_CID_CODEC_BASE+510)
 659
 660#define V4L2_CID_MPEG_VIDEO_VP8_PROFILE			(V4L2_CID_CODEC_BASE+511)
 661enum v4l2_mpeg_video_vp8_profile {
 662	V4L2_MPEG_VIDEO_VP8_PROFILE_0				= 0,
 663	V4L2_MPEG_VIDEO_VP8_PROFILE_1				= 1,
 664	V4L2_MPEG_VIDEO_VP8_PROFILE_2				= 2,
 665	V4L2_MPEG_VIDEO_VP8_PROFILE_3				= 3,
 666};
 667/* Deprecated alias for compatibility reasons. */
 668#define V4L2_CID_MPEG_VIDEO_VPX_PROFILE	V4L2_CID_MPEG_VIDEO_VP8_PROFILE
 669#define V4L2_CID_MPEG_VIDEO_VP9_PROFILE			(V4L2_CID_CODEC_BASE+512)
 670enum v4l2_mpeg_video_vp9_profile {
 671	V4L2_MPEG_VIDEO_VP9_PROFILE_0				= 0,
 672	V4L2_MPEG_VIDEO_VP9_PROFILE_1				= 1,
 673	V4L2_MPEG_VIDEO_VP9_PROFILE_2				= 2,
 674	V4L2_MPEG_VIDEO_VP9_PROFILE_3				= 3,
 675};
 676#define V4L2_CID_MPEG_VIDEO_VP9_LEVEL			(V4L2_CID_CODEC_BASE+513)
 677enum v4l2_mpeg_video_vp9_level {
 678	V4L2_MPEG_VIDEO_VP9_LEVEL_1_0	= 0,
 679	V4L2_MPEG_VIDEO_VP9_LEVEL_1_1	= 1,
 680	V4L2_MPEG_VIDEO_VP9_LEVEL_2_0	= 2,
 681	V4L2_MPEG_VIDEO_VP9_LEVEL_2_1	= 3,
 682	V4L2_MPEG_VIDEO_VP9_LEVEL_3_0	= 4,
 683	V4L2_MPEG_VIDEO_VP9_LEVEL_3_1	= 5,
 684	V4L2_MPEG_VIDEO_VP9_LEVEL_4_0	= 6,
 685	V4L2_MPEG_VIDEO_VP9_LEVEL_4_1	= 7,
 686	V4L2_MPEG_VIDEO_VP9_LEVEL_5_0	= 8,
 687	V4L2_MPEG_VIDEO_VP9_LEVEL_5_1	= 9,
 688	V4L2_MPEG_VIDEO_VP9_LEVEL_5_2	= 10,
 689	V4L2_MPEG_VIDEO_VP9_LEVEL_6_0	= 11,
 690	V4L2_MPEG_VIDEO_VP9_LEVEL_6_1	= 12,
 691	V4L2_MPEG_VIDEO_VP9_LEVEL_6_2	= 13,
 692};
 693
 694/* CIDs for HEVC encoding. */
 695
 696#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP		(V4L2_CID_CODEC_BASE + 600)
 697#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP		(V4L2_CID_CODEC_BASE + 601)
 698#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP	(V4L2_CID_CODEC_BASE + 602)
 699#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP	(V4L2_CID_CODEC_BASE + 603)
 700#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP	(V4L2_CID_CODEC_BASE + 604)
 701#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP	(V4L2_CID_CODEC_BASE + 605)
 702#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE (V4L2_CID_CODEC_BASE + 606)
 703enum v4l2_mpeg_video_hevc_hier_coding_type {
 704	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B	= 0,
 705	V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P	= 1,
 706};
 707#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER	(V4L2_CID_CODEC_BASE + 607)
 708#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_QP	(V4L2_CID_CODEC_BASE + 608)
 709#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_QP	(V4L2_CID_CODEC_BASE + 609)
 710#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_QP	(V4L2_CID_CODEC_BASE + 610)
 711#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_QP	(V4L2_CID_CODEC_BASE + 611)
 712#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_QP	(V4L2_CID_CODEC_BASE + 612)
 713#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_QP	(V4L2_CID_CODEC_BASE + 613)
 714#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_QP	(V4L2_CID_CODEC_BASE + 614)
 715#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE	(V4L2_CID_CODEC_BASE + 615)
 716enum v4l2_mpeg_video_hevc_profile {
 717	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
 718	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
 719	V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10 = 2,
 720};
 721#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL		(V4L2_CID_CODEC_BASE + 616)
 722enum v4l2_mpeg_video_hevc_level {
 723	V4L2_MPEG_VIDEO_HEVC_LEVEL_1	= 0,
 724	V4L2_MPEG_VIDEO_HEVC_LEVEL_2	= 1,
 725	V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1	= 2,
 726	V4L2_MPEG_VIDEO_HEVC_LEVEL_3	= 3,
 727	V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1	= 4,
 728	V4L2_MPEG_VIDEO_HEVC_LEVEL_4	= 5,
 729	V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1	= 6,
 730	V4L2_MPEG_VIDEO_HEVC_LEVEL_5	= 7,
 731	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1	= 8,
 732	V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2	= 9,
 733	V4L2_MPEG_VIDEO_HEVC_LEVEL_6	= 10,
 734	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1	= 11,
 735	V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2	= 12,
 736};
 737#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION	(V4L2_CID_CODEC_BASE + 617)
 738#define V4L2_CID_MPEG_VIDEO_HEVC_TIER			(V4L2_CID_CODEC_BASE + 618)
 739enum v4l2_mpeg_video_hevc_tier {
 740	V4L2_MPEG_VIDEO_HEVC_TIER_MAIN = 0,
 741	V4L2_MPEG_VIDEO_HEVC_TIER_HIGH = 1,
 742};
 743#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH	(V4L2_CID_CODEC_BASE + 619)
 744#define V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE	(V4L2_CID_CODEC_BASE + 620)
 745enum v4l2_cid_mpeg_video_hevc_loop_filter_mode {
 746	V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED			 = 0,
 747	V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED			 = 1,
 748	V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY = 2,
 749};
 750#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2	(V4L2_CID_CODEC_BASE + 621)
 751#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2	(V4L2_CID_CODEC_BASE + 622)
 752#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE		(V4L2_CID_CODEC_BASE + 623)
 753enum v4l2_cid_mpeg_video_hevc_refresh_type {
 754	V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE		= 0,
 755	V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA		= 1,
 756	V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR		= 2,
 757};
 758#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD		(V4L2_CID_CODEC_BASE + 624)
 759#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU		(V4L2_CID_CODEC_BASE + 625)
 760#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED	(V4L2_CID_CODEC_BASE + 626)
 761#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT		(V4L2_CID_CODEC_BASE + 627)
 762#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB		(V4L2_CID_CODEC_BASE + 628)
 763#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID		(V4L2_CID_CODEC_BASE + 629)
 764#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING	(V4L2_CID_CODEC_BASE + 630)
 765#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1	(V4L2_CID_CODEC_BASE + 631)
 766#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT		(V4L2_CID_CODEC_BASE + 632)
 767#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION		(V4L2_CID_CODEC_BASE + 633)
 768#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE	(V4L2_CID_CODEC_BASE + 634)
 769#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD	(V4L2_CID_CODEC_BASE + 635)
 770enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
 771	V4L2_MPEG_VIDEO_HEVC_SIZE_0		= 0,
 772	V4L2_MPEG_VIDEO_HEVC_SIZE_1		= 1,
 773	V4L2_MPEG_VIDEO_HEVC_SIZE_2		= 2,
 774	V4L2_MPEG_VIDEO_HEVC_SIZE_4		= 3,
 775};
 776#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR	(V4L2_CID_CODEC_BASE + 636)
 777#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR	(V4L2_CID_CODEC_BASE + 637)
 778#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR	(V4L2_CID_CODEC_BASE + 638)
 779#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR	(V4L2_CID_CODEC_BASE + 639)
 780#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR	(V4L2_CID_CODEC_BASE + 640)
 781#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR	(V4L2_CID_CODEC_BASE + 641)
 782#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR	(V4L2_CID_CODEC_BASE + 642)
 783#define V4L2_CID_MPEG_VIDEO_REF_NUMBER_FOR_PFRAMES	(V4L2_CID_CODEC_BASE + 643)
 784#define V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR	(V4L2_CID_CODEC_BASE + 644)
 785#define V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY		(V4L2_CID_CODEC_BASE + 645)
 786#define V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE		(V4L2_CID_CODEC_BASE + 646)
 787enum v4l2_mpeg_video_frame_skip_mode {
 788	V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED	= 0,
 789	V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT	= 1,
 790	V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT	= 2,
 791};
 792
 793#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP        (V4L2_CID_CODEC_BASE + 647)
 794#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP        (V4L2_CID_CODEC_BASE + 648)
 795#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP        (V4L2_CID_CODEC_BASE + 649)
 796#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP        (V4L2_CID_CODEC_BASE + 650)
 797#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP        (V4L2_CID_CODEC_BASE + 651)
 798#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP        (V4L2_CID_CODEC_BASE + 652)
 799
 800#define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY		(V4L2_CID_CODEC_BASE + 653)
 801#define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE	(V4L2_CID_CODEC_BASE + 654)
 802
 803/*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
 804#define V4L2_CID_CODEC_CX2341X_BASE				(V4L2_CTRL_CLASS_CODEC | 0x1000)
 805#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE		(V4L2_CID_CODEC_CX2341X_BASE+0)
 806enum v4l2_mpeg_cx2341x_video_spatial_filter_mode {
 807	V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_MANUAL = 0,
 808	V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_AUTO   = 1,
 809};
 810#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER		(V4L2_CID_CODEC_CX2341X_BASE+1)
 811#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE	(V4L2_CID_CODEC_CX2341X_BASE+2)
 812enum v4l2_mpeg_cx2341x_video_luma_spatial_filter_type {
 813	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_OFF                  = 0,
 814	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_HOR               = 1,
 815	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_VERT              = 2,
 816	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_HV_SEPARABLE      = 3,
 817	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_SYM_NON_SEPARABLE = 4,
 818};
 819#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE	(V4L2_CID_CODEC_CX2341X_BASE+3)
 820enum v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type {
 821	V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_OFF    = 0,
 822	V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_1D_HOR = 1,
 823};
 824#define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE	(V4L2_CID_CODEC_CX2341X_BASE+4)
 825enum v4l2_mpeg_cx2341x_video_temporal_filter_mode {
 826	V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_MANUAL = 0,
 827	V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_AUTO   = 1,
 828};
 829#define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER		(V4L2_CID_CODEC_CX2341X_BASE+5)
 830#define V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE		(V4L2_CID_CODEC_CX2341X_BASE+6)
 831enum v4l2_mpeg_cx2341x_video_median_filter_type {
 832	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_OFF      = 0,
 833	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR      = 1,
 834	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_VERT     = 2,
 835	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR_VERT = 3,
 836	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_DIAG     = 4,
 837};
 838#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM	(V4L2_CID_CODEC_CX2341X_BASE+7)
 839#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP	(V4L2_CID_CODEC_CX2341X_BASE+8)
 840#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM	(V4L2_CID_CODEC_CX2341X_BASE+9)
 841#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP	(V4L2_CID_CODEC_CX2341X_BASE+10)
 842#define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS		(V4L2_CID_CODEC_CX2341X_BASE+11)
 843
 844/*  MPEG-class control IDs specific to the Samsung MFC 5.1 driver as defined by V4L2 */
 845#define V4L2_CID_CODEC_MFC51_BASE				(V4L2_CTRL_CLASS_CODEC | 0x1100)
 846
 847#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY		(V4L2_CID_CODEC_MFC51_BASE+0)
 848#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE	(V4L2_CID_CODEC_MFC51_BASE+1)
 849#define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE			(V4L2_CID_CODEC_MFC51_BASE+2)
 850enum v4l2_mpeg_mfc51_video_frame_skip_mode {
 851	V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED		= 0,
 852	V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT	= 1,
 853	V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT		= 2,
 854};
 855#define V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE			(V4L2_CID_CODEC_MFC51_BASE+3)
 856enum v4l2_mpeg_mfc51_video_force_frame_type {
 857	V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED		= 0,
 858	V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_I_FRAME		= 1,
 859	V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED	= 2,
 860};
 861#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING				(V4L2_CID_CODEC_MFC51_BASE+4)
 862#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV				(V4L2_CID_CODEC_MFC51_BASE+5)
 863#define V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT			(V4L2_CID_CODEC_MFC51_BASE+6)
 864#define V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF			(V4L2_CID_CODEC_MFC51_BASE+7)
 865#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY		(V4L2_CID_CODEC_MFC51_BASE+50)
 866#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK			(V4L2_CID_CODEC_MFC51_BASE+51)
 867#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH		(V4L2_CID_CODEC_MFC51_BASE+52)
 868#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC		(V4L2_CID_CODEC_MFC51_BASE+53)
 869#define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P		(V4L2_CID_CODEC_MFC51_BASE+54)
 
 870
 871/*  Camera class control IDs */
 872
 873#define V4L2_CID_CAMERA_CLASS_BASE	(V4L2_CTRL_CLASS_CAMERA | 0x900)
 874#define V4L2_CID_CAMERA_CLASS		(V4L2_CTRL_CLASS_CAMERA | 1)
 875
 876#define V4L2_CID_EXPOSURE_AUTO			(V4L2_CID_CAMERA_CLASS_BASE+1)
 877enum  v4l2_exposure_auto_type {
 878	V4L2_EXPOSURE_AUTO = 0,
 879	V4L2_EXPOSURE_MANUAL = 1,
 880	V4L2_EXPOSURE_SHUTTER_PRIORITY = 2,
 881	V4L2_EXPOSURE_APERTURE_PRIORITY = 3
 882};
 883#define V4L2_CID_EXPOSURE_ABSOLUTE		(V4L2_CID_CAMERA_CLASS_BASE+2)
 884#define V4L2_CID_EXPOSURE_AUTO_PRIORITY		(V4L2_CID_CAMERA_CLASS_BASE+3)
 885
 886#define V4L2_CID_PAN_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+4)
 887#define V4L2_CID_TILT_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+5)
 888#define V4L2_CID_PAN_RESET			(V4L2_CID_CAMERA_CLASS_BASE+6)
 889#define V4L2_CID_TILT_RESET			(V4L2_CID_CAMERA_CLASS_BASE+7)
 890
 891#define V4L2_CID_PAN_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+8)
 892#define V4L2_CID_TILT_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+9)
 893
 894#define V4L2_CID_FOCUS_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+10)
 895#define V4L2_CID_FOCUS_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+11)
 896#define V4L2_CID_FOCUS_AUTO			(V4L2_CID_CAMERA_CLASS_BASE+12)
 897
 898#define V4L2_CID_ZOOM_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+13)
 899#define V4L2_CID_ZOOM_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+14)
 900#define V4L2_CID_ZOOM_CONTINUOUS		(V4L2_CID_CAMERA_CLASS_BASE+15)
 901
 902#define V4L2_CID_PRIVACY			(V4L2_CID_CAMERA_CLASS_BASE+16)
 903
 904#define V4L2_CID_IRIS_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+17)
 905#define V4L2_CID_IRIS_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+18)
 906
 907#define V4L2_CID_AUTO_EXPOSURE_BIAS		(V4L2_CID_CAMERA_CLASS_BASE+19)
 908
 909#define V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE	(V4L2_CID_CAMERA_CLASS_BASE+20)
 910enum v4l2_auto_n_preset_white_balance {
 911	V4L2_WHITE_BALANCE_MANUAL		= 0,
 912	V4L2_WHITE_BALANCE_AUTO			= 1,
 913	V4L2_WHITE_BALANCE_INCANDESCENT		= 2,
 914	V4L2_WHITE_BALANCE_FLUORESCENT		= 3,
 915	V4L2_WHITE_BALANCE_FLUORESCENT_H	= 4,
 916	V4L2_WHITE_BALANCE_HORIZON		= 5,
 917	V4L2_WHITE_BALANCE_DAYLIGHT		= 6,
 918	V4L2_WHITE_BALANCE_FLASH		= 7,
 919	V4L2_WHITE_BALANCE_CLOUDY		= 8,
 920	V4L2_WHITE_BALANCE_SHADE		= 9,
 921};
 922
 923#define V4L2_CID_WIDE_DYNAMIC_RANGE		(V4L2_CID_CAMERA_CLASS_BASE+21)
 924#define V4L2_CID_IMAGE_STABILIZATION		(V4L2_CID_CAMERA_CLASS_BASE+22)
 925
 926#define V4L2_CID_ISO_SENSITIVITY		(V4L2_CID_CAMERA_CLASS_BASE+23)
 927#define V4L2_CID_ISO_SENSITIVITY_AUTO		(V4L2_CID_CAMERA_CLASS_BASE+24)
 928enum v4l2_iso_sensitivity_auto_type {
 929	V4L2_ISO_SENSITIVITY_MANUAL		= 0,
 930	V4L2_ISO_SENSITIVITY_AUTO		= 1,
 931};
 932
 933#define V4L2_CID_EXPOSURE_METERING		(V4L2_CID_CAMERA_CLASS_BASE+25)
 934enum v4l2_exposure_metering {
 935	V4L2_EXPOSURE_METERING_AVERAGE		= 0,
 936	V4L2_EXPOSURE_METERING_CENTER_WEIGHTED	= 1,
 937	V4L2_EXPOSURE_METERING_SPOT		= 2,
 938	V4L2_EXPOSURE_METERING_MATRIX		= 3,
 939};
 940
 941#define V4L2_CID_SCENE_MODE			(V4L2_CID_CAMERA_CLASS_BASE+26)
 942enum v4l2_scene_mode {
 943	V4L2_SCENE_MODE_NONE			= 0,
 944	V4L2_SCENE_MODE_BACKLIGHT		= 1,
 945	V4L2_SCENE_MODE_BEACH_SNOW		= 2,
 946	V4L2_SCENE_MODE_CANDLE_LIGHT		= 3,
 947	V4L2_SCENE_MODE_DAWN_DUSK		= 4,
 948	V4L2_SCENE_MODE_FALL_COLORS		= 5,
 949	V4L2_SCENE_MODE_FIREWORKS		= 6,
 950	V4L2_SCENE_MODE_LANDSCAPE		= 7,
 951	V4L2_SCENE_MODE_NIGHT			= 8,
 952	V4L2_SCENE_MODE_PARTY_INDOOR		= 9,
 953	V4L2_SCENE_MODE_PORTRAIT		= 10,
 954	V4L2_SCENE_MODE_SPORTS			= 11,
 955	V4L2_SCENE_MODE_SUNSET			= 12,
 956	V4L2_SCENE_MODE_TEXT			= 13,
 957};
 958
 959#define V4L2_CID_3A_LOCK			(V4L2_CID_CAMERA_CLASS_BASE+27)
 960#define V4L2_LOCK_EXPOSURE			(1 << 0)
 961#define V4L2_LOCK_WHITE_BALANCE			(1 << 1)
 962#define V4L2_LOCK_FOCUS				(1 << 2)
 963
 964#define V4L2_CID_AUTO_FOCUS_START		(V4L2_CID_CAMERA_CLASS_BASE+28)
 965#define V4L2_CID_AUTO_FOCUS_STOP		(V4L2_CID_CAMERA_CLASS_BASE+29)
 966#define V4L2_CID_AUTO_FOCUS_STATUS		(V4L2_CID_CAMERA_CLASS_BASE+30)
 967#define V4L2_AUTO_FOCUS_STATUS_IDLE		(0 << 0)
 968#define V4L2_AUTO_FOCUS_STATUS_BUSY		(1 << 0)
 969#define V4L2_AUTO_FOCUS_STATUS_REACHED		(1 << 1)
 970#define V4L2_AUTO_FOCUS_STATUS_FAILED		(1 << 2)
 971
 972#define V4L2_CID_AUTO_FOCUS_RANGE		(V4L2_CID_CAMERA_CLASS_BASE+31)
 973enum v4l2_auto_focus_range {
 974	V4L2_AUTO_FOCUS_RANGE_AUTO		= 0,
 975	V4L2_AUTO_FOCUS_RANGE_NORMAL		= 1,
 976	V4L2_AUTO_FOCUS_RANGE_MACRO		= 2,
 977	V4L2_AUTO_FOCUS_RANGE_INFINITY		= 3,
 978};
 979
 980#define V4L2_CID_PAN_SPEED			(V4L2_CID_CAMERA_CLASS_BASE+32)
 981#define V4L2_CID_TILT_SPEED			(V4L2_CID_CAMERA_CLASS_BASE+33)
 982
 983#define V4L2_CID_CAMERA_ORIENTATION		(V4L2_CID_CAMERA_CLASS_BASE+34)
 984#define V4L2_CAMERA_ORIENTATION_FRONT		0
 985#define V4L2_CAMERA_ORIENTATION_BACK		1
 986#define V4L2_CAMERA_ORIENTATION_EXTERNAL	2
 987
 988#define V4L2_CID_CAMERA_SENSOR_ROTATION		(V4L2_CID_CAMERA_CLASS_BASE+35)
 989
 990#define V4L2_CID_HDR_SENSOR_MODE		(V4L2_CID_CAMERA_CLASS_BASE+36)
 991
 992/* FM Modulator class control IDs */
 993
 994#define V4L2_CID_FM_TX_CLASS_BASE		(V4L2_CTRL_CLASS_FM_TX | 0x900)
 995#define V4L2_CID_FM_TX_CLASS			(V4L2_CTRL_CLASS_FM_TX | 1)
 996
 997#define V4L2_CID_RDS_TX_DEVIATION		(V4L2_CID_FM_TX_CLASS_BASE + 1)
 998#define V4L2_CID_RDS_TX_PI			(V4L2_CID_FM_TX_CLASS_BASE + 2)
 999#define V4L2_CID_RDS_TX_PTY			(V4L2_CID_FM_TX_CLASS_BASE + 3)
1000#define V4L2_CID_RDS_TX_PS_NAME			(V4L2_CID_FM_TX_CLASS_BASE + 5)
1001#define V4L2_CID_RDS_TX_RADIO_TEXT		(V4L2_CID_FM_TX_CLASS_BASE + 6)
1002#define V4L2_CID_RDS_TX_MONO_STEREO		(V4L2_CID_FM_TX_CLASS_BASE + 7)
1003#define V4L2_CID_RDS_TX_ARTIFICIAL_HEAD		(V4L2_CID_FM_TX_CLASS_BASE + 8)
1004#define V4L2_CID_RDS_TX_COMPRESSED		(V4L2_CID_FM_TX_CLASS_BASE + 9)
1005#define V4L2_CID_RDS_TX_DYNAMIC_PTY		(V4L2_CID_FM_TX_CLASS_BASE + 10)
1006#define V4L2_CID_RDS_TX_TRAFFIC_ANNOUNCEMENT	(V4L2_CID_FM_TX_CLASS_BASE + 11)
1007#define V4L2_CID_RDS_TX_TRAFFIC_PROGRAM		(V4L2_CID_FM_TX_CLASS_BASE + 12)
1008#define V4L2_CID_RDS_TX_MUSIC_SPEECH		(V4L2_CID_FM_TX_CLASS_BASE + 13)
1009#define V4L2_CID_RDS_TX_ALT_FREQS_ENABLE	(V4L2_CID_FM_TX_CLASS_BASE + 14)
1010#define V4L2_CID_RDS_TX_ALT_FREQS		(V4L2_CID_FM_TX_CLASS_BASE + 15)
1011
1012#define V4L2_CID_AUDIO_LIMITER_ENABLED		(V4L2_CID_FM_TX_CLASS_BASE + 64)
1013#define V4L2_CID_AUDIO_LIMITER_RELEASE_TIME	(V4L2_CID_FM_TX_CLASS_BASE + 65)
1014#define V4L2_CID_AUDIO_LIMITER_DEVIATION	(V4L2_CID_FM_TX_CLASS_BASE + 66)
1015
1016#define V4L2_CID_AUDIO_COMPRESSION_ENABLED	(V4L2_CID_FM_TX_CLASS_BASE + 80)
1017#define V4L2_CID_AUDIO_COMPRESSION_GAIN		(V4L2_CID_FM_TX_CLASS_BASE + 81)
1018#define V4L2_CID_AUDIO_COMPRESSION_THRESHOLD	(V4L2_CID_FM_TX_CLASS_BASE + 82)
1019#define V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME	(V4L2_CID_FM_TX_CLASS_BASE + 83)
1020#define V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME	(V4L2_CID_FM_TX_CLASS_BASE + 84)
1021
1022#define V4L2_CID_PILOT_TONE_ENABLED		(V4L2_CID_FM_TX_CLASS_BASE + 96)
1023#define V4L2_CID_PILOT_TONE_DEVIATION		(V4L2_CID_FM_TX_CLASS_BASE + 97)
1024#define V4L2_CID_PILOT_TONE_FREQUENCY		(V4L2_CID_FM_TX_CLASS_BASE + 98)
1025
1026#define V4L2_CID_TUNE_PREEMPHASIS		(V4L2_CID_FM_TX_CLASS_BASE + 112)
1027enum v4l2_preemphasis {
1028	V4L2_PREEMPHASIS_DISABLED	= 0,
1029	V4L2_PREEMPHASIS_50_uS		= 1,
1030	V4L2_PREEMPHASIS_75_uS		= 2,
1031};
1032#define V4L2_CID_TUNE_POWER_LEVEL		(V4L2_CID_FM_TX_CLASS_BASE + 113)
1033#define V4L2_CID_TUNE_ANTENNA_CAPACITOR		(V4L2_CID_FM_TX_CLASS_BASE + 114)
1034
1035
1036/* Flash and privacy (indicator) light controls */
1037
1038#define V4L2_CID_FLASH_CLASS_BASE		(V4L2_CTRL_CLASS_FLASH | 0x900)
1039#define V4L2_CID_FLASH_CLASS			(V4L2_CTRL_CLASS_FLASH | 1)
1040
1041#define V4L2_CID_FLASH_LED_MODE			(V4L2_CID_FLASH_CLASS_BASE + 1)
1042enum v4l2_flash_led_mode {
1043	V4L2_FLASH_LED_MODE_NONE,
1044	V4L2_FLASH_LED_MODE_FLASH,
1045	V4L2_FLASH_LED_MODE_TORCH,
1046};
1047
1048#define V4L2_CID_FLASH_STROBE_SOURCE		(V4L2_CID_FLASH_CLASS_BASE + 2)
1049enum v4l2_flash_strobe_source {
1050	V4L2_FLASH_STROBE_SOURCE_SOFTWARE,
1051	V4L2_FLASH_STROBE_SOURCE_EXTERNAL,
1052};
1053
1054#define V4L2_CID_FLASH_STROBE			(V4L2_CID_FLASH_CLASS_BASE + 3)
1055#define V4L2_CID_FLASH_STROBE_STOP		(V4L2_CID_FLASH_CLASS_BASE + 4)
1056#define V4L2_CID_FLASH_STROBE_STATUS		(V4L2_CID_FLASH_CLASS_BASE + 5)
1057
1058#define V4L2_CID_FLASH_TIMEOUT			(V4L2_CID_FLASH_CLASS_BASE + 6)
1059#define V4L2_CID_FLASH_INTENSITY		(V4L2_CID_FLASH_CLASS_BASE + 7)
1060#define V4L2_CID_FLASH_TORCH_INTENSITY		(V4L2_CID_FLASH_CLASS_BASE + 8)
1061#define V4L2_CID_FLASH_INDICATOR_INTENSITY	(V4L2_CID_FLASH_CLASS_BASE + 9)
1062
1063#define V4L2_CID_FLASH_FAULT			(V4L2_CID_FLASH_CLASS_BASE + 10)
1064#define V4L2_FLASH_FAULT_OVER_VOLTAGE		(1 << 0)
1065#define V4L2_FLASH_FAULT_TIMEOUT		(1 << 1)
1066#define V4L2_FLASH_FAULT_OVER_TEMPERATURE	(1 << 2)
1067#define V4L2_FLASH_FAULT_SHORT_CIRCUIT		(1 << 3)
1068#define V4L2_FLASH_FAULT_OVER_CURRENT		(1 << 4)
1069#define V4L2_FLASH_FAULT_INDICATOR		(1 << 5)
1070#define V4L2_FLASH_FAULT_UNDER_VOLTAGE		(1 << 6)
1071#define V4L2_FLASH_FAULT_INPUT_VOLTAGE		(1 << 7)
1072#define V4L2_FLASH_FAULT_LED_OVER_TEMPERATURE	(1 << 8)
1073
1074#define V4L2_CID_FLASH_CHARGE			(V4L2_CID_FLASH_CLASS_BASE + 11)
1075#define V4L2_CID_FLASH_READY			(V4L2_CID_FLASH_CLASS_BASE + 12)
1076
1077
1078/* JPEG-class control IDs */
1079
1080#define V4L2_CID_JPEG_CLASS_BASE		(V4L2_CTRL_CLASS_JPEG | 0x900)
1081#define V4L2_CID_JPEG_CLASS			(V4L2_CTRL_CLASS_JPEG | 1)
1082
1083#define	V4L2_CID_JPEG_CHROMA_SUBSAMPLING	(V4L2_CID_JPEG_CLASS_BASE + 1)
1084enum v4l2_jpeg_chroma_subsampling {
1085	V4L2_JPEG_CHROMA_SUBSAMPLING_444	= 0,
1086	V4L2_JPEG_CHROMA_SUBSAMPLING_422	= 1,
1087	V4L2_JPEG_CHROMA_SUBSAMPLING_420	= 2,
1088	V4L2_JPEG_CHROMA_SUBSAMPLING_411	= 3,
1089	V4L2_JPEG_CHROMA_SUBSAMPLING_410	= 4,
1090	V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY	= 5,
1091};
1092#define	V4L2_CID_JPEG_RESTART_INTERVAL		(V4L2_CID_JPEG_CLASS_BASE + 2)
1093#define	V4L2_CID_JPEG_COMPRESSION_QUALITY	(V4L2_CID_JPEG_CLASS_BASE + 3)
1094
1095#define	V4L2_CID_JPEG_ACTIVE_MARKER		(V4L2_CID_JPEG_CLASS_BASE + 4)
1096#define	V4L2_JPEG_ACTIVE_MARKER_APP0		(1 << 0)
1097#define	V4L2_JPEG_ACTIVE_MARKER_APP1		(1 << 1)
1098#define	V4L2_JPEG_ACTIVE_MARKER_COM		(1 << 16)
1099#define	V4L2_JPEG_ACTIVE_MARKER_DQT		(1 << 17)
1100#define	V4L2_JPEG_ACTIVE_MARKER_DHT		(1 << 18)
1101
1102
1103/* Image source controls */
1104#define V4L2_CID_IMAGE_SOURCE_CLASS_BASE	(V4L2_CTRL_CLASS_IMAGE_SOURCE | 0x900)
1105#define V4L2_CID_IMAGE_SOURCE_CLASS		(V4L2_CTRL_CLASS_IMAGE_SOURCE | 1)
1106
1107#define V4L2_CID_VBLANK				(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 1)
1108#define V4L2_CID_HBLANK				(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 2)
1109#define V4L2_CID_ANALOGUE_GAIN			(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 3)
1110#define V4L2_CID_TEST_PATTERN_RED		(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 4)
1111#define V4L2_CID_TEST_PATTERN_GREENR		(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 5)
1112#define V4L2_CID_TEST_PATTERN_BLUE		(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 6)
1113#define V4L2_CID_TEST_PATTERN_GREENB		(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 7)
1114#define V4L2_CID_UNIT_CELL_SIZE			(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 8)
1115#define V4L2_CID_NOTIFY_GAINS			(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 9)
1116
1117
1118/* Image processing controls */
1119
1120#define V4L2_CID_IMAGE_PROC_CLASS_BASE		(V4L2_CTRL_CLASS_IMAGE_PROC | 0x900)
1121#define V4L2_CID_IMAGE_PROC_CLASS		(V4L2_CTRL_CLASS_IMAGE_PROC | 1)
1122
1123#define V4L2_CID_LINK_FREQ			(V4L2_CID_IMAGE_PROC_CLASS_BASE + 1)
1124#define V4L2_CID_PIXEL_RATE			(V4L2_CID_IMAGE_PROC_CLASS_BASE + 2)
1125#define V4L2_CID_TEST_PATTERN			(V4L2_CID_IMAGE_PROC_CLASS_BASE + 3)
1126#define V4L2_CID_DEINTERLACING_MODE		(V4L2_CID_IMAGE_PROC_CLASS_BASE + 4)
1127#define V4L2_CID_DIGITAL_GAIN			(V4L2_CID_IMAGE_PROC_CLASS_BASE + 5)
1128
1129/*  DV-class control IDs defined by V4L2 */
1130#define V4L2_CID_DV_CLASS_BASE			(V4L2_CTRL_CLASS_DV | 0x900)
1131#define V4L2_CID_DV_CLASS			(V4L2_CTRL_CLASS_DV | 1)
1132
1133#define	V4L2_CID_DV_TX_HOTPLUG			(V4L2_CID_DV_CLASS_BASE + 1)
1134#define	V4L2_CID_DV_TX_RXSENSE			(V4L2_CID_DV_CLASS_BASE + 2)
1135#define	V4L2_CID_DV_TX_EDID_PRESENT		(V4L2_CID_DV_CLASS_BASE + 3)
1136#define	V4L2_CID_DV_TX_MODE			(V4L2_CID_DV_CLASS_BASE + 4)
1137enum v4l2_dv_tx_mode {
1138	V4L2_DV_TX_MODE_DVI_D	= 0,
1139	V4L2_DV_TX_MODE_HDMI	= 1,
1140};
1141#define V4L2_CID_DV_TX_RGB_RANGE		(V4L2_CID_DV_CLASS_BASE + 5)
1142enum v4l2_dv_rgb_range {
1143	V4L2_DV_RGB_RANGE_AUTO	  = 0,
1144	V4L2_DV_RGB_RANGE_LIMITED = 1,
1145	V4L2_DV_RGB_RANGE_FULL	  = 2,
1146};
1147
1148#define V4L2_CID_DV_TX_IT_CONTENT_TYPE		(V4L2_CID_DV_CLASS_BASE + 6)
1149enum v4l2_dv_it_content_type {
1150	V4L2_DV_IT_CONTENT_TYPE_GRAPHICS  = 0,
1151	V4L2_DV_IT_CONTENT_TYPE_PHOTO	  = 1,
1152	V4L2_DV_IT_CONTENT_TYPE_CINEMA	  = 2,
1153	V4L2_DV_IT_CONTENT_TYPE_GAME	  = 3,
1154	V4L2_DV_IT_CONTENT_TYPE_NO_ITC	  = 4,
1155};
1156
1157#define	V4L2_CID_DV_RX_POWER_PRESENT		(V4L2_CID_DV_CLASS_BASE + 100)
1158#define V4L2_CID_DV_RX_RGB_RANGE		(V4L2_CID_DV_CLASS_BASE + 101)
1159#define V4L2_CID_DV_RX_IT_CONTENT_TYPE		(V4L2_CID_DV_CLASS_BASE + 102)
1160
1161#define V4L2_CID_FM_RX_CLASS_BASE		(V4L2_CTRL_CLASS_FM_RX | 0x900)
1162#define V4L2_CID_FM_RX_CLASS			(V4L2_CTRL_CLASS_FM_RX | 1)
1163
1164#define V4L2_CID_TUNE_DEEMPHASIS		(V4L2_CID_FM_RX_CLASS_BASE + 1)
1165enum v4l2_deemphasis {
1166	V4L2_DEEMPHASIS_DISABLED	= V4L2_PREEMPHASIS_DISABLED,
1167	V4L2_DEEMPHASIS_50_uS		= V4L2_PREEMPHASIS_50_uS,
1168	V4L2_DEEMPHASIS_75_uS		= V4L2_PREEMPHASIS_75_uS,
1169};
1170
1171#define V4L2_CID_RDS_RECEPTION			(V4L2_CID_FM_RX_CLASS_BASE + 2)
1172#define V4L2_CID_RDS_RX_PTY			(V4L2_CID_FM_RX_CLASS_BASE + 3)
1173#define V4L2_CID_RDS_RX_PS_NAME			(V4L2_CID_FM_RX_CLASS_BASE + 4)
1174#define V4L2_CID_RDS_RX_RADIO_TEXT		(V4L2_CID_FM_RX_CLASS_BASE + 5)
1175#define V4L2_CID_RDS_RX_TRAFFIC_ANNOUNCEMENT	(V4L2_CID_FM_RX_CLASS_BASE + 6)
1176#define V4L2_CID_RDS_RX_TRAFFIC_PROGRAM		(V4L2_CID_FM_RX_CLASS_BASE + 7)
1177#define V4L2_CID_RDS_RX_MUSIC_SPEECH		(V4L2_CID_FM_RX_CLASS_BASE + 8)
1178
1179#define V4L2_CID_RF_TUNER_CLASS_BASE		(V4L2_CTRL_CLASS_RF_TUNER | 0x900)
1180#define V4L2_CID_RF_TUNER_CLASS			(V4L2_CTRL_CLASS_RF_TUNER | 1)
1181
1182#define V4L2_CID_RF_TUNER_BANDWIDTH_AUTO	(V4L2_CID_RF_TUNER_CLASS_BASE + 11)
1183#define V4L2_CID_RF_TUNER_BANDWIDTH		(V4L2_CID_RF_TUNER_CLASS_BASE + 12)
1184#define V4L2_CID_RF_TUNER_RF_GAIN		(V4L2_CID_RF_TUNER_CLASS_BASE + 32)
1185#define V4L2_CID_RF_TUNER_LNA_GAIN_AUTO		(V4L2_CID_RF_TUNER_CLASS_BASE + 41)
1186#define V4L2_CID_RF_TUNER_LNA_GAIN		(V4L2_CID_RF_TUNER_CLASS_BASE + 42)
1187#define V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO	(V4L2_CID_RF_TUNER_CLASS_BASE + 51)
1188#define V4L2_CID_RF_TUNER_MIXER_GAIN		(V4L2_CID_RF_TUNER_CLASS_BASE + 52)
1189#define V4L2_CID_RF_TUNER_IF_GAIN_AUTO		(V4L2_CID_RF_TUNER_CLASS_BASE + 61)
1190#define V4L2_CID_RF_TUNER_IF_GAIN		(V4L2_CID_RF_TUNER_CLASS_BASE + 62)
1191#define V4L2_CID_RF_TUNER_PLL_LOCK			(V4L2_CID_RF_TUNER_CLASS_BASE + 91)
1192
1193
1194/*  Detection-class control IDs defined by V4L2 */
1195#define V4L2_CID_DETECT_CLASS_BASE		(V4L2_CTRL_CLASS_DETECT | 0x900)
1196#define V4L2_CID_DETECT_CLASS			(V4L2_CTRL_CLASS_DETECT | 1)
1197
1198#define V4L2_CID_DETECT_MD_MODE			(V4L2_CID_DETECT_CLASS_BASE + 1)
1199enum v4l2_detect_md_mode {
1200	V4L2_DETECT_MD_MODE_DISABLED		= 0,
1201	V4L2_DETECT_MD_MODE_GLOBAL		= 1,
1202	V4L2_DETECT_MD_MODE_THRESHOLD_GRID	= 2,
1203	V4L2_DETECT_MD_MODE_REGION_GRID		= 3,
1204};
1205#define V4L2_CID_DETECT_MD_GLOBAL_THRESHOLD	(V4L2_CID_DETECT_CLASS_BASE + 2)
1206#define V4L2_CID_DETECT_MD_THRESHOLD_GRID	(V4L2_CID_DETECT_CLASS_BASE + 3)
1207#define V4L2_CID_DETECT_MD_REGION_GRID		(V4L2_CID_DETECT_CLASS_BASE + 4)
1208
1209
1210/*  Stateless CODECs controls */
1211#define V4L2_CID_CODEC_STATELESS_BASE          (V4L2_CTRL_CLASS_CODEC_STATELESS | 0x900)
1212#define V4L2_CID_CODEC_STATELESS_CLASS         (V4L2_CTRL_CLASS_CODEC_STATELESS | 1)
1213
1214#define V4L2_CID_STATELESS_H264_DECODE_MODE	(V4L2_CID_CODEC_STATELESS_BASE + 0)
1215/**
1216 * enum v4l2_stateless_h264_decode_mode - Decoding mode
1217 *
1218 * @V4L2_STATELESS_H264_DECODE_MODE_SLICE_BASED: indicates that decoding
1219 * is performed one slice at a time. In this mode,
1220 * V4L2_CID_STATELESS_H264_SLICE_PARAMS must contain the parsed slice
1221 * parameters and the OUTPUT buffer must contain a single slice.
1222 * V4L2_BUF_CAP_SUPPORTS_M2M_HOLD_CAPTURE_BUF feature is used
1223 * in order to support multislice frames.
1224 * @V4L2_STATELESS_H264_DECODE_MODE_FRAME_BASED: indicates that
1225 * decoding is performed per frame. The OUTPUT buffer must contain
1226 * all slices and also both fields. This mode is typically supported
1227 * by device drivers that are able to parse the slice(s) header(s)
1228 * in hardware. When this mode is selected,
1229 * V4L2_CID_STATELESS_H264_SLICE_PARAMS is not used.
1230 */
1231enum v4l2_stateless_h264_decode_mode {
1232	V4L2_STATELESS_H264_DECODE_MODE_SLICE_BASED,
1233	V4L2_STATELESS_H264_DECODE_MODE_FRAME_BASED,
1234};
1235
1236#define V4L2_CID_STATELESS_H264_START_CODE	(V4L2_CID_CODEC_STATELESS_BASE + 1)
1237/**
1238 * enum v4l2_stateless_h264_start_code - Start code
1239 *
1240 * @V4L2_STATELESS_H264_START_CODE_NONE: slices are passed
1241 * to the driver without any start code.
1242 * @V4L2_STATELESS_H264_START_CODE_ANNEX_B: slices are passed
1243 * to the driver with an Annex B start code prefix
1244 * (legal start codes can be 3-bytes 0x000001 or 4-bytes 0x00000001).
1245 * This mode is typically supported by device drivers that parse
1246 * the start code in hardware.
1247 */
1248enum v4l2_stateless_h264_start_code {
1249	V4L2_STATELESS_H264_START_CODE_NONE,
1250	V4L2_STATELESS_H264_START_CODE_ANNEX_B,
1251};
1252
1253#define V4L2_H264_SPS_CONSTRAINT_SET0_FLAG			0x01
1254#define V4L2_H264_SPS_CONSTRAINT_SET1_FLAG			0x02
1255#define V4L2_H264_SPS_CONSTRAINT_SET2_FLAG			0x04
1256#define V4L2_H264_SPS_CONSTRAINT_SET3_FLAG			0x08
1257#define V4L2_H264_SPS_CONSTRAINT_SET4_FLAG			0x10
1258#define V4L2_H264_SPS_CONSTRAINT_SET5_FLAG			0x20
1259
1260#define V4L2_H264_SPS_FLAG_SEPARATE_COLOUR_PLANE		0x01
1261#define V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS	0x02
1262#define V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO		0x04
1263#define V4L2_H264_SPS_FLAG_GAPS_IN_FRAME_NUM_VALUE_ALLOWED	0x08
1264#define V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY			0x10
1265#define V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD		0x20
1266#define V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE			0x40
1267
1268#define V4L2_H264_SPS_HAS_CHROMA_FORMAT(sps) \
1269	((sps)->profile_idc == 100 || (sps)->profile_idc == 110 || \
1270	 (sps)->profile_idc == 122 || (sps)->profile_idc == 244 || \
1271	 (sps)->profile_idc == 44  || (sps)->profile_idc == 83  || \
1272	 (sps)->profile_idc == 86  || (sps)->profile_idc == 118 || \
1273	 (sps)->profile_idc == 128 || (sps)->profile_idc == 138 || \
1274	 (sps)->profile_idc == 139 || (sps)->profile_idc == 134 || \
1275	 (sps)->profile_idc == 135)
1276
1277#define V4L2_CID_STATELESS_H264_SPS		(V4L2_CID_CODEC_STATELESS_BASE + 2)
1278/**
1279 * struct v4l2_ctrl_h264_sps - H264 sequence parameter set
1280 *
1281 * All the members on this sequence parameter set structure match the
1282 * sequence parameter set syntax as specified by the H264 specification.
1283 *
1284 * @profile_idc: see H264 specification.
1285 * @constraint_set_flags: see H264 specification.
1286 * @level_idc: see H264 specification.
1287 * @seq_parameter_set_id: see H264 specification.
1288 * @chroma_format_idc: see H264 specification.
1289 * @bit_depth_luma_minus8: see H264 specification.
1290 * @bit_depth_chroma_minus8: see H264 specification.
1291 * @log2_max_frame_num_minus4: see H264 specification.
1292 * @pic_order_cnt_type: see H264 specification.
1293 * @log2_max_pic_order_cnt_lsb_minus4: see H264 specification.
1294 * @max_num_ref_frames: see H264 specification.
1295 * @num_ref_frames_in_pic_order_cnt_cycle: see H264 specification.
1296 * @offset_for_ref_frame: see H264 specification.
1297 * @offset_for_non_ref_pic: see H264 specification.
1298 * @offset_for_top_to_bottom_field: see H264 specification.
1299 * @pic_width_in_mbs_minus1: see H264 specification.
1300 * @pic_height_in_map_units_minus1: see H264 specification.
1301 * @flags: see V4L2_H264_SPS_FLAG_{}.
1302 */
1303struct v4l2_ctrl_h264_sps {
1304	__u8 profile_idc;
1305	__u8 constraint_set_flags;
1306	__u8 level_idc;
1307	__u8 seq_parameter_set_id;
1308	__u8 chroma_format_idc;
1309	__u8 bit_depth_luma_minus8;
1310	__u8 bit_depth_chroma_minus8;
1311	__u8 log2_max_frame_num_minus4;
1312	__u8 pic_order_cnt_type;
1313	__u8 log2_max_pic_order_cnt_lsb_minus4;
1314	__u8 max_num_ref_frames;
1315	__u8 num_ref_frames_in_pic_order_cnt_cycle;
1316	__s32 offset_for_ref_frame[255];
1317	__s32 offset_for_non_ref_pic;
1318	__s32 offset_for_top_to_bottom_field;
1319	__u16 pic_width_in_mbs_minus1;
1320	__u16 pic_height_in_map_units_minus1;
1321	__u32 flags;
1322};
1323
1324#define V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE				0x0001
1325#define V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT	0x0002
1326#define V4L2_H264_PPS_FLAG_WEIGHTED_PRED				0x0004
1327#define V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT		0x0008
1328#define V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED			0x0010
1329#define V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT			0x0020
1330#define V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE				0x0040
1331#define V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT			0x0080
1332
1333#define V4L2_CID_STATELESS_H264_PPS		(V4L2_CID_CODEC_STATELESS_BASE + 3)
1334/**
1335 * struct v4l2_ctrl_h264_pps - H264 picture parameter set
1336 *
1337 * Except where noted, all the members on this picture parameter set
1338 * structure match the picture parameter set syntax as specified
1339 * by the H264 specification.
1340 *
1341 * In particular, V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT flag
1342 * has a specific meaning. This flag should be set if a non-flat
1343 * scaling matrix applies to the picture. In this case, applications
1344 * are expected to use V4L2_CID_STATELESS_H264_SCALING_MATRIX,
1345 * to pass the values of the non-flat matrices.
1346 *
1347 * @pic_parameter_set_id: see H264 specification.
1348 * @seq_parameter_set_id: see H264 specification.
1349 * @num_slice_groups_minus1: see H264 specification.
1350 * @num_ref_idx_l0_default_active_minus1: see H264 specification.
1351 * @num_ref_idx_l1_default_active_minus1: see H264 specification.
1352 * @weighted_bipred_idc: see H264 specification.
1353 * @pic_init_qp_minus26: see H264 specification.
1354 * @pic_init_qs_minus26: see H264 specification.
1355 * @chroma_qp_index_offset: see H264 specification.
1356 * @second_chroma_qp_index_offset: see H264 specification.
1357 * @flags: see V4L2_H264_PPS_FLAG_{}.
1358 */
1359struct v4l2_ctrl_h264_pps {
1360	__u8 pic_parameter_set_id;
1361	__u8 seq_parameter_set_id;
1362	__u8 num_slice_groups_minus1;
1363	__u8 num_ref_idx_l0_default_active_minus1;
1364	__u8 num_ref_idx_l1_default_active_minus1;
1365	__u8 weighted_bipred_idc;
1366	__s8 pic_init_qp_minus26;
1367	__s8 pic_init_qs_minus26;
1368	__s8 chroma_qp_index_offset;
1369	__s8 second_chroma_qp_index_offset;
1370	__u16 flags;
1371};
1372
1373#define V4L2_CID_STATELESS_H264_SCALING_MATRIX	(V4L2_CID_CODEC_STATELESS_BASE + 4)
1374/**
1375 * struct v4l2_ctrl_h264_scaling_matrix - H264 scaling matrices
1376 *
1377 * @scaling_list_4x4: scaling matrix after applying the inverse
1378 * scanning process. Expected list order is Intra Y, Intra Cb,
1379 * Intra Cr, Inter Y, Inter Cb, Inter Cr. The values on each
1380 * scaling list are expected in raster scan order.
1381 * @scaling_list_8x8: scaling matrix after applying the inverse
1382 * scanning process. Expected list order is Intra Y, Inter Y,
1383 * Intra Cb, Inter Cb, Intra Cr, Inter Cr. The values on each
1384 * scaling list are expected in raster scan order.
1385 *
1386 * Note that the list order is different for the 4x4 and 8x8
1387 * matrices as per the H264 specification, see table 7-2 "Assignment
1388 * of mnemonic names to scaling list indices and specification of
1389 * fall-back rule".
1390 */
1391struct v4l2_ctrl_h264_scaling_matrix {
1392	__u8 scaling_list_4x4[6][16];
1393	__u8 scaling_list_8x8[6][64];
1394};
1395
1396struct v4l2_h264_weight_factors {
1397	__s16 luma_weight[32];
1398	__s16 luma_offset[32];
1399	__s16 chroma_weight[32][2];
1400	__s16 chroma_offset[32][2];
1401};
1402
1403#define V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice) \
1404	((((pps)->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) && \
1405	 ((slice)->slice_type == V4L2_H264_SLICE_TYPE_P || \
1406	  (slice)->slice_type == V4L2_H264_SLICE_TYPE_SP)) || \
1407	 ((pps)->weighted_bipred_idc == 1 && \
1408	  (slice)->slice_type == V4L2_H264_SLICE_TYPE_B))
1409
1410#define V4L2_CID_STATELESS_H264_PRED_WEIGHTS	(V4L2_CID_CODEC_STATELESS_BASE + 5)
1411/**
1412 * struct v4l2_ctrl_h264_pred_weights - Prediction weight table
1413 *
1414 * Prediction weight table, which matches the syntax specified
1415 * by the H264 specification.
1416 *
1417 * @luma_log2_weight_denom: see H264 specification.
1418 * @chroma_log2_weight_denom: see H264 specification.
1419 * @weight_factors: luma and chroma weight factors.
1420 */
1421struct v4l2_ctrl_h264_pred_weights {
1422	__u16 luma_log2_weight_denom;
1423	__u16 chroma_log2_weight_denom;
1424	struct v4l2_h264_weight_factors weight_factors[2];
1425};
1426
1427#define V4L2_H264_SLICE_TYPE_P				0
1428#define V4L2_H264_SLICE_TYPE_B				1
1429#define V4L2_H264_SLICE_TYPE_I				2
1430#define V4L2_H264_SLICE_TYPE_SP				3
1431#define V4L2_H264_SLICE_TYPE_SI				4
1432
1433#define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED	0x01
1434#define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH		0x02
1435
1436#define V4L2_H264_TOP_FIELD_REF				0x1
1437#define V4L2_H264_BOTTOM_FIELD_REF			0x2
1438#define V4L2_H264_FRAME_REF				0x3
1439
1440/**
1441 * struct v4l2_h264_reference - H264 picture reference
1442 *
1443 * @fields: indicates how the picture is referenced.
1444 * Valid values are V4L2_H264_{}_REF.
1445 * @index: index into v4l2_ctrl_h264_decode_params.dpb[].
1446 */
1447struct v4l2_h264_reference {
1448	__u8 fields;
1449	__u8 index;
1450};
1451
1452/*
1453 * Maximum DPB size, as specified by section 'A.3.1 Level limits
1454 * common to the Baseline, Main, and Extended profiles'.
1455 */
1456#define V4L2_H264_NUM_DPB_ENTRIES 16
1457#define V4L2_H264_REF_LIST_LEN (2 * V4L2_H264_NUM_DPB_ENTRIES)
1458
1459#define V4L2_CID_STATELESS_H264_SLICE_PARAMS	(V4L2_CID_CODEC_STATELESS_BASE + 6)
1460/**
1461 * struct v4l2_ctrl_h264_slice_params - H264 slice parameters
1462 *
1463 * This structure holds the H264 syntax elements that are specified
1464 * as non-invariant for the slices in a given frame.
1465 *
1466 * Slice invariant syntax elements are contained in struct
1467 * v4l2_ctrl_h264_decode_params. This is done to reduce the API surface
1468 * on frame-based decoders, where slice header parsing is done by the
1469 * hardware.
1470 *
1471 * Slice invariant syntax elements are specified in specification section
1472 * "7.4.3 Slice header semantics".
1473 *
1474 * Except where noted, the members on this struct match the slice header syntax.
1475 *
1476 * @header_bit_size: offset in bits to slice_data() from the beginning of this slice.
1477 * @first_mb_in_slice: see H264 specification.
1478 * @slice_type: see H264 specification.
1479 * @colour_plane_id: see H264 specification.
1480 * @redundant_pic_cnt: see H264 specification.
1481 * @cabac_init_idc: see H264 specification.
1482 * @slice_qp_delta: see H264 specification.
1483 * @slice_qs_delta: see H264 specification.
1484 * @disable_deblocking_filter_idc: see H264 specification.
1485 * @slice_alpha_c0_offset_div2: see H264 specification.
1486 * @slice_beta_offset_div2: see H264 specification.
1487 * @num_ref_idx_l0_active_minus1: see H264 specification.
1488 * @num_ref_idx_l1_active_minus1: see H264 specification.
1489 * @reserved: padding field. Should be zeroed by applications.
1490 * @ref_pic_list0: reference picture list 0 after applying the per-slice modifications.
1491 * @ref_pic_list1: reference picture list 1 after applying the per-slice modifications.
1492 * @flags: see V4L2_H264_SLICE_FLAG_{}.
1493 */
1494struct v4l2_ctrl_h264_slice_params {
1495	__u32 header_bit_size;
1496	__u32 first_mb_in_slice;
1497	__u8 slice_type;
1498	__u8 colour_plane_id;
1499	__u8 redundant_pic_cnt;
1500	__u8 cabac_init_idc;
1501	__s8 slice_qp_delta;
1502	__s8 slice_qs_delta;
1503	__u8 disable_deblocking_filter_idc;
1504	__s8 slice_alpha_c0_offset_div2;
1505	__s8 slice_beta_offset_div2;
1506	__u8 num_ref_idx_l0_active_minus1;
1507	__u8 num_ref_idx_l1_active_minus1;
1508
1509	__u8 reserved;
1510
1511	struct v4l2_h264_reference ref_pic_list0[V4L2_H264_REF_LIST_LEN];
1512	struct v4l2_h264_reference ref_pic_list1[V4L2_H264_REF_LIST_LEN];
1513
1514	__u32 flags;
1515};
1516
1517#define V4L2_H264_DPB_ENTRY_FLAG_VALID		0x01
1518#define V4L2_H264_DPB_ENTRY_FLAG_ACTIVE		0x02
1519#define V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM	0x04
1520#define V4L2_H264_DPB_ENTRY_FLAG_FIELD		0x08
1521
1522/**
1523 * struct v4l2_h264_dpb_entry - H264 decoded picture buffer entry
1524 *
1525 * @reference_ts: timestamp of the V4L2 capture buffer to use as reference.
1526 * The timestamp refers to the timestamp field in struct v4l2_buffer.
1527 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
1528 * @pic_num: matches PicNum variable assigned during the reference
1529 * picture lists construction process.
1530 * @frame_num: frame identifier which matches frame_num syntax element.
1531 * @fields: indicates how the DPB entry is referenced. Valid values are
1532 * V4L2_H264_{}_REF.
1533 * @reserved: padding field. Should be zeroed by applications.
1534 * @top_field_order_cnt: matches TopFieldOrderCnt picture value.
1535 * @bottom_field_order_cnt: matches BottomFieldOrderCnt picture value.
1536 * Note that picture field is indicated by v4l2_buffer.field.
1537 * @flags: see V4L2_H264_DPB_ENTRY_FLAG_{}.
1538 */
1539struct v4l2_h264_dpb_entry {
1540	__u64 reference_ts;
1541	__u32 pic_num;
1542	__u16 frame_num;
1543	__u8 fields;
1544	__u8 reserved[5];
1545	__s32 top_field_order_cnt;
1546	__s32 bottom_field_order_cnt;
1547	__u32 flags;
1548};
1549
1550#define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC		0x01
1551#define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC		0x02
1552#define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD	0x04
1553#define V4L2_H264_DECODE_PARAM_FLAG_PFRAME		0x08
1554#define V4L2_H264_DECODE_PARAM_FLAG_BFRAME		0x10
1555
1556#define V4L2_CID_STATELESS_H264_DECODE_PARAMS	(V4L2_CID_CODEC_STATELESS_BASE + 7)
1557/**
1558 * struct v4l2_ctrl_h264_decode_params - H264 decoding parameters
1559 *
1560 * @dpb: decoded picture buffer.
1561 * @nal_ref_idc: slice header syntax element.
1562 * @frame_num: slice header syntax element.
1563 * @top_field_order_cnt: matches TopFieldOrderCnt picture value.
1564 * @bottom_field_order_cnt: matches BottomFieldOrderCnt picture value.
1565 * Note that picture field is indicated by v4l2_buffer.field.
1566 * @idr_pic_id: slice header syntax element.
1567 * @pic_order_cnt_lsb: slice header syntax element.
1568 * @delta_pic_order_cnt_bottom: slice header syntax element.
1569 * @delta_pic_order_cnt0: slice header syntax element.
1570 * @delta_pic_order_cnt1: slice header syntax element.
1571 * @dec_ref_pic_marking_bit_size: size in bits of dec_ref_pic_marking()
1572 * syntax element.
1573 * @pic_order_cnt_bit_size: size in bits of pic order count syntax.
1574 * @slice_group_change_cycle: slice header syntax element.
1575 * @reserved: padding field. Should be zeroed by applications.
1576 * @flags: see V4L2_H264_DECODE_PARAM_FLAG_{}.
1577 */
1578struct v4l2_ctrl_h264_decode_params {
1579	struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES];
1580	__u16 nal_ref_idc;
1581	__u16 frame_num;
1582	__s32 top_field_order_cnt;
1583	__s32 bottom_field_order_cnt;
1584	__u16 idr_pic_id;
1585	__u16 pic_order_cnt_lsb;
1586	__s32 delta_pic_order_cnt_bottom;
1587	__s32 delta_pic_order_cnt0;
1588	__s32 delta_pic_order_cnt1;
1589	__u32 dec_ref_pic_marking_bit_size;
1590	__u32 pic_order_cnt_bit_size;
1591	__u32 slice_group_change_cycle;
1592
1593	__u32 reserved;
1594	__u32 flags;
1595};
1596
1597
1598/* Stateless FWHT control, used by the vicodec driver */
1599
1600/* Current FWHT version */
1601#define V4L2_FWHT_VERSION			3
1602
1603/* Set if this is an interlaced format */
1604#define V4L2_FWHT_FL_IS_INTERLACED		_BITUL(0)
1605/* Set if this is a bottom-first (NTSC) interlaced format */
1606#define V4L2_FWHT_FL_IS_BOTTOM_FIRST		_BITUL(1)
1607/* Set if each 'frame' contains just one field */
1608#define V4L2_FWHT_FL_IS_ALTERNATE		_BITUL(2)
1609/*
1610 * If V4L2_FWHT_FL_IS_ALTERNATE was set, then this is set if this
1611 * 'frame' is the bottom field, else it is the top field.
1612 */
1613#define V4L2_FWHT_FL_IS_BOTTOM_FIELD		_BITUL(3)
1614/* Set if the Y' plane is uncompressed */
1615#define V4L2_FWHT_FL_LUMA_IS_UNCOMPRESSED	_BITUL(4)
1616/* Set if the Cb plane is uncompressed */
1617#define V4L2_FWHT_FL_CB_IS_UNCOMPRESSED		_BITUL(5)
1618/* Set if the Cr plane is uncompressed */
1619#define V4L2_FWHT_FL_CR_IS_UNCOMPRESSED		_BITUL(6)
1620/* Set if the chroma plane is full height, if cleared it is half height */
1621#define V4L2_FWHT_FL_CHROMA_FULL_HEIGHT		_BITUL(7)
1622/* Set if the chroma plane is full width, if cleared it is half width */
1623#define V4L2_FWHT_FL_CHROMA_FULL_WIDTH		_BITUL(8)
1624/* Set if the alpha plane is uncompressed */
1625#define V4L2_FWHT_FL_ALPHA_IS_UNCOMPRESSED	_BITUL(9)
1626/* Set if this is an I Frame */
1627#define V4L2_FWHT_FL_I_FRAME			_BITUL(10)
1628
1629/* A 4-values flag - the number of components - 1 */
1630#define V4L2_FWHT_FL_COMPONENTS_NUM_MSK		GENMASK(18, 16)
1631#define V4L2_FWHT_FL_COMPONENTS_NUM_OFFSET	16
1632
1633/* A 4-values flag - the pixel encoding type */
1634#define V4L2_FWHT_FL_PIXENC_MSK			GENMASK(20, 19)
1635#define V4L2_FWHT_FL_PIXENC_OFFSET		19
1636#define V4L2_FWHT_FL_PIXENC_YUV			(1 << V4L2_FWHT_FL_PIXENC_OFFSET)
1637#define V4L2_FWHT_FL_PIXENC_RGB			(2 << V4L2_FWHT_FL_PIXENC_OFFSET)
1638#define V4L2_FWHT_FL_PIXENC_HSV			(3 << V4L2_FWHT_FL_PIXENC_OFFSET)
1639
1640#define V4L2_CID_STATELESS_FWHT_PARAMS		(V4L2_CID_CODEC_STATELESS_BASE + 100)
1641/**
1642 * struct v4l2_ctrl_fwht_params - FWHT parameters
1643 *
1644 * @backward_ref_ts: timestamp of the V4L2 capture buffer to use as reference.
1645 * The timestamp refers to the timestamp field in struct v4l2_buffer.
1646 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
1647 * @version: must be V4L2_FWHT_VERSION.
1648 * @width: width of frame.
1649 * @height: height of frame.
1650 * @flags: FWHT flags (see V4L2_FWHT_FL_*).
1651 * @colorspace: the colorspace (enum v4l2_colorspace).
1652 * @xfer_func: the transfer function (enum v4l2_xfer_func).
1653 * @ycbcr_enc: the Y'CbCr encoding (enum v4l2_ycbcr_encoding).
1654 * @quantization: the quantization (enum v4l2_quantization).
1655 */
1656struct v4l2_ctrl_fwht_params {
1657	__u64 backward_ref_ts;
1658	__u32 version;
1659	__u32 width;
1660	__u32 height;
1661	__u32 flags;
1662	__u32 colorspace;
1663	__u32 xfer_func;
1664	__u32 ycbcr_enc;
1665	__u32 quantization;
1666};
1667
1668/* Stateless VP8 control */
1669
1670#define V4L2_VP8_SEGMENT_FLAG_ENABLED              0x01
1671#define V4L2_VP8_SEGMENT_FLAG_UPDATE_MAP           0x02
1672#define V4L2_VP8_SEGMENT_FLAG_UPDATE_FEATURE_DATA  0x04
1673#define V4L2_VP8_SEGMENT_FLAG_DELTA_VALUE_MODE     0x08
1674
1675/**
1676 * struct v4l2_vp8_segment - VP8 segment-based adjustments parameters
1677 *
1678 * @quant_update: update values for the segment quantizer.
1679 * @lf_update: update values for the loop filter level.
1680 * @segment_probs: branch probabilities of the segment_id decoding tree.
1681 * @padding: padding field. Should be zeroed by applications.
1682 * @flags: see V4L2_VP8_SEGMENT_FLAG_{}.
1683 *
1684 * This structure contains segment-based adjustments related parameters.
1685 * See the 'update_segmentation()' part of the frame header syntax,
1686 * and section '9.3. Segment-Based Adjustments' of the VP8 specification
1687 * for more details.
1688 */
1689struct v4l2_vp8_segment {
1690	__s8 quant_update[4];
1691	__s8 lf_update[4];
1692	__u8 segment_probs[3];
1693	__u8 padding;
1694	__u32 flags;
1695};
1696
1697#define V4L2_VP8_LF_ADJ_ENABLE	0x01
1698#define V4L2_VP8_LF_DELTA_UPDATE	0x02
1699#define V4L2_VP8_LF_FILTER_TYPE_SIMPLE	0x04
1700
1701/**
1702 * struct v4l2_vp8_loop_filter - VP8 loop filter parameters
1703 *
1704 * @ref_frm_delta: Reference frame signed delta values.
1705 * @mb_mode_delta: MB prediction mode signed delta values.
1706 * @sharpness_level: matches sharpness_level syntax element.
1707 * @level: matches loop_filter_level syntax element.
1708 * @padding: padding field. Should be zeroed by applications.
1709 * @flags: see V4L2_VP8_LF_{}.
1710 *
1711 * This structure contains loop filter related parameters.
1712 * See the 'mb_lf_adjustments()' part of the frame header syntax,
1713 * and section '9.4. Loop Filter Type and Levels' of the VP8 specification
1714 * for more details.
1715 */
1716struct v4l2_vp8_loop_filter {
1717	__s8 ref_frm_delta[4];
1718	__s8 mb_mode_delta[4];
1719	__u8 sharpness_level;
1720	__u8 level;
1721	__u16 padding;
1722	__u32 flags;
1723};
1724
1725/**
1726 * struct v4l2_vp8_quantization - VP8 quantizattion indices
1727 *
1728 * @y_ac_qi: luma AC coefficient table index.
1729 * @y_dc_delta: luma DC delta vaue.
1730 * @y2_dc_delta: y2 block DC delta value.
1731 * @y2_ac_delta: y2 block AC delta value.
1732 * @uv_dc_delta: chroma DC delta value.
1733 * @uv_ac_delta: chroma AC delta value.
1734 * @padding: padding field. Should be zeroed by applications.
1735 *
1736 * This structure contains the quantization indices present
1737 * in 'quant_indices()' part of the frame header syntax.
1738 * See section '9.6. Dequantization Indices' of the VP8 specification
1739 * for more details.
1740 */
1741struct v4l2_vp8_quantization {
1742	__u8 y_ac_qi;
1743	__s8 y_dc_delta;
1744	__s8 y2_dc_delta;
1745	__s8 y2_ac_delta;
1746	__s8 uv_dc_delta;
1747	__s8 uv_ac_delta;
1748	__u16 padding;
1749};
1750
1751#define V4L2_VP8_COEFF_PROB_CNT 11
1752#define V4L2_VP8_MV_PROB_CNT 19
1753
1754/**
1755 * struct v4l2_vp8_entropy - VP8 update probabilities
1756 *
1757 * @coeff_probs: coefficient probability update values.
1758 * @y_mode_probs: luma intra-prediction probabilities.
1759 * @uv_mode_probs: chroma intra-prediction probabilities.
1760 * @mv_probs: mv decoding probability.
1761 * @padding: padding field. Should be zeroed by applications.
1762 *
1763 * This structure contains the update probabilities present in
1764 * 'token_prob_update()' and 'mv_prob_update()' part of the frame header.
1765 * See section '17.2. Probability Updates' of the VP8 specification
1766 * for more details.
1767 */
1768struct v4l2_vp8_entropy {
1769	__u8 coeff_probs[4][8][3][V4L2_VP8_COEFF_PROB_CNT];
1770	__u8 y_mode_probs[4];
1771	__u8 uv_mode_probs[3];
1772	__u8 mv_probs[2][V4L2_VP8_MV_PROB_CNT];
1773	__u8 padding[3];
1774};
1775
1776/**
1777 * struct v4l2_vp8_entropy_coder_state - VP8 boolean coder state
1778 *
1779 * @range: coder state value for "Range"
1780 * @value: coder state value for "Value"
1781 * @bit_count: number of bits left in range "Value".
1782 * @padding: padding field. Should be zeroed by applications.
1783 *
1784 * This structure contains the state for the boolean coder, as
1785 * explained in section '7. Boolean Entropy Decoder' of the VP8 specification.
1786 */
1787struct v4l2_vp8_entropy_coder_state {
1788	__u8 range;
1789	__u8 value;
1790	__u8 bit_count;
1791	__u8 padding;
1792};
1793
1794#define V4L2_VP8_FRAME_FLAG_KEY_FRAME		0x01
1795#define V4L2_VP8_FRAME_FLAG_EXPERIMENTAL		0x02
1796#define V4L2_VP8_FRAME_FLAG_SHOW_FRAME		0x04
1797#define V4L2_VP8_FRAME_FLAG_MB_NO_SKIP_COEFF	0x08
1798#define V4L2_VP8_FRAME_FLAG_SIGN_BIAS_GOLDEN	0x10
1799#define V4L2_VP8_FRAME_FLAG_SIGN_BIAS_ALT	0x20
1800
1801#define V4L2_VP8_FRAME_IS_KEY_FRAME(hdr) \
1802	(!!((hdr)->flags & V4L2_VP8_FRAME_FLAG_KEY_FRAME))
1803
1804#define V4L2_CID_STATELESS_VP8_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 200)
1805/**
1806 * struct v4l2_ctrl_vp8_frame - VP8 frame parameters
1807 *
1808 * @segment: segmentation parameters. See &v4l2_vp8_segment for more details
1809 * @lf: loop filter parameters. See &v4l2_vp8_loop_filter for more details
1810 * @quant: quantization parameters. See &v4l2_vp8_quantization for more details
1811 * @entropy: update probabilities. See &v4l2_vp8_entropy for more details
1812 * @coder_state: boolean coder state. See &v4l2_vp8_entropy_coder_state for more details
1813 * @width: frame width.
1814 * @height: frame height.
1815 * @horizontal_scale: horizontal scaling factor.
1816 * @vertical_scale: vertical scaling factor.
1817 * @version: bitstream version.
1818 * @prob_skip_false: frame header syntax element.
1819 * @prob_intra: frame header syntax element.
1820 * @prob_last: frame header syntax element.
1821 * @prob_gf: frame header syntax element.
1822 * @num_dct_parts: number of DCT coefficients partitions.
1823 * @first_part_size: size of the first partition, i.e. the control partition.
1824 * @first_part_header_bits: size in bits of the first partition header portion.
1825 * @dct_part_sizes: DCT coefficients sizes.
1826 * @last_frame_ts: "last" reference buffer timestamp.
1827 * The timestamp refers to the timestamp field in struct v4l2_buffer.
1828 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
1829 * @golden_frame_ts: "golden" reference buffer timestamp.
1830 * @alt_frame_ts: "alt" reference buffer timestamp.
1831 * @flags: see V4L2_VP8_FRAME_FLAG_{}.
1832 */
1833struct v4l2_ctrl_vp8_frame {
1834	struct v4l2_vp8_segment segment;
1835	struct v4l2_vp8_loop_filter lf;
1836	struct v4l2_vp8_quantization quant;
1837	struct v4l2_vp8_entropy entropy;
1838	struct v4l2_vp8_entropy_coder_state coder_state;
1839
1840	__u16 width;
1841	__u16 height;
1842
1843	__u8 horizontal_scale;
1844	__u8 vertical_scale;
1845
1846	__u8 version;
1847	__u8 prob_skip_false;
1848	__u8 prob_intra;
1849	__u8 prob_last;
1850	__u8 prob_gf;
1851	__u8 num_dct_parts;
1852
1853	__u32 first_part_size;
1854	__u32 first_part_header_bits;
1855	__u32 dct_part_sizes[8];
1856
1857	__u64 last_frame_ts;
1858	__u64 golden_frame_ts;
1859	__u64 alt_frame_ts;
1860
1861	__u64 flags;
1862};
1863
1864/* Stateless MPEG-2 controls */
1865
1866#define V4L2_MPEG2_SEQ_FLAG_PROGRESSIVE	0x01
1867
1868#define V4L2_CID_STATELESS_MPEG2_SEQUENCE (V4L2_CID_CODEC_STATELESS_BASE+220)
1869/**
1870 * struct v4l2_ctrl_mpeg2_sequence - MPEG-2 sequence header
1871 *
1872 * All the members on this structure match the sequence header and sequence
1873 * extension syntaxes as specified by the MPEG-2 specification.
1874 *
1875 * Fields horizontal_size, vertical_size and vbv_buffer_size are a
1876 * combination of respective _value and extension syntax elements,
1877 * as described in section 6.3.3 "Sequence header".
1878 *
1879 * @horizontal_size: combination of elements horizontal_size_value and
1880 * horizontal_size_extension.
1881 * @vertical_size: combination of elements vertical_size_value and
1882 * vertical_size_extension.
1883 * @vbv_buffer_size: combination of elements vbv_buffer_size_value and
1884 * vbv_buffer_size_extension.
1885 * @profile_and_level_indication: see MPEG-2 specification.
1886 * @chroma_format: see MPEG-2 specification.
1887 * @flags: see V4L2_MPEG2_SEQ_FLAG_{}.
1888 */
1889struct v4l2_ctrl_mpeg2_sequence {
1890	__u16	horizontal_size;
1891	__u16	vertical_size;
1892	__u32	vbv_buffer_size;
1893	__u16	profile_and_level_indication;
1894	__u8	chroma_format;
1895	__u8	flags;
1896};
1897
1898#define V4L2_MPEG2_PIC_CODING_TYPE_I			1
1899#define V4L2_MPEG2_PIC_CODING_TYPE_P			2
1900#define V4L2_MPEG2_PIC_CODING_TYPE_B			3
1901#define V4L2_MPEG2_PIC_CODING_TYPE_D			4
1902
1903#define V4L2_MPEG2_PIC_TOP_FIELD			0x1
1904#define V4L2_MPEG2_PIC_BOTTOM_FIELD			0x2
1905#define V4L2_MPEG2_PIC_FRAME				0x3
1906
1907#define V4L2_MPEG2_PIC_FLAG_TOP_FIELD_FIRST		0x0001
1908#define V4L2_MPEG2_PIC_FLAG_FRAME_PRED_DCT		0x0002
1909#define V4L2_MPEG2_PIC_FLAG_CONCEALMENT_MV		0x0004
1910#define V4L2_MPEG2_PIC_FLAG_Q_SCALE_TYPE		0x0008
1911#define V4L2_MPEG2_PIC_FLAG_INTRA_VLC			0x0010
1912#define V4L2_MPEG2_PIC_FLAG_ALT_SCAN			0x0020
1913#define V4L2_MPEG2_PIC_FLAG_REPEAT_FIRST		0x0040
1914#define V4L2_MPEG2_PIC_FLAG_PROGRESSIVE			0x0080
1915
1916#define V4L2_CID_STATELESS_MPEG2_PICTURE (V4L2_CID_CODEC_STATELESS_BASE+221)
1917/**
1918 * struct v4l2_ctrl_mpeg2_picture - MPEG-2 picture header
1919 *
1920 * All the members on this structure match the picture header and picture
1921 * coding extension syntaxes as specified by the MPEG-2 specification.
1922 *
1923 * @backward_ref_ts: timestamp of the V4L2 capture buffer to use as
1924 * reference for backward prediction.
1925 * @forward_ref_ts: timestamp of the V4L2 capture buffer to use as
1926 * reference for forward prediction. These timestamp refers to the
1927 * timestamp field in struct v4l2_buffer. Use v4l2_timeval_to_ns()
1928 * to convert the struct timeval to a __u64.
1929 * @flags: see V4L2_MPEG2_PIC_FLAG_{}.
1930 * @f_code: see MPEG-2 specification.
1931 * @picture_coding_type: see MPEG-2 specification.
1932 * @picture_structure: see V4L2_MPEG2_PIC_{}_FIELD.
1933 * @intra_dc_precision: see MPEG-2 specification.
1934 * @reserved: padding field. Should be zeroed by applications.
1935 */
1936struct v4l2_ctrl_mpeg2_picture {
1937	__u64	backward_ref_ts;
1938	__u64	forward_ref_ts;
1939	__u32	flags;
1940	__u8	f_code[2][2];
1941	__u8	picture_coding_type;
1942	__u8	picture_structure;
1943	__u8	intra_dc_precision;
1944	__u8	reserved[5];
1945};
1946
1947#define V4L2_CID_STATELESS_MPEG2_QUANTISATION (V4L2_CID_CODEC_STATELESS_BASE+222)
1948/**
1949 * struct v4l2_ctrl_mpeg2_quantisation - MPEG-2 quantisation
1950 *
1951 * Quantisation matrices as specified by section 6.3.7
1952 * "Quant matrix extension".
1953 *
1954 * @intra_quantiser_matrix: The quantisation matrix coefficients
1955 * for intra-coded frames, in zigzag scanning order. It is relevant
1956 * for both luma and chroma components, although it can be superseded
1957 * by the chroma-specific matrix for non-4:2:0 YUV formats.
1958 * @non_intra_quantiser_matrix: The quantisation matrix coefficients
1959 * for non-intra-coded frames, in zigzag scanning order. It is relevant
1960 * for both luma and chroma components, although it can be superseded
1961 * by the chroma-specific matrix for non-4:2:0 YUV formats.
1962 * @chroma_intra_quantiser_matrix: The quantisation matrix coefficients
1963 * for the chominance component of intra-coded frames, in zigzag scanning
1964 * order. Only relevant for 4:2:2 and 4:4:4 YUV formats.
1965 * @chroma_non_intra_quantiser_matrix: The quantisation matrix coefficients
1966 * for the chrominance component of non-intra-coded frames, in zigzag scanning
1967 * order. Only relevant for 4:2:2 and 4:4:4 YUV formats.
1968 */
1969struct v4l2_ctrl_mpeg2_quantisation {
1970	__u8	intra_quantiser_matrix[64];
1971	__u8	non_intra_quantiser_matrix[64];
1972	__u8	chroma_intra_quantiser_matrix[64];
1973	__u8	chroma_non_intra_quantiser_matrix[64];
1974};
1975
1976#define V4L2_CID_STATELESS_HEVC_SPS		(V4L2_CID_CODEC_STATELESS_BASE + 400)
1977#define V4L2_CID_STATELESS_HEVC_PPS		(V4L2_CID_CODEC_STATELESS_BASE + 401)
1978#define V4L2_CID_STATELESS_HEVC_SLICE_PARAMS	(V4L2_CID_CODEC_STATELESS_BASE + 402)
1979#define V4L2_CID_STATELESS_HEVC_SCALING_MATRIX	(V4L2_CID_CODEC_STATELESS_BASE + 403)
1980#define V4L2_CID_STATELESS_HEVC_DECODE_PARAMS	(V4L2_CID_CODEC_STATELESS_BASE + 404)
1981#define V4L2_CID_STATELESS_HEVC_DECODE_MODE	(V4L2_CID_CODEC_STATELESS_BASE + 405)
1982#define V4L2_CID_STATELESS_HEVC_START_CODE	(V4L2_CID_CODEC_STATELESS_BASE + 406)
1983#define V4L2_CID_STATELESS_HEVC_ENTRY_POINT_OFFSETS (V4L2_CID_CODEC_STATELESS_BASE + 407)
1984
1985enum v4l2_stateless_hevc_decode_mode {
1986	V4L2_STATELESS_HEVC_DECODE_MODE_SLICE_BASED,
1987	V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED,
1988};
1989
1990enum v4l2_stateless_hevc_start_code {
1991	V4L2_STATELESS_HEVC_START_CODE_NONE,
1992	V4L2_STATELESS_HEVC_START_CODE_ANNEX_B,
1993};
1994
1995#define V4L2_HEVC_SLICE_TYPE_B	0
1996#define V4L2_HEVC_SLICE_TYPE_P	1
1997#define V4L2_HEVC_SLICE_TYPE_I	2
1998
1999#define V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE		(1ULL << 0)
2000#define V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED			(1ULL << 1)
2001#define V4L2_HEVC_SPS_FLAG_AMP_ENABLED				(1ULL << 2)
2002#define V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET		(1ULL << 3)
2003#define V4L2_HEVC_SPS_FLAG_PCM_ENABLED				(1ULL << 4)
2004#define V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED		(1ULL << 5)
2005#define V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT		(1ULL << 6)
2006#define V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED		(1ULL << 7)
2007#define V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED	(1ULL << 8)
2008
2009/**
2010 * struct v4l2_ctrl_hevc_sps - ITU-T Rec. H.265: Sequence parameter set
2011 *
2012 * @video_parameter_set_id: specifies the value of the
2013 *			vps_video_parameter_set_id of the active VPS
2014 * @seq_parameter_set_id: provides an identifier for the SPS for
2015 *			  reference by other syntax elements
2016 * @pic_width_in_luma_samples:	specifies the width of each decoded picture
2017 *				in units of luma samples
2018 * @pic_height_in_luma_samples: specifies the height of each decoded picture
2019 *				in units of luma samples
2020 * @bit_depth_luma_minus8: this value plus 8specifies the bit depth of the
2021 *                         samples of the luma array
2022 * @bit_depth_chroma_minus8: this value plus 8 specifies the bit depth of the
2023 *                           samples of the chroma arrays
2024 * @log2_max_pic_order_cnt_lsb_minus4: this value plus 4 specifies the value of
2025 *                                     the variable MaxPicOrderCntLsb
2026 * @sps_max_dec_pic_buffering_minus1: this value plus 1 specifies the maximum
2027 *                                    required size of the decoded picture
2028 *                                    buffer for the codec video sequence
2029 * @sps_max_num_reorder_pics: indicates the maximum allowed number of pictures
2030 * @sps_max_latency_increase_plus1: not equal to 0 is used to compute the
2031 *				    value of SpsMaxLatencyPictures array
2032 * @log2_min_luma_coding_block_size_minus3: plus 3 specifies the minimum
2033 *					    luma coding block size
2034 * @log2_diff_max_min_luma_coding_block_size: specifies the difference between
2035 *					      the maximum and minimum luma
2036 *					      coding block size
2037 * @log2_min_luma_transform_block_size_minus2: plus 2 specifies the minimum luma
2038 *					       transform block size
2039 * @log2_diff_max_min_luma_transform_block_size: specifies the difference between
2040 *						 the maximum and minimum luma
2041 *						 transform block size
2042 * @max_transform_hierarchy_depth_inter: specifies the maximum hierarchy
2043 *					 depth for transform units of
2044 *					 coding units coded in inter
2045 *					 prediction mode
2046 * @max_transform_hierarchy_depth_intra: specifies the maximum hierarchy
2047 *					 depth for transform units of
2048 *					 coding units coded in intra
2049 *					 prediction mode
2050 * @pcm_sample_bit_depth_luma_minus1: this value plus 1 specifies the number of
2051 *                                    bits used to represent each of PCM sample
2052 *                                    values of the luma component
2053 * @pcm_sample_bit_depth_chroma_minus1: this value plus 1 specifies the number
2054 *                                      of bits used to represent each of PCM
2055 *                                      sample values of the chroma components
2056 * @log2_min_pcm_luma_coding_block_size_minus3: this value plus 3 specifies the
2057 *                                              minimum size of coding blocks
2058 * @log2_diff_max_min_pcm_luma_coding_block_size: specifies the difference between
2059 *						  the maximum and minimum size of
2060 *						  coding blocks
2061 * @num_short_term_ref_pic_sets: specifies the number of st_ref_pic_set()
2062 *				 syntax structures included in the SPS
2063 * @num_long_term_ref_pics_sps: specifies the number of candidate long-term
2064 *				reference pictures that are specified in the SPS
2065 * @chroma_format_idc: specifies the chroma sampling
2066 * @sps_max_sub_layers_minus1: this value plus 1 specifies the maximum number
2067 *                             of temporal sub-layers
2068 * @reserved: padding field. Should be zeroed by applications.
2069 * @flags: see V4L2_HEVC_SPS_FLAG_{}
2070 */
2071struct v4l2_ctrl_hevc_sps {
2072	__u8	video_parameter_set_id;
2073	__u8	seq_parameter_set_id;
2074	__u16	pic_width_in_luma_samples;
2075	__u16	pic_height_in_luma_samples;
2076	__u8	bit_depth_luma_minus8;
2077	__u8	bit_depth_chroma_minus8;
2078	__u8	log2_max_pic_order_cnt_lsb_minus4;
2079	__u8	sps_max_dec_pic_buffering_minus1;
2080	__u8	sps_max_num_reorder_pics;
2081	__u8	sps_max_latency_increase_plus1;
2082	__u8	log2_min_luma_coding_block_size_minus3;
2083	__u8	log2_diff_max_min_luma_coding_block_size;
2084	__u8	log2_min_luma_transform_block_size_minus2;
2085	__u8	log2_diff_max_min_luma_transform_block_size;
2086	__u8	max_transform_hierarchy_depth_inter;
2087	__u8	max_transform_hierarchy_depth_intra;
2088	__u8	pcm_sample_bit_depth_luma_minus1;
2089	__u8	pcm_sample_bit_depth_chroma_minus1;
2090	__u8	log2_min_pcm_luma_coding_block_size_minus3;
2091	__u8	log2_diff_max_min_pcm_luma_coding_block_size;
2092	__u8	num_short_term_ref_pic_sets;
2093	__u8	num_long_term_ref_pics_sps;
2094	__u8	chroma_format_idc;
2095	__u8	sps_max_sub_layers_minus1;
2096
2097	__u8	reserved[6];
2098	__u64	flags;
2099};
2100
2101#define V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT_ENABLED	(1ULL << 0)
2102#define V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT			(1ULL << 1)
2103#define V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED		(1ULL << 2)
2104#define V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT			(1ULL << 3)
2105#define V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED		(1ULL << 4)
2106#define V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED		(1ULL << 5)
2107#define V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED			(1ULL << 6)
2108#define V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT	(1ULL << 7)
2109#define V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED			(1ULL << 8)
2110#define V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED			(1ULL << 9)
2111#define V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED		(1ULL << 10)
2112#define V4L2_HEVC_PPS_FLAG_TILES_ENABLED			(1ULL << 11)
2113#define V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED		(1ULL << 12)
2114#define V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED	(1ULL << 13)
2115#define V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 14)
2116#define V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED	(1ULL << 15)
2117#define V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER	(1ULL << 16)
2118#define V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT		(1ULL << 17)
2119#define V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT (1ULL << 18)
2120#define V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT	(1ULL << 19)
2121#define V4L2_HEVC_PPS_FLAG_UNIFORM_SPACING			(1ULL << 20)
2122
2123/**
2124 * struct v4l2_ctrl_hevc_pps - ITU-T Rec. H.265: Picture parameter set
2125 *
2126 * @pic_parameter_set_id: identifies the PPS for reference by other
2127 *			  syntax elements
2128 * @num_extra_slice_header_bits: specifies the number of extra slice header
2129 *				 bits that are present in the slice header RBSP
2130 *				 for coded pictures referring to the PPS.
2131 * @num_ref_idx_l0_default_active_minus1: this value plus 1 specifies the
2132 *                                        inferred value of num_ref_idx_l0_active_minus1
2133 * @num_ref_idx_l1_default_active_minus1: this value plus 1 specifies the
2134 *                                        inferred value of num_ref_idx_l1_active_minus1
2135 * @init_qp_minus26: this value plus 26 specifies the initial value of SliceQp Y for
2136 *		     each slice referring to the PPS
2137 * @diff_cu_qp_delta_depth: specifies the difference between the luma coding
2138 *			    tree block size and the minimum luma coding block
2139 *			    size of coding units that convey cu_qp_delta_abs
2140 *			    and cu_qp_delta_sign_flag
2141 * @pps_cb_qp_offset: specify the offsets to the luma quantization parameter Cb
2142 * @pps_cr_qp_offset: specify the offsets to the luma quantization parameter Cr
2143 * @num_tile_columns_minus1: this value plus 1 specifies the number of tile columns
2144 *			     partitioning the picture
2145 * @num_tile_rows_minus1: this value plus 1 specifies the number of tile rows partitioning
2146 *			  the picture
2147 * @column_width_minus1: this value plus 1 specifies the width of the each tile column in
2148 *			 units of coding tree blocks
2149 * @row_height_minus1: this value plus 1 specifies the height of the each tile row in
2150 *		       units of coding tree blocks
2151 * @pps_beta_offset_div2: specify the default deblocking parameter offsets for
2152 *			  beta divided by 2
2153 * @pps_tc_offset_div2: specify the default deblocking parameter offsets for tC
2154 *			divided by 2
2155 * @log2_parallel_merge_level_minus2: this value plus 2 specifies the value of
2156 *                                    the variable Log2ParMrgLevel
2157 * @reserved: padding field. Should be zeroed by applications.
2158 * @flags: see V4L2_HEVC_PPS_FLAG_{}
2159 */
2160struct v4l2_ctrl_hevc_pps {
2161	__u8	pic_parameter_set_id;
2162	__u8	num_extra_slice_header_bits;
2163	__u8	num_ref_idx_l0_default_active_minus1;
2164	__u8	num_ref_idx_l1_default_active_minus1;
2165	__s8	init_qp_minus26;
2166	__u8	diff_cu_qp_delta_depth;
2167	__s8	pps_cb_qp_offset;
2168	__s8	pps_cr_qp_offset;
2169	__u8	num_tile_columns_minus1;
2170	__u8	num_tile_rows_minus1;
2171	__u8	column_width_minus1[20];
2172	__u8	row_height_minus1[22];
2173	__s8	pps_beta_offset_div2;
2174	__s8	pps_tc_offset_div2;
2175	__u8	log2_parallel_merge_level_minus2;
2176	__u8	reserved;
2177	__u64	flags;
2178};
2179
2180#define V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE	0x01
2181
2182#define V4L2_HEVC_SEI_PIC_STRUCT_FRAME				0
2183#define V4L2_HEVC_SEI_PIC_STRUCT_TOP_FIELD			1
2184#define V4L2_HEVC_SEI_PIC_STRUCT_BOTTOM_FIELD			2
2185#define V4L2_HEVC_SEI_PIC_STRUCT_TOP_BOTTOM			3
2186#define V4L2_HEVC_SEI_PIC_STRUCT_BOTTOM_TOP			4
2187#define V4L2_HEVC_SEI_PIC_STRUCT_TOP_BOTTOM_TOP			5
2188#define V4L2_HEVC_SEI_PIC_STRUCT_BOTTOM_TOP_BOTTOM		6
2189#define V4L2_HEVC_SEI_PIC_STRUCT_FRAME_DOUBLING			7
2190#define V4L2_HEVC_SEI_PIC_STRUCT_FRAME_TRIPLING			8
2191#define V4L2_HEVC_SEI_PIC_STRUCT_TOP_PAIRED_PREVIOUS_BOTTOM	9
2192#define V4L2_HEVC_SEI_PIC_STRUCT_BOTTOM_PAIRED_PREVIOUS_TOP	10
2193#define V4L2_HEVC_SEI_PIC_STRUCT_TOP_PAIRED_NEXT_BOTTOM		11
2194#define V4L2_HEVC_SEI_PIC_STRUCT_BOTTOM_PAIRED_NEXT_TOP		12
2195
2196#define V4L2_HEVC_DPB_ENTRIES_NUM_MAX		16
2197
2198/**
2199 * struct v4l2_hevc_dpb_entry - HEVC decoded picture buffer entry
2200 *
2201 * @timestamp: timestamp of the V4L2 capture buffer to use as reference.
2202 * @flags: long term flag for the reference frame
2203 * @field_pic: whether the reference is a field picture or a frame.
2204 * @reserved: padding field. Should be zeroed by applications.
2205 * @pic_order_cnt_val: the picture order count of the current picture.
2206 */
2207struct v4l2_hevc_dpb_entry {
2208	__u64	timestamp;
2209	__u8	flags;
2210	__u8	field_pic;
2211	__u16	reserved;
2212	__s32	pic_order_cnt_val;
2213};
2214
2215/**
2216 * struct v4l2_hevc_pred_weight_table - HEVC weighted prediction parameters
2217 *
2218 * @delta_luma_weight_l0: the difference of the weighting factor applied
2219 *			  to the luma prediction value for list 0
2220 * @luma_offset_l0: the additive offset applied to the luma prediction value
2221 *		    for list 0
2222 * @delta_chroma_weight_l0: the difference of the weighting factor applied
2223 *			    to the chroma prediction values for list 0
2224 * @chroma_offset_l0: the difference of the additive offset applied to
2225 *		      the chroma prediction values for list 0
2226 * @delta_luma_weight_l1: the difference of the weighting factor applied
2227 *			  to the luma prediction value for list 1
2228 * @luma_offset_l1: the additive offset applied to the luma prediction value
2229 *		    for list 1
2230 * @delta_chroma_weight_l1: the difference of the weighting factor applied
2231 *			    to the chroma prediction values for list 1
2232 * @chroma_offset_l1: the difference of the additive offset applied to
2233 *		      the chroma prediction values for list 1
2234 * @luma_log2_weight_denom: the base 2 logarithm of the denominator for
2235 *			    all luma weighting factors
2236 * @delta_chroma_log2_weight_denom: the difference of the base 2 logarithm
2237 *				    of the denominator for all chroma
2238 *				    weighting factors
2239 */
2240struct v4l2_hevc_pred_weight_table {
2241	__s8	delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2242	__s8	luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2243	__s8	delta_chroma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
2244	__s8	chroma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
2245
2246	__s8	delta_luma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2247	__s8	luma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2248	__s8	delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
2249	__s8	chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
2250
2251	__u8	luma_log2_weight_denom;
2252	__s8	delta_chroma_log2_weight_denom;
2253};
2254
2255#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_LUMA		(1ULL << 0)
2256#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_CHROMA		(1ULL << 1)
2257#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_TEMPORAL_MVP_ENABLED	(1ULL << 2)
2258#define V4L2_HEVC_SLICE_PARAMS_FLAG_MVD_L1_ZERO			(1ULL << 3)
2259#define V4L2_HEVC_SLICE_PARAMS_FLAG_CABAC_INIT			(1ULL << 4)
2260#define V4L2_HEVC_SLICE_PARAMS_FLAG_COLLOCATED_FROM_L0		(1ULL << 5)
2261#define V4L2_HEVC_SLICE_PARAMS_FLAG_USE_INTEGER_MV		(1ULL << 6)
2262#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_DEBLOCKING_FILTER_DISABLED (1ULL << 7)
2263#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 8)
2264#define V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT	(1ULL << 9)
2265
2266/**
2267 * struct v4l2_ctrl_hevc_slice_params - HEVC slice parameters
2268 *
2269 * This control is a dynamically sized 1-dimensional array,
2270 * V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it.
2271 *
2272 * @bit_size: size (in bits) of the current slice data
2273 * @data_byte_offset: offset (in bytes) to the video data in the current slice data
2274 * @num_entry_point_offsets: specifies the number of entry point offset syntax
2275 *			     elements in the slice header.
2276 * @nal_unit_type: specifies the coding type of the slice (B, P or I)
2277 * @nuh_temporal_id_plus1: minus 1 specifies a temporal identifier for the NAL unit
2278 * @slice_type: see V4L2_HEVC_SLICE_TYPE_{}
2279 * @colour_plane_id: specifies the colour plane associated with the current slice
2280 * @slice_pic_order_cnt: specifies the picture order count
2281 * @num_ref_idx_l0_active_minus1: this value plus 1 specifies the maximum
2282 *                                reference index for reference picture list 0
2283 *                                that may be used to decode the slice
2284 * @num_ref_idx_l1_active_minus1: this value plus 1 specifies the maximum
2285 *                                reference index for reference picture list 1
2286 *                                that may be used to decode the slice
2287 * @collocated_ref_idx: specifies the reference index of the collocated picture used
2288 *			for temporal motion vector prediction
2289 * @five_minus_max_num_merge_cand: specifies the maximum number of merging
2290 *				   motion vector prediction candidates supported in
2291 *				   the slice subtracted from 5
2292 * @slice_qp_delta: specifies the initial value of QpY to be used for the coding
2293 *		    blocks in the slice
2294 * @slice_cb_qp_offset: specifies a difference to be added to the value of pps_cb_qp_offset
2295 * @slice_cr_qp_offset: specifies a difference to be added to the value of pps_cr_qp_offset
2296 * @slice_act_y_qp_offset: screen content extension parameters
2297 * @slice_act_cb_qp_offset: screen content extension parameters
2298 * @slice_act_cr_qp_offset: screen content extension parameters
2299 * @slice_beta_offset_div2: specify the deblocking parameter offsets for beta divided by 2
2300 * @slice_tc_offset_div2: specify the deblocking parameter offsets for tC divided by 2
2301 * @pic_struct: indicates whether a picture should be displayed as a frame or as one or
2302 *		more fields
2303 * @reserved0: padding field. Should be zeroed by applications.
2304 * @slice_segment_addr: specifies the address of the first coding tree block in
2305 *			the slice segment
2306 * @ref_idx_l0: the list of L0 reference elements as indices in the DPB
2307 * @ref_idx_l1: the list of L1 reference elements as indices in the DPB
2308 * @short_term_ref_pic_set_size: specifies the size of short-term reference
2309 *				 pictures set included in the SPS
2310 * @long_term_ref_pic_set_size: specifies the size of long-term reference
2311 *				pictures set include in the SPS
2312 * @pred_weight_table: the prediction weight coefficients for inter-picture
2313 *		       prediction
2314 * @reserved1: padding field. Should be zeroed by applications.
2315 * @flags: see V4L2_HEVC_SLICE_PARAMS_FLAG_{}
2316 */
2317struct v4l2_ctrl_hevc_slice_params {
2318	__u32	bit_size;
2319	__u32	data_byte_offset;
2320	__u32	num_entry_point_offsets;
2321
2322	/* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */
2323	__u8	nal_unit_type;
2324	__u8	nuh_temporal_id_plus1;
2325
2326	/* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
2327	__u8	slice_type;
2328	__u8	colour_plane_id;
2329	__s32	slice_pic_order_cnt;
2330	__u8	num_ref_idx_l0_active_minus1;
2331	__u8	num_ref_idx_l1_active_minus1;
2332	__u8	collocated_ref_idx;
2333	__u8	five_minus_max_num_merge_cand;
2334	__s8	slice_qp_delta;
2335	__s8	slice_cb_qp_offset;
2336	__s8	slice_cr_qp_offset;
2337	__s8	slice_act_y_qp_offset;
2338	__s8	slice_act_cb_qp_offset;
2339	__s8	slice_act_cr_qp_offset;
2340	__s8	slice_beta_offset_div2;
2341	__s8	slice_tc_offset_div2;
2342
2343	/* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture timing SEI message */
2344	__u8	pic_struct;
2345
2346	__u8	reserved0[3];
2347	/* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
2348	__u32	slice_segment_addr;
2349	__u8	ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2350	__u8	ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2351	__u16	short_term_ref_pic_set_size;
2352	__u16	long_term_ref_pic_set_size;
2353
2354	/* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
2355	struct v4l2_hevc_pred_weight_table pred_weight_table;
2356
2357	__u8	reserved1[2];
2358	__u64	flags;
2359};
2360
2361#define V4L2_HEVC_DECODE_PARAM_FLAG_IRAP_PIC		0x1
2362#define V4L2_HEVC_DECODE_PARAM_FLAG_IDR_PIC		0x2
2363#define V4L2_HEVC_DECODE_PARAM_FLAG_NO_OUTPUT_OF_PRIOR  0x4
2364
2365/**
2366 * struct v4l2_ctrl_hevc_decode_params - HEVC decode parameters
2367 *
2368 * @pic_order_cnt_val: picture order count
2369 * @short_term_ref_pic_set_size: specifies the size of short-term reference
2370 *				 pictures set included in the SPS of the first slice
2371 * @long_term_ref_pic_set_size: specifies the size of long-term reference
2372 *				pictures set include in the SPS of the first slice
2373 * @num_active_dpb_entries: the number of entries in dpb
2374 * @num_poc_st_curr_before: the number of reference pictures in the short-term
2375 *			    set that come before the current frame
2376 * @num_poc_st_curr_after: the number of reference pictures in the short-term
2377 *			   set that come after the current frame
2378 * @num_poc_lt_curr: the number of reference pictures in the long-term set
2379 * @poc_st_curr_before: provides the index of the short term before references
2380 *			in DPB array
2381 * @poc_st_curr_after: provides the index of the short term after references
2382 *		       in DPB array
2383 * @poc_lt_curr: provides the index of the long term references in DPB array
2384 * @reserved: padding field. Should be zeroed by applications.
2385 * @dpb: the decoded picture buffer, for meta-data about reference frames
2386 * @flags: see V4L2_HEVC_DECODE_PARAM_FLAG_{}
2387 */
2388struct v4l2_ctrl_hevc_decode_params {
2389	__s32	pic_order_cnt_val;
2390	__u16	short_term_ref_pic_set_size;
2391	__u16	long_term_ref_pic_set_size;
2392	__u8	num_active_dpb_entries;
2393	__u8	num_poc_st_curr_before;
2394	__u8	num_poc_st_curr_after;
2395	__u8	num_poc_lt_curr;
2396	__u8	poc_st_curr_before[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2397	__u8	poc_st_curr_after[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2398	__u8	poc_lt_curr[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2399	__u8	reserved[4];
2400	struct	v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2401	__u64	flags;
2402};
2403
2404/**
2405 * struct v4l2_ctrl_hevc_scaling_matrix - HEVC scaling lists parameters
2406 *
2407 * @scaling_list_4x4: scaling list is used for the scaling process for
2408 *		      transform coefficients. The values on each scaling
2409 *		      list are expected in raster scan order
2410 * @scaling_list_8x8: scaling list is used for the scaling process for
2411 *		      transform coefficients. The values on each scaling
2412 *		      list are expected in raster scan order
2413 * @scaling_list_16x16:	scaling list is used for the scaling process for
2414 *			transform coefficients. The values on each scaling
2415 *			list are expected in raster scan order
2416 * @scaling_list_32x32:	scaling list is used for the scaling process for
2417 *			transform coefficients. The values on each scaling
2418 *			list are expected in raster scan order
2419 * @scaling_list_dc_coef_16x16:	scaling list is used for the scaling process
2420 *				for transform coefficients. The values on each
2421 *				scaling list are expected in raster scan order.
2422 * @scaling_list_dc_coef_32x32:	scaling list is used for the scaling process
2423 *				for transform coefficients. The values on each
2424 *				scaling list are expected in raster scan order.
2425 */
2426struct v4l2_ctrl_hevc_scaling_matrix {
2427	__u8	scaling_list_4x4[6][16];
2428	__u8	scaling_list_8x8[6][64];
2429	__u8	scaling_list_16x16[6][64];
2430	__u8	scaling_list_32x32[2][64];
2431	__u8	scaling_list_dc_coef_16x16[6];
2432	__u8	scaling_list_dc_coef_32x32[2];
2433};
2434
2435#define V4L2_CID_COLORIMETRY_CLASS_BASE	(V4L2_CTRL_CLASS_COLORIMETRY | 0x900)
2436#define V4L2_CID_COLORIMETRY_CLASS	(V4L2_CTRL_CLASS_COLORIMETRY | 1)
2437
2438#define V4L2_CID_COLORIMETRY_HDR10_CLL_INFO	(V4L2_CID_COLORIMETRY_CLASS_BASE + 0)
2439
2440struct v4l2_ctrl_hdr10_cll_info {
2441	__u16 max_content_light_level;
2442	__u16 max_pic_average_light_level;
2443};
2444
2445#define V4L2_CID_COLORIMETRY_HDR10_MASTERING_DISPLAY	(V4L2_CID_COLORIMETRY_CLASS_BASE + 1)
2446
2447#define V4L2_HDR10_MASTERING_PRIMARIES_X_LOW	5
2448#define V4L2_HDR10_MASTERING_PRIMARIES_X_HIGH	37000
2449#define V4L2_HDR10_MASTERING_PRIMARIES_Y_LOW	5
2450#define V4L2_HDR10_MASTERING_PRIMARIES_Y_HIGH	42000
2451#define V4L2_HDR10_MASTERING_WHITE_POINT_X_LOW	5
2452#define V4L2_HDR10_MASTERING_WHITE_POINT_X_HIGH	37000
2453#define V4L2_HDR10_MASTERING_WHITE_POINT_Y_LOW	5
2454#define V4L2_HDR10_MASTERING_WHITE_POINT_Y_HIGH	42000
2455#define V4L2_HDR10_MASTERING_MAX_LUMA_LOW	50000
2456#define V4L2_HDR10_MASTERING_MAX_LUMA_HIGH	100000000
2457#define V4L2_HDR10_MASTERING_MIN_LUMA_LOW	1
2458#define V4L2_HDR10_MASTERING_MIN_LUMA_HIGH	50000
2459
2460struct v4l2_ctrl_hdr10_mastering_display {
2461	__u16 display_primaries_x[3];
2462	__u16 display_primaries_y[3];
2463	__u16 white_point_x;
2464	__u16 white_point_y;
2465	__u32 max_display_mastering_luminance;
2466	__u32 min_display_mastering_luminance;
2467};
2468
2469/* Stateless VP9 controls */
2470
2471#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED	0x1
2472#define	V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE	0x2
2473
2474/**
2475 * struct v4l2_vp9_loop_filter - VP9 loop filter parameters
2476 *
2477 * @ref_deltas: contains the adjustment needed for the filter level based on the
2478 * chosen reference frame. If this syntax element is not present in the bitstream,
2479 * users should pass its last value.
2480 * @mode_deltas: contains the adjustment needed for the filter level based on the
2481 * chosen mode.	If this syntax element is not present in the bitstream, users should
2482 * pass its last value.
2483 * @level: indicates the loop filter strength.
2484 * @sharpness: indicates the sharpness level.
2485 * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags.
2486 * @reserved: padding field. Should be zeroed by applications.
2487 *
2488 * This structure contains all loop filter related parameters. See sections
2489 * '7.2.8 Loop filter semantics' of the VP9 specification for more details.
2490 */
2491struct v4l2_vp9_loop_filter {
2492	__s8 ref_deltas[4];
2493	__s8 mode_deltas[2];
2494	__u8 level;
2495	__u8 sharpness;
2496	__u8 flags;
2497	__u8 reserved[7];
2498};
2499
2500/**
2501 * struct v4l2_vp9_quantization - VP9 quantization parameters
2502 *
2503 * @base_q_idx: indicates the base frame qindex.
2504 * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx.
2505 * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx.
2506 * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx.
2507 * @reserved: padding field. Should be zeroed by applications.
2508 *
2509 * Encodes the quantization parameters. See section '7.2.9 Quantization params
2510 * syntax' of the VP9 specification for more details.
2511 */
2512struct v4l2_vp9_quantization {
2513	__u8 base_q_idx;
2514	__s8 delta_q_y_dc;
2515	__s8 delta_q_uv_dc;
2516	__s8 delta_q_uv_ac;
2517	__u8 reserved[4];
2518};
2519
2520#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED		0x01
2521#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP		0x02
2522#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE	0x04
2523#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA		0x08
2524#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE	0x10
2525
2526#define V4L2_VP9_SEG_LVL_ALT_Q				0
2527#define V4L2_VP9_SEG_LVL_ALT_L				1
2528#define V4L2_VP9_SEG_LVL_REF_FRAME			2
2529#define V4L2_VP9_SEG_LVL_SKIP				3
2530#define V4L2_VP9_SEG_LVL_MAX				4
2531
2532#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id)	(1 << (id))
2533#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK	0xf
2534
2535/**
2536 * struct v4l2_vp9_segmentation - VP9 segmentation parameters
2537 *
2538 * @feature_data: data attached to each feature. Data entry is only valid if
2539 * the feature is enabled. The array shall be indexed with segment number as
2540 * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension.
2541 * @feature_enabled: bitmask defining which features are enabled in each segment.
2542 * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id)
2543 * values where id is one of V4L2_VP9_SEG_LVL_{}.
2544 * @tree_probs: specifies the probability values to be used when decoding a
2545 * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification
2546 * for more details.
2547 * @pred_probs: specifies the probability values to be used when decoding a
2548 * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9`
2549 * for more details.
2550 * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags.
2551 * @reserved: padding field. Should be zeroed by applications.
2552 *
2553 * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of
2554 * the VP9 specification for more details.
2555 */
2556struct v4l2_vp9_segmentation {
2557	__s16 feature_data[8][4];
2558	__u8 feature_enabled[8];
2559	__u8 tree_probs[7];
2560	__u8 pred_probs[3];
2561	__u8 flags;
2562	__u8 reserved[5];
2563};
2564
2565#define V4L2_VP9_FRAME_FLAG_KEY_FRAME			0x001
2566#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME			0x002
2567#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT		0x004
2568#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY			0x008
2569#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV		0x010
2570#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX		0x020
2571#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE		0x040
2572#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING		0x080
2573#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING		0x100
2574#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING	0x200
2575
2576#define V4L2_VP9_SIGN_BIAS_LAST				0x1
2577#define V4L2_VP9_SIGN_BIAS_GOLDEN			0x2
2578#define V4L2_VP9_SIGN_BIAS_ALT				0x4
2579
2580#define V4L2_VP9_RESET_FRAME_CTX_NONE			0
2581#define V4L2_VP9_RESET_FRAME_CTX_SPEC			1
2582#define V4L2_VP9_RESET_FRAME_CTX_ALL			2
2583
2584#define V4L2_VP9_INTERP_FILTER_EIGHTTAP			0
2585#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH		1
2586#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP		2
2587#define V4L2_VP9_INTERP_FILTER_BILINEAR			3
2588#define V4L2_VP9_INTERP_FILTER_SWITCHABLE		4
2589
2590#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE	0
2591#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE	1
2592#define V4L2_VP9_REFERENCE_MODE_SELECT			2
2593
2594#define V4L2_VP9_PROFILE_MAX				3
2595
2596#define V4L2_CID_STATELESS_VP9_FRAME	(V4L2_CID_CODEC_STATELESS_BASE + 300)
2597/**
2598 * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control
2599 *
2600 * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details.
2601 * @quant: quantization parameters. See &v4l2_vp9_quantization for more details.
2602 * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details.
2603 * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags.
2604 * @compressed_header_size: compressed header size in bytes.
2605 * @uncompressed_header_size: uncompressed header size in bytes.
2606 * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels.
2607 * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels.
2608 * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in
2609 * pixels. This is not used during the decoding process but might be used by HW scalers
2610 * to prepare a frame that's ready for scanout.
2611 * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in
2612 * pixels. This is not used during the decoding process but might be used by HW scalers
2613 * to prepare a frame that's ready for scanout.
2614 * @last_frame_ts: "last" reference buffer timestamp.
2615 * The timestamp refers to the timestamp field in struct v4l2_buffer.
2616 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
2617 * @golden_frame_ts: "golden" reference buffer timestamp.
2618 * The timestamp refers to the timestamp field in struct v4l2_buffer.
2619 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
2620 * @alt_frame_ts: "alt" reference buffer timestamp.
2621 * The timestamp refers to the timestamp field in struct v4l2_buffer.
2622 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
2623 * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given
2624 * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}.
2625 * @reset_frame_context: specifies whether the frame context should be reset to default values.
2626 * Either of V4L2_VP9_RESET_FRAME_CTX_{}.
2627 * @frame_context_idx: frame context that should be used/updated.
2628 * @profile: VP9 profile. Can be 0, 1, 2 or 3.
2629 * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support
2630 * 10 and/or 12 bits depths.
2631 * @interpolation_filter: specifies the filter selection used for performing inter prediction.
2632 * Set to one of V4L2_VP9_INTERP_FILTER_{}.
2633 * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width
2634 * is measured in units of 8x8 blocks). Shall be less than or equal to 6.
2635 * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height
2636 * is measured in units of 8x8 blocks).
2637 * @reference_mode: specifies the type of inter prediction to be used.
2638 * Set to one of V4L2_VP9_REFERENCE_MODE_{}.
2639 * @reserved: padding field. Should be zeroed by applications.
2640 */
2641struct v4l2_ctrl_vp9_frame {
2642	struct v4l2_vp9_loop_filter lf;
2643	struct v4l2_vp9_quantization quant;
2644	struct v4l2_vp9_segmentation seg;
2645	__u32 flags;
2646	__u16 compressed_header_size;
2647	__u16 uncompressed_header_size;
2648	__u16 frame_width_minus_1;
2649	__u16 frame_height_minus_1;
2650	__u16 render_width_minus_1;
2651	__u16 render_height_minus_1;
2652	__u64 last_frame_ts;
2653	__u64 golden_frame_ts;
2654	__u64 alt_frame_ts;
2655	__u8 ref_frame_sign_bias;
2656	__u8 reset_frame_context;
2657	__u8 frame_context_idx;
2658	__u8 profile;
2659	__u8 bit_depth;
2660	__u8 interpolation_filter;
2661	__u8 tile_cols_log2;
2662	__u8 tile_rows_log2;
2663	__u8 reference_mode;
2664	__u8 reserved[7];
2665};
2666
2667#define V4L2_VP9_NUM_FRAME_CTX	4
2668
2669/**
2670 * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates
2671 * @joint: motion vector joint probability updates.
2672 * @sign: motion vector sign probability updates.
2673 * @classes: motion vector class probability updates.
2674 * @class0_bit: motion vector class0 bit probability updates.
2675 * @bits: motion vector bits probability updates.
2676 * @class0_fr: motion vector class0 fractional bit probability updates.
2677 * @fr: motion vector fractional bit probability updates.
2678 * @class0_hp: motion vector class0 high precision fractional bit probability updates.
2679 * @hp: motion vector high precision fractional bit probability updates.
2680 *
2681 * This structure contains new values of motion vector probabilities.
2682 * A value of zero in an array element means there is no update of the relevant probability.
2683 * See `struct v4l2_vp9_prob_updates` for details.
2684 */
2685struct v4l2_vp9_mv_probs {
2686	__u8 joint[3];
2687	__u8 sign[2];
2688	__u8 classes[2][10];
2689	__u8 class0_bit[2];
2690	__u8 bits[2][10];
2691	__u8 class0_fr[2][2][3];
2692	__u8 fr[2][3];
2693	__u8 class0_hp[2];
2694	__u8 hp[2];
2695};
2696
2697#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR	(V4L2_CID_CODEC_STATELESS_BASE + 301)
2698
2699#define V4L2_VP9_TX_MODE_ONLY_4X4			0
2700#define V4L2_VP9_TX_MODE_ALLOW_8X8			1
2701#define V4L2_VP9_TX_MODE_ALLOW_16X16			2
2702#define V4L2_VP9_TX_MODE_ALLOW_32X32			3
2703#define V4L2_VP9_TX_MODE_SELECT				4
2704
2705/**
2706 * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control
2707 * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}.
2708 * @tx8: TX 8x8 probability updates.
2709 * @tx16: TX 16x16 probability updates.
2710 * @tx32: TX 32x32 probability updates.
2711 * @coef: coefficient probability updates.
2712 * @skip: skip probability updates.
2713 * @inter_mode: inter mode probability updates.
2714 * @interp_filter: interpolation filter probability updates.
2715 * @is_inter: is inter-block probability updates.
2716 * @comp_mode: compound prediction mode probability updates.
2717 * @single_ref: single ref probability updates.
2718 * @comp_ref: compound ref probability updates.
2719 * @y_mode: Y prediction mode probability updates.
2720 * @uv_mode: UV prediction mode probability updates.
2721 * @partition: partition probability updates.
2722 * @mv: motion vector probability updates.
2723 *
2724 * This structure holds the probabilities update as parsed in the compressed
2725 * header (Spec 6.3). These values represent the value of probability update after
2726 * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element
2727 * means that there is no update of the relevant probability.
2728 *
2729 * This control is optional and needs to be used when dealing with the hardware which is
2730 * not capable of parsing the compressed header itself. Only drivers which need it will
2731 * implement it.
2732 */
2733struct v4l2_ctrl_vp9_compressed_hdr {
2734	__u8 tx_mode;
2735	__u8 tx8[2][1];
2736	__u8 tx16[2][2];
2737	__u8 tx32[2][3];
2738	__u8 coef[4][2][2][6][6][3];
2739	__u8 skip[3];
2740	__u8 inter_mode[7][3];
2741	__u8 interp_filter[4][2];
2742	__u8 is_inter[4];
2743	__u8 comp_mode[5];
2744	__u8 single_ref[5][2];
2745	__u8 comp_ref[5];
2746	__u8 y_mode[4][9];
2747	__u8 uv_mode[10][9];
2748	__u8 partition[16][3];
2749
2750	struct v4l2_vp9_mv_probs mv;
2751};
2752
2753/* MPEG-compression definitions kept for backwards compatibility */
2754#ifndef __KERNEL__
2755#define V4L2_CTRL_CLASS_MPEG            V4L2_CTRL_CLASS_CODEC
2756#define V4L2_CID_MPEG_CLASS             V4L2_CID_CODEC_CLASS
2757#define V4L2_CID_MPEG_BASE              V4L2_CID_CODEC_BASE
2758#define V4L2_CID_MPEG_CX2341X_BASE      V4L2_CID_CODEC_CX2341X_BASE
2759#define V4L2_CID_MPEG_MFC51_BASE        V4L2_CID_CODEC_MFC51_BASE
2760#endif
2761
2762#endif
v4.6
 
  1/*
  2 *  Video for Linux Two controls header file
  3 *
  4 *  Copyright (C) 1999-2012 the contributors
  5 *
  6 *  This program is free software; you can redistribute it and/or modify
  7 *  it under the terms of the GNU General Public License as published by
  8 *  the Free Software Foundation; either version 2 of the License, or
  9 *  (at your option) any later version.
 10 *
 11 *  This program is distributed in the hope that it will be useful,
 12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14 *  GNU General Public License for more details.
 15 *
 16 *  Alternatively you can redistribute this file under the terms of the
 17 *  BSD license as stated below:
 18 *
 19 *  Redistribution and use in source and binary forms, with or without
 20 *  modification, are permitted provided that the following conditions
 21 *  are met:
 22 *  1. Redistributions of source code must retain the above copyright
 23 *     notice, this list of conditions and the following disclaimer.
 24 *  2. Redistributions in binary form must reproduce the above copyright
 25 *     notice, this list of conditions and the following disclaimer in
 26 *     the documentation and/or other materials provided with the
 27 *     distribution.
 28 *  3. The names of its contributors may not be used to endorse or promote
 29 *     products derived from this software without specific prior written
 30 *     permission.
 31 *
 32 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 33 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 34 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 35 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 36 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 37 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 38 *  TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 39 *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 40 *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 41 *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 42 *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 43 *
 44 *  The contents of this header was split off from videodev2.h. All control
 45 *  definitions should be added to this header, which is included by
 46 *  videodev2.h.
 47 */
 48
 49#ifndef __LINUX_V4L2_CONTROLS_H
 50#define __LINUX_V4L2_CONTROLS_H
 51
 
 
 
 52/* Control classes */
 53#define V4L2_CTRL_CLASS_USER		0x00980000	/* Old-style 'user' controls */
 54#define V4L2_CTRL_CLASS_MPEG		0x00990000	/* MPEG-compression controls */
 55#define V4L2_CTRL_CLASS_CAMERA		0x009a0000	/* Camera class controls */
 56#define V4L2_CTRL_CLASS_FM_TX		0x009b0000	/* FM Modulator controls */
 57#define V4L2_CTRL_CLASS_FLASH		0x009c0000	/* Camera flash controls */
 58#define V4L2_CTRL_CLASS_JPEG		0x009d0000	/* JPEG-compression controls */
 59#define V4L2_CTRL_CLASS_IMAGE_SOURCE	0x009e0000	/* Image source controls */
 60#define V4L2_CTRL_CLASS_IMAGE_PROC	0x009f0000	/* Image processing controls */
 61#define V4L2_CTRL_CLASS_DV		0x00a00000	/* Digital Video controls */
 62#define V4L2_CTRL_CLASS_FM_RX		0x00a10000	/* FM Receiver controls */
 63#define V4L2_CTRL_CLASS_RF_TUNER	0x00a20000	/* RF tuner controls */
 64#define V4L2_CTRL_CLASS_DETECT		0x00a30000	/* Detection controls */
 
 
 65
 66/* User-class control IDs */
 67
 68#define V4L2_CID_BASE			(V4L2_CTRL_CLASS_USER | 0x900)
 69#define V4L2_CID_USER_BASE 		V4L2_CID_BASE
 70#define V4L2_CID_USER_CLASS 		(V4L2_CTRL_CLASS_USER | 1)
 71#define V4L2_CID_BRIGHTNESS		(V4L2_CID_BASE+0)
 72#define V4L2_CID_CONTRAST		(V4L2_CID_BASE+1)
 73#define V4L2_CID_SATURATION		(V4L2_CID_BASE+2)
 74#define V4L2_CID_HUE			(V4L2_CID_BASE+3)
 75#define V4L2_CID_AUDIO_VOLUME		(V4L2_CID_BASE+5)
 76#define V4L2_CID_AUDIO_BALANCE		(V4L2_CID_BASE+6)
 77#define V4L2_CID_AUDIO_BASS		(V4L2_CID_BASE+7)
 78#define V4L2_CID_AUDIO_TREBLE		(V4L2_CID_BASE+8)
 79#define V4L2_CID_AUDIO_MUTE		(V4L2_CID_BASE+9)
 80#define V4L2_CID_AUDIO_LOUDNESS		(V4L2_CID_BASE+10)
 81#define V4L2_CID_BLACK_LEVEL		(V4L2_CID_BASE+11) /* Deprecated */
 82#define V4L2_CID_AUTO_WHITE_BALANCE	(V4L2_CID_BASE+12)
 83#define V4L2_CID_DO_WHITE_BALANCE	(V4L2_CID_BASE+13)
 84#define V4L2_CID_RED_BALANCE		(V4L2_CID_BASE+14)
 85#define V4L2_CID_BLUE_BALANCE		(V4L2_CID_BASE+15)
 86#define V4L2_CID_GAMMA			(V4L2_CID_BASE+16)
 87#define V4L2_CID_WHITENESS		(V4L2_CID_GAMMA) /* Deprecated */
 88#define V4L2_CID_EXPOSURE		(V4L2_CID_BASE+17)
 89#define V4L2_CID_AUTOGAIN		(V4L2_CID_BASE+18)
 90#define V4L2_CID_GAIN			(V4L2_CID_BASE+19)
 91#define V4L2_CID_HFLIP			(V4L2_CID_BASE+20)
 92#define V4L2_CID_VFLIP			(V4L2_CID_BASE+21)
 93
 94#define V4L2_CID_POWER_LINE_FREQUENCY	(V4L2_CID_BASE+24)
 95enum v4l2_power_line_frequency {
 96	V4L2_CID_POWER_LINE_FREQUENCY_DISABLED	= 0,
 97	V4L2_CID_POWER_LINE_FREQUENCY_50HZ	= 1,
 98	V4L2_CID_POWER_LINE_FREQUENCY_60HZ	= 2,
 99	V4L2_CID_POWER_LINE_FREQUENCY_AUTO	= 3,
100};
101#define V4L2_CID_HUE_AUTO			(V4L2_CID_BASE+25)
102#define V4L2_CID_WHITE_BALANCE_TEMPERATURE	(V4L2_CID_BASE+26)
103#define V4L2_CID_SHARPNESS			(V4L2_CID_BASE+27)
104#define V4L2_CID_BACKLIGHT_COMPENSATION 	(V4L2_CID_BASE+28)
105#define V4L2_CID_CHROMA_AGC                     (V4L2_CID_BASE+29)
106#define V4L2_CID_COLOR_KILLER                   (V4L2_CID_BASE+30)
107#define V4L2_CID_COLORFX			(V4L2_CID_BASE+31)
108enum v4l2_colorfx {
109	V4L2_COLORFX_NONE			= 0,
110	V4L2_COLORFX_BW				= 1,
111	V4L2_COLORFX_SEPIA			= 2,
112	V4L2_COLORFX_NEGATIVE			= 3,
113	V4L2_COLORFX_EMBOSS			= 4,
114	V4L2_COLORFX_SKETCH			= 5,
115	V4L2_COLORFX_SKY_BLUE			= 6,
116	V4L2_COLORFX_GRASS_GREEN		= 7,
117	V4L2_COLORFX_SKIN_WHITEN		= 8,
118	V4L2_COLORFX_VIVID			= 9,
119	V4L2_COLORFX_AQUA			= 10,
120	V4L2_COLORFX_ART_FREEZE			= 11,
121	V4L2_COLORFX_SILHOUETTE			= 12,
122	V4L2_COLORFX_SOLARIZATION		= 13,
123	V4L2_COLORFX_ANTIQUE			= 14,
124	V4L2_COLORFX_SET_CBCR			= 15,
 
125};
126#define V4L2_CID_AUTOBRIGHTNESS			(V4L2_CID_BASE+32)
127#define V4L2_CID_BAND_STOP_FILTER		(V4L2_CID_BASE+33)
128
129#define V4L2_CID_ROTATE				(V4L2_CID_BASE+34)
130#define V4L2_CID_BG_COLOR			(V4L2_CID_BASE+35)
131
132#define V4L2_CID_CHROMA_GAIN                    (V4L2_CID_BASE+36)
133
134#define V4L2_CID_ILLUMINATORS_1			(V4L2_CID_BASE+37)
135#define V4L2_CID_ILLUMINATORS_2			(V4L2_CID_BASE+38)
136
137#define V4L2_CID_MIN_BUFFERS_FOR_CAPTURE	(V4L2_CID_BASE+39)
138#define V4L2_CID_MIN_BUFFERS_FOR_OUTPUT		(V4L2_CID_BASE+40)
139
140#define V4L2_CID_ALPHA_COMPONENT		(V4L2_CID_BASE+41)
141#define V4L2_CID_COLORFX_CBCR			(V4L2_CID_BASE+42)
 
142
143/* last CID + 1 */
144#define V4L2_CID_LASTP1                         (V4L2_CID_BASE+43)
145
146/* USER-class private control IDs */
147
148/* The base for the meye driver controls. See linux/meye.h for the list
149 * of controls. We reserve 16 controls for this driver. */
150#define V4L2_CID_USER_MEYE_BASE			(V4L2_CID_USER_BASE + 0x1000)
151
152/* The base for the bttv driver controls.
153 * We reserve 32 controls for this driver. */
154#define V4L2_CID_USER_BTTV_BASE			(V4L2_CID_USER_BASE + 0x1010)
155
156
157/* The base for the s2255 driver controls.
158 * We reserve 16 controls for this driver. */
159#define V4L2_CID_USER_S2255_BASE		(V4L2_CID_USER_BASE + 0x1030)
160
161/*
162 * The base for the si476x driver controls. See include/media/drv-intf/si476x.h
163 * for the list of controls. Total of 16 controls is reserved for this driver
164 */
165#define V4L2_CID_USER_SI476X_BASE		(V4L2_CID_USER_BASE + 0x1040)
166
167/* The base for the TI VPE driver controls. Total of 16 controls is reserved for
168 * this driver */
169#define V4L2_CID_USER_TI_VPE_BASE		(V4L2_CID_USER_BASE + 0x1050)
170
171/* The base for the saa7134 driver controls.
172 * We reserve 16 controls for this driver. */
173#define V4L2_CID_USER_SAA7134_BASE		(V4L2_CID_USER_BASE + 0x1060)
174
175/* The base for the adv7180 driver controls.
176 * We reserve 16 controls for this driver. */
177#define V4L2_CID_USER_ADV7180_BASE		(V4L2_CID_USER_BASE + 0x1070)
178
179/* The base for the tc358743 driver controls.
180 * We reserve 16 controls for this driver. */
181#define V4L2_CID_USER_TC358743_BASE		(V4L2_CID_USER_BASE + 0x1080)
182
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
183/* MPEG-class control IDs */
184/* The MPEG controls are applicable to all codec controls
185 * and the 'MPEG' part of the define is historical */
186
187#define V4L2_CID_MPEG_BASE 			(V4L2_CTRL_CLASS_MPEG | 0x900)
188#define V4L2_CID_MPEG_CLASS 			(V4L2_CTRL_CLASS_MPEG | 1)
189
190/*  MPEG streams, specific to multiplexed streams */
191#define V4L2_CID_MPEG_STREAM_TYPE 		(V4L2_CID_MPEG_BASE+0)
192enum v4l2_mpeg_stream_type {
193	V4L2_MPEG_STREAM_TYPE_MPEG2_PS   = 0, /* MPEG-2 program stream */
194	V4L2_MPEG_STREAM_TYPE_MPEG2_TS   = 1, /* MPEG-2 transport stream */
195	V4L2_MPEG_STREAM_TYPE_MPEG1_SS   = 2, /* MPEG-1 system stream */
196	V4L2_MPEG_STREAM_TYPE_MPEG2_DVD  = 3, /* MPEG-2 DVD-compatible stream */
197	V4L2_MPEG_STREAM_TYPE_MPEG1_VCD  = 4, /* MPEG-1 VCD-compatible stream */
198	V4L2_MPEG_STREAM_TYPE_MPEG2_SVCD = 5, /* MPEG-2 SVCD-compatible stream */
199};
200#define V4L2_CID_MPEG_STREAM_PID_PMT 		(V4L2_CID_MPEG_BASE+1)
201#define V4L2_CID_MPEG_STREAM_PID_AUDIO 		(V4L2_CID_MPEG_BASE+2)
202#define V4L2_CID_MPEG_STREAM_PID_VIDEO 		(V4L2_CID_MPEG_BASE+3)
203#define V4L2_CID_MPEG_STREAM_PID_PCR 		(V4L2_CID_MPEG_BASE+4)
204#define V4L2_CID_MPEG_STREAM_PES_ID_AUDIO 	(V4L2_CID_MPEG_BASE+5)
205#define V4L2_CID_MPEG_STREAM_PES_ID_VIDEO 	(V4L2_CID_MPEG_BASE+6)
206#define V4L2_CID_MPEG_STREAM_VBI_FMT 		(V4L2_CID_MPEG_BASE+7)
207enum v4l2_mpeg_stream_vbi_fmt {
208	V4L2_MPEG_STREAM_VBI_FMT_NONE = 0,  /* No VBI in the MPEG stream */
209	V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1,  /* VBI in private packets, IVTV format */
210};
211
212/*  MPEG audio controls specific to multiplexed streams  */
213#define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ 	(V4L2_CID_MPEG_BASE+100)
214enum v4l2_mpeg_audio_sampling_freq {
215	V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0,
216	V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000 = 1,
217	V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000 = 2,
218};
219#define V4L2_CID_MPEG_AUDIO_ENCODING 		(V4L2_CID_MPEG_BASE+101)
220enum v4l2_mpeg_audio_encoding {
221	V4L2_MPEG_AUDIO_ENCODING_LAYER_1 = 0,
222	V4L2_MPEG_AUDIO_ENCODING_LAYER_2 = 1,
223	V4L2_MPEG_AUDIO_ENCODING_LAYER_3 = 2,
224	V4L2_MPEG_AUDIO_ENCODING_AAC     = 3,
225	V4L2_MPEG_AUDIO_ENCODING_AC3     = 4,
226};
227#define V4L2_CID_MPEG_AUDIO_L1_BITRATE 		(V4L2_CID_MPEG_BASE+102)
228enum v4l2_mpeg_audio_l1_bitrate {
229	V4L2_MPEG_AUDIO_L1_BITRATE_32K  = 0,
230	V4L2_MPEG_AUDIO_L1_BITRATE_64K  = 1,
231	V4L2_MPEG_AUDIO_L1_BITRATE_96K  = 2,
232	V4L2_MPEG_AUDIO_L1_BITRATE_128K = 3,
233	V4L2_MPEG_AUDIO_L1_BITRATE_160K = 4,
234	V4L2_MPEG_AUDIO_L1_BITRATE_192K = 5,
235	V4L2_MPEG_AUDIO_L1_BITRATE_224K = 6,
236	V4L2_MPEG_AUDIO_L1_BITRATE_256K = 7,
237	V4L2_MPEG_AUDIO_L1_BITRATE_288K = 8,
238	V4L2_MPEG_AUDIO_L1_BITRATE_320K = 9,
239	V4L2_MPEG_AUDIO_L1_BITRATE_352K = 10,
240	V4L2_MPEG_AUDIO_L1_BITRATE_384K = 11,
241	V4L2_MPEG_AUDIO_L1_BITRATE_416K = 12,
242	V4L2_MPEG_AUDIO_L1_BITRATE_448K = 13,
243};
244#define V4L2_CID_MPEG_AUDIO_L2_BITRATE 		(V4L2_CID_MPEG_BASE+103)
245enum v4l2_mpeg_audio_l2_bitrate {
246	V4L2_MPEG_AUDIO_L2_BITRATE_32K  = 0,
247	V4L2_MPEG_AUDIO_L2_BITRATE_48K  = 1,
248	V4L2_MPEG_AUDIO_L2_BITRATE_56K  = 2,
249	V4L2_MPEG_AUDIO_L2_BITRATE_64K  = 3,
250	V4L2_MPEG_AUDIO_L2_BITRATE_80K  = 4,
251	V4L2_MPEG_AUDIO_L2_BITRATE_96K  = 5,
252	V4L2_MPEG_AUDIO_L2_BITRATE_112K = 6,
253	V4L2_MPEG_AUDIO_L2_BITRATE_128K = 7,
254	V4L2_MPEG_AUDIO_L2_BITRATE_160K = 8,
255	V4L2_MPEG_AUDIO_L2_BITRATE_192K = 9,
256	V4L2_MPEG_AUDIO_L2_BITRATE_224K = 10,
257	V4L2_MPEG_AUDIO_L2_BITRATE_256K = 11,
258	V4L2_MPEG_AUDIO_L2_BITRATE_320K = 12,
259	V4L2_MPEG_AUDIO_L2_BITRATE_384K = 13,
260};
261#define V4L2_CID_MPEG_AUDIO_L3_BITRATE 		(V4L2_CID_MPEG_BASE+104)
262enum v4l2_mpeg_audio_l3_bitrate {
263	V4L2_MPEG_AUDIO_L3_BITRATE_32K  = 0,
264	V4L2_MPEG_AUDIO_L3_BITRATE_40K  = 1,
265	V4L2_MPEG_AUDIO_L3_BITRATE_48K  = 2,
266	V4L2_MPEG_AUDIO_L3_BITRATE_56K  = 3,
267	V4L2_MPEG_AUDIO_L3_BITRATE_64K  = 4,
268	V4L2_MPEG_AUDIO_L3_BITRATE_80K  = 5,
269	V4L2_MPEG_AUDIO_L3_BITRATE_96K  = 6,
270	V4L2_MPEG_AUDIO_L3_BITRATE_112K = 7,
271	V4L2_MPEG_AUDIO_L3_BITRATE_128K = 8,
272	V4L2_MPEG_AUDIO_L3_BITRATE_160K = 9,
273	V4L2_MPEG_AUDIO_L3_BITRATE_192K = 10,
274	V4L2_MPEG_AUDIO_L3_BITRATE_224K = 11,
275	V4L2_MPEG_AUDIO_L3_BITRATE_256K = 12,
276	V4L2_MPEG_AUDIO_L3_BITRATE_320K = 13,
277};
278#define V4L2_CID_MPEG_AUDIO_MODE 		(V4L2_CID_MPEG_BASE+105)
279enum v4l2_mpeg_audio_mode {
280	V4L2_MPEG_AUDIO_MODE_STEREO       = 0,
281	V4L2_MPEG_AUDIO_MODE_JOINT_STEREO = 1,
282	V4L2_MPEG_AUDIO_MODE_DUAL         = 2,
283	V4L2_MPEG_AUDIO_MODE_MONO         = 3,
284};
285#define V4L2_CID_MPEG_AUDIO_MODE_EXTENSION 	(V4L2_CID_MPEG_BASE+106)
286enum v4l2_mpeg_audio_mode_extension {
287	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_4  = 0,
288	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_8  = 1,
289	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_12 = 2,
290	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_16 = 3,
291};
292#define V4L2_CID_MPEG_AUDIO_EMPHASIS 		(V4L2_CID_MPEG_BASE+107)
293enum v4l2_mpeg_audio_emphasis {
294	V4L2_MPEG_AUDIO_EMPHASIS_NONE         = 0,
295	V4L2_MPEG_AUDIO_EMPHASIS_50_DIV_15_uS = 1,
296	V4L2_MPEG_AUDIO_EMPHASIS_CCITT_J17    = 2,
297};
298#define V4L2_CID_MPEG_AUDIO_CRC 		(V4L2_CID_MPEG_BASE+108)
299enum v4l2_mpeg_audio_crc {
300	V4L2_MPEG_AUDIO_CRC_NONE  = 0,
301	V4L2_MPEG_AUDIO_CRC_CRC16 = 1,
302};
303#define V4L2_CID_MPEG_AUDIO_MUTE 		(V4L2_CID_MPEG_BASE+109)
304#define V4L2_CID_MPEG_AUDIO_AAC_BITRATE		(V4L2_CID_MPEG_BASE+110)
305#define V4L2_CID_MPEG_AUDIO_AC3_BITRATE		(V4L2_CID_MPEG_BASE+111)
306enum v4l2_mpeg_audio_ac3_bitrate {
307	V4L2_MPEG_AUDIO_AC3_BITRATE_32K  = 0,
308	V4L2_MPEG_AUDIO_AC3_BITRATE_40K  = 1,
309	V4L2_MPEG_AUDIO_AC3_BITRATE_48K  = 2,
310	V4L2_MPEG_AUDIO_AC3_BITRATE_56K  = 3,
311	V4L2_MPEG_AUDIO_AC3_BITRATE_64K  = 4,
312	V4L2_MPEG_AUDIO_AC3_BITRATE_80K  = 5,
313	V4L2_MPEG_AUDIO_AC3_BITRATE_96K  = 6,
314	V4L2_MPEG_AUDIO_AC3_BITRATE_112K = 7,
315	V4L2_MPEG_AUDIO_AC3_BITRATE_128K = 8,
316	V4L2_MPEG_AUDIO_AC3_BITRATE_160K = 9,
317	V4L2_MPEG_AUDIO_AC3_BITRATE_192K = 10,
318	V4L2_MPEG_AUDIO_AC3_BITRATE_224K = 11,
319	V4L2_MPEG_AUDIO_AC3_BITRATE_256K = 12,
320	V4L2_MPEG_AUDIO_AC3_BITRATE_320K = 13,
321	V4L2_MPEG_AUDIO_AC3_BITRATE_384K = 14,
322	V4L2_MPEG_AUDIO_AC3_BITRATE_448K = 15,
323	V4L2_MPEG_AUDIO_AC3_BITRATE_512K = 16,
324	V4L2_MPEG_AUDIO_AC3_BITRATE_576K = 17,
325	V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18,
326};
327#define V4L2_CID_MPEG_AUDIO_DEC_PLAYBACK	(V4L2_CID_MPEG_BASE+112)
328enum v4l2_mpeg_audio_dec_playback {
329	V4L2_MPEG_AUDIO_DEC_PLAYBACK_AUTO	    = 0,
330	V4L2_MPEG_AUDIO_DEC_PLAYBACK_STEREO	    = 1,
331	V4L2_MPEG_AUDIO_DEC_PLAYBACK_LEFT	    = 2,
332	V4L2_MPEG_AUDIO_DEC_PLAYBACK_RIGHT	    = 3,
333	V4L2_MPEG_AUDIO_DEC_PLAYBACK_MONO	    = 4,
334	V4L2_MPEG_AUDIO_DEC_PLAYBACK_SWAPPED_STEREO = 5,
335};
336#define V4L2_CID_MPEG_AUDIO_DEC_MULTILINGUAL_PLAYBACK (V4L2_CID_MPEG_BASE+113)
337
338/*  MPEG video controls specific to multiplexed streams */
339#define V4L2_CID_MPEG_VIDEO_ENCODING 		(V4L2_CID_MPEG_BASE+200)
340enum v4l2_mpeg_video_encoding {
341	V4L2_MPEG_VIDEO_ENCODING_MPEG_1     = 0,
342	V4L2_MPEG_VIDEO_ENCODING_MPEG_2     = 1,
343	V4L2_MPEG_VIDEO_ENCODING_MPEG_4_AVC = 2,
344};
345#define V4L2_CID_MPEG_VIDEO_ASPECT 		(V4L2_CID_MPEG_BASE+201)
346enum v4l2_mpeg_video_aspect {
347	V4L2_MPEG_VIDEO_ASPECT_1x1     = 0,
348	V4L2_MPEG_VIDEO_ASPECT_4x3     = 1,
349	V4L2_MPEG_VIDEO_ASPECT_16x9    = 2,
350	V4L2_MPEG_VIDEO_ASPECT_221x100 = 3,
351};
352#define V4L2_CID_MPEG_VIDEO_B_FRAMES 		(V4L2_CID_MPEG_BASE+202)
353#define V4L2_CID_MPEG_VIDEO_GOP_SIZE 		(V4L2_CID_MPEG_BASE+203)
354#define V4L2_CID_MPEG_VIDEO_GOP_CLOSURE 	(V4L2_CID_MPEG_BASE+204)
355#define V4L2_CID_MPEG_VIDEO_PULLDOWN 		(V4L2_CID_MPEG_BASE+205)
356#define V4L2_CID_MPEG_VIDEO_BITRATE_MODE 	(V4L2_CID_MPEG_BASE+206)
357enum v4l2_mpeg_video_bitrate_mode {
358	V4L2_MPEG_VIDEO_BITRATE_MODE_VBR = 0,
359	V4L2_MPEG_VIDEO_BITRATE_MODE_CBR = 1,
 
360};
361#define V4L2_CID_MPEG_VIDEO_BITRATE 		(V4L2_CID_MPEG_BASE+207)
362#define V4L2_CID_MPEG_VIDEO_BITRATE_PEAK 	(V4L2_CID_MPEG_BASE+208)
363#define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_MPEG_BASE+209)
364#define V4L2_CID_MPEG_VIDEO_MUTE 		(V4L2_CID_MPEG_BASE+210)
365#define V4L2_CID_MPEG_VIDEO_MUTE_YUV 		(V4L2_CID_MPEG_BASE+211)
366#define V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE		(V4L2_CID_MPEG_BASE+212)
367#define V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER	(V4L2_CID_MPEG_BASE+213)
368#define V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB		(V4L2_CID_MPEG_BASE+214)
369#define V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE			(V4L2_CID_MPEG_BASE+215)
370#define V4L2_CID_MPEG_VIDEO_HEADER_MODE				(V4L2_CID_MPEG_BASE+216)
371enum v4l2_mpeg_video_header_mode {
372	V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE			= 0,
373	V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME	= 1,
374
375};
376#define V4L2_CID_MPEG_VIDEO_MAX_REF_PIC			(V4L2_CID_MPEG_BASE+217)
377#define V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE		(V4L2_CID_MPEG_BASE+218)
378#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES	(V4L2_CID_MPEG_BASE+219)
379#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB		(V4L2_CID_MPEG_BASE+220)
380#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE		(V4L2_CID_MPEG_BASE+221)
381enum v4l2_mpeg_video_multi_slice_mode {
382	V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE		= 0,
 
 
 
 
383	V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB		= 1,
384	V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES	= 2,
 
385};
386#define V4L2_CID_MPEG_VIDEO_VBV_SIZE			(V4L2_CID_MPEG_BASE+222)
387#define V4L2_CID_MPEG_VIDEO_DEC_PTS			(V4L2_CID_MPEG_BASE+223)
388#define V4L2_CID_MPEG_VIDEO_DEC_FRAME			(V4L2_CID_MPEG_BASE+224)
389#define V4L2_CID_MPEG_VIDEO_VBV_DELAY			(V4L2_CID_MPEG_BASE+225)
390#define V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER		(V4L2_CID_MPEG_BASE+226)
391#define V4L2_CID_MPEG_VIDEO_MV_H_SEARCH_RANGE		(V4L2_CID_MPEG_BASE+227)
392#define V4L2_CID_MPEG_VIDEO_MV_V_SEARCH_RANGE		(V4L2_CID_MPEG_BASE+228)
393#define V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME		(V4L2_CID_MPEG_BASE+229)
394
395#define V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP		(V4L2_CID_MPEG_BASE+300)
396#define V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP		(V4L2_CID_MPEG_BASE+301)
397#define V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP		(V4L2_CID_MPEG_BASE+302)
398#define V4L2_CID_MPEG_VIDEO_H263_MIN_QP			(V4L2_CID_MPEG_BASE+303)
399#define V4L2_CID_MPEG_VIDEO_H263_MAX_QP			(V4L2_CID_MPEG_BASE+304)
400#define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP		(V4L2_CID_MPEG_BASE+350)
401#define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP		(V4L2_CID_MPEG_BASE+351)
402#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP		(V4L2_CID_MPEG_BASE+352)
403#define V4L2_CID_MPEG_VIDEO_H264_MIN_QP			(V4L2_CID_MPEG_BASE+353)
404#define V4L2_CID_MPEG_VIDEO_H264_MAX_QP			(V4L2_CID_MPEG_BASE+354)
405#define V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM		(V4L2_CID_MPEG_BASE+355)
406#define V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE		(V4L2_CID_MPEG_BASE+356)
407#define V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE		(V4L2_CID_MPEG_BASE+357)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
408enum v4l2_mpeg_video_h264_entropy_mode {
409	V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC	= 0,
410	V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC	= 1,
411};
412#define V4L2_CID_MPEG_VIDEO_H264_I_PERIOD		(V4L2_CID_MPEG_BASE+358)
413#define V4L2_CID_MPEG_VIDEO_H264_LEVEL			(V4L2_CID_MPEG_BASE+359)
414enum v4l2_mpeg_video_h264_level {
415	V4L2_MPEG_VIDEO_H264_LEVEL_1_0	= 0,
416	V4L2_MPEG_VIDEO_H264_LEVEL_1B	= 1,
417	V4L2_MPEG_VIDEO_H264_LEVEL_1_1	= 2,
418	V4L2_MPEG_VIDEO_H264_LEVEL_1_2	= 3,
419	V4L2_MPEG_VIDEO_H264_LEVEL_1_3	= 4,
420	V4L2_MPEG_VIDEO_H264_LEVEL_2_0	= 5,
421	V4L2_MPEG_VIDEO_H264_LEVEL_2_1	= 6,
422	V4L2_MPEG_VIDEO_H264_LEVEL_2_2	= 7,
423	V4L2_MPEG_VIDEO_H264_LEVEL_3_0	= 8,
424	V4L2_MPEG_VIDEO_H264_LEVEL_3_1	= 9,
425	V4L2_MPEG_VIDEO_H264_LEVEL_3_2	= 10,
426	V4L2_MPEG_VIDEO_H264_LEVEL_4_0	= 11,
427	V4L2_MPEG_VIDEO_H264_LEVEL_4_1	= 12,
428	V4L2_MPEG_VIDEO_H264_LEVEL_4_2	= 13,
429	V4L2_MPEG_VIDEO_H264_LEVEL_5_0	= 14,
430	V4L2_MPEG_VIDEO_H264_LEVEL_5_1	= 15,
431};
432#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA	(V4L2_CID_MPEG_BASE+360)
433#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA	(V4L2_CID_MPEG_BASE+361)
434#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE	(V4L2_CID_MPEG_BASE+362)
 
 
 
 
435enum v4l2_mpeg_video_h264_loop_filter_mode {
436	V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED				= 0,
437	V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED				= 1,
438	V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY	= 2,
439};
440#define V4L2_CID_MPEG_VIDEO_H264_PROFILE		(V4L2_CID_MPEG_BASE+363)
441enum v4l2_mpeg_video_h264_profile {
442	V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE			= 0,
443	V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE	= 1,
444	V4L2_MPEG_VIDEO_H264_PROFILE_MAIN			= 2,
445	V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED			= 3,
446	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH			= 4,
447	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10			= 5,
448	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422			= 6,
449	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE	= 7,
450	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10_INTRA		= 8,
451	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422_INTRA		= 9,
452	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_INTRA		= 10,
453	V4L2_MPEG_VIDEO_H264_PROFILE_CAVLC_444_INTRA		= 11,
454	V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_BASELINE		= 12,
455	V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH		= 13,
456	V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA	= 14,
457	V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH		= 15,
458	V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH		= 16,
 
459};
460#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT	(V4L2_CID_MPEG_BASE+364)
461#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH	(V4L2_CID_MPEG_BASE+365)
462#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE		(V4L2_CID_MPEG_BASE+366)
463#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC		(V4L2_CID_MPEG_BASE+367)
464enum v4l2_mpeg_video_h264_vui_sar_idc {
465	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED	= 0,
466	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1		= 1,
467	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11		= 2,
468	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11		= 3,
469	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11		= 4,
470	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33		= 5,
471	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11		= 6,
472	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11		= 7,
473	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11		= 8,
474	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33		= 9,
475	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11		= 10,
476	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11		= 11,
477	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33		= 12,
478	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99		= 13,
479	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3		= 14,
480	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2		= 15,
481	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1		= 16,
482	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED	= 17,
483};
484#define V4L2_CID_MPEG_VIDEO_H264_SEI_FRAME_PACKING		(V4L2_CID_MPEG_BASE+368)
485#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_CURRENT_FRAME_0		(V4L2_CID_MPEG_BASE+369)
486#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE	(V4L2_CID_MPEG_BASE+370)
487enum v4l2_mpeg_video_h264_sei_fp_arrangement_type {
488	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_CHECKERBOARD	= 0,
489	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_COLUMN		= 1,
490	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_ROW		= 2,
491	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_SIDE_BY_SIDE	= 3,
492	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_TOP_BOTTOM		= 4,
493	V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_TEMPORAL		= 5,
494};
495#define V4L2_CID_MPEG_VIDEO_H264_FMO			(V4L2_CID_MPEG_BASE+371)
496#define V4L2_CID_MPEG_VIDEO_H264_FMO_MAP_TYPE		(V4L2_CID_MPEG_BASE+372)
497enum v4l2_mpeg_video_h264_fmo_map_type {
498	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_INTERLEAVED_SLICES		= 0,
499	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_SCATTERED_SLICES		= 1,
500	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_FOREGROUND_WITH_LEFT_OVER	= 2,
501	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_BOX_OUT			= 3,
502	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_RASTER_SCAN			= 4,
503	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_WIPE_SCAN			= 5,
504	V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_EXPLICIT			= 6,
505};
506#define V4L2_CID_MPEG_VIDEO_H264_FMO_SLICE_GROUP	(V4L2_CID_MPEG_BASE+373)
507#define V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_DIRECTION	(V4L2_CID_MPEG_BASE+374)
508enum v4l2_mpeg_video_h264_fmo_change_dir {
509	V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_RIGHT	= 0,
510	V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_LEFT	= 1,
511};
512#define V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_RATE	(V4L2_CID_MPEG_BASE+375)
513#define V4L2_CID_MPEG_VIDEO_H264_FMO_RUN_LENGTH		(V4L2_CID_MPEG_BASE+376)
514#define V4L2_CID_MPEG_VIDEO_H264_ASO			(V4L2_CID_MPEG_BASE+377)
515#define V4L2_CID_MPEG_VIDEO_H264_ASO_SLICE_ORDER	(V4L2_CID_MPEG_BASE+378)
516#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING		(V4L2_CID_MPEG_BASE+379)
517#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE	(V4L2_CID_MPEG_BASE+380)
518enum v4l2_mpeg_video_h264_hierarchical_coding_type {
519	V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B	= 0,
520	V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P	= 1,
521};
522#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER	(V4L2_CID_MPEG_BASE+381)
523#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP	(V4L2_CID_MPEG_BASE+382)
524#define V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP	(V4L2_CID_MPEG_BASE+400)
525#define V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP	(V4L2_CID_MPEG_BASE+401)
526#define V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP	(V4L2_CID_MPEG_BASE+402)
527#define V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP	(V4L2_CID_MPEG_BASE+403)
528#define V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP	(V4L2_CID_MPEG_BASE+404)
529#define V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL		(V4L2_CID_MPEG_BASE+405)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
530enum v4l2_mpeg_video_mpeg4_level {
531	V4L2_MPEG_VIDEO_MPEG4_LEVEL_0	= 0,
532	V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B	= 1,
533	V4L2_MPEG_VIDEO_MPEG4_LEVEL_1	= 2,
534	V4L2_MPEG_VIDEO_MPEG4_LEVEL_2	= 3,
535	V4L2_MPEG_VIDEO_MPEG4_LEVEL_3	= 4,
536	V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B	= 5,
537	V4L2_MPEG_VIDEO_MPEG4_LEVEL_4	= 6,
538	V4L2_MPEG_VIDEO_MPEG4_LEVEL_5	= 7,
539};
540#define V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE	(V4L2_CID_MPEG_BASE+406)
541enum v4l2_mpeg_video_mpeg4_profile {
542	V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE				= 0,
543	V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE			= 1,
544	V4L2_MPEG_VIDEO_MPEG4_PROFILE_CORE				= 2,
545	V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE_SCALABLE			= 3,
546	V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY	= 4,
547};
548#define V4L2_CID_MPEG_VIDEO_MPEG4_QPEL		(V4L2_CID_MPEG_BASE+407)
549
550/*  Control IDs for VP8 streams
551 *  Although VP8 is not part of MPEG we add these controls to the MPEG class
552 *  as that class is already handling other video compression standards
553 */
554#define V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS		(V4L2_CID_MPEG_BASE+500)
555enum v4l2_vp8_num_partitions {
556	V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION	= 0,
557	V4L2_CID_MPEG_VIDEO_VPX_2_PARTITIONS	= 1,
558	V4L2_CID_MPEG_VIDEO_VPX_4_PARTITIONS	= 2,
559	V4L2_CID_MPEG_VIDEO_VPX_8_PARTITIONS	= 3,
560};
561#define V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4		(V4L2_CID_MPEG_BASE+501)
562#define V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES		(V4L2_CID_MPEG_BASE+502)
563enum v4l2_vp8_num_ref_frames {
564	V4L2_CID_MPEG_VIDEO_VPX_1_REF_FRAME	= 0,
565	V4L2_CID_MPEG_VIDEO_VPX_2_REF_FRAME	= 1,
566	V4L2_CID_MPEG_VIDEO_VPX_3_REF_FRAME	= 2,
567};
568#define V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL		(V4L2_CID_MPEG_BASE+503)
569#define V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS	(V4L2_CID_MPEG_BASE+504)
570#define V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD	(V4L2_CID_MPEG_BASE+505)
571#define V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL	(V4L2_CID_MPEG_BASE+506)
572enum v4l2_vp8_golden_frame_sel {
573	V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV		= 0,
574	V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_REF_PERIOD	= 1,
575};
576#define V4L2_CID_MPEG_VIDEO_VPX_MIN_QP			(V4L2_CID_MPEG_BASE+507)
577#define V4L2_CID_MPEG_VIDEO_VPX_MAX_QP			(V4L2_CID_MPEG_BASE+508)
578#define V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP		(V4L2_CID_MPEG_BASE+509)
579#define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP		(V4L2_CID_MPEG_BASE+510)
580#define V4L2_CID_MPEG_VIDEO_VPX_PROFILE			(V4L2_CID_MPEG_BASE+511)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
581
582/*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
583#define V4L2_CID_MPEG_CX2341X_BASE 				(V4L2_CTRL_CLASS_MPEG | 0x1000)
584#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE 	(V4L2_CID_MPEG_CX2341X_BASE+0)
585enum v4l2_mpeg_cx2341x_video_spatial_filter_mode {
586	V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_MANUAL = 0,
587	V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_AUTO   = 1,
588};
589#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER 		(V4L2_CID_MPEG_CX2341X_BASE+1)
590#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE 	(V4L2_CID_MPEG_CX2341X_BASE+2)
591enum v4l2_mpeg_cx2341x_video_luma_spatial_filter_type {
592	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_OFF                  = 0,
593	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_HOR               = 1,
594	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_VERT              = 2,
595	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_HV_SEPARABLE      = 3,
596	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_SYM_NON_SEPARABLE = 4,
597};
598#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE 	(V4L2_CID_MPEG_CX2341X_BASE+3)
599enum v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type {
600	V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_OFF    = 0,
601	V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_1D_HOR = 1,
602};
603#define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE 	(V4L2_CID_MPEG_CX2341X_BASE+4)
604enum v4l2_mpeg_cx2341x_video_temporal_filter_mode {
605	V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_MANUAL = 0,
606	V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_AUTO   = 1,
607};
608#define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER 		(V4L2_CID_MPEG_CX2341X_BASE+5)
609#define V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE 		(V4L2_CID_MPEG_CX2341X_BASE+6)
610enum v4l2_mpeg_cx2341x_video_median_filter_type {
611	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_OFF      = 0,
612	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR      = 1,
613	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_VERT     = 2,
614	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR_VERT = 3,
615	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_DIAG     = 4,
616};
617#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM 	(V4L2_CID_MPEG_CX2341X_BASE+7)
618#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP 	(V4L2_CID_MPEG_CX2341X_BASE+8)
619#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM	(V4L2_CID_MPEG_CX2341X_BASE+9)
620#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP 	(V4L2_CID_MPEG_CX2341X_BASE+10)
621#define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS 	(V4L2_CID_MPEG_CX2341X_BASE+11)
622
623/*  MPEG-class control IDs specific to the Samsung MFC 5.1 driver as defined by V4L2 */
624#define V4L2_CID_MPEG_MFC51_BASE				(V4L2_CTRL_CLASS_MPEG | 0x1100)
625
626#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY		(V4L2_CID_MPEG_MFC51_BASE+0)
627#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE	(V4L2_CID_MPEG_MFC51_BASE+1)
628#define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE			(V4L2_CID_MPEG_MFC51_BASE+2)
629enum v4l2_mpeg_mfc51_video_frame_skip_mode {
630	V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED		= 0,
631	V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT	= 1,
632	V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT		= 2,
633};
634#define V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE			(V4L2_CID_MPEG_MFC51_BASE+3)
635enum v4l2_mpeg_mfc51_video_force_frame_type {
636	V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED		= 0,
637	V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_I_FRAME		= 1,
638	V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED	= 2,
639};
640#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING				(V4L2_CID_MPEG_MFC51_BASE+4)
641#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV				(V4L2_CID_MPEG_MFC51_BASE+5)
642#define V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT			(V4L2_CID_MPEG_MFC51_BASE+6)
643#define V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF			(V4L2_CID_MPEG_MFC51_BASE+7)
644#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY		(V4L2_CID_MPEG_MFC51_BASE+50)
645#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK			(V4L2_CID_MPEG_MFC51_BASE+51)
646#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH		(V4L2_CID_MPEG_MFC51_BASE+52)
647#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC		(V4L2_CID_MPEG_MFC51_BASE+53)
648#define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P		(V4L2_CID_MPEG_MFC51_BASE+54)
649
650
651/*  Camera class control IDs */
652
653#define V4L2_CID_CAMERA_CLASS_BASE 	(V4L2_CTRL_CLASS_CAMERA | 0x900)
654#define V4L2_CID_CAMERA_CLASS 		(V4L2_CTRL_CLASS_CAMERA | 1)
655
656#define V4L2_CID_EXPOSURE_AUTO			(V4L2_CID_CAMERA_CLASS_BASE+1)
657enum  v4l2_exposure_auto_type {
658	V4L2_EXPOSURE_AUTO = 0,
659	V4L2_EXPOSURE_MANUAL = 1,
660	V4L2_EXPOSURE_SHUTTER_PRIORITY = 2,
661	V4L2_EXPOSURE_APERTURE_PRIORITY = 3
662};
663#define V4L2_CID_EXPOSURE_ABSOLUTE		(V4L2_CID_CAMERA_CLASS_BASE+2)
664#define V4L2_CID_EXPOSURE_AUTO_PRIORITY		(V4L2_CID_CAMERA_CLASS_BASE+3)
665
666#define V4L2_CID_PAN_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+4)
667#define V4L2_CID_TILT_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+5)
668#define V4L2_CID_PAN_RESET			(V4L2_CID_CAMERA_CLASS_BASE+6)
669#define V4L2_CID_TILT_RESET			(V4L2_CID_CAMERA_CLASS_BASE+7)
670
671#define V4L2_CID_PAN_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+8)
672#define V4L2_CID_TILT_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+9)
673
674#define V4L2_CID_FOCUS_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+10)
675#define V4L2_CID_FOCUS_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+11)
676#define V4L2_CID_FOCUS_AUTO			(V4L2_CID_CAMERA_CLASS_BASE+12)
677
678#define V4L2_CID_ZOOM_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+13)
679#define V4L2_CID_ZOOM_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+14)
680#define V4L2_CID_ZOOM_CONTINUOUS		(V4L2_CID_CAMERA_CLASS_BASE+15)
681
682#define V4L2_CID_PRIVACY			(V4L2_CID_CAMERA_CLASS_BASE+16)
683
684#define V4L2_CID_IRIS_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+17)
685#define V4L2_CID_IRIS_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+18)
686
687#define V4L2_CID_AUTO_EXPOSURE_BIAS		(V4L2_CID_CAMERA_CLASS_BASE+19)
688
689#define V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE	(V4L2_CID_CAMERA_CLASS_BASE+20)
690enum v4l2_auto_n_preset_white_balance {
691	V4L2_WHITE_BALANCE_MANUAL		= 0,
692	V4L2_WHITE_BALANCE_AUTO			= 1,
693	V4L2_WHITE_BALANCE_INCANDESCENT		= 2,
694	V4L2_WHITE_BALANCE_FLUORESCENT		= 3,
695	V4L2_WHITE_BALANCE_FLUORESCENT_H	= 4,
696	V4L2_WHITE_BALANCE_HORIZON		= 5,
697	V4L2_WHITE_BALANCE_DAYLIGHT		= 6,
698	V4L2_WHITE_BALANCE_FLASH		= 7,
699	V4L2_WHITE_BALANCE_CLOUDY		= 8,
700	V4L2_WHITE_BALANCE_SHADE		= 9,
701};
702
703#define V4L2_CID_WIDE_DYNAMIC_RANGE		(V4L2_CID_CAMERA_CLASS_BASE+21)
704#define V4L2_CID_IMAGE_STABILIZATION		(V4L2_CID_CAMERA_CLASS_BASE+22)
705
706#define V4L2_CID_ISO_SENSITIVITY		(V4L2_CID_CAMERA_CLASS_BASE+23)
707#define V4L2_CID_ISO_SENSITIVITY_AUTO		(V4L2_CID_CAMERA_CLASS_BASE+24)
708enum v4l2_iso_sensitivity_auto_type {
709	V4L2_ISO_SENSITIVITY_MANUAL		= 0,
710	V4L2_ISO_SENSITIVITY_AUTO		= 1,
711};
712
713#define V4L2_CID_EXPOSURE_METERING		(V4L2_CID_CAMERA_CLASS_BASE+25)
714enum v4l2_exposure_metering {
715	V4L2_EXPOSURE_METERING_AVERAGE		= 0,
716	V4L2_EXPOSURE_METERING_CENTER_WEIGHTED	= 1,
717	V4L2_EXPOSURE_METERING_SPOT		= 2,
718	V4L2_EXPOSURE_METERING_MATRIX		= 3,
719};
720
721#define V4L2_CID_SCENE_MODE			(V4L2_CID_CAMERA_CLASS_BASE+26)
722enum v4l2_scene_mode {
723	V4L2_SCENE_MODE_NONE			= 0,
724	V4L2_SCENE_MODE_BACKLIGHT		= 1,
725	V4L2_SCENE_MODE_BEACH_SNOW		= 2,
726	V4L2_SCENE_MODE_CANDLE_LIGHT		= 3,
727	V4L2_SCENE_MODE_DAWN_DUSK		= 4,
728	V4L2_SCENE_MODE_FALL_COLORS		= 5,
729	V4L2_SCENE_MODE_FIREWORKS		= 6,
730	V4L2_SCENE_MODE_LANDSCAPE		= 7,
731	V4L2_SCENE_MODE_NIGHT			= 8,
732	V4L2_SCENE_MODE_PARTY_INDOOR		= 9,
733	V4L2_SCENE_MODE_PORTRAIT		= 10,
734	V4L2_SCENE_MODE_SPORTS			= 11,
735	V4L2_SCENE_MODE_SUNSET			= 12,
736	V4L2_SCENE_MODE_TEXT			= 13,
737};
738
739#define V4L2_CID_3A_LOCK			(V4L2_CID_CAMERA_CLASS_BASE+27)
740#define V4L2_LOCK_EXPOSURE			(1 << 0)
741#define V4L2_LOCK_WHITE_BALANCE			(1 << 1)
742#define V4L2_LOCK_FOCUS				(1 << 2)
743
744#define V4L2_CID_AUTO_FOCUS_START		(V4L2_CID_CAMERA_CLASS_BASE+28)
745#define V4L2_CID_AUTO_FOCUS_STOP		(V4L2_CID_CAMERA_CLASS_BASE+29)
746#define V4L2_CID_AUTO_FOCUS_STATUS		(V4L2_CID_CAMERA_CLASS_BASE+30)
747#define V4L2_AUTO_FOCUS_STATUS_IDLE		(0 << 0)
748#define V4L2_AUTO_FOCUS_STATUS_BUSY		(1 << 0)
749#define V4L2_AUTO_FOCUS_STATUS_REACHED		(1 << 1)
750#define V4L2_AUTO_FOCUS_STATUS_FAILED		(1 << 2)
751
752#define V4L2_CID_AUTO_FOCUS_RANGE		(V4L2_CID_CAMERA_CLASS_BASE+31)
753enum v4l2_auto_focus_range {
754	V4L2_AUTO_FOCUS_RANGE_AUTO		= 0,
755	V4L2_AUTO_FOCUS_RANGE_NORMAL		= 1,
756	V4L2_AUTO_FOCUS_RANGE_MACRO		= 2,
757	V4L2_AUTO_FOCUS_RANGE_INFINITY		= 3,
758};
759
760#define V4L2_CID_PAN_SPEED			(V4L2_CID_CAMERA_CLASS_BASE+32)
761#define V4L2_CID_TILT_SPEED			(V4L2_CID_CAMERA_CLASS_BASE+33)
762
 
 
 
 
 
 
 
 
 
763/* FM Modulator class control IDs */
764
765#define V4L2_CID_FM_TX_CLASS_BASE		(V4L2_CTRL_CLASS_FM_TX | 0x900)
766#define V4L2_CID_FM_TX_CLASS			(V4L2_CTRL_CLASS_FM_TX | 1)
767
768#define V4L2_CID_RDS_TX_DEVIATION		(V4L2_CID_FM_TX_CLASS_BASE + 1)
769#define V4L2_CID_RDS_TX_PI			(V4L2_CID_FM_TX_CLASS_BASE + 2)
770#define V4L2_CID_RDS_TX_PTY			(V4L2_CID_FM_TX_CLASS_BASE + 3)
771#define V4L2_CID_RDS_TX_PS_NAME			(V4L2_CID_FM_TX_CLASS_BASE + 5)
772#define V4L2_CID_RDS_TX_RADIO_TEXT		(V4L2_CID_FM_TX_CLASS_BASE + 6)
773#define V4L2_CID_RDS_TX_MONO_STEREO		(V4L2_CID_FM_TX_CLASS_BASE + 7)
774#define V4L2_CID_RDS_TX_ARTIFICIAL_HEAD		(V4L2_CID_FM_TX_CLASS_BASE + 8)
775#define V4L2_CID_RDS_TX_COMPRESSED		(V4L2_CID_FM_TX_CLASS_BASE + 9)
776#define V4L2_CID_RDS_TX_DYNAMIC_PTY		(V4L2_CID_FM_TX_CLASS_BASE + 10)
777#define V4L2_CID_RDS_TX_TRAFFIC_ANNOUNCEMENT	(V4L2_CID_FM_TX_CLASS_BASE + 11)
778#define V4L2_CID_RDS_TX_TRAFFIC_PROGRAM		(V4L2_CID_FM_TX_CLASS_BASE + 12)
779#define V4L2_CID_RDS_TX_MUSIC_SPEECH		(V4L2_CID_FM_TX_CLASS_BASE + 13)
780#define V4L2_CID_RDS_TX_ALT_FREQS_ENABLE	(V4L2_CID_FM_TX_CLASS_BASE + 14)
781#define V4L2_CID_RDS_TX_ALT_FREQS		(V4L2_CID_FM_TX_CLASS_BASE + 15)
782
783#define V4L2_CID_AUDIO_LIMITER_ENABLED		(V4L2_CID_FM_TX_CLASS_BASE + 64)
784#define V4L2_CID_AUDIO_LIMITER_RELEASE_TIME	(V4L2_CID_FM_TX_CLASS_BASE + 65)
785#define V4L2_CID_AUDIO_LIMITER_DEVIATION	(V4L2_CID_FM_TX_CLASS_BASE + 66)
786
787#define V4L2_CID_AUDIO_COMPRESSION_ENABLED	(V4L2_CID_FM_TX_CLASS_BASE + 80)
788#define V4L2_CID_AUDIO_COMPRESSION_GAIN		(V4L2_CID_FM_TX_CLASS_BASE + 81)
789#define V4L2_CID_AUDIO_COMPRESSION_THRESHOLD	(V4L2_CID_FM_TX_CLASS_BASE + 82)
790#define V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME	(V4L2_CID_FM_TX_CLASS_BASE + 83)
791#define V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME	(V4L2_CID_FM_TX_CLASS_BASE + 84)
792
793#define V4L2_CID_PILOT_TONE_ENABLED		(V4L2_CID_FM_TX_CLASS_BASE + 96)
794#define V4L2_CID_PILOT_TONE_DEVIATION		(V4L2_CID_FM_TX_CLASS_BASE + 97)
795#define V4L2_CID_PILOT_TONE_FREQUENCY		(V4L2_CID_FM_TX_CLASS_BASE + 98)
796
797#define V4L2_CID_TUNE_PREEMPHASIS		(V4L2_CID_FM_TX_CLASS_BASE + 112)
798enum v4l2_preemphasis {
799	V4L2_PREEMPHASIS_DISABLED	= 0,
800	V4L2_PREEMPHASIS_50_uS		= 1,
801	V4L2_PREEMPHASIS_75_uS		= 2,
802};
803#define V4L2_CID_TUNE_POWER_LEVEL		(V4L2_CID_FM_TX_CLASS_BASE + 113)
804#define V4L2_CID_TUNE_ANTENNA_CAPACITOR		(V4L2_CID_FM_TX_CLASS_BASE + 114)
805
806
807/* Flash and privacy (indicator) light controls */
808
809#define V4L2_CID_FLASH_CLASS_BASE		(V4L2_CTRL_CLASS_FLASH | 0x900)
810#define V4L2_CID_FLASH_CLASS			(V4L2_CTRL_CLASS_FLASH | 1)
811
812#define V4L2_CID_FLASH_LED_MODE			(V4L2_CID_FLASH_CLASS_BASE + 1)
813enum v4l2_flash_led_mode {
814	V4L2_FLASH_LED_MODE_NONE,
815	V4L2_FLASH_LED_MODE_FLASH,
816	V4L2_FLASH_LED_MODE_TORCH,
817};
818
819#define V4L2_CID_FLASH_STROBE_SOURCE		(V4L2_CID_FLASH_CLASS_BASE + 2)
820enum v4l2_flash_strobe_source {
821	V4L2_FLASH_STROBE_SOURCE_SOFTWARE,
822	V4L2_FLASH_STROBE_SOURCE_EXTERNAL,
823};
824
825#define V4L2_CID_FLASH_STROBE			(V4L2_CID_FLASH_CLASS_BASE + 3)
826#define V4L2_CID_FLASH_STROBE_STOP		(V4L2_CID_FLASH_CLASS_BASE + 4)
827#define V4L2_CID_FLASH_STROBE_STATUS		(V4L2_CID_FLASH_CLASS_BASE + 5)
828
829#define V4L2_CID_FLASH_TIMEOUT			(V4L2_CID_FLASH_CLASS_BASE + 6)
830#define V4L2_CID_FLASH_INTENSITY		(V4L2_CID_FLASH_CLASS_BASE + 7)
831#define V4L2_CID_FLASH_TORCH_INTENSITY		(V4L2_CID_FLASH_CLASS_BASE + 8)
832#define V4L2_CID_FLASH_INDICATOR_INTENSITY	(V4L2_CID_FLASH_CLASS_BASE + 9)
833
834#define V4L2_CID_FLASH_FAULT			(V4L2_CID_FLASH_CLASS_BASE + 10)
835#define V4L2_FLASH_FAULT_OVER_VOLTAGE		(1 << 0)
836#define V4L2_FLASH_FAULT_TIMEOUT		(1 << 1)
837#define V4L2_FLASH_FAULT_OVER_TEMPERATURE	(1 << 2)
838#define V4L2_FLASH_FAULT_SHORT_CIRCUIT		(1 << 3)
839#define V4L2_FLASH_FAULT_OVER_CURRENT		(1 << 4)
840#define V4L2_FLASH_FAULT_INDICATOR		(1 << 5)
841#define V4L2_FLASH_FAULT_UNDER_VOLTAGE		(1 << 6)
842#define V4L2_FLASH_FAULT_INPUT_VOLTAGE		(1 << 7)
843#define V4L2_FLASH_FAULT_LED_OVER_TEMPERATURE	(1 << 8)
844
845#define V4L2_CID_FLASH_CHARGE			(V4L2_CID_FLASH_CLASS_BASE + 11)
846#define V4L2_CID_FLASH_READY			(V4L2_CID_FLASH_CLASS_BASE + 12)
847
848
849/* JPEG-class control IDs */
850
851#define V4L2_CID_JPEG_CLASS_BASE		(V4L2_CTRL_CLASS_JPEG | 0x900)
852#define V4L2_CID_JPEG_CLASS			(V4L2_CTRL_CLASS_JPEG | 1)
853
854#define	V4L2_CID_JPEG_CHROMA_SUBSAMPLING	(V4L2_CID_JPEG_CLASS_BASE + 1)
855enum v4l2_jpeg_chroma_subsampling {
856	V4L2_JPEG_CHROMA_SUBSAMPLING_444	= 0,
857	V4L2_JPEG_CHROMA_SUBSAMPLING_422	= 1,
858	V4L2_JPEG_CHROMA_SUBSAMPLING_420	= 2,
859	V4L2_JPEG_CHROMA_SUBSAMPLING_411	= 3,
860	V4L2_JPEG_CHROMA_SUBSAMPLING_410	= 4,
861	V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY	= 5,
862};
863#define	V4L2_CID_JPEG_RESTART_INTERVAL		(V4L2_CID_JPEG_CLASS_BASE + 2)
864#define	V4L2_CID_JPEG_COMPRESSION_QUALITY	(V4L2_CID_JPEG_CLASS_BASE + 3)
865
866#define	V4L2_CID_JPEG_ACTIVE_MARKER		(V4L2_CID_JPEG_CLASS_BASE + 4)
867#define	V4L2_JPEG_ACTIVE_MARKER_APP0		(1 << 0)
868#define	V4L2_JPEG_ACTIVE_MARKER_APP1		(1 << 1)
869#define	V4L2_JPEG_ACTIVE_MARKER_COM		(1 << 16)
870#define	V4L2_JPEG_ACTIVE_MARKER_DQT		(1 << 17)
871#define	V4L2_JPEG_ACTIVE_MARKER_DHT		(1 << 18)
872
873
874/* Image source controls */
875#define V4L2_CID_IMAGE_SOURCE_CLASS_BASE	(V4L2_CTRL_CLASS_IMAGE_SOURCE | 0x900)
876#define V4L2_CID_IMAGE_SOURCE_CLASS		(V4L2_CTRL_CLASS_IMAGE_SOURCE | 1)
877
878#define V4L2_CID_VBLANK				(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 1)
879#define V4L2_CID_HBLANK				(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 2)
880#define V4L2_CID_ANALOGUE_GAIN			(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 3)
881#define V4L2_CID_TEST_PATTERN_RED		(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 4)
882#define V4L2_CID_TEST_PATTERN_GREENR		(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 5)
883#define V4L2_CID_TEST_PATTERN_BLUE		(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 6)
884#define V4L2_CID_TEST_PATTERN_GREENB		(V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 7)
 
 
885
886
887/* Image processing controls */
888
889#define V4L2_CID_IMAGE_PROC_CLASS_BASE		(V4L2_CTRL_CLASS_IMAGE_PROC | 0x900)
890#define V4L2_CID_IMAGE_PROC_CLASS		(V4L2_CTRL_CLASS_IMAGE_PROC | 1)
891
892#define V4L2_CID_LINK_FREQ			(V4L2_CID_IMAGE_PROC_CLASS_BASE + 1)
893#define V4L2_CID_PIXEL_RATE			(V4L2_CID_IMAGE_PROC_CLASS_BASE + 2)
894#define V4L2_CID_TEST_PATTERN			(V4L2_CID_IMAGE_PROC_CLASS_BASE + 3)
895
 
896
897/*  DV-class control IDs defined by V4L2 */
898#define V4L2_CID_DV_CLASS_BASE			(V4L2_CTRL_CLASS_DV | 0x900)
899#define V4L2_CID_DV_CLASS			(V4L2_CTRL_CLASS_DV | 1)
900
901#define	V4L2_CID_DV_TX_HOTPLUG			(V4L2_CID_DV_CLASS_BASE + 1)
902#define	V4L2_CID_DV_TX_RXSENSE			(V4L2_CID_DV_CLASS_BASE + 2)
903#define	V4L2_CID_DV_TX_EDID_PRESENT		(V4L2_CID_DV_CLASS_BASE + 3)
904#define	V4L2_CID_DV_TX_MODE			(V4L2_CID_DV_CLASS_BASE + 4)
905enum v4l2_dv_tx_mode {
906	V4L2_DV_TX_MODE_DVI_D	= 0,
907	V4L2_DV_TX_MODE_HDMI	= 1,
908};
909#define V4L2_CID_DV_TX_RGB_RANGE		(V4L2_CID_DV_CLASS_BASE + 5)
910enum v4l2_dv_rgb_range {
911	V4L2_DV_RGB_RANGE_AUTO	  = 0,
912	V4L2_DV_RGB_RANGE_LIMITED = 1,
913	V4L2_DV_RGB_RANGE_FULL	  = 2,
914};
915
916#define V4L2_CID_DV_TX_IT_CONTENT_TYPE		(V4L2_CID_DV_CLASS_BASE + 6)
917enum v4l2_dv_it_content_type {
918	V4L2_DV_IT_CONTENT_TYPE_GRAPHICS  = 0,
919	V4L2_DV_IT_CONTENT_TYPE_PHOTO	  = 1,
920	V4L2_DV_IT_CONTENT_TYPE_CINEMA	  = 2,
921	V4L2_DV_IT_CONTENT_TYPE_GAME	  = 3,
922	V4L2_DV_IT_CONTENT_TYPE_NO_ITC	  = 4,
923};
924
925#define	V4L2_CID_DV_RX_POWER_PRESENT		(V4L2_CID_DV_CLASS_BASE + 100)
926#define V4L2_CID_DV_RX_RGB_RANGE		(V4L2_CID_DV_CLASS_BASE + 101)
927#define V4L2_CID_DV_RX_IT_CONTENT_TYPE		(V4L2_CID_DV_CLASS_BASE + 102)
928
929#define V4L2_CID_FM_RX_CLASS_BASE		(V4L2_CTRL_CLASS_FM_RX | 0x900)
930#define V4L2_CID_FM_RX_CLASS			(V4L2_CTRL_CLASS_FM_RX | 1)
931
932#define V4L2_CID_TUNE_DEEMPHASIS		(V4L2_CID_FM_RX_CLASS_BASE + 1)
933enum v4l2_deemphasis {
934	V4L2_DEEMPHASIS_DISABLED	= V4L2_PREEMPHASIS_DISABLED,
935	V4L2_DEEMPHASIS_50_uS		= V4L2_PREEMPHASIS_50_uS,
936	V4L2_DEEMPHASIS_75_uS		= V4L2_PREEMPHASIS_75_uS,
937};
938
939#define V4L2_CID_RDS_RECEPTION			(V4L2_CID_FM_RX_CLASS_BASE + 2)
940#define V4L2_CID_RDS_RX_PTY			(V4L2_CID_FM_RX_CLASS_BASE + 3)
941#define V4L2_CID_RDS_RX_PS_NAME			(V4L2_CID_FM_RX_CLASS_BASE + 4)
942#define V4L2_CID_RDS_RX_RADIO_TEXT		(V4L2_CID_FM_RX_CLASS_BASE + 5)
943#define V4L2_CID_RDS_RX_TRAFFIC_ANNOUNCEMENT	(V4L2_CID_FM_RX_CLASS_BASE + 6)
944#define V4L2_CID_RDS_RX_TRAFFIC_PROGRAM		(V4L2_CID_FM_RX_CLASS_BASE + 7)
945#define V4L2_CID_RDS_RX_MUSIC_SPEECH		(V4L2_CID_FM_RX_CLASS_BASE + 8)
946
947#define V4L2_CID_RF_TUNER_CLASS_BASE		(V4L2_CTRL_CLASS_RF_TUNER | 0x900)
948#define V4L2_CID_RF_TUNER_CLASS			(V4L2_CTRL_CLASS_RF_TUNER | 1)
949
950#define V4L2_CID_RF_TUNER_BANDWIDTH_AUTO	(V4L2_CID_RF_TUNER_CLASS_BASE + 11)
951#define V4L2_CID_RF_TUNER_BANDWIDTH		(V4L2_CID_RF_TUNER_CLASS_BASE + 12)
952#define V4L2_CID_RF_TUNER_RF_GAIN		(V4L2_CID_RF_TUNER_CLASS_BASE + 32)
953#define V4L2_CID_RF_TUNER_LNA_GAIN_AUTO		(V4L2_CID_RF_TUNER_CLASS_BASE + 41)
954#define V4L2_CID_RF_TUNER_LNA_GAIN		(V4L2_CID_RF_TUNER_CLASS_BASE + 42)
955#define V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO	(V4L2_CID_RF_TUNER_CLASS_BASE + 51)
956#define V4L2_CID_RF_TUNER_MIXER_GAIN		(V4L2_CID_RF_TUNER_CLASS_BASE + 52)
957#define V4L2_CID_RF_TUNER_IF_GAIN_AUTO		(V4L2_CID_RF_TUNER_CLASS_BASE + 61)
958#define V4L2_CID_RF_TUNER_IF_GAIN		(V4L2_CID_RF_TUNER_CLASS_BASE + 62)
959#define V4L2_CID_RF_TUNER_PLL_LOCK			(V4L2_CID_RF_TUNER_CLASS_BASE + 91)
960
961
962/*  Detection-class control IDs defined by V4L2 */
963#define V4L2_CID_DETECT_CLASS_BASE		(V4L2_CTRL_CLASS_DETECT | 0x900)
964#define V4L2_CID_DETECT_CLASS			(V4L2_CTRL_CLASS_DETECT | 1)
965
966#define V4L2_CID_DETECT_MD_MODE			(V4L2_CID_DETECT_CLASS_BASE + 1)
967enum v4l2_detect_md_mode {
968	V4L2_DETECT_MD_MODE_DISABLED		= 0,
969	V4L2_DETECT_MD_MODE_GLOBAL		= 1,
970	V4L2_DETECT_MD_MODE_THRESHOLD_GRID	= 2,
971	V4L2_DETECT_MD_MODE_REGION_GRID		= 3,
972};
973#define V4L2_CID_DETECT_MD_GLOBAL_THRESHOLD	(V4L2_CID_DETECT_CLASS_BASE + 2)
974#define V4L2_CID_DETECT_MD_THRESHOLD_GRID	(V4L2_CID_DETECT_CLASS_BASE + 3)
975#define V4L2_CID_DETECT_MD_REGION_GRID		(V4L2_CID_DETECT_CLASS_BASE + 4)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
976
977#endif