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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * SAS structures and definitions header file
4 *
5 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
6 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
7 */
8
9#ifndef _SAS_H_
10#define _SAS_H_
11
12#include <linux/types.h>
13#include <asm/byteorder.h>
14
15#define SAS_ADDR_SIZE 8
16#define HASHED_SAS_ADDR_SIZE 3
17#define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa)))
18
19#define SMP_REQUEST 0x40
20#define SMP_RESPONSE 0x41
21
22#define SSP_DATA 0x01
23#define SSP_XFER_RDY 0x05
24#define SSP_COMMAND 0x06
25#define SSP_RESPONSE 0x07
26#define SSP_TASK 0x16
27
28#define SMP_REPORT_GENERAL 0x00
29#define SMP_REPORT_MANUF_INFO 0x01
30#define SMP_READ_GPIO_REG 0x02
31#define SMP_DISCOVER 0x10
32#define SMP_REPORT_PHY_ERR_LOG 0x11
33#define SMP_REPORT_PHY_SATA 0x12
34#define SMP_REPORT_ROUTE_INFO 0x13
35#define SMP_WRITE_GPIO_REG 0x82
36#define SMP_CONF_ROUTE_INFO 0x90
37#define SMP_PHY_CONTROL 0x91
38#define SMP_PHY_TEST_FUNCTION 0x92
39
40#define SMP_RESP_FUNC_ACC 0x00
41#define SMP_RESP_FUNC_UNK 0x01
42#define SMP_RESP_FUNC_FAILED 0x02
43#define SMP_RESP_INV_FRM_LEN 0x03
44#define SMP_RESP_NO_PHY 0x10
45#define SMP_RESP_NO_INDEX 0x11
46#define SMP_RESP_PHY_NO_SATA 0x12
47#define SMP_RESP_PHY_UNK_OP 0x13
48#define SMP_RESP_PHY_UNK_TESTF 0x14
49#define SMP_RESP_PHY_TEST_INPROG 0x15
50#define SMP_RESP_PHY_VACANT 0x16
51
52/* SAM TMFs */
53#define TMF_ABORT_TASK 0x01
54#define TMF_ABORT_TASK_SET 0x02
55#define TMF_CLEAR_TASK_SET 0x04
56#define TMF_LU_RESET 0x08
57#define TMF_CLEAR_ACA 0x40
58#define TMF_QUERY_TASK 0x80
59
60/* SAS TMF responses */
61#define TMF_RESP_FUNC_COMPLETE 0x00
62#define TMF_RESP_INVALID_FRAME 0x02
63#define TMF_RESP_FUNC_ESUPP 0x04
64#define TMF_RESP_FUNC_FAILED 0x05
65#define TMF_RESP_FUNC_SUCC 0x08
66#define TMF_RESP_NO_LUN 0x09
67#define TMF_RESP_OVERLAPPED_TAG 0x0A
68
69enum sas_oob_mode {
70 OOB_NOT_CONNECTED,
71 SATA_OOB_MODE,
72 SAS_OOB_MODE
73};
74
75/* See sas_discover.c if you plan on changing these */
76enum sas_device_type {
77 /* these are SAS protocol defined (attached device type field) */
78 SAS_PHY_UNUSED = 0,
79 SAS_END_DEVICE = 1,
80 SAS_EDGE_EXPANDER_DEVICE = 2,
81 SAS_FANOUT_EXPANDER_DEVICE = 3,
82 /* these are internal to libsas */
83 SAS_HA = 4,
84 SAS_SATA_DEV = 5,
85 SAS_SATA_PM = 7,
86 SAS_SATA_PM_PORT = 8,
87 SAS_SATA_PENDING = 9,
88};
89
90enum sas_protocol {
91 SAS_PROTOCOL_NONE = 0,
92 SAS_PROTOCOL_SATA = 0x01,
93 SAS_PROTOCOL_SMP = 0x02,
94 SAS_PROTOCOL_STP = 0x04,
95 SAS_PROTOCOL_SSP = 0x08,
96 SAS_PROTOCOL_ALL = 0x0E,
97 SAS_PROTOCOL_STP_ALL = SAS_PROTOCOL_STP|SAS_PROTOCOL_SATA,
98 /* these are internal to libsas */
99 SAS_PROTOCOL_INTERNAL_ABORT = 0x10,
100};
101
102/* From the spec; local phys only */
103enum phy_func {
104 PHY_FUNC_NOP,
105 PHY_FUNC_LINK_RESET, /* Enables the phy */
106 PHY_FUNC_HARD_RESET,
107 PHY_FUNC_DISABLE,
108 PHY_FUNC_CLEAR_ERROR_LOG = 5,
109 PHY_FUNC_CLEAR_AFFIL,
110 PHY_FUNC_TX_SATA_PS_SIGNAL,
111 PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */
112 PHY_FUNC_SET_LINK_RATE,
113 PHY_FUNC_GET_EVENTS,
114};
115
116/* SAS LLDD would need to report only _very_few_ of those, like BROADCAST.
117 * Most of those are here for completeness.
118 */
119enum sas_prim {
120 SAS_PRIM_AIP_NORMAL = 1,
121 SAS_PRIM_AIP_R0 = 2,
122 SAS_PRIM_AIP_R1 = 3,
123 SAS_PRIM_AIP_R2 = 4,
124 SAS_PRIM_AIP_WC = 5,
125 SAS_PRIM_AIP_WD = 6,
126 SAS_PRIM_AIP_WP = 7,
127 SAS_PRIM_AIP_RWP = 8,
128
129 SAS_PRIM_BC_CH = 9,
130 SAS_PRIM_BC_RCH0 = 10,
131 SAS_PRIM_BC_RCH1 = 11,
132 SAS_PRIM_BC_R0 = 12,
133 SAS_PRIM_BC_R1 = 13,
134 SAS_PRIM_BC_R2 = 14,
135 SAS_PRIM_BC_R3 = 15,
136 SAS_PRIM_BC_R4 = 16,
137
138 SAS_PRIM_NOTIFY_ENSP= 17,
139 SAS_PRIM_NOTIFY_R0 = 18,
140 SAS_PRIM_NOTIFY_R1 = 19,
141 SAS_PRIM_NOTIFY_R2 = 20,
142
143 SAS_PRIM_CLOSE_CLAF = 21,
144 SAS_PRIM_CLOSE_NORM = 22,
145 SAS_PRIM_CLOSE_R0 = 23,
146 SAS_PRIM_CLOSE_R1 = 24,
147
148 SAS_PRIM_OPEN_RTRY = 25,
149 SAS_PRIM_OPEN_RJCT = 26,
150 SAS_PRIM_OPEN_ACPT = 27,
151
152 SAS_PRIM_DONE = 28,
153 SAS_PRIM_BREAK = 29,
154
155 SATA_PRIM_DMAT = 33,
156 SATA_PRIM_PMNAK = 34,
157 SATA_PRIM_PMACK = 35,
158 SATA_PRIM_PMREQ_S = 36,
159 SATA_PRIM_PMREQ_P = 37,
160 SATA_SATA_R_ERR = 38,
161};
162
163enum sas_open_rej_reason {
164 /* Abandon open */
165 SAS_OREJ_UNKNOWN = 0,
166 SAS_OREJ_BAD_DEST = 1,
167 SAS_OREJ_CONN_RATE = 2,
168 SAS_OREJ_EPROTO = 3,
169 SAS_OREJ_RESV_AB0 = 4,
170 SAS_OREJ_RESV_AB1 = 5,
171 SAS_OREJ_RESV_AB2 = 6,
172 SAS_OREJ_RESV_AB3 = 7,
173 SAS_OREJ_WRONG_DEST= 8,
174 SAS_OREJ_STP_NORES = 9,
175
176 /* Retry open */
177 SAS_OREJ_NO_DEST = 10,
178 SAS_OREJ_PATH_BLOCKED = 11,
179 SAS_OREJ_RSVD_CONT0 = 12,
180 SAS_OREJ_RSVD_CONT1 = 13,
181 SAS_OREJ_RSVD_INIT0 = 14,
182 SAS_OREJ_RSVD_INIT1 = 15,
183 SAS_OREJ_RSVD_STOP0 = 16,
184 SAS_OREJ_RSVD_STOP1 = 17,
185 SAS_OREJ_RSVD_RETRY = 18,
186};
187
188enum sas_gpio_reg_type {
189 SAS_GPIO_REG_CFG = 0,
190 SAS_GPIO_REG_RX = 1,
191 SAS_GPIO_REG_RX_GP = 2,
192 SAS_GPIO_REG_TX = 3,
193 SAS_GPIO_REG_TX_GP = 4,
194};
195
196/* Response frame DATAPRES field */
197enum {
198 SAS_DATAPRES_NO_DATA = 0,
199 SAS_DATAPRES_RESPONSE_DATA = 1,
200 SAS_DATAPRES_SENSE_DATA = 2,
201};
202
203struct dev_to_host_fis {
204 u8 fis_type; /* 0x34 */
205 u8 flags;
206 u8 status;
207 u8 error;
208
209 u8 lbal;
210 union { u8 lbam; u8 byte_count_low; };
211 union { u8 lbah; u8 byte_count_high; };
212 u8 device;
213
214 u8 lbal_exp;
215 u8 lbam_exp;
216 u8 lbah_exp;
217 u8 _r_a;
218
219 union { u8 sector_count; u8 interrupt_reason; };
220 u8 sector_count_exp;
221 u8 _r_b;
222 u8 _r_c;
223
224 u32 _r_d;
225} __attribute__ ((packed));
226
227struct host_to_dev_fis {
228 u8 fis_type; /* 0x27 */
229 u8 flags;
230 u8 command;
231 u8 features;
232
233 u8 lbal;
234 union { u8 lbam; u8 byte_count_low; };
235 union { u8 lbah; u8 byte_count_high; };
236 u8 device;
237
238 u8 lbal_exp;
239 u8 lbam_exp;
240 u8 lbah_exp;
241 u8 features_exp;
242
243 union { u8 sector_count; u8 interrupt_reason; };
244 u8 sector_count_exp;
245 u8 _r_a;
246 u8 control;
247
248 u32 _r_b;
249} __attribute__ ((packed));
250
251/* Prefer to have code clarity over header file clarity.
252 */
253#ifdef __LITTLE_ENDIAN_BITFIELD
254struct sas_identify_frame {
255 /* Byte 0 */
256 u8 frame_type:4;
257 u8 dev_type:3;
258 u8 _un0:1;
259
260 /* Byte 1 */
261 u8 _un1;
262
263 /* Byte 2 */
264 union {
265 struct {
266 u8 _un20:1;
267 u8 smp_iport:1;
268 u8 stp_iport:1;
269 u8 ssp_iport:1;
270 u8 _un247:4;
271 };
272 u8 initiator_bits;
273 };
274
275 /* Byte 3 */
276 union {
277 struct {
278 u8 _un30:1;
279 u8 smp_tport:1;
280 u8 stp_tport:1;
281 u8 ssp_tport:1;
282 u8 _un347:4;
283 };
284 u8 target_bits;
285 };
286
287 /* Byte 4 - 11 */
288 u8 _un4_11[8];
289
290 /* Byte 12 - 19 */
291 u8 sas_addr[SAS_ADDR_SIZE];
292
293 /* Byte 20 */
294 u8 phy_id;
295
296 u8 _un21_27[7];
297
298 __be32 crc;
299} __attribute__ ((packed));
300
301struct ssp_frame_hdr {
302 u8 frame_type;
303 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
304 u8 _r_a;
305 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
306 __be16 _r_b;
307
308 u8 changing_data_ptr:1;
309 u8 retransmit:1;
310 u8 retry_data_frames:1;
311 u8 _r_c:5;
312
313 u8 num_fill_bytes:2;
314 u8 _r_d:6;
315
316 u32 _r_e;
317 __be16 tag;
318 __be16 tptt;
319 __be32 data_offs;
320} __attribute__ ((packed));
321
322struct ssp_response_iu {
323 u8 _r_a[10];
324
325 u8 datapres:2;
326 u8 _r_b:6;
327
328 u8 status;
329
330 u32 _r_c;
331
332 __be32 sense_data_len;
333 __be32 response_data_len;
334
335 union {
336 DECLARE_FLEX_ARRAY(u8, resp_data);
337 DECLARE_FLEX_ARRAY(u8, sense_data);
338 };
339} __attribute__ ((packed));
340
341struct ssp_command_iu {
342 u8 lun[8];
343 u8 _r_a;
344
345 union {
346 struct {
347 u8 attr:3;
348 u8 prio:4;
349 u8 efb:1;
350 };
351 u8 efb_prio_attr;
352 };
353
354 u8 _r_b;
355
356 u8 _r_c:2;
357 u8 add_cdb_len:6;
358
359 u8 cdb[16];
360 u8 add_cdb[];
361} __attribute__ ((packed));
362
363struct xfer_rdy_iu {
364 __be32 requested_offset;
365 __be32 write_data_len;
366 __be32 _r_a;
367} __attribute__ ((packed));
368
369struct ssp_tmf_iu {
370 u8 lun[8];
371 u16 _r_a;
372 u8 tmf;
373 u8 _r_b;
374 __be16 tag;
375 u8 _r_c[14];
376} __attribute__ ((packed));
377
378/* ---------- SMP ---------- */
379
380struct report_general_resp {
381 __be16 change_count;
382 __be16 route_indexes;
383 u8 _r_a;
384 u8 num_phys;
385
386 u8 conf_route_table:1;
387 u8 configuring:1;
388 u8 config_others:1;
389 u8 orej_retry_supp:1;
390 u8 stp_cont_awt:1;
391 u8 self_config:1;
392 u8 zone_config:1;
393 u8 t2t_supp:1;
394
395 u8 _r_c;
396
397 u8 enclosure_logical_id[8];
398
399 u8 _r_d[12];
400} __attribute__ ((packed));
401
402struct discover_resp {
403 u8 _r_a[5];
404
405 u8 phy_id;
406 __be16 _r_b;
407
408 u8 _r_c:4;
409 u8 attached_dev_type:3;
410 u8 _r_d:1;
411
412 u8 linkrate:4;
413 u8 _r_e:4;
414
415 u8 attached_sata_host:1;
416 u8 iproto:3;
417 u8 _r_f:4;
418
419 u8 attached_sata_dev:1;
420 u8 tproto:3;
421 u8 _r_g:3;
422 u8 attached_sata_ps:1;
423
424 u8 sas_addr[8];
425 u8 attached_sas_addr[8];
426 u8 attached_phy_id;
427
428 u8 _r_h[7];
429
430 u8 hmin_linkrate:4;
431 u8 pmin_linkrate:4;
432 u8 hmax_linkrate:4;
433 u8 pmax_linkrate:4;
434
435 u8 change_count;
436
437 u8 pptv:4;
438 u8 _r_i:3;
439 u8 virtual:1;
440
441 u8 routing_attr:4;
442 u8 _r_j:4;
443
444 u8 conn_type;
445 u8 conn_el_index;
446 u8 conn_phy_link;
447
448 u8 _r_k[8];
449} __attribute__ ((packed));
450
451struct report_phy_sata_resp {
452 u8 _r_a[5];
453
454 u8 phy_id;
455 u8 _r_b;
456
457 u8 affil_valid:1;
458 u8 affil_supp:1;
459 u8 _r_c:6;
460
461 u32 _r_d;
462
463 u8 stp_sas_addr[8];
464
465 struct dev_to_host_fis fis;
466
467 u32 _r_e;
468
469 u8 affil_stp_ini_addr[8];
470
471 __be32 crc;
472} __attribute__ ((packed));
473
474#elif defined(__BIG_ENDIAN_BITFIELD)
475struct sas_identify_frame {
476 /* Byte 0 */
477 u8 _un0:1;
478 u8 dev_type:3;
479 u8 frame_type:4;
480
481 /* Byte 1 */
482 u8 _un1;
483
484 /* Byte 2 */
485 union {
486 struct {
487 u8 _un247:4;
488 u8 ssp_iport:1;
489 u8 stp_iport:1;
490 u8 smp_iport:1;
491 u8 _un20:1;
492 };
493 u8 initiator_bits;
494 };
495
496 /* Byte 3 */
497 union {
498 struct {
499 u8 _un347:4;
500 u8 ssp_tport:1;
501 u8 stp_tport:1;
502 u8 smp_tport:1;
503 u8 _un30:1;
504 };
505 u8 target_bits;
506 };
507
508 /* Byte 4 - 11 */
509 u8 _un4_11[8];
510
511 /* Byte 12 - 19 */
512 u8 sas_addr[SAS_ADDR_SIZE];
513
514 /* Byte 20 */
515 u8 phy_id;
516
517 u8 _un21_27[7];
518
519 __be32 crc;
520} __attribute__ ((packed));
521
522struct ssp_frame_hdr {
523 u8 frame_type;
524 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
525 u8 _r_a;
526 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
527 __be16 _r_b;
528
529 u8 _r_c:5;
530 u8 retry_data_frames:1;
531 u8 retransmit:1;
532 u8 changing_data_ptr:1;
533
534 u8 _r_d:6;
535 u8 num_fill_bytes:2;
536
537 u32 _r_e;
538 __be16 tag;
539 __be16 tptt;
540 __be32 data_offs;
541} __attribute__ ((packed));
542
543struct ssp_response_iu {
544 u8 _r_a[10];
545
546 u8 _r_b:6;
547 u8 datapres:2;
548
549 u8 status;
550
551 u32 _r_c;
552
553 __be32 sense_data_len;
554 __be32 response_data_len;
555
556 union {
557 DECLARE_FLEX_ARRAY(u8, resp_data);
558 DECLARE_FLEX_ARRAY(u8, sense_data);
559 };
560} __attribute__ ((packed));
561
562struct ssp_command_iu {
563 u8 lun[8];
564 u8 _r_a;
565
566 union {
567 struct {
568 u8 efb:1;
569 u8 prio:4;
570 u8 attr:3;
571 };
572 u8 efb_prio_attr;
573 };
574
575 u8 _r_b;
576
577 u8 add_cdb_len:6;
578 u8 _r_c:2;
579
580 u8 cdb[16];
581 u8 add_cdb[];
582} __attribute__ ((packed));
583
584struct xfer_rdy_iu {
585 __be32 requested_offset;
586 __be32 write_data_len;
587 __be32 _r_a;
588} __attribute__ ((packed));
589
590struct ssp_tmf_iu {
591 u8 lun[8];
592 u16 _r_a;
593 u8 tmf;
594 u8 _r_b;
595 __be16 tag;
596 u8 _r_c[14];
597} __attribute__ ((packed));
598
599/* ---------- SMP ---------- */
600
601struct report_general_resp {
602 __be16 change_count;
603 __be16 route_indexes;
604 u8 _r_a;
605 u8 num_phys;
606
607 u8 t2t_supp:1;
608 u8 zone_config:1;
609 u8 self_config:1;
610 u8 stp_cont_awt:1;
611 u8 orej_retry_supp:1;
612 u8 config_others:1;
613 u8 configuring:1;
614 u8 conf_route_table:1;
615
616 u8 _r_c;
617
618 u8 enclosure_logical_id[8];
619
620 u8 _r_d[12];
621} __attribute__ ((packed));
622
623struct discover_resp {
624 u8 _r_a[5];
625
626 u8 phy_id;
627 __be16 _r_b;
628
629 u8 _r_d:1;
630 u8 attached_dev_type:3;
631 u8 _r_c:4;
632
633 u8 _r_e:4;
634 u8 linkrate:4;
635
636 u8 _r_f:4;
637 u8 iproto:3;
638 u8 attached_sata_host:1;
639
640 u8 attached_sata_ps:1;
641 u8 _r_g:3;
642 u8 tproto:3;
643 u8 attached_sata_dev:1;
644
645 u8 sas_addr[8];
646 u8 attached_sas_addr[8];
647 u8 attached_phy_id;
648
649 u8 _r_h[7];
650
651 u8 pmin_linkrate:4;
652 u8 hmin_linkrate:4;
653 u8 pmax_linkrate:4;
654 u8 hmax_linkrate:4;
655
656 u8 change_count;
657
658 u8 virtual:1;
659 u8 _r_i:3;
660 u8 pptv:4;
661
662 u8 _r_j:4;
663 u8 routing_attr:4;
664
665 u8 conn_type;
666 u8 conn_el_index;
667 u8 conn_phy_link;
668
669 u8 _r_k[8];
670} __attribute__ ((packed));
671
672struct report_phy_sata_resp {
673 u8 _r_a[5];
674
675 u8 phy_id;
676 u8 _r_b;
677
678 u8 _r_c:6;
679 u8 affil_supp:1;
680 u8 affil_valid:1;
681
682 u32 _r_d;
683
684 u8 stp_sas_addr[8];
685
686 struct dev_to_host_fis fis;
687
688 u32 _r_e;
689
690 u8 affil_stp_ini_addr[8];
691
692 __be32 crc;
693} __attribute__ ((packed));
694
695#else
696#error "Bitfield order not defined!"
697#endif
698
699struct smp_rg_resp {
700 u8 frame_type;
701 u8 function;
702 u8 result;
703 u8 reserved;
704 struct report_general_resp rg;
705} __attribute__ ((packed));
706
707struct smp_disc_resp {
708 u8 frame_type;
709 u8 function;
710 u8 result;
711 u8 reserved;
712 struct discover_resp disc;
713} __attribute__ ((packed));
714
715struct smp_rps_resp {
716 u8 frame_type;
717 u8 function;
718 u8 result;
719 u8 reserved;
720 struct report_phy_sata_resp rps;
721} __attribute__ ((packed));
722
723#endif /* _SAS_H_ */
1/*
2 * SAS structures and definitions header file
3 *
4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
5 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
6 *
7 * This file is licensed under GPLv2.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * USA
23 *
24 */
25
26#ifndef _SAS_H_
27#define _SAS_H_
28
29#include <linux/types.h>
30#include <asm/byteorder.h>
31
32#define SAS_ADDR_SIZE 8
33#define HASHED_SAS_ADDR_SIZE 3
34#define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa)))
35
36#define SMP_REQUEST 0x40
37#define SMP_RESPONSE 0x41
38
39#define SSP_DATA 0x01
40#define SSP_XFER_RDY 0x05
41#define SSP_COMMAND 0x06
42#define SSP_RESPONSE 0x07
43#define SSP_TASK 0x16
44
45#define SMP_REPORT_GENERAL 0x00
46#define SMP_REPORT_MANUF_INFO 0x01
47#define SMP_READ_GPIO_REG 0x02
48#define SMP_DISCOVER 0x10
49#define SMP_REPORT_PHY_ERR_LOG 0x11
50#define SMP_REPORT_PHY_SATA 0x12
51#define SMP_REPORT_ROUTE_INFO 0x13
52#define SMP_WRITE_GPIO_REG 0x82
53#define SMP_CONF_ROUTE_INFO 0x90
54#define SMP_PHY_CONTROL 0x91
55#define SMP_PHY_TEST_FUNCTION 0x92
56
57#define SMP_RESP_FUNC_ACC 0x00
58#define SMP_RESP_FUNC_UNK 0x01
59#define SMP_RESP_FUNC_FAILED 0x02
60#define SMP_RESP_INV_FRM_LEN 0x03
61#define SMP_RESP_NO_PHY 0x10
62#define SMP_RESP_NO_INDEX 0x11
63#define SMP_RESP_PHY_NO_SATA 0x12
64#define SMP_RESP_PHY_UNK_OP 0x13
65#define SMP_RESP_PHY_UNK_TESTF 0x14
66#define SMP_RESP_PHY_TEST_INPROG 0x15
67#define SMP_RESP_PHY_VACANT 0x16
68
69/* SAM TMFs */
70#define TMF_ABORT_TASK 0x01
71#define TMF_ABORT_TASK_SET 0x02
72#define TMF_CLEAR_TASK_SET 0x04
73#define TMF_LU_RESET 0x08
74#define TMF_CLEAR_ACA 0x40
75#define TMF_QUERY_TASK 0x80
76
77/* SAS TMF responses */
78#define TMF_RESP_FUNC_COMPLETE 0x00
79#define TMF_RESP_INVALID_FRAME 0x02
80#define TMF_RESP_FUNC_ESUPP 0x04
81#define TMF_RESP_FUNC_FAILED 0x05
82#define TMF_RESP_FUNC_SUCC 0x08
83#define TMF_RESP_NO_LUN 0x09
84#define TMF_RESP_OVERLAPPED_TAG 0x0A
85
86enum sas_oob_mode {
87 OOB_NOT_CONNECTED,
88 SATA_OOB_MODE,
89 SAS_OOB_MODE
90};
91
92/* See sas_discover.c if you plan on changing these */
93enum sas_device_type {
94 /* these are SAS protocol defined (attached device type field) */
95 SAS_PHY_UNUSED = 0,
96 SAS_END_DEVICE = 1,
97 SAS_EDGE_EXPANDER_DEVICE = 2,
98 SAS_FANOUT_EXPANDER_DEVICE = 3,
99 /* these are internal to libsas */
100 SAS_HA = 4,
101 SAS_SATA_DEV = 5,
102 SAS_SATA_PM = 7,
103 SAS_SATA_PM_PORT = 8,
104 SAS_SATA_PENDING = 9,
105};
106
107enum sas_protocol {
108 SAS_PROTOCOL_NONE = 0,
109 SAS_PROTOCOL_SATA = 0x01,
110 SAS_PROTOCOL_SMP = 0x02,
111 SAS_PROTOCOL_STP = 0x04,
112 SAS_PROTOCOL_SSP = 0x08,
113 SAS_PROTOCOL_ALL = 0x0E,
114 SAS_PROTOCOL_STP_ALL = SAS_PROTOCOL_STP|SAS_PROTOCOL_SATA,
115};
116
117/* From the spec; local phys only */
118enum phy_func {
119 PHY_FUNC_NOP,
120 PHY_FUNC_LINK_RESET, /* Enables the phy */
121 PHY_FUNC_HARD_RESET,
122 PHY_FUNC_DISABLE,
123 PHY_FUNC_CLEAR_ERROR_LOG = 5,
124 PHY_FUNC_CLEAR_AFFIL,
125 PHY_FUNC_TX_SATA_PS_SIGNAL,
126 PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */
127 PHY_FUNC_SET_LINK_RATE,
128 PHY_FUNC_GET_EVENTS,
129};
130
131/* SAS LLDD would need to report only _very_few_ of those, like BROADCAST.
132 * Most of those are here for completeness.
133 */
134enum sas_prim {
135 SAS_PRIM_AIP_NORMAL = 1,
136 SAS_PRIM_AIP_R0 = 2,
137 SAS_PRIM_AIP_R1 = 3,
138 SAS_PRIM_AIP_R2 = 4,
139 SAS_PRIM_AIP_WC = 5,
140 SAS_PRIM_AIP_WD = 6,
141 SAS_PRIM_AIP_WP = 7,
142 SAS_PRIM_AIP_RWP = 8,
143
144 SAS_PRIM_BC_CH = 9,
145 SAS_PRIM_BC_RCH0 = 10,
146 SAS_PRIM_BC_RCH1 = 11,
147 SAS_PRIM_BC_R0 = 12,
148 SAS_PRIM_BC_R1 = 13,
149 SAS_PRIM_BC_R2 = 14,
150 SAS_PRIM_BC_R3 = 15,
151 SAS_PRIM_BC_R4 = 16,
152
153 SAS_PRIM_NOTIFY_ENSP= 17,
154 SAS_PRIM_NOTIFY_R0 = 18,
155 SAS_PRIM_NOTIFY_R1 = 19,
156 SAS_PRIM_NOTIFY_R2 = 20,
157
158 SAS_PRIM_CLOSE_CLAF = 21,
159 SAS_PRIM_CLOSE_NORM = 22,
160 SAS_PRIM_CLOSE_R0 = 23,
161 SAS_PRIM_CLOSE_R1 = 24,
162
163 SAS_PRIM_OPEN_RTRY = 25,
164 SAS_PRIM_OPEN_RJCT = 26,
165 SAS_PRIM_OPEN_ACPT = 27,
166
167 SAS_PRIM_DONE = 28,
168 SAS_PRIM_BREAK = 29,
169
170 SATA_PRIM_DMAT = 33,
171 SATA_PRIM_PMNAK = 34,
172 SATA_PRIM_PMACK = 35,
173 SATA_PRIM_PMREQ_S = 36,
174 SATA_PRIM_PMREQ_P = 37,
175 SATA_SATA_R_ERR = 38,
176};
177
178enum sas_open_rej_reason {
179 /* Abandon open */
180 SAS_OREJ_UNKNOWN = 0,
181 SAS_OREJ_BAD_DEST = 1,
182 SAS_OREJ_CONN_RATE = 2,
183 SAS_OREJ_EPROTO = 3,
184 SAS_OREJ_RESV_AB0 = 4,
185 SAS_OREJ_RESV_AB1 = 5,
186 SAS_OREJ_RESV_AB2 = 6,
187 SAS_OREJ_RESV_AB3 = 7,
188 SAS_OREJ_WRONG_DEST= 8,
189 SAS_OREJ_STP_NORES = 9,
190
191 /* Retry open */
192 SAS_OREJ_NO_DEST = 10,
193 SAS_OREJ_PATH_BLOCKED = 11,
194 SAS_OREJ_RSVD_CONT0 = 12,
195 SAS_OREJ_RSVD_CONT1 = 13,
196 SAS_OREJ_RSVD_INIT0 = 14,
197 SAS_OREJ_RSVD_INIT1 = 15,
198 SAS_OREJ_RSVD_STOP0 = 16,
199 SAS_OREJ_RSVD_STOP1 = 17,
200 SAS_OREJ_RSVD_RETRY = 18,
201};
202
203enum sas_gpio_reg_type {
204 SAS_GPIO_REG_CFG = 0,
205 SAS_GPIO_REG_RX = 1,
206 SAS_GPIO_REG_RX_GP = 2,
207 SAS_GPIO_REG_TX = 3,
208 SAS_GPIO_REG_TX_GP = 4,
209};
210
211struct dev_to_host_fis {
212 u8 fis_type; /* 0x34 */
213 u8 flags;
214 u8 status;
215 u8 error;
216
217 u8 lbal;
218 union { u8 lbam; u8 byte_count_low; };
219 union { u8 lbah; u8 byte_count_high; };
220 u8 device;
221
222 u8 lbal_exp;
223 u8 lbam_exp;
224 u8 lbah_exp;
225 u8 _r_a;
226
227 union { u8 sector_count; u8 interrupt_reason; };
228 u8 sector_count_exp;
229 u8 _r_b;
230 u8 _r_c;
231
232 u32 _r_d;
233} __attribute__ ((packed));
234
235struct host_to_dev_fis {
236 u8 fis_type; /* 0x27 */
237 u8 flags;
238 u8 command;
239 u8 features;
240
241 u8 lbal;
242 union { u8 lbam; u8 byte_count_low; };
243 union { u8 lbah; u8 byte_count_high; };
244 u8 device;
245
246 u8 lbal_exp;
247 u8 lbam_exp;
248 u8 lbah_exp;
249 u8 features_exp;
250
251 union { u8 sector_count; u8 interrupt_reason; };
252 u8 sector_count_exp;
253 u8 _r_a;
254 u8 control;
255
256 u32 _r_b;
257} __attribute__ ((packed));
258
259/* Prefer to have code clarity over header file clarity.
260 */
261#ifdef __LITTLE_ENDIAN_BITFIELD
262struct sas_identify_frame {
263 /* Byte 0 */
264 u8 frame_type:4;
265 u8 dev_type:3;
266 u8 _un0:1;
267
268 /* Byte 1 */
269 u8 _un1;
270
271 /* Byte 2 */
272 union {
273 struct {
274 u8 _un20:1;
275 u8 smp_iport:1;
276 u8 stp_iport:1;
277 u8 ssp_iport:1;
278 u8 _un247:4;
279 };
280 u8 initiator_bits;
281 };
282
283 /* Byte 3 */
284 union {
285 struct {
286 u8 _un30:1;
287 u8 smp_tport:1;
288 u8 stp_tport:1;
289 u8 ssp_tport:1;
290 u8 _un347:4;
291 };
292 u8 target_bits;
293 };
294
295 /* Byte 4 - 11 */
296 u8 _un4_11[8];
297
298 /* Byte 12 - 19 */
299 u8 sas_addr[SAS_ADDR_SIZE];
300
301 /* Byte 20 */
302 u8 phy_id;
303
304 u8 _un21_27[7];
305
306 __be32 crc;
307} __attribute__ ((packed));
308
309struct ssp_frame_hdr {
310 u8 frame_type;
311 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
312 u8 _r_a;
313 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
314 __be16 _r_b;
315
316 u8 changing_data_ptr:1;
317 u8 retransmit:1;
318 u8 retry_data_frames:1;
319 u8 _r_c:5;
320
321 u8 num_fill_bytes:2;
322 u8 _r_d:6;
323
324 u32 _r_e;
325 __be16 tag;
326 __be16 tptt;
327 __be32 data_offs;
328} __attribute__ ((packed));
329
330struct ssp_response_iu {
331 u8 _r_a[10];
332
333 u8 datapres:2;
334 u8 _r_b:6;
335
336 u8 status;
337
338 u32 _r_c;
339
340 __be32 sense_data_len;
341 __be32 response_data_len;
342
343 u8 resp_data[0];
344 u8 sense_data[0];
345} __attribute__ ((packed));
346
347struct ssp_command_iu {
348 u8 lun[8];
349 u8 _r_a;
350
351 union {
352 struct {
353 u8 attr:3;
354 u8 prio:4;
355 u8 efb:1;
356 };
357 u8 efb_prio_attr;
358 };
359
360 u8 _r_b;
361
362 u8 _r_c:2;
363 u8 add_cdb_len:6;
364
365 u8 cdb[16];
366 u8 add_cdb[0];
367} __attribute__ ((packed));
368
369struct xfer_rdy_iu {
370 __be32 requested_offset;
371 __be32 write_data_len;
372 __be32 _r_a;
373} __attribute__ ((packed));
374
375struct ssp_tmf_iu {
376 u8 lun[8];
377 u16 _r_a;
378 u8 tmf;
379 u8 _r_b;
380 __be16 tag;
381 u8 _r_c[14];
382} __attribute__ ((packed));
383
384/* ---------- SMP ---------- */
385
386struct report_general_resp {
387 __be16 change_count;
388 __be16 route_indexes;
389 u8 _r_a;
390 u8 num_phys;
391
392 u8 conf_route_table:1;
393 u8 configuring:1;
394 u8 config_others:1;
395 u8 orej_retry_supp:1;
396 u8 stp_cont_awt:1;
397 u8 self_config:1;
398 u8 zone_config:1;
399 u8 t2t_supp:1;
400
401 u8 _r_c;
402
403 u8 enclosure_logical_id[8];
404
405 u8 _r_d[12];
406} __attribute__ ((packed));
407
408struct discover_resp {
409 u8 _r_a[5];
410
411 u8 phy_id;
412 __be16 _r_b;
413
414 u8 _r_c:4;
415 u8 attached_dev_type:3;
416 u8 _r_d:1;
417
418 u8 linkrate:4;
419 u8 _r_e:4;
420
421 u8 attached_sata_host:1;
422 u8 iproto:3;
423 u8 _r_f:4;
424
425 u8 attached_sata_dev:1;
426 u8 tproto:3;
427 u8 _r_g:3;
428 u8 attached_sata_ps:1;
429
430 u8 sas_addr[8];
431 u8 attached_sas_addr[8];
432 u8 attached_phy_id;
433
434 u8 _r_h[7];
435
436 u8 hmin_linkrate:4;
437 u8 pmin_linkrate:4;
438 u8 hmax_linkrate:4;
439 u8 pmax_linkrate:4;
440
441 u8 change_count;
442
443 u8 pptv:4;
444 u8 _r_i:3;
445 u8 virtual:1;
446
447 u8 routing_attr:4;
448 u8 _r_j:4;
449
450 u8 conn_type;
451 u8 conn_el_index;
452 u8 conn_phy_link;
453
454 u8 _r_k[8];
455} __attribute__ ((packed));
456
457struct report_phy_sata_resp {
458 u8 _r_a[5];
459
460 u8 phy_id;
461 u8 _r_b;
462
463 u8 affil_valid:1;
464 u8 affil_supp:1;
465 u8 _r_c:6;
466
467 u32 _r_d;
468
469 u8 stp_sas_addr[8];
470
471 struct dev_to_host_fis fis;
472
473 u32 _r_e;
474
475 u8 affil_stp_ini_addr[8];
476
477 __be32 crc;
478} __attribute__ ((packed));
479
480struct smp_resp {
481 u8 frame_type;
482 u8 function;
483 u8 result;
484 u8 reserved;
485 union {
486 struct report_general_resp rg;
487 struct discover_resp disc;
488 struct report_phy_sata_resp rps;
489 };
490} __attribute__ ((packed));
491
492#elif defined(__BIG_ENDIAN_BITFIELD)
493struct sas_identify_frame {
494 /* Byte 0 */
495 u8 _un0:1;
496 u8 dev_type:3;
497 u8 frame_type:4;
498
499 /* Byte 1 */
500 u8 _un1;
501
502 /* Byte 2 */
503 union {
504 struct {
505 u8 _un247:4;
506 u8 ssp_iport:1;
507 u8 stp_iport:1;
508 u8 smp_iport:1;
509 u8 _un20:1;
510 };
511 u8 initiator_bits;
512 };
513
514 /* Byte 3 */
515 union {
516 struct {
517 u8 _un347:4;
518 u8 ssp_tport:1;
519 u8 stp_tport:1;
520 u8 smp_tport:1;
521 u8 _un30:1;
522 };
523 u8 target_bits;
524 };
525
526 /* Byte 4 - 11 */
527 u8 _un4_11[8];
528
529 /* Byte 12 - 19 */
530 u8 sas_addr[SAS_ADDR_SIZE];
531
532 /* Byte 20 */
533 u8 phy_id;
534
535 u8 _un21_27[7];
536
537 __be32 crc;
538} __attribute__ ((packed));
539
540struct ssp_frame_hdr {
541 u8 frame_type;
542 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
543 u8 _r_a;
544 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
545 __be16 _r_b;
546
547 u8 _r_c:5;
548 u8 retry_data_frames:1;
549 u8 retransmit:1;
550 u8 changing_data_ptr:1;
551
552 u8 _r_d:6;
553 u8 num_fill_bytes:2;
554
555 u32 _r_e;
556 __be16 tag;
557 __be16 tptt;
558 __be32 data_offs;
559} __attribute__ ((packed));
560
561struct ssp_response_iu {
562 u8 _r_a[10];
563
564 u8 _r_b:6;
565 u8 datapres:2;
566
567 u8 status;
568
569 u32 _r_c;
570
571 __be32 sense_data_len;
572 __be32 response_data_len;
573
574 u8 resp_data[0];
575 u8 sense_data[0];
576} __attribute__ ((packed));
577
578struct ssp_command_iu {
579 u8 lun[8];
580 u8 _r_a;
581
582 union {
583 struct {
584 u8 efb:1;
585 u8 prio:4;
586 u8 attr:3;
587 };
588 u8 efb_prio_attr;
589 };
590
591 u8 _r_b;
592
593 u8 add_cdb_len:6;
594 u8 _r_c:2;
595
596 u8 cdb[16];
597 u8 add_cdb[0];
598} __attribute__ ((packed));
599
600struct xfer_rdy_iu {
601 __be32 requested_offset;
602 __be32 write_data_len;
603 __be32 _r_a;
604} __attribute__ ((packed));
605
606struct ssp_tmf_iu {
607 u8 lun[8];
608 u16 _r_a;
609 u8 tmf;
610 u8 _r_b;
611 __be16 tag;
612 u8 _r_c[14];
613} __attribute__ ((packed));
614
615/* ---------- SMP ---------- */
616
617struct report_general_resp {
618 __be16 change_count;
619 __be16 route_indexes;
620 u8 _r_a;
621 u8 num_phys;
622
623 u8 t2t_supp:1;
624 u8 zone_config:1;
625 u8 self_config:1;
626 u8 stp_cont_awt:1;
627 u8 orej_retry_supp:1;
628 u8 config_others:1;
629 u8 configuring:1;
630 u8 conf_route_table:1;
631
632 u8 _r_c;
633
634 u8 enclosure_logical_id[8];
635
636 u8 _r_d[12];
637} __attribute__ ((packed));
638
639struct discover_resp {
640 u8 _r_a[5];
641
642 u8 phy_id;
643 __be16 _r_b;
644
645 u8 _r_d:1;
646 u8 attached_dev_type:3;
647 u8 _r_c:4;
648
649 u8 _r_e:4;
650 u8 linkrate:4;
651
652 u8 _r_f:4;
653 u8 iproto:3;
654 u8 attached_sata_host:1;
655
656 u8 attached_sata_ps:1;
657 u8 _r_g:3;
658 u8 tproto:3;
659 u8 attached_sata_dev:1;
660
661 u8 sas_addr[8];
662 u8 attached_sas_addr[8];
663 u8 attached_phy_id;
664
665 u8 _r_h[7];
666
667 u8 pmin_linkrate:4;
668 u8 hmin_linkrate:4;
669 u8 pmax_linkrate:4;
670 u8 hmax_linkrate:4;
671
672 u8 change_count;
673
674 u8 virtual:1;
675 u8 _r_i:3;
676 u8 pptv:4;
677
678 u8 _r_j:4;
679 u8 routing_attr:4;
680
681 u8 conn_type;
682 u8 conn_el_index;
683 u8 conn_phy_link;
684
685 u8 _r_k[8];
686} __attribute__ ((packed));
687
688struct report_phy_sata_resp {
689 u8 _r_a[5];
690
691 u8 phy_id;
692 u8 _r_b;
693
694 u8 _r_c:6;
695 u8 affil_supp:1;
696 u8 affil_valid:1;
697
698 u32 _r_d;
699
700 u8 stp_sas_addr[8];
701
702 struct dev_to_host_fis fis;
703
704 u32 _r_e;
705
706 u8 affil_stp_ini_addr[8];
707
708 __be32 crc;
709} __attribute__ ((packed));
710
711struct smp_resp {
712 u8 frame_type;
713 u8 function;
714 u8 result;
715 u8 reserved;
716 union {
717 struct report_general_resp rg;
718 struct discover_resp disc;
719 struct report_phy_sata_resp rps;
720 };
721} __attribute__ ((packed));
722
723#else
724#error "Bitfield order not defined!"
725#endif
726
727#endif /* _SAS_H_ */