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1// SPDX-License-Identifier: GPL-2.0-only
2/* Realtek USB SD/MMC Card Interface driver
3 *
4 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * Author:
7 * Roger Tseng <rogerable@realtek.com>
8 */
9
10#include <linux/module.h>
11#include <linux/slab.h>
12#include <linux/delay.h>
13#include <linux/platform_device.h>
14#include <linux/usb.h>
15#include <linux/mmc/host.h>
16#include <linux/mmc/mmc.h>
17#include <linux/mmc/sd.h>
18#include <linux/mmc/card.h>
19#include <linux/scatterlist.h>
20#include <linux/pm.h>
21#include <linux/pm_runtime.h>
22
23#include <linux/rtsx_usb.h>
24#include <asm/unaligned.h>
25
26#if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
27 defined(CONFIG_MMC_REALTEK_USB_MODULE))
28#include <linux/leds.h>
29#include <linux/workqueue.h>
30#define RTSX_USB_USE_LEDS_CLASS
31#endif
32
33struct rtsx_usb_sdmmc {
34 struct platform_device *pdev;
35 struct rtsx_ucr *ucr;
36 struct mmc_host *mmc;
37 struct mmc_request *mrq;
38
39 struct mutex host_mutex;
40
41 u8 ssc_depth;
42 unsigned int clock;
43 bool vpclk;
44 bool double_clk;
45 bool host_removal;
46 bool card_exist;
47 bool initial_mode;
48 bool ddr_mode;
49
50 unsigned char power_mode;
51
52#ifdef RTSX_USB_USE_LEDS_CLASS
53 struct led_classdev led;
54 char led_name[32];
55 struct work_struct led_work;
56#endif
57};
58
59static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
60{
61 return &(host->pdev->dev);
62}
63
64static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
65{
66 struct rtsx_ucr *ucr = host->ucr;
67 rtsx_usb_ep0_write_register(ucr, CARD_STOP,
68 SD_STOP | SD_CLR_ERR,
69 SD_STOP | SD_CLR_ERR);
70
71 rtsx_usb_clear_dma_err(ucr);
72 rtsx_usb_clear_fsm_err(ucr);
73}
74
75#ifdef DEBUG
76static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
77{
78 struct rtsx_ucr *ucr = host->ucr;
79 u8 val = 0;
80
81 rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
82 dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
83 rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
84 dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
85 rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
86 dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
87}
88#else
89#define sd_print_debug_regs(host)
90#endif /* DEBUG */
91
92static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
93 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
94{
95 struct rtsx_ucr *ucr = host->ucr;
96 int err;
97 u8 trans_mode;
98
99 if (!buf)
100 buf_len = 0;
101
102 rtsx_usb_init_cmd(ucr);
103 if (cmd != NULL) {
104 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
105 , cmd->opcode);
106 if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
107 trans_mode = SD_TM_AUTO_TUNING;
108 else
109 trans_mode = SD_TM_NORMAL_READ;
110
111 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
112 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
113 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
114 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
115 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
116 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
117 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
118 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
119 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
120 SD_CMD4, 0xFF, (u8)cmd->arg);
121 } else {
122 trans_mode = SD_TM_AUTO_READ_3;
123 }
124
125 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
126 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
127 0xFF, (u8)(byte_cnt >> 8));
128 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
129 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
130
131 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
132 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
133 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
134 if (trans_mode != SD_TM_AUTO_TUNING)
135 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
136 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
137
138 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
139 0xFF, trans_mode | SD_TRANSFER_START);
140 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
141 SD_TRANSFER_END, SD_TRANSFER_END);
142
143 if (cmd != NULL) {
144 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
145 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
146 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
147 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
148 }
149
150 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
151 if (err) {
152 dev_dbg(sdmmc_dev(host),
153 "rtsx_usb_send_cmd failed (err = %d)\n", err);
154 return err;
155 }
156
157 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
158 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
159 sd_print_debug_regs(host);
160
161 if (!err) {
162 dev_dbg(sdmmc_dev(host),
163 "Transfer failed (SD_TRANSFER = %02x)\n",
164 ucr->rsp_buf[0]);
165 err = -EIO;
166 } else {
167 dev_dbg(sdmmc_dev(host),
168 "rtsx_usb_get_rsp failed (err = %d)\n", err);
169 }
170
171 return err;
172 }
173
174 if (cmd != NULL) {
175 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
176 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
177 cmd->resp[0]);
178 }
179
180 if (buf && buf_len) {
181 /* 2-byte aligned part */
182 err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
183 if (err) {
184 dev_dbg(sdmmc_dev(host),
185 "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
186 return err;
187 }
188
189 /* unaligned byte */
190 if (byte_cnt % 2)
191 return rtsx_usb_read_register(ucr,
192 PPBUF_BASE2 + byte_cnt,
193 buf + byte_cnt - 1);
194 }
195
196 return 0;
197}
198
199static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
200 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
201{
202 struct rtsx_ucr *ucr = host->ucr;
203 int err;
204 u8 trans_mode;
205
206 if (!buf)
207 buf_len = 0;
208
209 if (buf && buf_len) {
210 err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
211 if (err) {
212 dev_dbg(sdmmc_dev(host),
213 "rtsx_usb_write_ppbuf failed (err = %d)\n",
214 err);
215 return err;
216 }
217 }
218
219 trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
220 rtsx_usb_init_cmd(ucr);
221
222 if (cmd != NULL) {
223 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
224 cmd->opcode);
225 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
226 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
227 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
228 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
229 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
230 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
231 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
232 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
233 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
234 SD_CMD4, 0xFF, (u8)cmd->arg);
235 }
236
237 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
238 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
239 0xFF, (u8)(byte_cnt >> 8));
240 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
241 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
242
243 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
244 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
245 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
246 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
247 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
248
249 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
250 trans_mode | SD_TRANSFER_START);
251 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
252 SD_TRANSFER_END, SD_TRANSFER_END);
253
254 if (cmd != NULL) {
255 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
256 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
257 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
258 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
259 }
260
261 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
262 if (err) {
263 dev_dbg(sdmmc_dev(host),
264 "rtsx_usb_send_cmd failed (err = %d)\n", err);
265 return err;
266 }
267
268 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
269 if (err) {
270 sd_print_debug_regs(host);
271 dev_dbg(sdmmc_dev(host),
272 "rtsx_usb_get_rsp failed (err = %d)\n", err);
273 return err;
274 }
275
276 if (cmd != NULL) {
277 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
278 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
279 cmd->resp[0]);
280 }
281
282 return 0;
283}
284
285static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
286 struct mmc_command *cmd)
287{
288 struct rtsx_ucr *ucr = host->ucr;
289 u8 cmd_idx = (u8)cmd->opcode;
290 u32 arg = cmd->arg;
291 int err = 0;
292 int timeout = 100;
293 int i;
294 u8 *ptr;
295 int stat_idx = 0;
296 int len = 2;
297 u8 rsp_type;
298
299 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
300 __func__, cmd_idx, arg);
301
302 /* Response type:
303 * R0
304 * R1, R5, R6, R7
305 * R1b
306 * R2
307 * R3, R4
308 */
309 switch (mmc_resp_type(cmd)) {
310 case MMC_RSP_NONE:
311 rsp_type = SD_RSP_TYPE_R0;
312 break;
313 case MMC_RSP_R1:
314 rsp_type = SD_RSP_TYPE_R1;
315 break;
316 case MMC_RSP_R1_NO_CRC:
317 rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
318 break;
319 case MMC_RSP_R1B:
320 rsp_type = SD_RSP_TYPE_R1b;
321 break;
322 case MMC_RSP_R2:
323 rsp_type = SD_RSP_TYPE_R2;
324 break;
325 case MMC_RSP_R3:
326 rsp_type = SD_RSP_TYPE_R3;
327 break;
328 default:
329 dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
330 err = -EINVAL;
331 goto out;
332 }
333
334 if (rsp_type == SD_RSP_TYPE_R1b)
335 timeout = cmd->busy_timeout ? cmd->busy_timeout : 3000;
336
337 if (cmd->opcode == SD_SWITCH_VOLTAGE) {
338 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
339 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
340 SD_CLK_TOGGLE_EN);
341 if (err)
342 goto out;
343 }
344
345 rtsx_usb_init_cmd(ucr);
346
347 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
348 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
349 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
350 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
351 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
352
353 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
354 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
355 0x01, PINGPONG_BUFFER);
356 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
357 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
358 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
359 SD_TRANSFER_END | SD_STAT_IDLE,
360 SD_TRANSFER_END | SD_STAT_IDLE);
361
362 if (rsp_type == SD_RSP_TYPE_R2) {
363 /* Read data from ping-pong buffer */
364 for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
365 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
366 stat_idx = 16;
367 } else if (rsp_type != SD_RSP_TYPE_R0) {
368 /* Read data from SD_CMDx registers */
369 for (i = SD_CMD0; i <= SD_CMD4; i++)
370 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
371 stat_idx = 5;
372 }
373 len += stat_idx;
374
375 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
376
377 err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
378 if (err) {
379 dev_dbg(sdmmc_dev(host),
380 "rtsx_usb_send_cmd error (err = %d)\n", err);
381 goto out;
382 }
383
384 err = rtsx_usb_get_rsp(ucr, len, timeout);
385 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
386 sd_print_debug_regs(host);
387 sd_clear_error(host);
388
389 if (!err) {
390 dev_dbg(sdmmc_dev(host),
391 "Transfer failed (SD_TRANSFER = %02x)\n",
392 ucr->rsp_buf[0]);
393 err = -EIO;
394 } else {
395 dev_dbg(sdmmc_dev(host),
396 "rtsx_usb_get_rsp failed (err = %d)\n", err);
397 }
398
399 goto out;
400 }
401
402 if (rsp_type == SD_RSP_TYPE_R0) {
403 err = 0;
404 goto out;
405 }
406
407 /* Skip result of CHECK_REG_CMD */
408 ptr = ucr->rsp_buf + 1;
409
410 /* Check (Start,Transmission) bit of Response */
411 if ((ptr[0] & 0xC0) != 0) {
412 err = -EILSEQ;
413 dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
414 goto out;
415 }
416
417 /* Check CRC7 */
418 if (!(rsp_type & SD_NO_CHECK_CRC7)) {
419 if (ptr[stat_idx] & SD_CRC7_ERR) {
420 err = -EILSEQ;
421 dev_dbg(sdmmc_dev(host), "CRC7 error\n");
422 goto out;
423 }
424 }
425
426 if (rsp_type == SD_RSP_TYPE_R2) {
427 /*
428 * The controller offloads the last byte {CRC-7, end bit 1'b1}
429 * of response type R2. Assign dummy CRC, 0, and end bit to the
430 * byte(ptr[16], goes into the LSB of resp[3] later).
431 */
432 ptr[16] = 1;
433
434 for (i = 0; i < 4; i++) {
435 cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
436 dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
437 i, cmd->resp[i]);
438 }
439 } else {
440 cmd->resp[0] = get_unaligned_be32(ptr + 1);
441 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
442 cmd->resp[0]);
443 }
444
445out:
446 cmd->error = err;
447}
448
449static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
450{
451 struct rtsx_ucr *ucr = host->ucr;
452 struct mmc_data *data = mrq->data;
453 int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
454 u8 cfg2, trans_mode;
455 int err;
456 u8 flag;
457 size_t data_len = data->blksz * data->blocks;
458 unsigned int pipe;
459
460 if (read) {
461 dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
462 __func__, data_len);
463 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
464 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
465 trans_mode = SD_TM_AUTO_READ_3;
466 } else {
467 dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
468 __func__, data_len);
469 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
470 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
471 trans_mode = SD_TM_AUTO_WRITE_3;
472 }
473
474 rtsx_usb_init_cmd(ucr);
475
476 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
477 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
478 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
479 0xFF, (u8)data->blocks);
480 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
481 0xFF, (u8)(data->blocks >> 8));
482
483 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
484 0x01, RING_BUFFER);
485
486 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
487 0xFF, (u8)(data_len >> 24));
488 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
489 0xFF, (u8)(data_len >> 16));
490 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
491 0xFF, (u8)(data_len >> 8));
492 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
493 0xFF, (u8)data_len);
494 if (read) {
495 flag = MODE_CDIR;
496 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
497 0x03 | DMA_PACK_SIZE_MASK,
498 DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
499 } else {
500 flag = MODE_CDOR;
501 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
502 0x03 | DMA_PACK_SIZE_MASK,
503 DMA_DIR_TO_CARD | DMA_EN | DMA_512);
504 }
505
506 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
507 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
508 trans_mode | SD_TRANSFER_START);
509 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
510 SD_TRANSFER_END, SD_TRANSFER_END);
511
512 err = rtsx_usb_send_cmd(ucr, flag, 100);
513 if (err)
514 return err;
515
516 if (read)
517 pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
518 else
519 pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
520
521 err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
522 data->sg_len, NULL, 10000);
523 if (err) {
524 dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
525 , err);
526 sd_clear_error(host);
527 return err;
528 }
529
530 return rtsx_usb_get_rsp(ucr, 1, 2000);
531}
532
533static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
534{
535 rtsx_usb_write_register(host->ucr, SD_CFG1,
536 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
537}
538
539static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
540{
541 rtsx_usb_write_register(host->ucr, SD_CFG1,
542 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
543}
544
545static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
546 struct mmc_request *mrq)
547{
548 struct mmc_command *cmd = mrq->cmd;
549 struct mmc_data *data = mrq->data;
550 u8 *buf;
551
552 buf = kzalloc(data->blksz, GFP_NOIO);
553 if (!buf) {
554 cmd->error = -ENOMEM;
555 return;
556 }
557
558 if (data->flags & MMC_DATA_READ) {
559 if (host->initial_mode)
560 sd_disable_initial_mode(host);
561
562 cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
563 data->blksz, 200);
564
565 if (host->initial_mode)
566 sd_enable_initial_mode(host);
567
568 sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
569 } else {
570 sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
571
572 cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
573 data->blksz, 200);
574 }
575
576 kfree(buf);
577}
578
579static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
580{
581 struct rtsx_ucr *ucr = host->ucr;
582
583 dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
584 __func__, tx ? "TX" : "RX", sample_point);
585
586 rtsx_usb_init_cmd(ucr);
587
588 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
589
590 if (tx)
591 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
592 0x0F, sample_point);
593 else
594 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
595 0x0F, sample_point);
596
597 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
598 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
599 PHASE_NOT_RESET, PHASE_NOT_RESET);
600 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
601 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
602
603 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
604}
605
606static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
607{
608 idx &= MAX_PHASE;
609 return phase_map & (1 << idx);
610}
611
612static int get_phase_len(u32 phase_map, unsigned int idx)
613{
614 int i;
615
616 for (i = 0; i < MAX_PHASE + 1; i++) {
617 if (get_phase_point(phase_map, idx + i) == 0)
618 return i;
619 }
620 return MAX_PHASE + 1;
621}
622
623static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
624{
625 int start = 0, len = 0;
626 int start_final = 0, len_final = 0;
627 u8 final_phase = 0xFF;
628
629 if (phase_map == 0) {
630 dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
631 return final_phase;
632 }
633
634 while (start < MAX_PHASE + 1) {
635 len = get_phase_len(phase_map, start);
636 if (len_final < len) {
637 start_final = start;
638 len_final = len;
639 }
640 start += len ? len : 1;
641 }
642
643 final_phase = (start_final + len_final / 2) & MAX_PHASE;
644 dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
645 phase_map, len_final, final_phase);
646
647 return final_phase;
648}
649
650static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
651{
652 int i;
653 u8 val = 0;
654
655 for (i = 0; i < 100; i++) {
656 rtsx_usb_ep0_read_register(host->ucr, SD_DATA_STATE, &val);
657 if (val & SD_DATA_IDLE)
658 return;
659
660 usleep_range(100, 1000);
661 }
662}
663
664static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
665 u8 opcode, u8 sample_point)
666{
667 int err;
668 struct mmc_command cmd = {};
669
670 err = sd_change_phase(host, sample_point, 0);
671 if (err)
672 return err;
673
674 cmd.opcode = MMC_SEND_TUNING_BLOCK;
675 err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
676 if (err) {
677 /* Wait till SD DATA IDLE */
678 sd_wait_data_idle(host);
679 sd_clear_error(host);
680 return err;
681 }
682
683 return 0;
684}
685
686static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
687 u8 opcode, u16 *phase_map)
688{
689 int err, i;
690 u16 raw_phase_map = 0;
691
692 for (i = MAX_PHASE; i >= 0; i--) {
693 err = sd_tuning_rx_cmd(host, opcode, (u8)i);
694 if (!err)
695 raw_phase_map |= 1 << i;
696 }
697
698 if (phase_map)
699 *phase_map = raw_phase_map;
700}
701
702static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
703{
704 int err, i;
705 u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
706 u8 final_phase;
707
708 /* setting fixed default TX phase */
709 err = sd_change_phase(host, 0x01, 1);
710 if (err) {
711 dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
712 return err;
713 }
714
715 /* tuning RX phase */
716 for (i = 0; i < RX_TUNING_CNT; i++) {
717 sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
718
719 if (raw_phase_map[i] == 0)
720 break;
721 }
722
723 phase_map = 0xFFFF;
724 for (i = 0; i < RX_TUNING_CNT; i++) {
725 dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
726 i, raw_phase_map[i]);
727 phase_map &= raw_phase_map[i];
728 }
729 dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
730
731 if (phase_map) {
732 final_phase = sd_search_final_phase(host, phase_map);
733 if (final_phase == 0xFF)
734 return -EINVAL;
735
736 err = sd_change_phase(host, final_phase, 0);
737 if (err)
738 return err;
739 } else {
740 return -EINVAL;
741 }
742
743 return 0;
744}
745
746static int sdmmc_get_ro(struct mmc_host *mmc)
747{
748 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
749 struct rtsx_ucr *ucr = host->ucr;
750 int err;
751 u16 val;
752
753 if (host->host_removal)
754 return -ENOMEDIUM;
755
756 mutex_lock(&ucr->dev_mutex);
757
758 /* Check SD card detect */
759 err = rtsx_usb_get_card_status(ucr, &val);
760
761 mutex_unlock(&ucr->dev_mutex);
762
763
764 /* Treat failed detection as non-ro */
765 if (err)
766 return 0;
767
768 if (val & SD_WP)
769 return 1;
770
771 return 0;
772}
773
774static int sdmmc_get_cd(struct mmc_host *mmc)
775{
776 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
777 struct rtsx_ucr *ucr = host->ucr;
778 int err;
779 u16 val;
780
781 if (host->host_removal)
782 return -ENOMEDIUM;
783
784 mutex_lock(&ucr->dev_mutex);
785
786 /* Check SD card detect */
787 err = rtsx_usb_get_card_status(ucr, &val);
788
789 mutex_unlock(&ucr->dev_mutex);
790
791 /* Treat failed detection as non-exist */
792 if (err)
793 goto no_card;
794
795 if (val & SD_CD) {
796 host->card_exist = true;
797 return 1;
798 }
799
800no_card:
801 host->card_exist = false;
802 return 0;
803}
804
805static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
806{
807 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
808 struct rtsx_ucr *ucr = host->ucr;
809 struct mmc_command *cmd = mrq->cmd;
810 struct mmc_data *data = mrq->data;
811 unsigned int data_size = 0;
812
813 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
814
815 if (host->host_removal) {
816 cmd->error = -ENOMEDIUM;
817 goto finish;
818 }
819
820 if ((!host->card_exist)) {
821 cmd->error = -ENOMEDIUM;
822 goto finish_detect_card;
823 }
824
825 mutex_lock(&ucr->dev_mutex);
826
827 mutex_lock(&host->host_mutex);
828 host->mrq = mrq;
829 mutex_unlock(&host->host_mutex);
830
831 if (mrq->data)
832 data_size = data->blocks * data->blksz;
833
834 if (!data_size) {
835 sd_send_cmd_get_rsp(host, cmd);
836 } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
837 mmc_op_multi(cmd->opcode)) {
838 sd_send_cmd_get_rsp(host, cmd);
839
840 if (!cmd->error) {
841 sd_rw_multi(host, mrq);
842
843 if (mmc_op_multi(cmd->opcode) && mrq->stop) {
844 sd_send_cmd_get_rsp(host, mrq->stop);
845 rtsx_usb_write_register(ucr, MC_FIFO_CTL,
846 FIFO_FLUSH, FIFO_FLUSH);
847 }
848 }
849 } else {
850 sd_normal_rw(host, mrq);
851 }
852
853 if (mrq->data) {
854 if (cmd->error || data->error)
855 data->bytes_xfered = 0;
856 else
857 data->bytes_xfered = data->blocks * data->blksz;
858 }
859
860 mutex_unlock(&ucr->dev_mutex);
861
862finish_detect_card:
863 if (cmd->error) {
864 /*
865 * detect card when fail to update card existence state and
866 * speed up card removal when retry
867 */
868 sdmmc_get_cd(mmc);
869 dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
870 }
871
872finish:
873 mutex_lock(&host->host_mutex);
874 host->mrq = NULL;
875 mutex_unlock(&host->host_mutex);
876
877 mmc_request_done(mmc, mrq);
878}
879
880static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
881 unsigned char bus_width)
882{
883 int err = 0;
884 static const u8 width[] = {
885 [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
886 [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
887 [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
888 };
889
890 if (bus_width <= MMC_BUS_WIDTH_8)
891 err = rtsx_usb_write_register(host->ucr, SD_CFG1,
892 0x03, width[bus_width]);
893
894 return err;
895}
896
897static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
898{
899 rtsx_usb_init_cmd(ucr);
900
901 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
902 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
903 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
904 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
905 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
906 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
907
908 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
909}
910
911static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
912{
913 rtsx_usb_init_cmd(ucr);
914
915 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
916 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
917 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
918 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
919 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
920 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
921
922 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
923}
924
925static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
926{
927 rtsx_usb_init_cmd(ucr);
928
929 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
930 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
931 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
932 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
933 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
934 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
935
936 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
937}
938
939static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
940{
941 rtsx_usb_init_cmd(ucr);
942
943 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
944 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
945 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
946 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
947 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
948 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
949
950 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
951}
952
953static int sd_power_on(struct rtsx_usb_sdmmc *host)
954{
955 struct rtsx_ucr *ucr = host->ucr;
956 int err;
957
958 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
959 rtsx_usb_init_cmd(ucr);
960 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
961 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
962 CARD_SHARE_MASK, CARD_SHARE_SD);
963 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
964 SD_CLK_EN, SD_CLK_EN);
965 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
966 if (err)
967 return err;
968
969 if (CHECK_PKG(ucr, LQFP48))
970 err = sd_pull_ctl_enable_lqfp48(ucr);
971 else
972 err = sd_pull_ctl_enable_qfn24(ucr);
973 if (err)
974 return err;
975
976 err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
977 POWER_MASK, PARTIAL_POWER_ON);
978 if (err)
979 return err;
980
981 usleep_range(800, 1000);
982
983 rtsx_usb_init_cmd(ucr);
984 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
985 POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON);
986 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
987 SD_OUTPUT_EN, SD_OUTPUT_EN);
988
989 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
990}
991
992static int sd_power_off(struct rtsx_usb_sdmmc *host)
993{
994 struct rtsx_ucr *ucr = host->ucr;
995 int err;
996
997 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
998 rtsx_usb_init_cmd(ucr);
999
1000 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
1001 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
1002 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1003 POWER_MASK, POWER_OFF);
1004 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1005 POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
1006
1007 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1008 if (err)
1009 return err;
1010
1011 if (CHECK_PKG(ucr, LQFP48))
1012 return sd_pull_ctl_disable_lqfp48(ucr);
1013 return sd_pull_ctl_disable_qfn24(ucr);
1014}
1015
1016static int sd_set_power_mode(struct rtsx_usb_sdmmc *host,
1017 unsigned char power_mode)
1018{
1019 int err;
1020
1021 if (power_mode != MMC_POWER_OFF)
1022 power_mode = MMC_POWER_ON;
1023
1024 if (power_mode == host->power_mode)
1025 return 0;
1026
1027 if (power_mode == MMC_POWER_OFF) {
1028 err = sd_power_off(host);
1029 pm_runtime_put_noidle(sdmmc_dev(host));
1030 } else {
1031 pm_runtime_get_noresume(sdmmc_dev(host));
1032 err = sd_power_on(host);
1033 }
1034
1035 if (!err)
1036 host->power_mode = power_mode;
1037
1038 return err;
1039}
1040
1041static int sd_set_timing(struct rtsx_usb_sdmmc *host,
1042 unsigned char timing, bool *ddr_mode)
1043{
1044 struct rtsx_ucr *ucr = host->ucr;
1045
1046 *ddr_mode = false;
1047
1048 rtsx_usb_init_cmd(ucr);
1049
1050 switch (timing) {
1051 case MMC_TIMING_UHS_SDR104:
1052 case MMC_TIMING_UHS_SDR50:
1053 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1054 0x0C | SD_ASYNC_FIFO_RST,
1055 SD_30_MODE | SD_ASYNC_FIFO_RST);
1056 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1057 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1058 break;
1059
1060 case MMC_TIMING_UHS_DDR50:
1061 *ddr_mode = true;
1062
1063 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1064 0x0C | SD_ASYNC_FIFO_RST,
1065 SD_DDR_MODE | SD_ASYNC_FIFO_RST);
1066 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1067 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1068 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1069 DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
1070 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1071 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
1072 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
1073 break;
1074
1075 case MMC_TIMING_MMC_HS:
1076 case MMC_TIMING_SD_HS:
1077 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1078 0x0C, SD_20_MODE);
1079 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1080 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1081 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1082 SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
1083 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1084 SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
1085 break;
1086
1087 default:
1088 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1089 SD_CFG1, 0x0C, SD_20_MODE);
1090 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1091 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1092 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1093 SD_PUSH_POINT_CTL, 0xFF, 0);
1094 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1095 SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
1096 break;
1097 }
1098
1099 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
1100}
1101
1102static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1103{
1104 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1105 struct rtsx_ucr *ucr = host->ucr;
1106
1107 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1108 mutex_lock(&ucr->dev_mutex);
1109
1110 sd_set_power_mode(host, ios->power_mode);
1111 sd_set_bus_width(host, ios->bus_width);
1112 sd_set_timing(host, ios->timing, &host->ddr_mode);
1113
1114 host->vpclk = false;
1115 host->double_clk = true;
1116
1117 switch (ios->timing) {
1118 case MMC_TIMING_UHS_SDR104:
1119 case MMC_TIMING_UHS_SDR50:
1120 host->ssc_depth = SSC_DEPTH_2M;
1121 host->vpclk = true;
1122 host->double_clk = false;
1123 break;
1124 case MMC_TIMING_UHS_DDR50:
1125 case MMC_TIMING_UHS_SDR25:
1126 host->ssc_depth = SSC_DEPTH_1M;
1127 break;
1128 default:
1129 host->ssc_depth = SSC_DEPTH_512K;
1130 break;
1131 }
1132
1133 host->initial_mode = (ios->clock <= 1000000) ? true : false;
1134 host->clock = ios->clock;
1135
1136 rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
1137 host->initial_mode, host->double_clk, host->vpclk);
1138
1139 mutex_unlock(&ucr->dev_mutex);
1140 dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
1141}
1142
1143static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
1144{
1145 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1146 struct rtsx_ucr *ucr = host->ucr;
1147 int err = 0;
1148
1149 dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
1150 __func__, ios->signal_voltage);
1151
1152 if (host->host_removal)
1153 return -ENOMEDIUM;
1154
1155 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
1156 return -EPERM;
1157
1158 mutex_lock(&ucr->dev_mutex);
1159
1160 err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
1161 if (err) {
1162 mutex_unlock(&ucr->dev_mutex);
1163 return err;
1164 }
1165
1166 /* Let mmc core do the busy checking, simply stop the forced-toggle
1167 * clock(while issuing CMD11) and switch voltage.
1168 */
1169 rtsx_usb_init_cmd(ucr);
1170
1171 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
1172 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1173 SD_IO_USING_1V8, SD_IO_USING_3V3);
1174 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1175 TUNE_SD18_MASK, TUNE_SD18_3V3);
1176 } else {
1177 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
1178 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1179 SD_CLK_FORCE_STOP);
1180 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1181 SD_IO_USING_1V8, SD_IO_USING_1V8);
1182 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1183 TUNE_SD18_MASK, TUNE_SD18_1V8);
1184 }
1185
1186 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1187 mutex_unlock(&ucr->dev_mutex);
1188
1189 return err;
1190}
1191
1192static int sdmmc_card_busy(struct mmc_host *mmc)
1193{
1194 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1195 struct rtsx_ucr *ucr = host->ucr;
1196 int err;
1197 u8 stat;
1198 u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
1199 | SD_DAT0_STATUS;
1200
1201 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1202
1203 mutex_lock(&ucr->dev_mutex);
1204
1205 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1206 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1207 SD_CLK_TOGGLE_EN);
1208 if (err)
1209 goto out;
1210
1211 mdelay(1);
1212
1213 err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
1214 if (err)
1215 goto out;
1216
1217 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1218 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
1219out:
1220 mutex_unlock(&ucr->dev_mutex);
1221
1222 if (err)
1223 return err;
1224
1225 /* check if any pin between dat[0:3] is low */
1226 if ((stat & mask) != mask)
1227 return 1;
1228 else
1229 return 0;
1230}
1231
1232static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
1233{
1234 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1235 struct rtsx_ucr *ucr = host->ucr;
1236 int err = 0;
1237
1238 if (host->host_removal)
1239 return -ENOMEDIUM;
1240
1241 mutex_lock(&ucr->dev_mutex);
1242
1243 if (!host->ddr_mode)
1244 err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
1245
1246 mutex_unlock(&ucr->dev_mutex);
1247
1248 return err;
1249}
1250
1251static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
1252 .request = sdmmc_request,
1253 .set_ios = sdmmc_set_ios,
1254 .get_ro = sdmmc_get_ro,
1255 .get_cd = sdmmc_get_cd,
1256 .start_signal_voltage_switch = sdmmc_switch_voltage,
1257 .card_busy = sdmmc_card_busy,
1258 .execute_tuning = sdmmc_execute_tuning,
1259};
1260
1261#ifdef RTSX_USB_USE_LEDS_CLASS
1262static void rtsx_usb_led_control(struct led_classdev *led,
1263 enum led_brightness brightness)
1264{
1265 struct rtsx_usb_sdmmc *host = container_of(led,
1266 struct rtsx_usb_sdmmc, led);
1267
1268 if (host->host_removal)
1269 return;
1270
1271 host->led.brightness = brightness;
1272 schedule_work(&host->led_work);
1273}
1274
1275static void rtsx_usb_update_led(struct work_struct *work)
1276{
1277 struct rtsx_usb_sdmmc *host =
1278 container_of(work, struct rtsx_usb_sdmmc, led_work);
1279 struct rtsx_ucr *ucr = host->ucr;
1280
1281 pm_runtime_get_noresume(sdmmc_dev(host));
1282 mutex_lock(&ucr->dev_mutex);
1283
1284 if (host->power_mode == MMC_POWER_OFF)
1285 goto out;
1286
1287 if (host->led.brightness == LED_OFF)
1288 rtsx_usb_turn_off_led(ucr);
1289 else
1290 rtsx_usb_turn_on_led(ucr);
1291
1292out:
1293 mutex_unlock(&ucr->dev_mutex);
1294 pm_runtime_put_sync_suspend(sdmmc_dev(host));
1295}
1296#endif
1297
1298static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
1299{
1300 struct mmc_host *mmc = host->mmc;
1301
1302 mmc->f_min = 250000;
1303 mmc->f_max = 208000000;
1304 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
1305 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
1306 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
1307 MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
1308 MMC_CAP_SYNC_RUNTIME_PM;
1309 mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE |
1310 MMC_CAP2_NO_SDIO;
1311
1312 mmc->max_current_330 = 400;
1313 mmc->max_current_180 = 800;
1314 mmc->ops = &rtsx_usb_sdmmc_ops;
1315 mmc->max_segs = 256;
1316 mmc->max_seg_size = 65536;
1317 mmc->max_blk_size = 512;
1318 mmc->max_blk_count = 65535;
1319 mmc->max_req_size = 524288;
1320
1321 host->power_mode = MMC_POWER_OFF;
1322}
1323
1324static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
1325{
1326 struct mmc_host *mmc;
1327 struct rtsx_usb_sdmmc *host;
1328 struct rtsx_ucr *ucr;
1329#ifdef RTSX_USB_USE_LEDS_CLASS
1330 int err;
1331#endif
1332 int ret;
1333
1334 ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
1335 if (!ucr)
1336 return -ENXIO;
1337
1338 dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
1339
1340 mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);
1341 if (!mmc)
1342 return -ENOMEM;
1343
1344 host = mmc_priv(mmc);
1345 host->ucr = ucr;
1346 host->mmc = mmc;
1347 host->pdev = pdev;
1348 platform_set_drvdata(pdev, host);
1349
1350 mutex_init(&host->host_mutex);
1351 rtsx_usb_init_host(host);
1352 pm_runtime_enable(&pdev->dev);
1353
1354#ifdef RTSX_USB_USE_LEDS_CLASS
1355 snprintf(host->led_name, sizeof(host->led_name),
1356 "%s::", mmc_hostname(mmc));
1357 host->led.name = host->led_name;
1358 host->led.brightness = LED_OFF;
1359 host->led.default_trigger = mmc_hostname(mmc);
1360 host->led.brightness_set = rtsx_usb_led_control;
1361
1362 err = led_classdev_register(mmc_dev(mmc), &host->led);
1363 if (err)
1364 dev_err(&(pdev->dev),
1365 "Failed to register LED device: %d\n", err);
1366 INIT_WORK(&host->led_work, rtsx_usb_update_led);
1367
1368#endif
1369 ret = mmc_add_host(mmc);
1370 if (ret) {
1371#ifdef RTSX_USB_USE_LEDS_CLASS
1372 led_classdev_unregister(&host->led);
1373#endif
1374 mmc_free_host(mmc);
1375 pm_runtime_disable(&pdev->dev);
1376 return ret;
1377 }
1378
1379 return 0;
1380}
1381
1382static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
1383{
1384 struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
1385 struct mmc_host *mmc;
1386
1387 if (!host)
1388 return 0;
1389
1390 mmc = host->mmc;
1391 host->host_removal = true;
1392
1393 mutex_lock(&host->host_mutex);
1394 if (host->mrq) {
1395 dev_dbg(&(pdev->dev),
1396 "%s: Controller removed during transfer\n",
1397 mmc_hostname(mmc));
1398 host->mrq->cmd->error = -ENOMEDIUM;
1399 if (host->mrq->stop)
1400 host->mrq->stop->error = -ENOMEDIUM;
1401 mmc_request_done(mmc, host->mrq);
1402 }
1403 mutex_unlock(&host->host_mutex);
1404
1405 mmc_remove_host(mmc);
1406
1407#ifdef RTSX_USB_USE_LEDS_CLASS
1408 cancel_work_sync(&host->led_work);
1409 led_classdev_unregister(&host->led);
1410#endif
1411
1412 mmc_free_host(mmc);
1413 pm_runtime_disable(&pdev->dev);
1414 platform_set_drvdata(pdev, NULL);
1415
1416 dev_dbg(&(pdev->dev),
1417 ": Realtek USB SD/MMC module has been removed\n");
1418
1419 return 0;
1420}
1421
1422#ifdef CONFIG_PM
1423static int rtsx_usb_sdmmc_runtime_suspend(struct device *dev)
1424{
1425 struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
1426
1427 host->mmc->caps &= ~MMC_CAP_NEEDS_POLL;
1428 return 0;
1429}
1430
1431static int rtsx_usb_sdmmc_runtime_resume(struct device *dev)
1432{
1433 struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
1434
1435 host->mmc->caps |= MMC_CAP_NEEDS_POLL;
1436 if (sdmmc_get_cd(host->mmc) == 1)
1437 mmc_detect_change(host->mmc, 0);
1438 return 0;
1439}
1440#endif
1441
1442static const struct dev_pm_ops rtsx_usb_sdmmc_dev_pm_ops = {
1443 SET_RUNTIME_PM_OPS(rtsx_usb_sdmmc_runtime_suspend,
1444 rtsx_usb_sdmmc_runtime_resume, NULL)
1445};
1446
1447static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
1448 {
1449 .name = "rtsx_usb_sdmmc",
1450 }, {
1451 /* sentinel */
1452 }
1453};
1454MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
1455
1456static struct platform_driver rtsx_usb_sdmmc_driver = {
1457 .probe = rtsx_usb_sdmmc_drv_probe,
1458 .remove = rtsx_usb_sdmmc_drv_remove,
1459 .id_table = rtsx_usb_sdmmc_ids,
1460 .driver = {
1461 .name = "rtsx_usb_sdmmc",
1462 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1463 .pm = &rtsx_usb_sdmmc_dev_pm_ops,
1464 },
1465};
1466module_platform_driver(rtsx_usb_sdmmc_driver);
1467
1468MODULE_LICENSE("GPL v2");
1469MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
1470MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");
1/* Realtek USB SD/MMC Card Interface driver
2 *
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, see <http://www.gnu.org/licenses/>.
16 *
17 * Author:
18 * Roger Tseng <rogerable@realtek.com>
19 */
20
21#include <linux/module.h>
22#include <linux/slab.h>
23#include <linux/delay.h>
24#include <linux/platform_device.h>
25#include <linux/usb.h>
26#include <linux/mmc/host.h>
27#include <linux/mmc/mmc.h>
28#include <linux/mmc/sd.h>
29#include <linux/mmc/sdio.h>
30#include <linux/mmc/card.h>
31#include <linux/scatterlist.h>
32#include <linux/pm_runtime.h>
33
34#include <linux/mfd/rtsx_usb.h>
35#include <asm/unaligned.h>
36
37#if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
38 defined(CONFIG_MMC_REALTEK_USB_MODULE))
39#include <linux/leds.h>
40#include <linux/workqueue.h>
41#define RTSX_USB_USE_LEDS_CLASS
42#endif
43
44struct rtsx_usb_sdmmc {
45 struct platform_device *pdev;
46 struct rtsx_ucr *ucr;
47 struct mmc_host *mmc;
48 struct mmc_request *mrq;
49
50 struct mutex host_mutex;
51
52 u8 ssc_depth;
53 unsigned int clock;
54 bool vpclk;
55 bool double_clk;
56 bool host_removal;
57 bool card_exist;
58 bool initial_mode;
59 bool ddr_mode;
60
61 unsigned char power_mode;
62
63#ifdef RTSX_USB_USE_LEDS_CLASS
64 struct led_classdev led;
65 char led_name[32];
66 struct work_struct led_work;
67#endif
68};
69
70static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
71{
72 return &(host->pdev->dev);
73}
74
75static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
76{
77 struct rtsx_ucr *ucr = host->ucr;
78 rtsx_usb_ep0_write_register(ucr, CARD_STOP,
79 SD_STOP | SD_CLR_ERR,
80 SD_STOP | SD_CLR_ERR);
81
82 rtsx_usb_clear_dma_err(ucr);
83 rtsx_usb_clear_fsm_err(ucr);
84}
85
86#ifdef DEBUG
87static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
88{
89 struct rtsx_ucr *ucr = host->ucr;
90 u8 val = 0;
91
92 rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
93 dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
94 rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
95 dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
96 rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
97 dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
98}
99#else
100#define sd_print_debug_regs(host)
101#endif /* DEBUG */
102
103static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
104 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
105{
106 struct rtsx_ucr *ucr = host->ucr;
107 int err;
108 u8 trans_mode;
109
110 if (!buf)
111 buf_len = 0;
112
113 rtsx_usb_init_cmd(ucr);
114 if (cmd != NULL) {
115 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
116 , cmd->opcode);
117 if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
118 trans_mode = SD_TM_AUTO_TUNING;
119 else
120 trans_mode = SD_TM_NORMAL_READ;
121
122 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
123 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
124 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
125 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
126 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
127 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
128 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
129 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
130 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
131 SD_CMD4, 0xFF, (u8)cmd->arg);
132 } else {
133 trans_mode = SD_TM_AUTO_READ_3;
134 }
135
136 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
137 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
138 0xFF, (u8)(byte_cnt >> 8));
139 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
140 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
141
142 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
143 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
144 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
145 if (trans_mode != SD_TM_AUTO_TUNING)
146 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
147 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
148
149 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
150 0xFF, trans_mode | SD_TRANSFER_START);
151 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
152 SD_TRANSFER_END, SD_TRANSFER_END);
153
154 if (cmd != NULL) {
155 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
156 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
157 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
158 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
159 }
160
161 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
162 if (err) {
163 dev_dbg(sdmmc_dev(host),
164 "rtsx_usb_send_cmd failed (err = %d)\n", err);
165 return err;
166 }
167
168 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
169 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
170 sd_print_debug_regs(host);
171
172 if (!err) {
173 dev_dbg(sdmmc_dev(host),
174 "Transfer failed (SD_TRANSFER = %02x)\n",
175 ucr->rsp_buf[0]);
176 err = -EIO;
177 } else {
178 dev_dbg(sdmmc_dev(host),
179 "rtsx_usb_get_rsp failed (err = %d)\n", err);
180 }
181
182 return err;
183 }
184
185 if (cmd != NULL) {
186 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
187 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
188 cmd->resp[0]);
189 }
190
191 if (buf && buf_len) {
192 /* 2-byte aligned part */
193 err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
194 if (err) {
195 dev_dbg(sdmmc_dev(host),
196 "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
197 return err;
198 }
199
200 /* unaligned byte */
201 if (byte_cnt % 2)
202 return rtsx_usb_read_register(ucr,
203 PPBUF_BASE2 + byte_cnt,
204 buf + byte_cnt - 1);
205 }
206
207 return 0;
208}
209
210static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
211 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
212{
213 struct rtsx_ucr *ucr = host->ucr;
214 int err;
215 u8 trans_mode;
216
217 if (!buf)
218 buf_len = 0;
219
220 if (buf && buf_len) {
221 err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
222 if (err) {
223 dev_dbg(sdmmc_dev(host),
224 "rtsx_usb_write_ppbuf failed (err = %d)\n",
225 err);
226 return err;
227 }
228 }
229
230 trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
231 rtsx_usb_init_cmd(ucr);
232
233 if (cmd != NULL) {
234 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
235 cmd->opcode);
236 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
237 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
238 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
239 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
240 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
241 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
242 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
243 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
244 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
245 SD_CMD4, 0xFF, (u8)cmd->arg);
246 }
247
248 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
249 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
250 0xFF, (u8)(byte_cnt >> 8));
251 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
252 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
253
254 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
255 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
256 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
257 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
258 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
259
260 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
261 trans_mode | SD_TRANSFER_START);
262 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
263 SD_TRANSFER_END, SD_TRANSFER_END);
264
265 if (cmd != NULL) {
266 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
267 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
268 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
269 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
270 }
271
272 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
273 if (err) {
274 dev_dbg(sdmmc_dev(host),
275 "rtsx_usb_send_cmd failed (err = %d)\n", err);
276 return err;
277 }
278
279 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
280 if (err) {
281 sd_print_debug_regs(host);
282 dev_dbg(sdmmc_dev(host),
283 "rtsx_usb_get_rsp failed (err = %d)\n", err);
284 return err;
285 }
286
287 if (cmd != NULL) {
288 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
289 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
290 cmd->resp[0]);
291 }
292
293 return 0;
294}
295
296static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
297 struct mmc_command *cmd)
298{
299 struct rtsx_ucr *ucr = host->ucr;
300 u8 cmd_idx = (u8)cmd->opcode;
301 u32 arg = cmd->arg;
302 int err = 0;
303 int timeout = 100;
304 int i;
305 u8 *ptr;
306 int stat_idx = 0;
307 int len = 2;
308 u8 rsp_type;
309
310 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
311 __func__, cmd_idx, arg);
312
313 /* Response type:
314 * R0
315 * R1, R5, R6, R7
316 * R1b
317 * R2
318 * R3, R4
319 */
320 switch (mmc_resp_type(cmd)) {
321 case MMC_RSP_NONE:
322 rsp_type = SD_RSP_TYPE_R0;
323 break;
324 case MMC_RSP_R1:
325 rsp_type = SD_RSP_TYPE_R1;
326 break;
327 case MMC_RSP_R1 & ~MMC_RSP_CRC:
328 rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
329 break;
330 case MMC_RSP_R1B:
331 rsp_type = SD_RSP_TYPE_R1b;
332 break;
333 case MMC_RSP_R2:
334 rsp_type = SD_RSP_TYPE_R2;
335 break;
336 case MMC_RSP_R3:
337 rsp_type = SD_RSP_TYPE_R3;
338 break;
339 default:
340 dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
341 err = -EINVAL;
342 goto out;
343 }
344
345 if (rsp_type == SD_RSP_TYPE_R1b)
346 timeout = 3000;
347
348 if (cmd->opcode == SD_SWITCH_VOLTAGE) {
349 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
350 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
351 SD_CLK_TOGGLE_EN);
352 if (err)
353 goto out;
354 }
355
356 rtsx_usb_init_cmd(ucr);
357
358 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
359 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
360 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
361 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
362 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
363
364 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
365 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
366 0x01, PINGPONG_BUFFER);
367 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
368 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
369 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
370 SD_TRANSFER_END | SD_STAT_IDLE,
371 SD_TRANSFER_END | SD_STAT_IDLE);
372
373 if (rsp_type == SD_RSP_TYPE_R2) {
374 /* Read data from ping-pong buffer */
375 for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
376 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
377 stat_idx = 16;
378 } else if (rsp_type != SD_RSP_TYPE_R0) {
379 /* Read data from SD_CMDx registers */
380 for (i = SD_CMD0; i <= SD_CMD4; i++)
381 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
382 stat_idx = 5;
383 }
384 len += stat_idx;
385
386 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
387
388 err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
389 if (err) {
390 dev_dbg(sdmmc_dev(host),
391 "rtsx_usb_send_cmd error (err = %d)\n", err);
392 goto out;
393 }
394
395 err = rtsx_usb_get_rsp(ucr, len, timeout);
396 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
397 sd_print_debug_regs(host);
398 sd_clear_error(host);
399
400 if (!err) {
401 dev_dbg(sdmmc_dev(host),
402 "Transfer failed (SD_TRANSFER = %02x)\n",
403 ucr->rsp_buf[0]);
404 err = -EIO;
405 } else {
406 dev_dbg(sdmmc_dev(host),
407 "rtsx_usb_get_rsp failed (err = %d)\n", err);
408 }
409
410 goto out;
411 }
412
413 if (rsp_type == SD_RSP_TYPE_R0) {
414 err = 0;
415 goto out;
416 }
417
418 /* Skip result of CHECK_REG_CMD */
419 ptr = ucr->rsp_buf + 1;
420
421 /* Check (Start,Transmission) bit of Response */
422 if ((ptr[0] & 0xC0) != 0) {
423 err = -EILSEQ;
424 dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
425 goto out;
426 }
427
428 /* Check CRC7 */
429 if (!(rsp_type & SD_NO_CHECK_CRC7)) {
430 if (ptr[stat_idx] & SD_CRC7_ERR) {
431 err = -EILSEQ;
432 dev_dbg(sdmmc_dev(host), "CRC7 error\n");
433 goto out;
434 }
435 }
436
437 if (rsp_type == SD_RSP_TYPE_R2) {
438 /*
439 * The controller offloads the last byte {CRC-7, end bit 1'b1}
440 * of response type R2. Assign dummy CRC, 0, and end bit to the
441 * byte(ptr[16], goes into the LSB of resp[3] later).
442 */
443 ptr[16] = 1;
444
445 for (i = 0; i < 4; i++) {
446 cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
447 dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
448 i, cmd->resp[i]);
449 }
450 } else {
451 cmd->resp[0] = get_unaligned_be32(ptr + 1);
452 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
453 cmd->resp[0]);
454 }
455
456out:
457 cmd->error = err;
458}
459
460static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
461{
462 struct rtsx_ucr *ucr = host->ucr;
463 struct mmc_data *data = mrq->data;
464 int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
465 u8 cfg2, trans_mode;
466 int err;
467 u8 flag;
468 size_t data_len = data->blksz * data->blocks;
469 unsigned int pipe;
470
471 if (read) {
472 dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
473 __func__, data_len);
474 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
475 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
476 trans_mode = SD_TM_AUTO_READ_3;
477 } else {
478 dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
479 __func__, data_len);
480 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
481 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
482 trans_mode = SD_TM_AUTO_WRITE_3;
483 }
484
485 rtsx_usb_init_cmd(ucr);
486
487 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
488 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
489 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
490 0xFF, (u8)data->blocks);
491 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
492 0xFF, (u8)(data->blocks >> 8));
493
494 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
495 0x01, RING_BUFFER);
496
497 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
498 0xFF, (u8)(data_len >> 24));
499 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
500 0xFF, (u8)(data_len >> 16));
501 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
502 0xFF, (u8)(data_len >> 8));
503 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
504 0xFF, (u8)data_len);
505 if (read) {
506 flag = MODE_CDIR;
507 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
508 0x03 | DMA_PACK_SIZE_MASK,
509 DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
510 } else {
511 flag = MODE_CDOR;
512 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
513 0x03 | DMA_PACK_SIZE_MASK,
514 DMA_DIR_TO_CARD | DMA_EN | DMA_512);
515 }
516
517 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
518 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
519 trans_mode | SD_TRANSFER_START);
520 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
521 SD_TRANSFER_END, SD_TRANSFER_END);
522
523 err = rtsx_usb_send_cmd(ucr, flag, 100);
524 if (err)
525 return err;
526
527 if (read)
528 pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
529 else
530 pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
531
532 err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
533 data->sg_len, NULL, 10000);
534 if (err) {
535 dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
536 , err);
537 sd_clear_error(host);
538 return err;
539 }
540
541 return rtsx_usb_get_rsp(ucr, 1, 2000);
542}
543
544static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
545{
546 rtsx_usb_write_register(host->ucr, SD_CFG1,
547 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
548}
549
550static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
551{
552 rtsx_usb_write_register(host->ucr, SD_CFG1,
553 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
554}
555
556static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
557 struct mmc_request *mrq)
558{
559 struct mmc_command *cmd = mrq->cmd;
560 struct mmc_data *data = mrq->data;
561 u8 *buf;
562
563 buf = kzalloc(data->blksz, GFP_NOIO);
564 if (!buf) {
565 cmd->error = -ENOMEM;
566 return;
567 }
568
569 if (data->flags & MMC_DATA_READ) {
570 if (host->initial_mode)
571 sd_disable_initial_mode(host);
572
573 cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
574 data->blksz, 200);
575
576 if (host->initial_mode)
577 sd_enable_initial_mode(host);
578
579 sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
580 } else {
581 sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
582
583 cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
584 data->blksz, 200);
585 }
586
587 kfree(buf);
588}
589
590static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
591{
592 struct rtsx_ucr *ucr = host->ucr;
593 int err;
594
595 dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
596 __func__, tx ? "TX" : "RX", sample_point);
597
598 rtsx_usb_init_cmd(ucr);
599
600 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
601
602 if (tx)
603 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
604 0x0F, sample_point);
605 else
606 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
607 0x0F, sample_point);
608
609 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
610 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
611 PHASE_NOT_RESET, PHASE_NOT_RESET);
612 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
613 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
614
615 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
616 if (err)
617 return err;
618
619 return 0;
620}
621
622static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
623{
624 idx &= MAX_PHASE;
625 return phase_map & (1 << idx);
626}
627
628static int get_phase_len(u32 phase_map, unsigned int idx)
629{
630 int i;
631
632 for (i = 0; i < MAX_PHASE + 1; i++) {
633 if (get_phase_point(phase_map, idx + i) == 0)
634 return i;
635 }
636 return MAX_PHASE + 1;
637}
638
639static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
640{
641 int start = 0, len = 0;
642 int start_final = 0, len_final = 0;
643 u8 final_phase = 0xFF;
644
645 if (phase_map == 0) {
646 dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
647 return final_phase;
648 }
649
650 while (start < MAX_PHASE + 1) {
651 len = get_phase_len(phase_map, start);
652 if (len_final < len) {
653 start_final = start;
654 len_final = len;
655 }
656 start += len ? len : 1;
657 }
658
659 final_phase = (start_final + len_final / 2) & MAX_PHASE;
660 dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
661 phase_map, len_final, final_phase);
662
663 return final_phase;
664}
665
666static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
667{
668 int err, i;
669 u8 val = 0;
670
671 for (i = 0; i < 100; i++) {
672 err = rtsx_usb_ep0_read_register(host->ucr,
673 SD_DATA_STATE, &val);
674 if (val & SD_DATA_IDLE)
675 return;
676
677 usleep_range(100, 1000);
678 }
679}
680
681static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
682 u8 opcode, u8 sample_point)
683{
684 int err;
685 struct mmc_command cmd = {0};
686
687 err = sd_change_phase(host, sample_point, 0);
688 if (err)
689 return err;
690
691 cmd.opcode = MMC_SEND_TUNING_BLOCK;
692 err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
693 if (err) {
694 /* Wait till SD DATA IDLE */
695 sd_wait_data_idle(host);
696 sd_clear_error(host);
697 return err;
698 }
699
700 return 0;
701}
702
703static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
704 u8 opcode, u16 *phase_map)
705{
706 int err, i;
707 u16 raw_phase_map = 0;
708
709 for (i = MAX_PHASE; i >= 0; i--) {
710 err = sd_tuning_rx_cmd(host, opcode, (u8)i);
711 if (!err)
712 raw_phase_map |= 1 << i;
713 }
714
715 if (phase_map)
716 *phase_map = raw_phase_map;
717}
718
719static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
720{
721 int err, i;
722 u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
723 u8 final_phase;
724
725 /* setting fixed default TX phase */
726 err = sd_change_phase(host, 0x01, 1);
727 if (err) {
728 dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
729 return err;
730 }
731
732 /* tuning RX phase */
733 for (i = 0; i < RX_TUNING_CNT; i++) {
734 sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
735
736 if (raw_phase_map[i] == 0)
737 break;
738 }
739
740 phase_map = 0xFFFF;
741 for (i = 0; i < RX_TUNING_CNT; i++) {
742 dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
743 i, raw_phase_map[i]);
744 phase_map &= raw_phase_map[i];
745 }
746 dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
747
748 if (phase_map) {
749 final_phase = sd_search_final_phase(host, phase_map);
750 if (final_phase == 0xFF)
751 return -EINVAL;
752
753 err = sd_change_phase(host, final_phase, 0);
754 if (err)
755 return err;
756 } else {
757 return -EINVAL;
758 }
759
760 return 0;
761}
762
763static int sdmmc_get_ro(struct mmc_host *mmc)
764{
765 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
766 struct rtsx_ucr *ucr = host->ucr;
767 int err;
768 u16 val;
769
770 if (host->host_removal)
771 return -ENOMEDIUM;
772
773 mutex_lock(&ucr->dev_mutex);
774
775 /* Check SD card detect */
776 err = rtsx_usb_get_card_status(ucr, &val);
777
778 mutex_unlock(&ucr->dev_mutex);
779
780
781 /* Treat failed detection as non-ro */
782 if (err)
783 return 0;
784
785 if (val & SD_WP)
786 return 1;
787
788 return 0;
789}
790
791static int sdmmc_get_cd(struct mmc_host *mmc)
792{
793 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
794 struct rtsx_ucr *ucr = host->ucr;
795 int err;
796 u16 val;
797
798 if (host->host_removal)
799 return -ENOMEDIUM;
800
801 mutex_lock(&ucr->dev_mutex);
802
803 /* Check SD card detect */
804 err = rtsx_usb_get_card_status(ucr, &val);
805
806 mutex_unlock(&ucr->dev_mutex);
807
808 /* Treat failed detection as non-exist */
809 if (err)
810 goto no_card;
811
812 if (val & SD_CD) {
813 host->card_exist = true;
814 return 1;
815 }
816
817no_card:
818 host->card_exist = false;
819 return 0;
820}
821
822static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
823{
824 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
825 struct rtsx_ucr *ucr = host->ucr;
826 struct mmc_command *cmd = mrq->cmd;
827 struct mmc_data *data = mrq->data;
828 unsigned int data_size = 0;
829
830 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
831
832 if (host->host_removal) {
833 cmd->error = -ENOMEDIUM;
834 goto finish;
835 }
836
837 if ((!host->card_exist)) {
838 cmd->error = -ENOMEDIUM;
839 goto finish_detect_card;
840 }
841
842 /*
843 * Reject SDIO CMDs to speed up card identification
844 * since unsupported
845 */
846 if (cmd->opcode == SD_IO_SEND_OP_COND ||
847 cmd->opcode == SD_IO_RW_DIRECT ||
848 cmd->opcode == SD_IO_RW_EXTENDED) {
849 cmd->error = -EINVAL;
850 goto finish;
851 }
852
853 mutex_lock(&ucr->dev_mutex);
854
855 mutex_lock(&host->host_mutex);
856 host->mrq = mrq;
857 mutex_unlock(&host->host_mutex);
858
859 if (mrq->data)
860 data_size = data->blocks * data->blksz;
861
862 if (!data_size) {
863 sd_send_cmd_get_rsp(host, cmd);
864 } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
865 mmc_op_multi(cmd->opcode)) {
866 sd_send_cmd_get_rsp(host, cmd);
867
868 if (!cmd->error) {
869 sd_rw_multi(host, mrq);
870
871 if (mmc_op_multi(cmd->opcode) && mrq->stop) {
872 sd_send_cmd_get_rsp(host, mrq->stop);
873 rtsx_usb_write_register(ucr, MC_FIFO_CTL,
874 FIFO_FLUSH, FIFO_FLUSH);
875 }
876 }
877 } else {
878 sd_normal_rw(host, mrq);
879 }
880
881 if (mrq->data) {
882 if (cmd->error || data->error)
883 data->bytes_xfered = 0;
884 else
885 data->bytes_xfered = data->blocks * data->blksz;
886 }
887
888 mutex_unlock(&ucr->dev_mutex);
889
890finish_detect_card:
891 if (cmd->error) {
892 /*
893 * detect card when fail to update card existence state and
894 * speed up card removal when retry
895 */
896 sdmmc_get_cd(mmc);
897 dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
898 }
899
900finish:
901 mutex_lock(&host->host_mutex);
902 host->mrq = NULL;
903 mutex_unlock(&host->host_mutex);
904
905 mmc_request_done(mmc, mrq);
906}
907
908static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
909 unsigned char bus_width)
910{
911 int err = 0;
912 u8 width[] = {
913 [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
914 [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
915 [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
916 };
917
918 if (bus_width <= MMC_BUS_WIDTH_8)
919 err = rtsx_usb_write_register(host->ucr, SD_CFG1,
920 0x03, width[bus_width]);
921
922 return err;
923}
924
925static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
926{
927 rtsx_usb_init_cmd(ucr);
928
929 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
930 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
931 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
932 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
933 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
934 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
935
936 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
937}
938
939static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
940{
941 rtsx_usb_init_cmd(ucr);
942
943 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
944 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
945 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
946 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
947 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
948 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
949
950 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
951}
952
953static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
954{
955 rtsx_usb_init_cmd(ucr);
956
957 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
958 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
959 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
960 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
961 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
962 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
963
964 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
965}
966
967static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
968{
969 rtsx_usb_init_cmd(ucr);
970
971 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
972 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
973 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
974 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
975 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
976 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
977
978 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
979}
980
981static int sd_power_on(struct rtsx_usb_sdmmc *host)
982{
983 struct rtsx_ucr *ucr = host->ucr;
984 int err;
985
986 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
987 rtsx_usb_init_cmd(ucr);
988 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
989 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
990 CARD_SHARE_MASK, CARD_SHARE_SD);
991 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
992 SD_CLK_EN, SD_CLK_EN);
993 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
994 if (err)
995 return err;
996
997 if (CHECK_PKG(ucr, LQFP48))
998 err = sd_pull_ctl_enable_lqfp48(ucr);
999 else
1000 err = sd_pull_ctl_enable_qfn24(ucr);
1001 if (err)
1002 return err;
1003
1004 err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
1005 POWER_MASK, PARTIAL_POWER_ON);
1006 if (err)
1007 return err;
1008
1009 usleep_range(800, 1000);
1010
1011 rtsx_usb_init_cmd(ucr);
1012 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1013 POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON);
1014 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
1015 SD_OUTPUT_EN, SD_OUTPUT_EN);
1016
1017 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
1018}
1019
1020static int sd_power_off(struct rtsx_usb_sdmmc *host)
1021{
1022 struct rtsx_ucr *ucr = host->ucr;
1023 int err;
1024
1025 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1026 rtsx_usb_init_cmd(ucr);
1027
1028 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
1029 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
1030 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1031 POWER_MASK, POWER_OFF);
1032 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1033 POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
1034
1035 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1036 if (err)
1037 return err;
1038
1039 if (CHECK_PKG(ucr, LQFP48))
1040 return sd_pull_ctl_disable_lqfp48(ucr);
1041 return sd_pull_ctl_disable_qfn24(ucr);
1042}
1043
1044static int sd_set_power_mode(struct rtsx_usb_sdmmc *host,
1045 unsigned char power_mode)
1046{
1047 int err;
1048
1049 if (power_mode != MMC_POWER_OFF)
1050 power_mode = MMC_POWER_ON;
1051
1052 if (power_mode == host->power_mode)
1053 return 0;
1054
1055 if (power_mode == MMC_POWER_OFF) {
1056 err = sd_power_off(host);
1057 pm_runtime_put(sdmmc_dev(host));
1058 } else {
1059 pm_runtime_get_sync(sdmmc_dev(host));
1060 err = sd_power_on(host);
1061 }
1062
1063 if (!err)
1064 host->power_mode = power_mode;
1065
1066 return err;
1067}
1068
1069static int sd_set_timing(struct rtsx_usb_sdmmc *host,
1070 unsigned char timing, bool *ddr_mode)
1071{
1072 struct rtsx_ucr *ucr = host->ucr;
1073 int err;
1074
1075 *ddr_mode = false;
1076
1077 rtsx_usb_init_cmd(ucr);
1078
1079 switch (timing) {
1080 case MMC_TIMING_UHS_SDR104:
1081 case MMC_TIMING_UHS_SDR50:
1082 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1083 0x0C | SD_ASYNC_FIFO_RST,
1084 SD_30_MODE | SD_ASYNC_FIFO_RST);
1085 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1086 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1087 break;
1088
1089 case MMC_TIMING_UHS_DDR50:
1090 *ddr_mode = true;
1091
1092 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1093 0x0C | SD_ASYNC_FIFO_RST,
1094 SD_DDR_MODE | SD_ASYNC_FIFO_RST);
1095 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1096 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1097 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1098 DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
1099 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1100 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
1101 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
1102 break;
1103
1104 case MMC_TIMING_MMC_HS:
1105 case MMC_TIMING_SD_HS:
1106 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1107 0x0C, SD_20_MODE);
1108 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1109 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1110 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1111 SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
1112 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1113 SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
1114 break;
1115
1116 default:
1117 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1118 SD_CFG1, 0x0C, SD_20_MODE);
1119 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1120 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1121 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1122 SD_PUSH_POINT_CTL, 0xFF, 0);
1123 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1124 SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
1125 break;
1126 }
1127
1128 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1129
1130 return err;
1131}
1132
1133static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1134{
1135 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1136 struct rtsx_ucr *ucr = host->ucr;
1137
1138 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1139 mutex_lock(&ucr->dev_mutex);
1140
1141 if (rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD)) {
1142 mutex_unlock(&ucr->dev_mutex);
1143 return;
1144 }
1145
1146 sd_set_power_mode(host, ios->power_mode);
1147 sd_set_bus_width(host, ios->bus_width);
1148 sd_set_timing(host, ios->timing, &host->ddr_mode);
1149
1150 host->vpclk = false;
1151 host->double_clk = true;
1152
1153 switch (ios->timing) {
1154 case MMC_TIMING_UHS_SDR104:
1155 case MMC_TIMING_UHS_SDR50:
1156 host->ssc_depth = SSC_DEPTH_2M;
1157 host->vpclk = true;
1158 host->double_clk = false;
1159 break;
1160 case MMC_TIMING_UHS_DDR50:
1161 case MMC_TIMING_UHS_SDR25:
1162 host->ssc_depth = SSC_DEPTH_1M;
1163 break;
1164 default:
1165 host->ssc_depth = SSC_DEPTH_512K;
1166 break;
1167 }
1168
1169 host->initial_mode = (ios->clock <= 1000000) ? true : false;
1170 host->clock = ios->clock;
1171
1172 rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
1173 host->initial_mode, host->double_clk, host->vpclk);
1174
1175 mutex_unlock(&ucr->dev_mutex);
1176 dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
1177}
1178
1179static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
1180{
1181 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1182 struct rtsx_ucr *ucr = host->ucr;
1183 int err = 0;
1184
1185 dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
1186 __func__, ios->signal_voltage);
1187
1188 if (host->host_removal)
1189 return -ENOMEDIUM;
1190
1191 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
1192 return -EPERM;
1193
1194 mutex_lock(&ucr->dev_mutex);
1195
1196 err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
1197 if (err) {
1198 mutex_unlock(&ucr->dev_mutex);
1199 return err;
1200 }
1201
1202 /* Let mmc core do the busy checking, simply stop the forced-toggle
1203 * clock(while issuing CMD11) and switch voltage.
1204 */
1205 rtsx_usb_init_cmd(ucr);
1206
1207 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
1208 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1209 SD_IO_USING_1V8, SD_IO_USING_3V3);
1210 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1211 TUNE_SD18_MASK, TUNE_SD18_3V3);
1212 } else {
1213 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
1214 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1215 SD_CLK_FORCE_STOP);
1216 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1217 SD_IO_USING_1V8, SD_IO_USING_1V8);
1218 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1219 TUNE_SD18_MASK, TUNE_SD18_1V8);
1220 }
1221
1222 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1223 mutex_unlock(&ucr->dev_mutex);
1224
1225 return err;
1226}
1227
1228static int sdmmc_card_busy(struct mmc_host *mmc)
1229{
1230 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1231 struct rtsx_ucr *ucr = host->ucr;
1232 int err;
1233 u8 stat;
1234 u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
1235 | SD_DAT0_STATUS;
1236
1237 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1238
1239 mutex_lock(&ucr->dev_mutex);
1240
1241 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1242 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1243 SD_CLK_TOGGLE_EN);
1244 if (err)
1245 goto out;
1246
1247 mdelay(1);
1248
1249 err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
1250 if (err)
1251 goto out;
1252
1253 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1254 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
1255out:
1256 mutex_unlock(&ucr->dev_mutex);
1257
1258 if (err)
1259 return err;
1260
1261 /* check if any pin between dat[0:3] is low */
1262 if ((stat & mask) != mask)
1263 return 1;
1264 else
1265 return 0;
1266}
1267
1268static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
1269{
1270 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1271 struct rtsx_ucr *ucr = host->ucr;
1272 int err = 0;
1273
1274 if (host->host_removal)
1275 return -ENOMEDIUM;
1276
1277 mutex_lock(&ucr->dev_mutex);
1278
1279 if (!host->ddr_mode)
1280 err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
1281
1282 mutex_unlock(&ucr->dev_mutex);
1283
1284 return err;
1285}
1286
1287static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
1288 .request = sdmmc_request,
1289 .set_ios = sdmmc_set_ios,
1290 .get_ro = sdmmc_get_ro,
1291 .get_cd = sdmmc_get_cd,
1292 .start_signal_voltage_switch = sdmmc_switch_voltage,
1293 .card_busy = sdmmc_card_busy,
1294 .execute_tuning = sdmmc_execute_tuning,
1295};
1296
1297#ifdef RTSX_USB_USE_LEDS_CLASS
1298static void rtsx_usb_led_control(struct led_classdev *led,
1299 enum led_brightness brightness)
1300{
1301 struct rtsx_usb_sdmmc *host = container_of(led,
1302 struct rtsx_usb_sdmmc, led);
1303
1304 if (host->host_removal)
1305 return;
1306
1307 host->led.brightness = brightness;
1308 schedule_work(&host->led_work);
1309}
1310
1311static void rtsx_usb_update_led(struct work_struct *work)
1312{
1313 struct rtsx_usb_sdmmc *host =
1314 container_of(work, struct rtsx_usb_sdmmc, led_work);
1315 struct rtsx_ucr *ucr = host->ucr;
1316
1317 mutex_lock(&ucr->dev_mutex);
1318
1319 if (host->led.brightness == LED_OFF)
1320 rtsx_usb_turn_off_led(ucr);
1321 else
1322 rtsx_usb_turn_on_led(ucr);
1323
1324 mutex_unlock(&ucr->dev_mutex);
1325}
1326#endif
1327
1328static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
1329{
1330 struct mmc_host *mmc = host->mmc;
1331
1332 mmc->f_min = 250000;
1333 mmc->f_max = 208000000;
1334 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
1335 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
1336 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
1337 MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
1338 MMC_CAP_NEEDS_POLL;
1339 mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE;
1340
1341 mmc->max_current_330 = 400;
1342 mmc->max_current_180 = 800;
1343 mmc->ops = &rtsx_usb_sdmmc_ops;
1344 mmc->max_segs = 256;
1345 mmc->max_seg_size = 65536;
1346 mmc->max_blk_size = 512;
1347 mmc->max_blk_count = 65535;
1348 mmc->max_req_size = 524288;
1349
1350 host->power_mode = MMC_POWER_OFF;
1351}
1352
1353static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
1354{
1355 struct mmc_host *mmc;
1356 struct rtsx_usb_sdmmc *host;
1357 struct rtsx_ucr *ucr;
1358#ifdef RTSX_USB_USE_LEDS_CLASS
1359 int err;
1360#endif
1361
1362 ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
1363 if (!ucr)
1364 return -ENXIO;
1365
1366 dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
1367
1368 mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);
1369 if (!mmc)
1370 return -ENOMEM;
1371
1372 host = mmc_priv(mmc);
1373 host->ucr = ucr;
1374 host->mmc = mmc;
1375 host->pdev = pdev;
1376 platform_set_drvdata(pdev, host);
1377
1378 mutex_init(&host->host_mutex);
1379 rtsx_usb_init_host(host);
1380 pm_runtime_enable(&pdev->dev);
1381
1382#ifdef RTSX_USB_USE_LEDS_CLASS
1383 snprintf(host->led_name, sizeof(host->led_name),
1384 "%s::", mmc_hostname(mmc));
1385 host->led.name = host->led_name;
1386 host->led.brightness = LED_OFF;
1387 host->led.default_trigger = mmc_hostname(mmc);
1388 host->led.brightness_set = rtsx_usb_led_control;
1389
1390 err = led_classdev_register(mmc_dev(mmc), &host->led);
1391 if (err)
1392 dev_err(&(pdev->dev),
1393 "Failed to register LED device: %d\n", err);
1394 INIT_WORK(&host->led_work, rtsx_usb_update_led);
1395
1396#endif
1397 mmc_add_host(mmc);
1398
1399 return 0;
1400}
1401
1402static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
1403{
1404 struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
1405 struct mmc_host *mmc;
1406
1407 if (!host)
1408 return 0;
1409
1410 mmc = host->mmc;
1411 host->host_removal = true;
1412
1413 mutex_lock(&host->host_mutex);
1414 if (host->mrq) {
1415 dev_dbg(&(pdev->dev),
1416 "%s: Controller removed during transfer\n",
1417 mmc_hostname(mmc));
1418 host->mrq->cmd->error = -ENOMEDIUM;
1419 if (host->mrq->stop)
1420 host->mrq->stop->error = -ENOMEDIUM;
1421 mmc_request_done(mmc, host->mrq);
1422 }
1423 mutex_unlock(&host->host_mutex);
1424
1425 mmc_remove_host(mmc);
1426
1427#ifdef RTSX_USB_USE_LEDS_CLASS
1428 cancel_work_sync(&host->led_work);
1429 led_classdev_unregister(&host->led);
1430#endif
1431
1432 mmc_free_host(mmc);
1433 pm_runtime_disable(&pdev->dev);
1434 platform_set_drvdata(pdev, NULL);
1435
1436 dev_dbg(&(pdev->dev),
1437 ": Realtek USB SD/MMC module has been removed\n");
1438
1439 return 0;
1440}
1441
1442static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
1443 {
1444 .name = "rtsx_usb_sdmmc",
1445 }, {
1446 /* sentinel */
1447 }
1448};
1449MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
1450
1451static struct platform_driver rtsx_usb_sdmmc_driver = {
1452 .probe = rtsx_usb_sdmmc_drv_probe,
1453 .remove = rtsx_usb_sdmmc_drv_remove,
1454 .id_table = rtsx_usb_sdmmc_ids,
1455 .driver = {
1456 .name = "rtsx_usb_sdmmc",
1457 },
1458};
1459module_platform_driver(rtsx_usb_sdmmc_driver);
1460
1461MODULE_LICENSE("GPL v2");
1462MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
1463MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");