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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * cacheinfo support - processor cache information via sysfs
4 *
5 * Based on arch/x86/kernel/cpu/intel_cacheinfo.c
6 * Author: Sudeep Holla <sudeep.holla@arm.com>
7 */
8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
10#include <linux/acpi.h>
11#include <linux/bitops.h>
12#include <linux/cacheinfo.h>
13#include <linux/compiler.h>
14#include <linux/cpu.h>
15#include <linux/device.h>
16#include <linux/init.h>
17#include <linux/of_device.h>
18#include <linux/sched.h>
19#include <linux/slab.h>
20#include <linux/smp.h>
21#include <linux/sysfs.h>
22
23/* pointer to per cpu cacheinfo */
24static DEFINE_PER_CPU(struct cpu_cacheinfo, ci_cpu_cacheinfo);
25#define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu))
26#define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves)
27#define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list)
28#define per_cpu_cacheinfo_idx(cpu, idx) \
29 (per_cpu_cacheinfo(cpu) + (idx))
30
31struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
32{
33 return ci_cacheinfo(cpu);
34}
35
36static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
37 struct cacheinfo *sib_leaf)
38{
39 /*
40 * For non DT/ACPI systems, assume unique level 1 caches,
41 * system-wide shared caches for all other levels. This will be used
42 * only if arch specific code has not populated shared_cpu_map
43 */
44 if (!(IS_ENABLED(CONFIG_OF) || IS_ENABLED(CONFIG_ACPI)))
45 return !(this_leaf->level == 1);
46
47 if ((sib_leaf->attributes & CACHE_ID) &&
48 (this_leaf->attributes & CACHE_ID))
49 return sib_leaf->id == this_leaf->id;
50
51 return sib_leaf->fw_token == this_leaf->fw_token;
52}
53
54bool last_level_cache_is_valid(unsigned int cpu)
55{
56 struct cacheinfo *llc;
57
58 if (!cache_leaves(cpu))
59 return false;
60
61 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
62
63 return (llc->attributes & CACHE_ID) || !!llc->fw_token;
64
65}
66
67bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y)
68{
69 struct cacheinfo *llc_x, *llc_y;
70
71 if (!last_level_cache_is_valid(cpu_x) ||
72 !last_level_cache_is_valid(cpu_y))
73 return false;
74
75 llc_x = per_cpu_cacheinfo_idx(cpu_x, cache_leaves(cpu_x) - 1);
76 llc_y = per_cpu_cacheinfo_idx(cpu_y, cache_leaves(cpu_y) - 1);
77
78 return cache_leaves_are_shared(llc_x, llc_y);
79}
80
81#ifdef CONFIG_OF
82/* OF properties to query for a given cache type */
83struct cache_type_info {
84 const char *size_prop;
85 const char *line_size_props[2];
86 const char *nr_sets_prop;
87};
88
89static const struct cache_type_info cache_type_info[] = {
90 {
91 .size_prop = "cache-size",
92 .line_size_props = { "cache-line-size",
93 "cache-block-size", },
94 .nr_sets_prop = "cache-sets",
95 }, {
96 .size_prop = "i-cache-size",
97 .line_size_props = { "i-cache-line-size",
98 "i-cache-block-size", },
99 .nr_sets_prop = "i-cache-sets",
100 }, {
101 .size_prop = "d-cache-size",
102 .line_size_props = { "d-cache-line-size",
103 "d-cache-block-size", },
104 .nr_sets_prop = "d-cache-sets",
105 },
106};
107
108static inline int get_cacheinfo_idx(enum cache_type type)
109{
110 if (type == CACHE_TYPE_UNIFIED)
111 return 0;
112 return type;
113}
114
115static void cache_size(struct cacheinfo *this_leaf, struct device_node *np)
116{
117 const char *propname;
118 int ct_idx;
119
120 ct_idx = get_cacheinfo_idx(this_leaf->type);
121 propname = cache_type_info[ct_idx].size_prop;
122
123 of_property_read_u32(np, propname, &this_leaf->size);
124}
125
126/* not cache_line_size() because that's a macro in include/linux/cache.h */
127static void cache_get_line_size(struct cacheinfo *this_leaf,
128 struct device_node *np)
129{
130 int i, lim, ct_idx;
131
132 ct_idx = get_cacheinfo_idx(this_leaf->type);
133 lim = ARRAY_SIZE(cache_type_info[ct_idx].line_size_props);
134
135 for (i = 0; i < lim; i++) {
136 int ret;
137 u32 line_size;
138 const char *propname;
139
140 propname = cache_type_info[ct_idx].line_size_props[i];
141 ret = of_property_read_u32(np, propname, &line_size);
142 if (!ret) {
143 this_leaf->coherency_line_size = line_size;
144 break;
145 }
146 }
147}
148
149static void cache_nr_sets(struct cacheinfo *this_leaf, struct device_node *np)
150{
151 const char *propname;
152 int ct_idx;
153
154 ct_idx = get_cacheinfo_idx(this_leaf->type);
155 propname = cache_type_info[ct_idx].nr_sets_prop;
156
157 of_property_read_u32(np, propname, &this_leaf->number_of_sets);
158}
159
160static void cache_associativity(struct cacheinfo *this_leaf)
161{
162 unsigned int line_size = this_leaf->coherency_line_size;
163 unsigned int nr_sets = this_leaf->number_of_sets;
164 unsigned int size = this_leaf->size;
165
166 /*
167 * If the cache is fully associative, there is no need to
168 * check the other properties.
169 */
170 if (!(nr_sets == 1) && (nr_sets > 0 && size > 0 && line_size > 0))
171 this_leaf->ways_of_associativity = (size / nr_sets) / line_size;
172}
173
174static bool cache_node_is_unified(struct cacheinfo *this_leaf,
175 struct device_node *np)
176{
177 return of_property_read_bool(np, "cache-unified");
178}
179
180static void cache_of_set_props(struct cacheinfo *this_leaf,
181 struct device_node *np)
182{
183 /*
184 * init_cache_level must setup the cache level correctly
185 * overriding the architecturally specified levels, so
186 * if type is NONE at this stage, it should be unified
187 */
188 if (this_leaf->type == CACHE_TYPE_NOCACHE &&
189 cache_node_is_unified(this_leaf, np))
190 this_leaf->type = CACHE_TYPE_UNIFIED;
191 cache_size(this_leaf, np);
192 cache_get_line_size(this_leaf, np);
193 cache_nr_sets(this_leaf, np);
194 cache_associativity(this_leaf);
195}
196
197static int cache_setup_of_node(unsigned int cpu)
198{
199 struct device_node *np, *prev;
200 struct cacheinfo *this_leaf;
201 unsigned int index = 0;
202
203 np = of_cpu_device_node_get(cpu);
204 if (!np) {
205 pr_err("Failed to find cpu%d device node\n", cpu);
206 return -ENOENT;
207 }
208
209 prev = np;
210
211 while (index < cache_leaves(cpu)) {
212 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
213 if (this_leaf->level != 1) {
214 np = of_find_next_cache_node(np);
215 of_node_put(prev);
216 prev = np;
217 if (!np)
218 break;
219 }
220 cache_of_set_props(this_leaf, np);
221 this_leaf->fw_token = np;
222 index++;
223 }
224
225 of_node_put(np);
226
227 if (index != cache_leaves(cpu)) /* not all OF nodes populated */
228 return -ENOENT;
229
230 return 0;
231}
232#else
233static inline int cache_setup_of_node(unsigned int cpu) { return 0; }
234#endif
235
236int __weak cache_setup_acpi(unsigned int cpu)
237{
238 return -ENOTSUPP;
239}
240
241unsigned int coherency_max_size;
242
243static int cache_setup_properties(unsigned int cpu)
244{
245 int ret = 0;
246
247 if (of_have_populated_dt())
248 ret = cache_setup_of_node(cpu);
249 else if (!acpi_disabled)
250 ret = cache_setup_acpi(cpu);
251
252 return ret;
253}
254
255static int cache_shared_cpu_map_setup(unsigned int cpu)
256{
257 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
258 struct cacheinfo *this_leaf, *sib_leaf;
259 unsigned int index;
260 int ret = 0;
261
262 if (this_cpu_ci->cpu_map_populated)
263 return 0;
264
265 /*
266 * skip setting up cache properties if LLC is valid, just need
267 * to update the shared cpu_map if the cache attributes were
268 * populated early before all the cpus are brought online
269 */
270 if (!last_level_cache_is_valid(cpu)) {
271 ret = cache_setup_properties(cpu);
272 if (ret)
273 return ret;
274 }
275
276 for (index = 0; index < cache_leaves(cpu); index++) {
277 unsigned int i;
278
279 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
280
281 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
282 for_each_online_cpu(i) {
283 struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i);
284
285 if (i == cpu || !sib_cpu_ci->info_list)
286 continue;/* skip if itself or no cacheinfo */
287
288 sib_leaf = per_cpu_cacheinfo_idx(i, index);
289 if (cache_leaves_are_shared(this_leaf, sib_leaf)) {
290 cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map);
291 cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
292 }
293 }
294 /* record the maximum cache line size */
295 if (this_leaf->coherency_line_size > coherency_max_size)
296 coherency_max_size = this_leaf->coherency_line_size;
297 }
298
299 return 0;
300}
301
302static void cache_shared_cpu_map_remove(unsigned int cpu)
303{
304 struct cacheinfo *this_leaf, *sib_leaf;
305 unsigned int sibling, index;
306
307 for (index = 0; index < cache_leaves(cpu); index++) {
308 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
309 for_each_cpu(sibling, &this_leaf->shared_cpu_map) {
310 struct cpu_cacheinfo *sib_cpu_ci =
311 get_cpu_cacheinfo(sibling);
312
313 if (sibling == cpu || !sib_cpu_ci->info_list)
314 continue;/* skip if itself or no cacheinfo */
315
316 sib_leaf = per_cpu_cacheinfo_idx(sibling, index);
317 cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
318 cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
319 }
320 }
321}
322
323static void free_cache_attributes(unsigned int cpu)
324{
325 if (!per_cpu_cacheinfo(cpu))
326 return;
327
328 cache_shared_cpu_map_remove(cpu);
329
330 kfree(per_cpu_cacheinfo(cpu));
331 per_cpu_cacheinfo(cpu) = NULL;
332 cache_leaves(cpu) = 0;
333}
334
335int __weak init_cache_level(unsigned int cpu)
336{
337 return -ENOENT;
338}
339
340int __weak populate_cache_leaves(unsigned int cpu)
341{
342 return -ENOENT;
343}
344
345int detect_cache_attributes(unsigned int cpu)
346{
347 int ret;
348
349 /* Since early detection of the cacheinfo is allowed via this
350 * function and this also gets called as CPU hotplug callbacks via
351 * cacheinfo_cpu_online, the initialisation can be skipped and only
352 * CPU maps can be updated as the CPU online status would be update
353 * if called via cacheinfo_cpu_online path.
354 */
355 if (per_cpu_cacheinfo(cpu))
356 goto update_cpu_map;
357
358 if (init_cache_level(cpu) || !cache_leaves(cpu))
359 return -ENOENT;
360
361 per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
362 sizeof(struct cacheinfo), GFP_ATOMIC);
363 if (per_cpu_cacheinfo(cpu) == NULL) {
364 cache_leaves(cpu) = 0;
365 return -ENOMEM;
366 }
367
368 /*
369 * populate_cache_leaves() may completely setup the cache leaves and
370 * shared_cpu_map or it may leave it partially setup.
371 */
372 ret = populate_cache_leaves(cpu);
373 if (ret)
374 goto free_ci;
375
376update_cpu_map:
377 /*
378 * For systems using DT for cache hierarchy, fw_token
379 * and shared_cpu_map will be set up here only if they are
380 * not populated already
381 */
382 ret = cache_shared_cpu_map_setup(cpu);
383 if (ret) {
384 pr_warn("Unable to detect cache hierarchy for CPU %d\n", cpu);
385 goto free_ci;
386 }
387
388 return 0;
389
390free_ci:
391 free_cache_attributes(cpu);
392 return ret;
393}
394
395/* pointer to cpuX/cache device */
396static DEFINE_PER_CPU(struct device *, ci_cache_dev);
397#define per_cpu_cache_dev(cpu) (per_cpu(ci_cache_dev, cpu))
398
399static cpumask_t cache_dev_map;
400
401/* pointer to array of devices for cpuX/cache/indexY */
402static DEFINE_PER_CPU(struct device **, ci_index_dev);
403#define per_cpu_index_dev(cpu) (per_cpu(ci_index_dev, cpu))
404#define per_cache_index_dev(cpu, idx) ((per_cpu_index_dev(cpu))[idx])
405
406#define show_one(file_name, object) \
407static ssize_t file_name##_show(struct device *dev, \
408 struct device_attribute *attr, char *buf) \
409{ \
410 struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
411 return sysfs_emit(buf, "%u\n", this_leaf->object); \
412}
413
414show_one(id, id);
415show_one(level, level);
416show_one(coherency_line_size, coherency_line_size);
417show_one(number_of_sets, number_of_sets);
418show_one(physical_line_partition, physical_line_partition);
419show_one(ways_of_associativity, ways_of_associativity);
420
421static ssize_t size_show(struct device *dev,
422 struct device_attribute *attr, char *buf)
423{
424 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
425
426 return sysfs_emit(buf, "%uK\n", this_leaf->size >> 10);
427}
428
429static ssize_t shared_cpu_map_show(struct device *dev,
430 struct device_attribute *attr, char *buf)
431{
432 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
433 const struct cpumask *mask = &this_leaf->shared_cpu_map;
434
435 return sysfs_emit(buf, "%*pb\n", nr_cpu_ids, mask);
436}
437
438static ssize_t shared_cpu_list_show(struct device *dev,
439 struct device_attribute *attr, char *buf)
440{
441 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
442 const struct cpumask *mask = &this_leaf->shared_cpu_map;
443
444 return sysfs_emit(buf, "%*pbl\n", nr_cpu_ids, mask);
445}
446
447static ssize_t type_show(struct device *dev,
448 struct device_attribute *attr, char *buf)
449{
450 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
451 const char *output;
452
453 switch (this_leaf->type) {
454 case CACHE_TYPE_DATA:
455 output = "Data";
456 break;
457 case CACHE_TYPE_INST:
458 output = "Instruction";
459 break;
460 case CACHE_TYPE_UNIFIED:
461 output = "Unified";
462 break;
463 default:
464 return -EINVAL;
465 }
466
467 return sysfs_emit(buf, "%s\n", output);
468}
469
470static ssize_t allocation_policy_show(struct device *dev,
471 struct device_attribute *attr, char *buf)
472{
473 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
474 unsigned int ci_attr = this_leaf->attributes;
475 const char *output;
476
477 if ((ci_attr & CACHE_READ_ALLOCATE) && (ci_attr & CACHE_WRITE_ALLOCATE))
478 output = "ReadWriteAllocate";
479 else if (ci_attr & CACHE_READ_ALLOCATE)
480 output = "ReadAllocate";
481 else if (ci_attr & CACHE_WRITE_ALLOCATE)
482 output = "WriteAllocate";
483 else
484 return 0;
485
486 return sysfs_emit(buf, "%s\n", output);
487}
488
489static ssize_t write_policy_show(struct device *dev,
490 struct device_attribute *attr, char *buf)
491{
492 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
493 unsigned int ci_attr = this_leaf->attributes;
494 int n = 0;
495
496 if (ci_attr & CACHE_WRITE_THROUGH)
497 n = sysfs_emit(buf, "WriteThrough\n");
498 else if (ci_attr & CACHE_WRITE_BACK)
499 n = sysfs_emit(buf, "WriteBack\n");
500 return n;
501}
502
503static DEVICE_ATTR_RO(id);
504static DEVICE_ATTR_RO(level);
505static DEVICE_ATTR_RO(type);
506static DEVICE_ATTR_RO(coherency_line_size);
507static DEVICE_ATTR_RO(ways_of_associativity);
508static DEVICE_ATTR_RO(number_of_sets);
509static DEVICE_ATTR_RO(size);
510static DEVICE_ATTR_RO(allocation_policy);
511static DEVICE_ATTR_RO(write_policy);
512static DEVICE_ATTR_RO(shared_cpu_map);
513static DEVICE_ATTR_RO(shared_cpu_list);
514static DEVICE_ATTR_RO(physical_line_partition);
515
516static struct attribute *cache_default_attrs[] = {
517 &dev_attr_id.attr,
518 &dev_attr_type.attr,
519 &dev_attr_level.attr,
520 &dev_attr_shared_cpu_map.attr,
521 &dev_attr_shared_cpu_list.attr,
522 &dev_attr_coherency_line_size.attr,
523 &dev_attr_ways_of_associativity.attr,
524 &dev_attr_number_of_sets.attr,
525 &dev_attr_size.attr,
526 &dev_attr_allocation_policy.attr,
527 &dev_attr_write_policy.attr,
528 &dev_attr_physical_line_partition.attr,
529 NULL
530};
531
532static umode_t
533cache_default_attrs_is_visible(struct kobject *kobj,
534 struct attribute *attr, int unused)
535{
536 struct device *dev = kobj_to_dev(kobj);
537 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
538 const struct cpumask *mask = &this_leaf->shared_cpu_map;
539 umode_t mode = attr->mode;
540
541 if ((attr == &dev_attr_id.attr) && (this_leaf->attributes & CACHE_ID))
542 return mode;
543 if ((attr == &dev_attr_type.attr) && this_leaf->type)
544 return mode;
545 if ((attr == &dev_attr_level.attr) && this_leaf->level)
546 return mode;
547 if ((attr == &dev_attr_shared_cpu_map.attr) && !cpumask_empty(mask))
548 return mode;
549 if ((attr == &dev_attr_shared_cpu_list.attr) && !cpumask_empty(mask))
550 return mode;
551 if ((attr == &dev_attr_coherency_line_size.attr) &&
552 this_leaf->coherency_line_size)
553 return mode;
554 if ((attr == &dev_attr_ways_of_associativity.attr) &&
555 this_leaf->size) /* allow 0 = full associativity */
556 return mode;
557 if ((attr == &dev_attr_number_of_sets.attr) &&
558 this_leaf->number_of_sets)
559 return mode;
560 if ((attr == &dev_attr_size.attr) && this_leaf->size)
561 return mode;
562 if ((attr == &dev_attr_write_policy.attr) &&
563 (this_leaf->attributes & CACHE_WRITE_POLICY_MASK))
564 return mode;
565 if ((attr == &dev_attr_allocation_policy.attr) &&
566 (this_leaf->attributes & CACHE_ALLOCATE_POLICY_MASK))
567 return mode;
568 if ((attr == &dev_attr_physical_line_partition.attr) &&
569 this_leaf->physical_line_partition)
570 return mode;
571
572 return 0;
573}
574
575static const struct attribute_group cache_default_group = {
576 .attrs = cache_default_attrs,
577 .is_visible = cache_default_attrs_is_visible,
578};
579
580static const struct attribute_group *cache_default_groups[] = {
581 &cache_default_group,
582 NULL,
583};
584
585static const struct attribute_group *cache_private_groups[] = {
586 &cache_default_group,
587 NULL, /* Place holder for private group */
588 NULL,
589};
590
591const struct attribute_group *
592__weak cache_get_priv_group(struct cacheinfo *this_leaf)
593{
594 return NULL;
595}
596
597static const struct attribute_group **
598cache_get_attribute_groups(struct cacheinfo *this_leaf)
599{
600 const struct attribute_group *priv_group =
601 cache_get_priv_group(this_leaf);
602
603 if (!priv_group)
604 return cache_default_groups;
605
606 if (!cache_private_groups[1])
607 cache_private_groups[1] = priv_group;
608
609 return cache_private_groups;
610}
611
612/* Add/Remove cache interface for CPU device */
613static void cpu_cache_sysfs_exit(unsigned int cpu)
614{
615 int i;
616 struct device *ci_dev;
617
618 if (per_cpu_index_dev(cpu)) {
619 for (i = 0; i < cache_leaves(cpu); i++) {
620 ci_dev = per_cache_index_dev(cpu, i);
621 if (!ci_dev)
622 continue;
623 device_unregister(ci_dev);
624 }
625 kfree(per_cpu_index_dev(cpu));
626 per_cpu_index_dev(cpu) = NULL;
627 }
628 device_unregister(per_cpu_cache_dev(cpu));
629 per_cpu_cache_dev(cpu) = NULL;
630}
631
632static int cpu_cache_sysfs_init(unsigned int cpu)
633{
634 struct device *dev = get_cpu_device(cpu);
635
636 if (per_cpu_cacheinfo(cpu) == NULL)
637 return -ENOENT;
638
639 per_cpu_cache_dev(cpu) = cpu_device_create(dev, NULL, NULL, "cache");
640 if (IS_ERR(per_cpu_cache_dev(cpu)))
641 return PTR_ERR(per_cpu_cache_dev(cpu));
642
643 /* Allocate all required memory */
644 per_cpu_index_dev(cpu) = kcalloc(cache_leaves(cpu),
645 sizeof(struct device *), GFP_KERNEL);
646 if (unlikely(per_cpu_index_dev(cpu) == NULL))
647 goto err_out;
648
649 return 0;
650
651err_out:
652 cpu_cache_sysfs_exit(cpu);
653 return -ENOMEM;
654}
655
656static int cache_add_dev(unsigned int cpu)
657{
658 unsigned int i;
659 int rc;
660 struct device *ci_dev, *parent;
661 struct cacheinfo *this_leaf;
662 const struct attribute_group **cache_groups;
663
664 rc = cpu_cache_sysfs_init(cpu);
665 if (unlikely(rc < 0))
666 return rc;
667
668 parent = per_cpu_cache_dev(cpu);
669 for (i = 0; i < cache_leaves(cpu); i++) {
670 this_leaf = per_cpu_cacheinfo_idx(cpu, i);
671 if (this_leaf->disable_sysfs)
672 continue;
673 if (this_leaf->type == CACHE_TYPE_NOCACHE)
674 break;
675 cache_groups = cache_get_attribute_groups(this_leaf);
676 ci_dev = cpu_device_create(parent, this_leaf, cache_groups,
677 "index%1u", i);
678 if (IS_ERR(ci_dev)) {
679 rc = PTR_ERR(ci_dev);
680 goto err;
681 }
682 per_cache_index_dev(cpu, i) = ci_dev;
683 }
684 cpumask_set_cpu(cpu, &cache_dev_map);
685
686 return 0;
687err:
688 cpu_cache_sysfs_exit(cpu);
689 return rc;
690}
691
692static int cacheinfo_cpu_online(unsigned int cpu)
693{
694 int rc = detect_cache_attributes(cpu);
695
696 if (rc)
697 return rc;
698 rc = cache_add_dev(cpu);
699 if (rc)
700 free_cache_attributes(cpu);
701 return rc;
702}
703
704static int cacheinfo_cpu_pre_down(unsigned int cpu)
705{
706 if (cpumask_test_and_clear_cpu(cpu, &cache_dev_map))
707 cpu_cache_sysfs_exit(cpu);
708
709 free_cache_attributes(cpu);
710 return 0;
711}
712
713static int __init cacheinfo_sysfs_init(void)
714{
715 return cpuhp_setup_state(CPUHP_AP_BASE_CACHEINFO_ONLINE,
716 "base/cacheinfo:online",
717 cacheinfo_cpu_online, cacheinfo_cpu_pre_down);
718}
719device_initcall(cacheinfo_sysfs_init);
1/*
2 * cacheinfo support - processor cache information via sysfs
3 *
4 * Based on arch/x86/kernel/cpu/intel_cacheinfo.c
5 * Author: Sudeep Holla <sudeep.holla@arm.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19#include <linux/bitops.h>
20#include <linux/cacheinfo.h>
21#include <linux/compiler.h>
22#include <linux/cpu.h>
23#include <linux/device.h>
24#include <linux/init.h>
25#include <linux/of.h>
26#include <linux/sched.h>
27#include <linux/slab.h>
28#include <linux/smp.h>
29#include <linux/sysfs.h>
30
31/* pointer to per cpu cacheinfo */
32static DEFINE_PER_CPU(struct cpu_cacheinfo, ci_cpu_cacheinfo);
33#define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu))
34#define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves)
35#define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list)
36
37struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
38{
39 return ci_cacheinfo(cpu);
40}
41
42#ifdef CONFIG_OF
43static int cache_setup_of_node(unsigned int cpu)
44{
45 struct device_node *np;
46 struct cacheinfo *this_leaf;
47 struct device *cpu_dev = get_cpu_device(cpu);
48 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
49 unsigned int index = 0;
50
51 /* skip if of_node is already populated */
52 if (this_cpu_ci->info_list->of_node)
53 return 0;
54
55 if (!cpu_dev) {
56 pr_err("No cpu device for CPU %d\n", cpu);
57 return -ENODEV;
58 }
59 np = cpu_dev->of_node;
60 if (!np) {
61 pr_err("Failed to find cpu%d device node\n", cpu);
62 return -ENOENT;
63 }
64
65 while (index < cache_leaves(cpu)) {
66 this_leaf = this_cpu_ci->info_list + index;
67 if (this_leaf->level != 1)
68 np = of_find_next_cache_node(np);
69 else
70 np = of_node_get(np);/* cpu node itself */
71 if (!np)
72 break;
73 this_leaf->of_node = np;
74 index++;
75 }
76
77 if (index != cache_leaves(cpu)) /* not all OF nodes populated */
78 return -ENOENT;
79
80 return 0;
81}
82
83static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
84 struct cacheinfo *sib_leaf)
85{
86 return sib_leaf->of_node == this_leaf->of_node;
87}
88#else
89static inline int cache_setup_of_node(unsigned int cpu) { return 0; }
90static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
91 struct cacheinfo *sib_leaf)
92{
93 /*
94 * For non-DT systems, assume unique level 1 cache, system-wide
95 * shared caches for all other levels. This will be used only if
96 * arch specific code has not populated shared_cpu_map
97 */
98 return !(this_leaf->level == 1);
99}
100#endif
101
102static int cache_shared_cpu_map_setup(unsigned int cpu)
103{
104 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
105 struct cacheinfo *this_leaf, *sib_leaf;
106 unsigned int index;
107 int ret;
108
109 ret = cache_setup_of_node(cpu);
110 if (ret)
111 return ret;
112
113 for (index = 0; index < cache_leaves(cpu); index++) {
114 unsigned int i;
115
116 this_leaf = this_cpu_ci->info_list + index;
117 /* skip if shared_cpu_map is already populated */
118 if (!cpumask_empty(&this_leaf->shared_cpu_map))
119 continue;
120
121 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
122 for_each_online_cpu(i) {
123 struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i);
124
125 if (i == cpu || !sib_cpu_ci->info_list)
126 continue;/* skip if itself or no cacheinfo */
127 sib_leaf = sib_cpu_ci->info_list + index;
128 if (cache_leaves_are_shared(this_leaf, sib_leaf)) {
129 cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map);
130 cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
131 }
132 }
133 }
134
135 return 0;
136}
137
138static void cache_shared_cpu_map_remove(unsigned int cpu)
139{
140 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
141 struct cacheinfo *this_leaf, *sib_leaf;
142 unsigned int sibling, index;
143
144 for (index = 0; index < cache_leaves(cpu); index++) {
145 this_leaf = this_cpu_ci->info_list + index;
146 for_each_cpu(sibling, &this_leaf->shared_cpu_map) {
147 struct cpu_cacheinfo *sib_cpu_ci;
148
149 if (sibling == cpu) /* skip itself */
150 continue;
151
152 sib_cpu_ci = get_cpu_cacheinfo(sibling);
153 if (!sib_cpu_ci->info_list)
154 continue;
155
156 sib_leaf = sib_cpu_ci->info_list + index;
157 cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
158 cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
159 }
160 of_node_put(this_leaf->of_node);
161 }
162}
163
164static void free_cache_attributes(unsigned int cpu)
165{
166 if (!per_cpu_cacheinfo(cpu))
167 return;
168
169 cache_shared_cpu_map_remove(cpu);
170
171 kfree(per_cpu_cacheinfo(cpu));
172 per_cpu_cacheinfo(cpu) = NULL;
173}
174
175int __weak init_cache_level(unsigned int cpu)
176{
177 return -ENOENT;
178}
179
180int __weak populate_cache_leaves(unsigned int cpu)
181{
182 return -ENOENT;
183}
184
185static int detect_cache_attributes(unsigned int cpu)
186{
187 int ret;
188
189 if (init_cache_level(cpu) || !cache_leaves(cpu))
190 return -ENOENT;
191
192 per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
193 sizeof(struct cacheinfo), GFP_KERNEL);
194 if (per_cpu_cacheinfo(cpu) == NULL)
195 return -ENOMEM;
196
197 ret = populate_cache_leaves(cpu);
198 if (ret)
199 goto free_ci;
200 /*
201 * For systems using DT for cache hierarchy, of_node and shared_cpu_map
202 * will be set up here only if they are not populated already
203 */
204 ret = cache_shared_cpu_map_setup(cpu);
205 if (ret) {
206 pr_warn("Unable to detect cache hierarchy from DT for CPU %d\n",
207 cpu);
208 goto free_ci;
209 }
210 return 0;
211
212free_ci:
213 free_cache_attributes(cpu);
214 return ret;
215}
216
217/* pointer to cpuX/cache device */
218static DEFINE_PER_CPU(struct device *, ci_cache_dev);
219#define per_cpu_cache_dev(cpu) (per_cpu(ci_cache_dev, cpu))
220
221static cpumask_t cache_dev_map;
222
223/* pointer to array of devices for cpuX/cache/indexY */
224static DEFINE_PER_CPU(struct device **, ci_index_dev);
225#define per_cpu_index_dev(cpu) (per_cpu(ci_index_dev, cpu))
226#define per_cache_index_dev(cpu, idx) ((per_cpu_index_dev(cpu))[idx])
227
228#define show_one(file_name, object) \
229static ssize_t file_name##_show(struct device *dev, \
230 struct device_attribute *attr, char *buf) \
231{ \
232 struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
233 return sprintf(buf, "%u\n", this_leaf->object); \
234}
235
236show_one(level, level);
237show_one(coherency_line_size, coherency_line_size);
238show_one(number_of_sets, number_of_sets);
239show_one(physical_line_partition, physical_line_partition);
240show_one(ways_of_associativity, ways_of_associativity);
241
242static ssize_t size_show(struct device *dev,
243 struct device_attribute *attr, char *buf)
244{
245 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
246
247 return sprintf(buf, "%uK\n", this_leaf->size >> 10);
248}
249
250static ssize_t shared_cpumap_show_func(struct device *dev, bool list, char *buf)
251{
252 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
253 const struct cpumask *mask = &this_leaf->shared_cpu_map;
254
255 return cpumap_print_to_pagebuf(list, buf, mask);
256}
257
258static ssize_t shared_cpu_map_show(struct device *dev,
259 struct device_attribute *attr, char *buf)
260{
261 return shared_cpumap_show_func(dev, false, buf);
262}
263
264static ssize_t shared_cpu_list_show(struct device *dev,
265 struct device_attribute *attr, char *buf)
266{
267 return shared_cpumap_show_func(dev, true, buf);
268}
269
270static ssize_t type_show(struct device *dev,
271 struct device_attribute *attr, char *buf)
272{
273 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
274
275 switch (this_leaf->type) {
276 case CACHE_TYPE_DATA:
277 return sprintf(buf, "Data\n");
278 case CACHE_TYPE_INST:
279 return sprintf(buf, "Instruction\n");
280 case CACHE_TYPE_UNIFIED:
281 return sprintf(buf, "Unified\n");
282 default:
283 return -EINVAL;
284 }
285}
286
287static ssize_t allocation_policy_show(struct device *dev,
288 struct device_attribute *attr, char *buf)
289{
290 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
291 unsigned int ci_attr = this_leaf->attributes;
292 int n = 0;
293
294 if ((ci_attr & CACHE_READ_ALLOCATE) && (ci_attr & CACHE_WRITE_ALLOCATE))
295 n = sprintf(buf, "ReadWriteAllocate\n");
296 else if (ci_attr & CACHE_READ_ALLOCATE)
297 n = sprintf(buf, "ReadAllocate\n");
298 else if (ci_attr & CACHE_WRITE_ALLOCATE)
299 n = sprintf(buf, "WriteAllocate\n");
300 return n;
301}
302
303static ssize_t write_policy_show(struct device *dev,
304 struct device_attribute *attr, char *buf)
305{
306 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
307 unsigned int ci_attr = this_leaf->attributes;
308 int n = 0;
309
310 if (ci_attr & CACHE_WRITE_THROUGH)
311 n = sprintf(buf, "WriteThrough\n");
312 else if (ci_attr & CACHE_WRITE_BACK)
313 n = sprintf(buf, "WriteBack\n");
314 return n;
315}
316
317static DEVICE_ATTR_RO(level);
318static DEVICE_ATTR_RO(type);
319static DEVICE_ATTR_RO(coherency_line_size);
320static DEVICE_ATTR_RO(ways_of_associativity);
321static DEVICE_ATTR_RO(number_of_sets);
322static DEVICE_ATTR_RO(size);
323static DEVICE_ATTR_RO(allocation_policy);
324static DEVICE_ATTR_RO(write_policy);
325static DEVICE_ATTR_RO(shared_cpu_map);
326static DEVICE_ATTR_RO(shared_cpu_list);
327static DEVICE_ATTR_RO(physical_line_partition);
328
329static struct attribute *cache_default_attrs[] = {
330 &dev_attr_type.attr,
331 &dev_attr_level.attr,
332 &dev_attr_shared_cpu_map.attr,
333 &dev_attr_shared_cpu_list.attr,
334 &dev_attr_coherency_line_size.attr,
335 &dev_attr_ways_of_associativity.attr,
336 &dev_attr_number_of_sets.attr,
337 &dev_attr_size.attr,
338 &dev_attr_allocation_policy.attr,
339 &dev_attr_write_policy.attr,
340 &dev_attr_physical_line_partition.attr,
341 NULL
342};
343
344static umode_t
345cache_default_attrs_is_visible(struct kobject *kobj,
346 struct attribute *attr, int unused)
347{
348 struct device *dev = kobj_to_dev(kobj);
349 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
350 const struct cpumask *mask = &this_leaf->shared_cpu_map;
351 umode_t mode = attr->mode;
352
353 if ((attr == &dev_attr_type.attr) && this_leaf->type)
354 return mode;
355 if ((attr == &dev_attr_level.attr) && this_leaf->level)
356 return mode;
357 if ((attr == &dev_attr_shared_cpu_map.attr) && !cpumask_empty(mask))
358 return mode;
359 if ((attr == &dev_attr_shared_cpu_list.attr) && !cpumask_empty(mask))
360 return mode;
361 if ((attr == &dev_attr_coherency_line_size.attr) &&
362 this_leaf->coherency_line_size)
363 return mode;
364 if ((attr == &dev_attr_ways_of_associativity.attr) &&
365 this_leaf->size) /* allow 0 = full associativity */
366 return mode;
367 if ((attr == &dev_attr_number_of_sets.attr) &&
368 this_leaf->number_of_sets)
369 return mode;
370 if ((attr == &dev_attr_size.attr) && this_leaf->size)
371 return mode;
372 if ((attr == &dev_attr_write_policy.attr) &&
373 (this_leaf->attributes & CACHE_WRITE_POLICY_MASK))
374 return mode;
375 if ((attr == &dev_attr_allocation_policy.attr) &&
376 (this_leaf->attributes & CACHE_ALLOCATE_POLICY_MASK))
377 return mode;
378 if ((attr == &dev_attr_physical_line_partition.attr) &&
379 this_leaf->physical_line_partition)
380 return mode;
381
382 return 0;
383}
384
385static const struct attribute_group cache_default_group = {
386 .attrs = cache_default_attrs,
387 .is_visible = cache_default_attrs_is_visible,
388};
389
390static const struct attribute_group *cache_default_groups[] = {
391 &cache_default_group,
392 NULL,
393};
394
395static const struct attribute_group *cache_private_groups[] = {
396 &cache_default_group,
397 NULL, /* Place holder for private group */
398 NULL,
399};
400
401const struct attribute_group *
402__weak cache_get_priv_group(struct cacheinfo *this_leaf)
403{
404 return NULL;
405}
406
407static const struct attribute_group **
408cache_get_attribute_groups(struct cacheinfo *this_leaf)
409{
410 const struct attribute_group *priv_group =
411 cache_get_priv_group(this_leaf);
412
413 if (!priv_group)
414 return cache_default_groups;
415
416 if (!cache_private_groups[1])
417 cache_private_groups[1] = priv_group;
418
419 return cache_private_groups;
420}
421
422/* Add/Remove cache interface for CPU device */
423static void cpu_cache_sysfs_exit(unsigned int cpu)
424{
425 int i;
426 struct device *ci_dev;
427
428 if (per_cpu_index_dev(cpu)) {
429 for (i = 0; i < cache_leaves(cpu); i++) {
430 ci_dev = per_cache_index_dev(cpu, i);
431 if (!ci_dev)
432 continue;
433 device_unregister(ci_dev);
434 }
435 kfree(per_cpu_index_dev(cpu));
436 per_cpu_index_dev(cpu) = NULL;
437 }
438 device_unregister(per_cpu_cache_dev(cpu));
439 per_cpu_cache_dev(cpu) = NULL;
440}
441
442static int cpu_cache_sysfs_init(unsigned int cpu)
443{
444 struct device *dev = get_cpu_device(cpu);
445
446 if (per_cpu_cacheinfo(cpu) == NULL)
447 return -ENOENT;
448
449 per_cpu_cache_dev(cpu) = cpu_device_create(dev, NULL, NULL, "cache");
450 if (IS_ERR(per_cpu_cache_dev(cpu)))
451 return PTR_ERR(per_cpu_cache_dev(cpu));
452
453 /* Allocate all required memory */
454 per_cpu_index_dev(cpu) = kcalloc(cache_leaves(cpu),
455 sizeof(struct device *), GFP_KERNEL);
456 if (unlikely(per_cpu_index_dev(cpu) == NULL))
457 goto err_out;
458
459 return 0;
460
461err_out:
462 cpu_cache_sysfs_exit(cpu);
463 return -ENOMEM;
464}
465
466static int cache_add_dev(unsigned int cpu)
467{
468 unsigned int i;
469 int rc;
470 struct device *ci_dev, *parent;
471 struct cacheinfo *this_leaf;
472 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
473 const struct attribute_group **cache_groups;
474
475 rc = cpu_cache_sysfs_init(cpu);
476 if (unlikely(rc < 0))
477 return rc;
478
479 parent = per_cpu_cache_dev(cpu);
480 for (i = 0; i < cache_leaves(cpu); i++) {
481 this_leaf = this_cpu_ci->info_list + i;
482 if (this_leaf->disable_sysfs)
483 continue;
484 cache_groups = cache_get_attribute_groups(this_leaf);
485 ci_dev = cpu_device_create(parent, this_leaf, cache_groups,
486 "index%1u", i);
487 if (IS_ERR(ci_dev)) {
488 rc = PTR_ERR(ci_dev);
489 goto err;
490 }
491 per_cache_index_dev(cpu, i) = ci_dev;
492 }
493 cpumask_set_cpu(cpu, &cache_dev_map);
494
495 return 0;
496err:
497 cpu_cache_sysfs_exit(cpu);
498 return rc;
499}
500
501static void cache_remove_dev(unsigned int cpu)
502{
503 if (!cpumask_test_cpu(cpu, &cache_dev_map))
504 return;
505 cpumask_clear_cpu(cpu, &cache_dev_map);
506
507 cpu_cache_sysfs_exit(cpu);
508}
509
510static int cacheinfo_cpu_callback(struct notifier_block *nfb,
511 unsigned long action, void *hcpu)
512{
513 unsigned int cpu = (unsigned long)hcpu;
514 int rc = 0;
515
516 switch (action & ~CPU_TASKS_FROZEN) {
517 case CPU_ONLINE:
518 rc = detect_cache_attributes(cpu);
519 if (!rc)
520 rc = cache_add_dev(cpu);
521 break;
522 case CPU_DEAD:
523 cache_remove_dev(cpu);
524 free_cache_attributes(cpu);
525 break;
526 }
527 return notifier_from_errno(rc);
528}
529
530static int __init cacheinfo_sysfs_init(void)
531{
532 int cpu, rc = 0;
533
534 cpu_notifier_register_begin();
535
536 for_each_online_cpu(cpu) {
537 rc = detect_cache_attributes(cpu);
538 if (rc)
539 goto out;
540 rc = cache_add_dev(cpu);
541 if (rc) {
542 free_cache_attributes(cpu);
543 pr_err("error populating cacheinfo..cpu%d\n", cpu);
544 goto out;
545 }
546 }
547 __hotcpu_notifier(cacheinfo_cpu_callback, 0);
548
549out:
550 cpu_notifier_register_done();
551 return rc;
552}
553
554device_initcall(cacheinfo_sysfs_init);