1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * x86 TSC related functions
 4 */
 5#ifndef _ASM_X86_TSC_H
 6#define _ASM_X86_TSC_H
 7
 8#include <asm/processor.h>
 9#include <asm/cpufeature.h>
 
 
10
11/*
12 * Standard way to access the cycle counter.
13 */
14typedef unsigned long long cycles_t;
15
16extern unsigned int cpu_khz;
17extern unsigned int tsc_khz;
18
19extern void disable_TSC(void);
20
21static inline cycles_t get_cycles(void)
22{
23	if (!IS_ENABLED(CONFIG_X86_TSC) &&
24	    !cpu_feature_enabled(X86_FEATURE_TSC))
25		return 0;
 
 
26	return rdtsc();
27}
28#define get_cycles get_cycles
29
30extern struct system_counterval_t convert_art_to_tsc(u64 art);
31extern struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns);
32
33extern void tsc_early_init(void);
34extern void tsc_init(void);
35extern unsigned long calibrate_delay_is_known(void);
36extern void mark_tsc_unstable(char *reason);
37extern int unsynchronized_tsc(void);
38extern int check_tsc_unstable(void);
39extern void mark_tsc_async_resets(char *reason);
40extern unsigned long native_calibrate_cpu_early(void);
41extern unsigned long native_calibrate_tsc(void);
42extern unsigned long long native_sched_clock_from_tsc(u64 tsc);
43
44extern int tsc_clocksource_reliable;
45#ifdef CONFIG_X86_TSC
46extern bool tsc_async_resets;
47#else
48# define tsc_async_resets	false
49#endif
50
51/*
52 * Boot-time check whether the TSCs are synchronized across
53 * all CPUs/cores:
54 */
55#ifdef CONFIG_X86_TSC
56extern bool tsc_store_and_check_tsc_adjust(bool bootcpu);
57extern void tsc_verify_tsc_adjust(bool resume);
58extern void check_tsc_sync_source(int cpu);
59extern void check_tsc_sync_target(void);
60#else
61static inline bool tsc_store_and_check_tsc_adjust(bool bootcpu) { return false; }
62static inline void tsc_verify_tsc_adjust(bool resume) { }
63static inline void check_tsc_sync_source(int cpu) { }
64static inline void check_tsc_sync_target(void) { }
65#endif
66
67extern int notsc_setup(char *);
68extern void tsc_save_sched_clock_state(void);
69extern void tsc_restore_sched_clock_state(void);
70
71unsigned long cpu_khz_from_msr(void);
 
72
73#endif /* _ASM_X86_TSC_H */

 
 1/*
 2 * x86 TSC related functions
 3 */
 4#ifndef _ASM_X86_TSC_H
 5#define _ASM_X86_TSC_H
 6
 7#include <asm/processor.h>
 8
 9#define NS_SCALE	10 /* 2^10, carefully chosen */
10#define US_SCALE	32 /* 2^32, arbitralrily chosen */
11
12/*
13 * Standard way to access the cycle counter.
14 */
15typedef unsigned long long cycles_t;
16
17extern unsigned int cpu_khz;
18extern unsigned int tsc_khz;
19
20extern void disable_TSC(void);
21
22static inline cycles_t get_cycles(void)
23{
24#ifndef CONFIG_X86_TSC
25	if (!cpu_has_tsc)
26		return 0;
27#endif
28
29	return rdtsc();
30}
 
31
32extern struct system_counterval_t convert_art_to_tsc(cycle_t art);
 
33
 
34extern void tsc_init(void);
 
35extern void mark_tsc_unstable(char *reason);
36extern int unsynchronized_tsc(void);
37extern int check_tsc_unstable(void);
38extern int check_tsc_disabled(void);
 
39extern unsigned long native_calibrate_tsc(void);
40extern unsigned long long native_sched_clock_from_tsc(u64 tsc);
41
42extern int tsc_clocksource_reliable;
 
 
 
 
 
43
44/*
45 * Boot-time check whether the TSCs are synchronized across
46 * all CPUs/cores:
47 */
 
 
 
48extern void check_tsc_sync_source(int cpu);
49extern void check_tsc_sync_target(void);
 
 
 
 
 
 
50
51extern int notsc_setup(char *);
52extern void tsc_save_sched_clock_state(void);
53extern void tsc_restore_sched_clock_state(void);
54
55/* MSR based TSC calibration for Intel Atom SoC platforms */
56unsigned long try_msr_calibrate_tsc(void);
57
58#endif /* _ASM_X86_TSC_H */