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1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef __ASM_SH_BITOPS_H
3#define __ASM_SH_BITOPS_H
4
5#ifndef _LINUX_BITOPS_H
6#error only <linux/bitops.h> can be included directly
7#endif
8
9/* For __swab32 */
10#include <asm/byteorder.h>
11#include <asm/barrier.h>
12
13#ifdef CONFIG_GUSA_RB
14#include <asm/bitops-grb.h>
15#elif defined(CONFIG_CPU_SH2A)
16#include <asm-generic/bitops/atomic.h>
17#include <asm/bitops-op32.h>
18#elif defined(CONFIG_CPU_SH4A)
19#include <asm/bitops-llsc.h>
20#elif defined(CONFIG_CPU_J2) && defined(CONFIG_SMP)
21#include <asm/bitops-cas.h>
22#else
23#include <asm-generic/bitops/atomic.h>
24#include <asm-generic/bitops/non-atomic.h>
25#endif
26
27static inline unsigned long ffz(unsigned long word)
28{
29 unsigned long result;
30
31 __asm__("1:\n\t"
32 "shlr %1\n\t"
33 "bt/s 1b\n\t"
34 " add #1, %0"
35 : "=r" (result), "=r" (word)
36 : "0" (~0L), "1" (word)
37 : "t");
38 return result;
39}
40
41/**
42 * __ffs - find first bit in word.
43 * @word: The word to search
44 *
45 * Undefined if no bit exists, so code should check against 0 first.
46 */
47static inline unsigned long __ffs(unsigned long word)
48{
49 unsigned long result;
50
51 __asm__("1:\n\t"
52 "shlr %1\n\t"
53 "bf/s 1b\n\t"
54 " add #1, %0"
55 : "=r" (result), "=r" (word)
56 : "0" (~0L), "1" (word)
57 : "t");
58 return result;
59}
60
61#include <asm-generic/bitops/ffs.h>
62#include <asm-generic/bitops/hweight.h>
63#include <asm-generic/bitops/lock.h>
64#include <asm-generic/bitops/sched.h>
65#include <asm-generic/bitops/ext2-atomic.h>
66#include <asm-generic/bitops/fls.h>
67#include <asm-generic/bitops/__fls.h>
68#include <asm-generic/bitops/fls64.h>
69
70#include <asm-generic/bitops/le.h>
71
72#endif /* __ASM_SH_BITOPS_H */
1#ifndef __ASM_SH_BITOPS_H
2#define __ASM_SH_BITOPS_H
3
4#ifdef __KERNEL__
5
6#ifndef _LINUX_BITOPS_H
7#error only <linux/bitops.h> can be included directly
8#endif
9
10/* For __swab32 */
11#include <asm/byteorder.h>
12#include <asm/barrier.h>
13
14#ifdef CONFIG_GUSA_RB
15#include <asm/bitops-grb.h>
16#elif defined(CONFIG_CPU_SH2A)
17#include <asm-generic/bitops/atomic.h>
18#include <asm/bitops-op32.h>
19#elif defined(CONFIG_CPU_SH4A)
20#include <asm/bitops-llsc.h>
21#else
22#include <asm-generic/bitops/atomic.h>
23#include <asm-generic/bitops/non-atomic.h>
24#endif
25
26#ifdef CONFIG_SUPERH32
27static inline unsigned long ffz(unsigned long word)
28{
29 unsigned long result;
30
31 __asm__("1:\n\t"
32 "shlr %1\n\t"
33 "bt/s 1b\n\t"
34 " add #1, %0"
35 : "=r" (result), "=r" (word)
36 : "0" (~0L), "1" (word)
37 : "t");
38 return result;
39}
40
41/**
42 * __ffs - find first bit in word.
43 * @word: The word to search
44 *
45 * Undefined if no bit exists, so code should check against 0 first.
46 */
47static inline unsigned long __ffs(unsigned long word)
48{
49 unsigned long result;
50
51 __asm__("1:\n\t"
52 "shlr %1\n\t"
53 "bf/s 1b\n\t"
54 " add #1, %0"
55 : "=r" (result), "=r" (word)
56 : "0" (~0L), "1" (word)
57 : "t");
58 return result;
59}
60#else
61static inline unsigned long ffz(unsigned long word)
62{
63 unsigned long result, __d2, __d3;
64
65 __asm__("gettr tr0, %2\n\t"
66 "pta $+32, tr0\n\t"
67 "andi %1, 1, %3\n\t"
68 "beq %3, r63, tr0\n\t"
69 "pta $+4, tr0\n"
70 "0:\n\t"
71 "shlri.l %1, 1, %1\n\t"
72 "addi %0, 1, %0\n\t"
73 "andi %1, 1, %3\n\t"
74 "beqi %3, 1, tr0\n"
75 "1:\n\t"
76 "ptabs %2, tr0\n\t"
77 : "=r" (result), "=r" (word), "=r" (__d2), "=r" (__d3)
78 : "0" (0L), "1" (word));
79
80 return result;
81}
82
83#include <asm-generic/bitops/__ffs.h>
84#endif
85
86#include <asm-generic/bitops/find.h>
87#include <asm-generic/bitops/ffs.h>
88#include <asm-generic/bitops/hweight.h>
89#include <asm-generic/bitops/lock.h>
90#include <asm-generic/bitops/sched.h>
91#include <asm-generic/bitops/le.h>
92#include <asm-generic/bitops/ext2-atomic.h>
93#include <asm-generic/bitops/fls.h>
94#include <asm-generic/bitops/__fls.h>
95#include <asm-generic/bitops/fls64.h>
96
97#endif /* __KERNEL__ */
98
99#endif /* __ASM_SH_BITOPS_H */