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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * MPC8349E-mITX Device Tree Source
4 *
5 * Copyright 2006 Freescale Semiconductor Inc.
6 */
7
8/dts-v1/;
9
10/ {
11 model = "MPC8349EMITX";
12 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
13 #address-cells = <1>;
14 #size-cells = <1>;
15
16 aliases {
17 ethernet0 = &enet0;
18 ethernet1 = &enet1;
19 serial0 = &serial0;
20 serial1 = &serial1;
21 pci0 = &pci0;
22 pci1 = &pci1;
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 PowerPC,8349@0 {
30 device_type = "cpu";
31 reg = <0x0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
36 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader
39 };
40 };
41
42 memory {
43 device_type = "memory";
44 reg = <0x00000000 0x10000000>;
45 };
46
47 soc8349@e0000000 {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 device_type = "soc";
51 compatible = "simple-bus";
52 ranges = <0x0 0xe0000000 0x00100000>;
53 reg = <0xe0000000 0x00000200>;
54 bus-frequency = <0>; // from bootloader
55
56 wdt@200 {
57 device_type = "watchdog";
58 compatible = "mpc83xx_wdt";
59 reg = <0x200 0x100>;
60 };
61
62 gpio1: gpio-controller@c00 {
63 #gpio-cells = <2>;
64 compatible = "fsl,mpc8349-gpio";
65 reg = <0xc00 0x100>;
66 interrupts = <74 0x8>;
67 interrupt-parent = <&ipic>;
68 gpio-controller;
69 };
70
71 gpio2: gpio-controller@d00 {
72 #gpio-cells = <2>;
73 compatible = "fsl,mpc8349-gpio";
74 reg = <0xd00 0x100>;
75 interrupts = <75 0x8>;
76 interrupt-parent = <&ipic>;
77 gpio-controller;
78 };
79
80 i2c@3000 {
81 #address-cells = <1>;
82 #size-cells = <0>;
83 cell-index = <0>;
84 compatible = "fsl-i2c";
85 reg = <0x3000 0x100>;
86 interrupts = <14 0x8>;
87 interrupt-parent = <&ipic>;
88 dfsrr;
89
90 eeprom: at24@50 {
91 compatible = "st,24c256", "atmel,24c256";
92 reg = <0x50>;
93 };
94
95 };
96
97 i2c@3100 {
98 #address-cells = <1>;
99 #size-cells = <0>;
100 cell-index = <1>;
101 compatible = "fsl-i2c";
102 reg = <0x3100 0x100>;
103 interrupts = <15 0x8>;
104 interrupt-parent = <&ipic>;
105 dfsrr;
106
107 rtc@68 {
108 compatible = "dallas,ds1339";
109 reg = <0x68>;
110 interrupts = <18 0x8>;
111 interrupt-parent = <&ipic>;
112 };
113
114 pcf1: iexp@38 {
115 #gpio-cells = <2>;
116 compatible = "ti,pcf8574a";
117 reg = <0x38>;
118 gpio-controller;
119 };
120
121 pcf2: iexp@39 {
122 #gpio-cells = <2>;
123 compatible = "ti,pcf8574a";
124 reg = <0x39>;
125 gpio-controller;
126 };
127
128 spd: at24@51 {
129 compatible = "atmel,spd";
130 reg = <0x51>;
131 };
132
133 mcu_pio: mcu@a {
134 #gpio-cells = <2>;
135 compatible = "fsl,mc9s08qg8-mpc8349emitx",
136 "fsl,mcu-mpc8349emitx";
137 reg = <0x0a>;
138 gpio-controller;
139 };
140 };
141
142 spi@7000 {
143 cell-index = <0>;
144 compatible = "fsl,spi";
145 reg = <0x7000 0x1000>;
146 interrupts = <16 0x8>;
147 interrupt-parent = <&ipic>;
148 mode = "cpu";
149 };
150
151 dma@82a8 {
152 #address-cells = <1>;
153 #size-cells = <1>;
154 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
155 reg = <0x82a8 4>;
156 ranges = <0 0x8100 0x1a8>;
157 interrupt-parent = <&ipic>;
158 interrupts = <71 8>;
159 cell-index = <0>;
160 dma-channel@0 {
161 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
162 reg = <0 0x80>;
163 cell-index = <0>;
164 interrupt-parent = <&ipic>;
165 interrupts = <71 8>;
166 };
167 dma-channel@80 {
168 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
169 reg = <0x80 0x80>;
170 cell-index = <1>;
171 interrupt-parent = <&ipic>;
172 interrupts = <71 8>;
173 };
174 dma-channel@100 {
175 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
176 reg = <0x100 0x80>;
177 cell-index = <2>;
178 interrupt-parent = <&ipic>;
179 interrupts = <71 8>;
180 };
181 dma-channel@180 {
182 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
183 reg = <0x180 0x28>;
184 cell-index = <3>;
185 interrupt-parent = <&ipic>;
186 interrupts = <71 8>;
187 };
188 };
189
190 usb@22000 {
191 compatible = "fsl-usb2-mph";
192 reg = <0x22000 0x1000>;
193 #address-cells = <1>;
194 #size-cells = <0>;
195 interrupt-parent = <&ipic>;
196 interrupts = <39 0x8>;
197 phy_type = "ulpi";
198 port0;
199 };
200
201 usb@23000 {
202 compatible = "fsl-usb2-dr";
203 reg = <0x23000 0x1000>;
204 #address-cells = <1>;
205 #size-cells = <0>;
206 interrupt-parent = <&ipic>;
207 interrupts = <38 0x8>;
208 dr_mode = "peripheral";
209 phy_type = "ulpi";
210 };
211
212 enet0: ethernet@24000 {
213 #address-cells = <1>;
214 #size-cells = <1>;
215 cell-index = <0>;
216 device_type = "network";
217 model = "TSEC";
218 compatible = "gianfar";
219 reg = <0x24000 0x1000>;
220 ranges = <0x0 0x24000 0x1000>;
221 local-mac-address = [ 00 00 00 00 00 00 ];
222 interrupts = <32 0x8 33 0x8 34 0x8>;
223 interrupt-parent = <&ipic>;
224 tbi-handle = <&tbi0>;
225 phy-handle = <&phy1c>;
226 linux,network-index = <0>;
227
228 mdio@520 {
229 #address-cells = <1>;
230 #size-cells = <0>;
231 compatible = "fsl,gianfar-mdio";
232 reg = <0x520 0x20>;
233
234 /* Vitesse 8201 */
235 phy1c: ethernet-phy@1c {
236 interrupt-parent = <&ipic>;
237 interrupts = <18 0x8>;
238 reg = <0x1c>;
239 };
240
241 tbi0: tbi-phy@11 {
242 reg = <0x11>;
243 device_type = "tbi-phy";
244 };
245 };
246 };
247
248 enet1: ethernet@25000 {
249 #address-cells = <1>;
250 #size-cells = <1>;
251 cell-index = <1>;
252 device_type = "network";
253 model = "TSEC";
254 compatible = "gianfar";
255 reg = <0x25000 0x1000>;
256 ranges = <0x0 0x25000 0x1000>;
257 local-mac-address = [ 00 00 00 00 00 00 ];
258 interrupts = <35 0x8 36 0x8 37 0x8>;
259 interrupt-parent = <&ipic>;
260 /* Vitesse 7385 isn't on the MDIO bus */
261 fixed-link = <1 1 1000 0 0>;
262 linux,network-index = <1>;
263 tbi-handle = <&tbi1>;
264
265 mdio@520 {
266 #address-cells = <1>;
267 #size-cells = <0>;
268 compatible = "fsl,gianfar-tbi";
269 reg = <0x520 0x20>;
270
271 tbi1: tbi-phy@11 {
272 reg = <0x11>;
273 device_type = "tbi-phy";
274 };
275 };
276 };
277
278 serial0: serial@4500 {
279 cell-index = <0>;
280 device_type = "serial";
281 compatible = "fsl,ns16550", "ns16550";
282 reg = <0x4500 0x100>;
283 clock-frequency = <0>; // from bootloader
284 interrupts = <9 0x8>;
285 interrupt-parent = <&ipic>;
286 };
287
288 serial1: serial@4600 {
289 cell-index = <1>;
290 device_type = "serial";
291 compatible = "fsl,ns16550", "ns16550";
292 reg = <0x4600 0x100>;
293 clock-frequency = <0>; // from bootloader
294 interrupts = <10 0x8>;
295 interrupt-parent = <&ipic>;
296 };
297
298 crypto@30000 {
299 compatible = "fsl,sec2.0";
300 reg = <0x30000 0x10000>;
301 interrupts = <11 0x8>;
302 interrupt-parent = <&ipic>;
303 fsl,num-channels = <4>;
304 fsl,channel-fifo-len = <24>;
305 fsl,exec-units-mask = <0x7e>;
306 fsl,descriptor-types-mask = <0x01010ebf>;
307 };
308
309 ipic: pic@700 {
310 interrupt-controller;
311 #address-cells = <0>;
312 #interrupt-cells = <2>;
313 reg = <0x700 0x100>;
314 device_type = "ipic";
315 };
316
317 gpio-leds {
318 compatible = "gpio-leds";
319
320 green {
321 label = "Green";
322 gpios = <&pcf1 0 1>;
323 linux,default-trigger = "heartbeat";
324 };
325
326 yellow {
327 label = "Yellow";
328 gpios = <&pcf1 1 1>;
329 /* linux,default-trigger = "heartbeat"; */
330 default-state = "on";
331 };
332 };
333
334 };
335
336 pci0: pci@e0008500 {
337 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
338 interrupt-map = <
339 /* IDSEL 0x10 - SATA */
340 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
341 >;
342 interrupt-parent = <&ipic>;
343 interrupts = <66 0x8>;
344 bus-range = <0x0 0x0>;
345 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
346 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
347 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
348 clock-frequency = <66666666>;
349 #interrupt-cells = <1>;
350 #size-cells = <2>;
351 #address-cells = <3>;
352 reg = <0xe0008500 0x100 /* internal registers */
353 0xe0008300 0x8>; /* config space access registers */
354 compatible = "fsl,mpc8349-pci";
355 device_type = "pci";
356 };
357
358 pci1: pci@e0008600 {
359 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
360 interrupt-map = <
361 /* IDSEL 0x0E - MiniPCI Slot */
362 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
363
364 /* IDSEL 0x0F - PCI Slot */
365 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
366 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
367 >;
368 interrupt-parent = <&ipic>;
369 interrupts = <67 0x8>;
370 bus-range = <0x0 0x0>;
371 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
372 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
373 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
374 clock-frequency = <66666666>;
375 #interrupt-cells = <1>;
376 #size-cells = <2>;
377 #address-cells = <3>;
378 reg = <0xe0008600 0x100 /* internal registers */
379 0xe0008380 0x8>; /* config space access registers */
380 compatible = "fsl,mpc8349-pci";
381 device_type = "pci";
382 };
383
384 localbus@e0005000 {
385 #address-cells = <2>;
386 #size-cells = <1>;
387 compatible = "fsl,mpc8349e-localbus",
388 "fsl,pq2pro-localbus",
389 "simple-bus";
390 reg = <0xe0005000 0xd8>;
391 ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */
392 0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */
393 0x2 0x0 0xf9000000 0x200000 /* exp slot */
394 0x3 0x0 0xf0000000 0x210>; /* CF slot */
395
396 flash@0,0 {
397 compatible = "cfi-flash";
398 reg = <0x0 0x0 0x800000>;
399 bank-width = <2>;
400 device-width = <1>;
401 };
402
403 flash@0,800000 {
404 #address-cells = <1>;
405 #size-cells = <1>;
406 compatible = "cfi-flash";
407 reg = <0x0 0x800000 0x800000>;
408 bank-width = <2>;
409 device-width = <1>;
410 };
411
412 pata@3,0 {
413 compatible = "fsl,mpc8349emitx-pata", "ata-generic";
414 reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
415 reg-shift = <1>;
416 pio-mode = <6>;
417 interrupts = <23 0x8>;
418 interrupt-parent = <&ipic>;
419 };
420 };
421};
1/*
2 * MPC8349E-mITX Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "MPC8349EMITX";
16 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 PowerPC,8349@0 {
34 device_type = "cpu";
35 reg = <0x0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>; // from bootloader
41 bus-frequency = <0>; // from bootloader
42 clock-frequency = <0>; // from bootloader
43 };
44 };
45
46 memory {
47 device_type = "memory";
48 reg = <0x00000000 0x10000000>;
49 };
50
51 soc8349@e0000000 {
52 #address-cells = <1>;
53 #size-cells = <1>;
54 device_type = "soc";
55 compatible = "simple-bus";
56 ranges = <0x0 0xe0000000 0x00100000>;
57 reg = <0xe0000000 0x00000200>;
58 bus-frequency = <0>; // from bootloader
59
60 wdt@200 {
61 device_type = "watchdog";
62 compatible = "mpc83xx_wdt";
63 reg = <0x200 0x100>;
64 };
65
66 gpio1: gpio-controller@c00 {
67 #gpio-cells = <2>;
68 compatible = "fsl,mpc8349-gpio";
69 reg = <0xc00 0x100>;
70 interrupts = <74 0x8>;
71 interrupt-parent = <&ipic>;
72 gpio-controller;
73 };
74
75 gpio2: gpio-controller@d00 {
76 #gpio-cells = <2>;
77 compatible = "fsl,mpc8349-gpio";
78 reg = <0xd00 0x100>;
79 interrupts = <75 0x8>;
80 interrupt-parent = <&ipic>;
81 gpio-controller;
82 };
83
84 i2c@3000 {
85 #address-cells = <1>;
86 #size-cells = <0>;
87 cell-index = <0>;
88 compatible = "fsl-i2c";
89 reg = <0x3000 0x100>;
90 interrupts = <14 0x8>;
91 interrupt-parent = <&ipic>;
92 dfsrr;
93
94 eeprom: at24@50 {
95 compatible = "st-micro,24c256";
96 reg = <0x50>;
97 };
98
99 };
100
101 i2c@3100 {
102 #address-cells = <1>;
103 #size-cells = <0>;
104 cell-index = <1>;
105 compatible = "fsl-i2c";
106 reg = <0x3100 0x100>;
107 interrupts = <15 0x8>;
108 interrupt-parent = <&ipic>;
109 dfsrr;
110
111 rtc@68 {
112 compatible = "dallas,ds1339";
113 reg = <0x68>;
114 interrupts = <18 0x8>;
115 interrupt-parent = <&ipic>;
116 };
117
118 pcf1: iexp@38 {
119 #gpio-cells = <2>;
120 compatible = "ti,pcf8574a";
121 reg = <0x38>;
122 gpio-controller;
123 };
124
125 pcf2: iexp@39 {
126 #gpio-cells = <2>;
127 compatible = "ti,pcf8574a";
128 reg = <0x39>;
129 gpio-controller;
130 };
131
132 spd: at24@51 {
133 compatible = "at24,spd";
134 reg = <0x51>;
135 };
136
137 mcu_pio: mcu@a {
138 #gpio-cells = <2>;
139 compatible = "fsl,mc9s08qg8-mpc8349emitx",
140 "fsl,mcu-mpc8349emitx";
141 reg = <0x0a>;
142 gpio-controller;
143 };
144 };
145
146 spi@7000 {
147 cell-index = <0>;
148 compatible = "fsl,spi";
149 reg = <0x7000 0x1000>;
150 interrupts = <16 0x8>;
151 interrupt-parent = <&ipic>;
152 mode = "cpu";
153 };
154
155 dma@82a8 {
156 #address-cells = <1>;
157 #size-cells = <1>;
158 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
159 reg = <0x82a8 4>;
160 ranges = <0 0x8100 0x1a8>;
161 interrupt-parent = <&ipic>;
162 interrupts = <71 8>;
163 cell-index = <0>;
164 dma-channel@0 {
165 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
166 reg = <0 0x80>;
167 cell-index = <0>;
168 interrupt-parent = <&ipic>;
169 interrupts = <71 8>;
170 };
171 dma-channel@80 {
172 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
173 reg = <0x80 0x80>;
174 cell-index = <1>;
175 interrupt-parent = <&ipic>;
176 interrupts = <71 8>;
177 };
178 dma-channel@100 {
179 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
180 reg = <0x100 0x80>;
181 cell-index = <2>;
182 interrupt-parent = <&ipic>;
183 interrupts = <71 8>;
184 };
185 dma-channel@180 {
186 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
187 reg = <0x180 0x28>;
188 cell-index = <3>;
189 interrupt-parent = <&ipic>;
190 interrupts = <71 8>;
191 };
192 };
193
194 usb@22000 {
195 compatible = "fsl-usb2-mph";
196 reg = <0x22000 0x1000>;
197 #address-cells = <1>;
198 #size-cells = <0>;
199 interrupt-parent = <&ipic>;
200 interrupts = <39 0x8>;
201 phy_type = "ulpi";
202 port0;
203 };
204
205 usb@23000 {
206 compatible = "fsl-usb2-dr";
207 reg = <0x23000 0x1000>;
208 #address-cells = <1>;
209 #size-cells = <0>;
210 interrupt-parent = <&ipic>;
211 interrupts = <38 0x8>;
212 dr_mode = "peripheral";
213 phy_type = "ulpi";
214 };
215
216 enet0: ethernet@24000 {
217 #address-cells = <1>;
218 #size-cells = <1>;
219 cell-index = <0>;
220 device_type = "network";
221 model = "TSEC";
222 compatible = "gianfar";
223 reg = <0x24000 0x1000>;
224 ranges = <0x0 0x24000 0x1000>;
225 local-mac-address = [ 00 00 00 00 00 00 ];
226 interrupts = <32 0x8 33 0x8 34 0x8>;
227 interrupt-parent = <&ipic>;
228 tbi-handle = <&tbi0>;
229 phy-handle = <&phy1c>;
230 linux,network-index = <0>;
231
232 mdio@520 {
233 #address-cells = <1>;
234 #size-cells = <0>;
235 compatible = "fsl,gianfar-mdio";
236 reg = <0x520 0x20>;
237
238 /* Vitesse 8201 */
239 phy1c: ethernet-phy@1c {
240 interrupt-parent = <&ipic>;
241 interrupts = <18 0x8>;
242 reg = <0x1c>;
243 };
244
245 tbi0: tbi-phy@11 {
246 reg = <0x11>;
247 device_type = "tbi-phy";
248 };
249 };
250 };
251
252 enet1: ethernet@25000 {
253 #address-cells = <1>;
254 #size-cells = <1>;
255 cell-index = <1>;
256 device_type = "network";
257 model = "TSEC";
258 compatible = "gianfar";
259 reg = <0x25000 0x1000>;
260 ranges = <0x0 0x25000 0x1000>;
261 local-mac-address = [ 00 00 00 00 00 00 ];
262 interrupts = <35 0x8 36 0x8 37 0x8>;
263 interrupt-parent = <&ipic>;
264 /* Vitesse 7385 isn't on the MDIO bus */
265 fixed-link = <1 1 1000 0 0>;
266 linux,network-index = <1>;
267 tbi-handle = <&tbi1>;
268
269 mdio@520 {
270 #address-cells = <1>;
271 #size-cells = <0>;
272 compatible = "fsl,gianfar-tbi";
273 reg = <0x520 0x20>;
274
275 tbi1: tbi-phy@11 {
276 reg = <0x11>;
277 device_type = "tbi-phy";
278 };
279 };
280 };
281
282 serial0: serial@4500 {
283 cell-index = <0>;
284 device_type = "serial";
285 compatible = "fsl,ns16550", "ns16550";
286 reg = <0x4500 0x100>;
287 clock-frequency = <0>; // from bootloader
288 interrupts = <9 0x8>;
289 interrupt-parent = <&ipic>;
290 };
291
292 serial1: serial@4600 {
293 cell-index = <1>;
294 device_type = "serial";
295 compatible = "fsl,ns16550", "ns16550";
296 reg = <0x4600 0x100>;
297 clock-frequency = <0>; // from bootloader
298 interrupts = <10 0x8>;
299 interrupt-parent = <&ipic>;
300 };
301
302 crypto@30000 {
303 compatible = "fsl,sec2.0";
304 reg = <0x30000 0x10000>;
305 interrupts = <11 0x8>;
306 interrupt-parent = <&ipic>;
307 fsl,num-channels = <4>;
308 fsl,channel-fifo-len = <24>;
309 fsl,exec-units-mask = <0x7e>;
310 fsl,descriptor-types-mask = <0x01010ebf>;
311 };
312
313 ipic: pic@700 {
314 interrupt-controller;
315 #address-cells = <0>;
316 #interrupt-cells = <2>;
317 reg = <0x700 0x100>;
318 device_type = "ipic";
319 };
320
321 gpio-leds {
322 compatible = "gpio-leds";
323
324 green {
325 label = "Green";
326 gpios = <&pcf1 0 1>;
327 linux,default-trigger = "heartbeat";
328 };
329
330 yellow {
331 label = "Yellow";
332 gpios = <&pcf1 1 1>;
333 /* linux,default-trigger = "heartbeat"; */
334 default-state = "on";
335 };
336 };
337
338 };
339
340 pci0: pci@e0008500 {
341 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
342 interrupt-map = <
343 /* IDSEL 0x10 - SATA */
344 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
345 >;
346 interrupt-parent = <&ipic>;
347 interrupts = <66 0x8>;
348 bus-range = <0x0 0x0>;
349 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
350 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
351 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
352 clock-frequency = <66666666>;
353 #interrupt-cells = <1>;
354 #size-cells = <2>;
355 #address-cells = <3>;
356 reg = <0xe0008500 0x100 /* internal registers */
357 0xe0008300 0x8>; /* config space access registers */
358 compatible = "fsl,mpc8349-pci";
359 device_type = "pci";
360 };
361
362 pci1: pci@e0008600 {
363 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
364 interrupt-map = <
365 /* IDSEL 0x0E - MiniPCI Slot */
366 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
367
368 /* IDSEL 0x0F - PCI Slot */
369 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
370 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
371 >;
372 interrupt-parent = <&ipic>;
373 interrupts = <67 0x8>;
374 bus-range = <0x0 0x0>;
375 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
376 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
377 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
378 clock-frequency = <66666666>;
379 #interrupt-cells = <1>;
380 #size-cells = <2>;
381 #address-cells = <3>;
382 reg = <0xe0008600 0x100 /* internal registers */
383 0xe0008380 0x8>; /* config space access registers */
384 compatible = "fsl,mpc8349-pci";
385 device_type = "pci";
386 };
387
388 localbus@e0005000 {
389 #address-cells = <2>;
390 #size-cells = <1>;
391 compatible = "fsl,mpc8349e-localbus",
392 "fsl,pq2pro-localbus",
393 "simple-bus";
394 reg = <0xe0005000 0xd8>;
395 ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */
396 0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */
397 0x2 0x0 0xf9000000 0x200000 /* exp slot */
398 0x3 0x0 0xf0000000 0x210>; /* CF slot */
399
400 flash@0,0 {
401 compatible = "cfi-flash";
402 reg = <0x0 0x0 0x800000>;
403 bank-width = <2>;
404 device-width = <1>;
405 };
406
407 flash@0,800000 {
408 #address-cells = <1>;
409 #size-cells = <1>;
410 compatible = "cfi-flash";
411 reg = <0x0 0x800000 0x800000>;
412 bank-width = <2>;
413 device-width = <1>;
414 };
415
416 pata@3,0 {
417 compatible = "fsl,mpc8349emitx-pata", "ata-generic";
418 reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
419 reg-shift = <1>;
420 pio-mode = <6>;
421 interrupts = <23 0x8>;
422 interrupt-parent = <&ipic>;
423 };
424 };
425};