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v6.2
  1/*
  2 * Device Tree Source for Emerson KSI8560
  3 *
  4 * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
  5 *
  6 * Based on mpc8560ads.dts
  7 *
  8 * 2008 (c) MontaVista, Software, Inc.  This file is licensed under
  9 * the terms of the GNU General Public License version 2.  This program
 10 * is licensed "as is" without any warranty of any kind, whether express
 11 * or implied.
 12 *
 13 */
 14
 15/dts-v1/;
 16
 17/include/ "fsl/e500v1_power_isa.dtsi"
 18
 19/ {
 20	model = "KSI8560";
 21	compatible = "emerson,KSI8560";
 22	#address-cells = <1>;
 23	#size-cells = <1>;
 24
 25	aliases {
 26		ethernet0 = &enet0;
 27		ethernet1 = &enet1;
 28		ethernet2 = &enet2;
 29	};
 30
 31	cpus {
 32		#address-cells = <1>;
 33		#size-cells = <0>;
 34
 35		PowerPC,8560@0 {
 36			device_type = "cpu";
 37			reg = <0>;
 38			d-cache-line-size = <32>;
 39			i-cache-line-size = <32>;
 40			d-cache-size = <0x8000>;		/* L1, 32K */
 41			i-cache-size = <0x8000>;		/* L1, 32K */
 42			timebase-frequency = <0>;		/* From U-boot */
 43			bus-frequency = <0>;			/* From U-boot */
 44			clock-frequency = <0>;			/* From U-boot */
 45			next-level-cache = <&L2>;
 46		};
 47	};
 48
 49	memory {
 50		device_type = "memory";
 51		reg = <0x00000000 0x10000000>;			/* Fixed by bootwrapper */
 52	};
 53
 54	soc@fdf00000 {
 55		#address-cells = <1>;
 56		#size-cells = <1>;
 57		device_type = "soc";
 58		ranges = <0x00000000 0xfdf00000 0x00100000>;
 59		bus-frequency = <0>;				/* Fixed by bootwrapper */
 60
 61		ecm-law@0 {
 62			compatible = "fsl,ecm-law";
 63			reg = <0x0 0x1000>;
 64			fsl,num-laws = <8>;
 65		};
 66
 67		ecm@1000 {
 68			compatible = "fsl,mpc8560-ecm", "fsl,ecm";
 69			reg = <0x1000 0x1000>;
 70			interrupts = <17 2>;
 71			interrupt-parent = <&mpic>;
 72		};
 73
 74		memory-controller@2000 {
 75			compatible = "fsl,mpc8540-memory-controller";
 76			reg = <0x2000 0x1000>;
 77			interrupt-parent = <&mpic>;
 78			interrupts = <0x12 0x2>;
 79		};
 80
 81		L2: l2-cache-controller@20000 {
 82			compatible = "fsl,mpc8540-l2-cache-controller";
 83			reg = <0x20000 0x1000>;
 84			cache-line-size = <0x20>;		/* 32 bytes */
 85			cache-size = <0x40000>;			/* L2, 256K */
 86			interrupt-parent = <&mpic>;
 87			interrupts = <0x10 0x2>;
 88		};
 89
 90		i2c@3000 {
 91			#address-cells = <1>;
 92			#size-cells = <0>;
 93			cell-index = <0>;
 94			compatible = "fsl-i2c";
 95			reg = <0x3000 0x100>;
 96			interrupts = <0x2b 0x2>;
 97			interrupt-parent = <&mpic>;
 98			dfsrr;
 99		};
100
101		dma@21300 {
102			#address-cells = <1>;
103			#size-cells = <1>;
104			compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
105			reg = <0x21300 0x4>;
106			ranges = <0x0 0x21100 0x200>;
107			cell-index = <0>;
108			dma-channel@0 {
109				compatible = "fsl,mpc8560-dma-channel",
110						"fsl,eloplus-dma-channel";
111				reg = <0x0 0x80>;
112				cell-index = <0>;
113				interrupt-parent = <&mpic>;
114				interrupts = <20 2>;
115			};
116			dma-channel@80 {
117				compatible = "fsl,mpc8560-dma-channel",
118						"fsl,eloplus-dma-channel";
119				reg = <0x80 0x80>;
120				cell-index = <1>;
121				interrupt-parent = <&mpic>;
122				interrupts = <21 2>;
123			};
124			dma-channel@100 {
125				compatible = "fsl,mpc8560-dma-channel",
126						"fsl,eloplus-dma-channel";
127				reg = <0x100 0x80>;
128				cell-index = <2>;
129				interrupt-parent = <&mpic>;
130				interrupts = <22 2>;
131			};
132			dma-channel@180 {
133				compatible = "fsl,mpc8560-dma-channel",
134						"fsl,eloplus-dma-channel";
135				reg = <0x180 0x80>;
136				cell-index = <3>;
137				interrupt-parent = <&mpic>;
138				interrupts = <23 2>;
139			};
140		};
141
142		enet0: ethernet@24000 {
143			#address-cells = <1>;
144			#size-cells = <1>;
145			device_type = "network";
146			model = "TSEC";
147			compatible = "gianfar";
148			reg = <0x24000 0x1000>;
149			ranges = <0x0 0x24000 0x1000>;
150			/* Mac address filled in by bootwrapper */
151			local-mac-address = [ 00 00 00 00 00 00 ];
152			interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
153			interrupt-parent = <&mpic>;
154			tbi-handle = <&tbi0>;
155			phy-handle = <&PHY1>;
156
157			mdio@520 {					/* For TSECs */
158				#address-cells = <1>;
159				#size-cells = <0>;
160				compatible = "fsl,gianfar-mdio";
161				reg = <0x520 0x20>;
162
163				PHY1: ethernet-phy@1 {
164					interrupt-parent = <&mpic>;
165					reg = <0x1>;
166				};
167
168				PHY2: ethernet-phy@2 {
169					interrupt-parent = <&mpic>;
170					reg = <0x2>;
171				};
172
173				tbi0: tbi-phy@11 {
174					reg = <0x11>;
175					device_type = "tbi-phy";
176				};
177			};
178		};
179
180		enet1: ethernet@25000 {
181			#address-cells = <1>;
182			#size-cells = <1>;
183			device_type = "network";
184			model = "TSEC";
185			compatible = "gianfar";
186			reg = <0x25000 0x1000>;
187			ranges = <0x0 0x25000 0x1000>;
188			/* Mac address filled in by bootwrapper */
189			local-mac-address = [ 00 00 00 00 00 00 ];
190			interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
191			interrupt-parent = <&mpic>;
192			tbi-handle = <&tbi1>;
193			phy-handle = <&PHY2>;
194
195			mdio@520 {
196				#address-cells = <1>;
197				#size-cells = <0>;
198				compatible = "fsl,gianfar-tbi";
199				reg = <0x520 0x20>;
200
201				tbi1: tbi-phy@11 {
202					reg = <0x11>;
203					device_type = "tbi-phy";
204				};
205			};
206		};
207
208		mpic: pic@40000 {
209			#address-cells = <0>;
210			#interrupt-cells = <2>;
211			interrupt-controller;
212			reg = <0x40000 0x40000>;
213			device_type = "open-pic";
214		};
215
216		cpm@919c0 {
217			#address-cells = <1>;
218			#size-cells = <1>;
219			compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
220			reg = <0x919c0 0x30>;
221			ranges;
222
223			muram@80000 {
224				#address-cells = <1>;
225				#size-cells = <1>;
226				ranges = <0x0 0x80000 0x10000>;
227
228				data@0 {
229					compatible = "fsl,cpm-muram-data";
230					reg = <0x0 0x4000 0x9000 0x2000>;
231				};
232			};
233
234			brg@919f0 {
235				compatible = "fsl,mpc8560-brg",
236					     "fsl,cpm2-brg",
237					     "fsl,cpm-brg";
238				reg = <0x919f0 0x10 0x915f0 0x10>;
239				clock-frequency = <165000000>;	/* 166MHz */
240			};
241
242			CPMPIC: pic@90c00 {
243				#address-cells = <0>;
244				#interrupt-cells = <2>;
245				interrupt-controller;
246				interrupts = <0x2e 0x2>;
247				interrupt-parent = <&mpic>;
248				reg = <0x90c00 0x80>;
249				compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
250			};
251
252			serial@91a00 {
253				device_type = "serial";
254				compatible = "fsl,mpc8560-scc-uart",
255					     "fsl,cpm2-scc-uart";
256				reg = <0x91a00 0x20 0x88000 0x100>;
257				fsl,cpm-brg = <1>;
258				fsl,cpm-command = <0x800000>;
259				current-speed = <0x1c200>;
260				interrupts = <0x28 0x8>;
261				interrupt-parent = <&CPMPIC>;
262			};
263
264			serial@91a20 {
265				device_type = "serial";
266				compatible = "fsl,mpc8560-scc-uart",
267					     "fsl,cpm2-scc-uart";
268				reg = <0x91a20 0x20 0x88100 0x100>;
269				fsl,cpm-brg = <2>;
270				fsl,cpm-command = <0x4a00000>;
271				current-speed = <0x1c200>;
272				interrupts = <0x29 0x8>;
273				interrupt-parent = <&CPMPIC>;
274			};
275
276			mdio@90d00 {				/* For FCCs */
277				#address-cells = <1>;
278				#size-cells = <0>;
279				compatible = "fsl,cpm2-mdio-bitbang";
280				reg = <0x90d00 0x14>;
281				fsl,mdio-pin = <24>;
282				fsl,mdc-pin = <25>;
283
284				PHY0: ethernet-phy@0 {
285					interrupt-parent = <&mpic>;
286					reg = <0x0>;
287				};
288			};
289
290			enet2: ethernet@91300 {
291				device_type = "network";
292				compatible = "fsl,mpc8560-fcc-enet",
293					     "fsl,cpm2-fcc-enet";
294				reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
295				/* Mac address filled in by bootwrapper */
296				local-mac-address = [ 00 00 00 00 00 00 ];
297				fsl,cpm-command = <0x12000300>;
298				interrupts = <0x20 0x8>;
299				interrupt-parent = <&CPMPIC>;
300				phy-handle = <&PHY0>;
301			};
302		};
303	};
304
305	localbus@fdf05000 {
306		#address-cells = <2>;
307		#size-cells = <1>;
308		compatible = "fsl,mpc8560-localbus", "simple-bus";
309		reg = <0xfdf05000 0x68>;
310
311		ranges = <0x0 0x0 0xe0000000 0x00800000
312			  0x4 0x0 0xe8080000 0x00080000>;
313
314		flash@0,0 {
315			#address-cells = <1>;
316			#size-cells = <1>;
317			compatible = "jedec-flash";
318			reg = <0x0 0x0 0x800000>;
319			bank-width = <0x2>;
320
321			partition@0 {
322				label = "Primary Kernel";
323				reg = <0x0 0x180000>;
324			};
325			partition@180000 {
326				label = "Primary Filesystem";
327				reg = <0x180000 0x580000>;
328			};
329			partition@700000 {
330				label = "Monitor";
331				reg = <0x300000 0x100000>;
332				read-only;
333			};
334		};
335
336		cpld@4,0 {
337			compatible = "emerson,KSI8560-cpld";
338			reg = <0x4 0x0 0x80000>;
339		};
340	};
341
342
343	chosen {
344		stdout-path = "/soc/cpm/serial@91a00";
345	};
346};
v4.6
  1/*
  2 * Device Tree Source for Emerson KSI8560
  3 *
  4 * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
  5 *
  6 * Based on mpc8560ads.dts
  7 *
  8 * 2008 (c) MontaVista, Software, Inc.  This file is licensed under
  9 * the terms of the GNU General Public License version 2.  This program
 10 * is licensed "as is" without any warranty of any kind, whether express
 11 * or implied.
 12 *
 13 */
 14
 15/dts-v1/;
 16
 
 
 17/ {
 18	model = "KSI8560";
 19	compatible = "emerson,KSI8560";
 20	#address-cells = <1>;
 21	#size-cells = <1>;
 22
 23	aliases {
 24		ethernet0 = &enet0;
 25		ethernet1 = &enet1;
 26		ethernet2 = &enet2;
 27	};
 28
 29	cpus {
 30		#address-cells = <1>;
 31		#size-cells = <0>;
 32
 33		PowerPC,8560@0 {
 34			device_type = "cpu";
 35			reg = <0>;
 36			d-cache-line-size = <32>;
 37			i-cache-line-size = <32>;
 38			d-cache-size = <0x8000>;		/* L1, 32K */
 39			i-cache-size = <0x8000>;		/* L1, 32K */
 40			timebase-frequency = <0>;		/* From U-boot */
 41			bus-frequency = <0>;			/* From U-boot */
 42			clock-frequency = <0>;			/* From U-boot */
 43			next-level-cache = <&L2>;
 44		};
 45	};
 46
 47	memory {
 48		device_type = "memory";
 49		reg = <0x00000000 0x10000000>;			/* Fixed by bootwrapper */
 50	};
 51
 52	soc@fdf00000 {
 53		#address-cells = <1>;
 54		#size-cells = <1>;
 55		device_type = "soc";
 56		ranges = <0x00000000 0xfdf00000 0x00100000>;
 57		bus-frequency = <0>;				/* Fixed by bootwrapper */
 58
 59		ecm-law@0 {
 60			compatible = "fsl,ecm-law";
 61			reg = <0x0 0x1000>;
 62			fsl,num-laws = <8>;
 63		};
 64
 65		ecm@1000 {
 66			compatible = "fsl,mpc8560-ecm", "fsl,ecm";
 67			reg = <0x1000 0x1000>;
 68			interrupts = <17 2>;
 69			interrupt-parent = <&mpic>;
 70		};
 71
 72		memory-controller@2000 {
 73			compatible = "fsl,mpc8540-memory-controller";
 74			reg = <0x2000 0x1000>;
 75			interrupt-parent = <&mpic>;
 76			interrupts = <0x12 0x2>;
 77		};
 78
 79		L2: l2-cache-controller@20000 {
 80			compatible = "fsl,mpc8540-l2-cache-controller";
 81			reg = <0x20000 0x1000>;
 82			cache-line-size = <0x20>;		/* 32 bytes */
 83			cache-size = <0x40000>;			/* L2, 256K */
 84			interrupt-parent = <&mpic>;
 85			interrupts = <0x10 0x2>;
 86		};
 87
 88		i2c@3000 {
 89			#address-cells = <1>;
 90			#size-cells = <0>;
 91			cell-index = <0>;
 92			compatible = "fsl-i2c";
 93			reg = <0x3000 0x100>;
 94			interrupts = <0x2b 0x2>;
 95			interrupt-parent = <&mpic>;
 96			dfsrr;
 97		};
 98
 99		dma@21300 {
100			#address-cells = <1>;
101			#size-cells = <1>;
102			compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
103			reg = <0x21300 0x4>;
104			ranges = <0x0 0x21100 0x200>;
105			cell-index = <0>;
106			dma-channel@0 {
107				compatible = "fsl,mpc8560-dma-channel",
108						"fsl,eloplus-dma-channel";
109				reg = <0x0 0x80>;
110				cell-index = <0>;
111				interrupt-parent = <&mpic>;
112				interrupts = <20 2>;
113			};
114			dma-channel@80 {
115				compatible = "fsl,mpc8560-dma-channel",
116						"fsl,eloplus-dma-channel";
117				reg = <0x80 0x80>;
118				cell-index = <1>;
119				interrupt-parent = <&mpic>;
120				interrupts = <21 2>;
121			};
122			dma-channel@100 {
123				compatible = "fsl,mpc8560-dma-channel",
124						"fsl,eloplus-dma-channel";
125				reg = <0x100 0x80>;
126				cell-index = <2>;
127				interrupt-parent = <&mpic>;
128				interrupts = <22 2>;
129			};
130			dma-channel@180 {
131				compatible = "fsl,mpc8560-dma-channel",
132						"fsl,eloplus-dma-channel";
133				reg = <0x180 0x80>;
134				cell-index = <3>;
135				interrupt-parent = <&mpic>;
136				interrupts = <23 2>;
137			};
138		};
139
140		enet0: ethernet@24000 {
141			#address-cells = <1>;
142			#size-cells = <1>;
143			device_type = "network";
144			model = "TSEC";
145			compatible = "gianfar";
146			reg = <0x24000 0x1000>;
147			ranges = <0x0 0x24000 0x1000>;
148			/* Mac address filled in by bootwrapper */
149			local-mac-address = [ 00 00 00 00 00 00 ];
150			interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
151			interrupt-parent = <&mpic>;
152			tbi-handle = <&tbi0>;
153			phy-handle = <&PHY1>;
154
155			mdio@520 {					/* For TSECs */
156				#address-cells = <1>;
157				#size-cells = <0>;
158				compatible = "fsl,gianfar-mdio";
159				reg = <0x520 0x20>;
160
161				PHY1: ethernet-phy@1 {
162					interrupt-parent = <&mpic>;
163					reg = <0x1>;
164				};
165
166				PHY2: ethernet-phy@2 {
167					interrupt-parent = <&mpic>;
168					reg = <0x2>;
169				};
170
171				tbi0: tbi-phy@11 {
172					reg = <0x11>;
173					device_type = "tbi-phy";
174				};
175			};
176		};
177
178		enet1: ethernet@25000 {
179			#address-cells = <1>;
180			#size-cells = <1>;
181			device_type = "network";
182			model = "TSEC";
183			compatible = "gianfar";
184			reg = <0x25000 0x1000>;
185			ranges = <0x0 0x25000 0x1000>;
186			/* Mac address filled in by bootwrapper */
187			local-mac-address = [ 00 00 00 00 00 00 ];
188			interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
189			interrupt-parent = <&mpic>;
190			tbi-handle = <&tbi1>;
191			phy-handle = <&PHY2>;
192
193			mdio@520 {
194				#address-cells = <1>;
195				#size-cells = <0>;
196				compatible = "fsl,gianfar-tbi";
197				reg = <0x520 0x20>;
198
199				tbi1: tbi-phy@11 {
200					reg = <0x11>;
201					device_type = "tbi-phy";
202				};
203			};
204		};
205
206		mpic: pic@40000 {
207			#address-cells = <0>;
208			#interrupt-cells = <2>;
209			interrupt-controller;
210			reg = <0x40000 0x40000>;
211			device_type = "open-pic";
212		};
213
214		cpm@919c0 {
215			#address-cells = <1>;
216			#size-cells = <1>;
217			compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
218			reg = <0x919c0 0x30>;
219			ranges;
220
221			muram@80000 {
222				#address-cells = <1>;
223				#size-cells = <1>;
224				ranges = <0x0 0x80000 0x10000>;
225
226				data@0 {
227					compatible = "fsl,cpm-muram-data";
228					reg = <0x0 0x4000 0x9000 0x2000>;
229				};
230			};
231
232			brg@919f0 {
233				compatible = "fsl,mpc8560-brg",
234					     "fsl,cpm2-brg",
235					     "fsl,cpm-brg";
236				reg = <0x919f0 0x10 0x915f0 0x10>;
237				clock-frequency = <165000000>;	/* 166MHz */
238			};
239
240			CPMPIC: pic@90c00 {
241				#address-cells = <0>;
242				#interrupt-cells = <2>;
243				interrupt-controller;
244				interrupts = <0x2e 0x2>;
245				interrupt-parent = <&mpic>;
246				reg = <0x90c00 0x80>;
247				compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
248			};
249
250			serial@91a00 {
251				device_type = "serial";
252				compatible = "fsl,mpc8560-scc-uart",
253					     "fsl,cpm2-scc-uart";
254				reg = <0x91a00 0x20 0x88000 0x100>;
255				fsl,cpm-brg = <1>;
256				fsl,cpm-command = <0x800000>;
257				current-speed = <0x1c200>;
258				interrupts = <0x28 0x8>;
259				interrupt-parent = <&CPMPIC>;
260			};
261
262			serial@91a20 {
263				device_type = "serial";
264				compatible = "fsl,mpc8560-scc-uart",
265					     "fsl,cpm2-scc-uart";
266				reg = <0x91a20 0x20 0x88100 0x100>;
267				fsl,cpm-brg = <2>;
268				fsl,cpm-command = <0x4a00000>;
269				current-speed = <0x1c200>;
270				interrupts = <0x29 0x8>;
271				interrupt-parent = <&CPMPIC>;
272			};
273
274			mdio@90d00 {				/* For FCCs */
275				#address-cells = <1>;
276				#size-cells = <0>;
277				compatible = "fsl,cpm2-mdio-bitbang";
278				reg = <0x90d00 0x14>;
279				fsl,mdio-pin = <24>;
280				fsl,mdc-pin = <25>;
281
282				PHY0: ethernet-phy@0 {
283					interrupt-parent = <&mpic>;
284					reg = <0x0>;
285				};
286			};
287
288			enet2: ethernet@91300 {
289				device_type = "network";
290				compatible = "fsl,mpc8560-fcc-enet",
291					     "fsl,cpm2-fcc-enet";
292				reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
293				/* Mac address filled in by bootwrapper */
294				local-mac-address = [ 00 00 00 00 00 00 ];
295				fsl,cpm-command = <0x12000300>;
296				interrupts = <0x20 0x8>;
297				interrupt-parent = <&CPMPIC>;
298				phy-handle = <&PHY0>;
299			};
300		};
301	};
302
303	localbus@fdf05000 {
304		#address-cells = <2>;
305		#size-cells = <1>;
306		compatible = "fsl,mpc8560-localbus", "simple-bus";
307		reg = <0xfdf05000 0x68>;
308
309		ranges = <0x0 0x0 0xe0000000 0x00800000
310			  0x4 0x0 0xe8080000 0x00080000>;
311
312		flash@0,0 {
313			#address-cells = <1>;
314			#size-cells = <1>;
315			compatible = "jedec-flash";
316			reg = <0x0 0x0 0x800000>;
317			bank-width = <0x2>;
318
319			partition@0 {
320				label = "Primary Kernel";
321				reg = <0x0 0x180000>;
322			};
323			partition@180000 {
324				label = "Primary Filesystem";
325				reg = <0x180000 0x580000>;
326			};
327			partition@700000 {
328				label = "Monitor";
329				reg = <0x300000 0x100000>;
330				read-only;
331			};
332		};
333
334		cpld@4,0 {
335			compatible = "emerson,KSI8560-cpld";
336			reg = <0x4 0x0 0x80000>;
337		};
338	};
339
340
341	chosen {
342		linux,stdout-path = "/soc/cpm/serial@91a00";
343	};
344};