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v6.2
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 *  Kernel Probes (KProbes)
  4 *  arch/mips/kernel/kprobes.c
  5 *
  6 *  Copyright 2006 Sony Corp.
  7 *  Copyright 2010 Cavium Networks
  8 *
  9 *  Some portions copied from the powerpc version.
 10 *
 11 *   Copyright (C) IBM Corporation, 2002, 2004
 
 
 
 
 
 
 
 
 
 
 
 
 
 12 */
 13
 14#define pr_fmt(fmt) "kprobes: " fmt
 15
 16#include <linux/kprobes.h>
 17#include <linux/preempt.h>
 18#include <linux/uaccess.h>
 19#include <linux/kdebug.h>
 20#include <linux/slab.h>
 21
 22#include <asm/ptrace.h>
 23#include <asm/branch.h>
 24#include <asm/break.h>
 25
 26#include "probes-common.h"
 27
 28static const union mips_instruction breakpoint_insn = {
 29	.b_format = {
 30		.opcode = spec_op,
 31		.code = BRK_KPROBE_BP,
 32		.func = break_op
 33	}
 34};
 35
 36static const union mips_instruction breakpoint2_insn = {
 37	.b_format = {
 38		.opcode = spec_op,
 39		.code = BRK_KPROBE_SSTEPBP,
 40		.func = break_op
 41	}
 42};
 43
 44DEFINE_PER_CPU(struct kprobe *, current_kprobe);
 45DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
 46
 47static int insn_has_delayslot(union mips_instruction insn)
 48{
 49	return __insn_has_delay_slot(insn);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 50}
 51NOKPROBE_SYMBOL(insn_has_delayslot);
 52
 53/*
 54 * insn_has_ll_or_sc function checks whether instruction is ll or sc
 55 * one; putting breakpoint on top of atomic ll/sc pair is bad idea;
 56 * so we need to prevent it and refuse kprobes insertion for such
 57 * instructions; cannot do much about breakpoint in the middle of
 58 * ll/sc pair; it is upto user to avoid those places
 59 */
 60static int insn_has_ll_or_sc(union mips_instruction insn)
 61{
 62	int ret = 0;
 63
 64	switch (insn.i_format.opcode) {
 65	case ll_op:
 66	case lld_op:
 67	case sc_op:
 68	case scd_op:
 69		ret = 1;
 70		break;
 71	default:
 72		break;
 73	}
 74	return ret;
 75}
 76NOKPROBE_SYMBOL(insn_has_ll_or_sc);
 77
 78int arch_prepare_kprobe(struct kprobe *p)
 79{
 80	union mips_instruction insn;
 81	union mips_instruction prev_insn;
 82	int ret = 0;
 83
 84	insn = p->addr[0];
 85
 86	if (insn_has_ll_or_sc(insn)) {
 87		pr_notice("Kprobes for ll and sc instructions are not supported\n");
 
 88		ret = -EINVAL;
 89		goto out;
 90	}
 91
 92	if (copy_from_kernel_nofault(&prev_insn, p->addr - 1,
 93			sizeof(mips_instruction)) == 0 &&
 94	    insn_has_delayslot(prev_insn)) {
 95		pr_notice("Kprobes for branch delayslot are not supported\n");
 96		ret = -EINVAL;
 97		goto out;
 98	}
 99
100	if (__insn_is_compact_branch(insn)) {
101		pr_notice("Kprobes for compact branches are not supported\n");
102		ret = -EINVAL;
103		goto out;
104	}
105
106	/* insn: must be on special executable page on mips. */
107	p->ainsn.insn = get_insn_slot();
108	if (!p->ainsn.insn) {
109		ret = -ENOMEM;
110		goto out;
111	}
112
113	/*
114	 * In the kprobe->ainsn.insn[] array we store the original
115	 * instruction at index zero and a break trap instruction at
116	 * index one.
117	 *
118	 * On MIPS arch if the instruction at probed address is a
119	 * branch instruction, we need to execute the instruction at
120	 * Branch Delayslot (BD) at the time of probe hit. As MIPS also
121	 * doesn't have single stepping support, the BD instruction can
122	 * not be executed in-line and it would be executed on SSOL slot
123	 * using a normal breakpoint instruction in the next slot.
124	 * So, read the instruction and save it for later execution.
125	 */
126	if (insn_has_delayslot(insn))
127		memcpy(&p->ainsn.insn[0], p->addr + 1, sizeof(kprobe_opcode_t));
128	else
129		memcpy(&p->ainsn.insn[0], p->addr, sizeof(kprobe_opcode_t));
130
131	p->ainsn.insn[1] = breakpoint2_insn;
132	p->opcode = *p->addr;
133
134out:
135	return ret;
136}
137NOKPROBE_SYMBOL(arch_prepare_kprobe);
138
139void arch_arm_kprobe(struct kprobe *p)
140{
141	*p->addr = breakpoint_insn;
142	flush_insn_slot(p);
143}
144NOKPROBE_SYMBOL(arch_arm_kprobe);
145
146void arch_disarm_kprobe(struct kprobe *p)
147{
148	*p->addr = p->opcode;
149	flush_insn_slot(p);
150}
151NOKPROBE_SYMBOL(arch_disarm_kprobe);
152
153void arch_remove_kprobe(struct kprobe *p)
154{
155	if (p->ainsn.insn) {
156		free_insn_slot(p->ainsn.insn, 0);
157		p->ainsn.insn = NULL;
158	}
159}
160NOKPROBE_SYMBOL(arch_remove_kprobe);
161
162static void save_previous_kprobe(struct kprobe_ctlblk *kcb)
163{
164	kcb->prev_kprobe.kp = kprobe_running();
165	kcb->prev_kprobe.status = kcb->kprobe_status;
166	kcb->prev_kprobe.old_SR = kcb->kprobe_old_SR;
167	kcb->prev_kprobe.saved_SR = kcb->kprobe_saved_SR;
168	kcb->prev_kprobe.saved_epc = kcb->kprobe_saved_epc;
169}
170
171static void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
172{
173	__this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
174	kcb->kprobe_status = kcb->prev_kprobe.status;
175	kcb->kprobe_old_SR = kcb->prev_kprobe.old_SR;
176	kcb->kprobe_saved_SR = kcb->prev_kprobe.saved_SR;
177	kcb->kprobe_saved_epc = kcb->prev_kprobe.saved_epc;
178}
179
180static void set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
181			       struct kprobe_ctlblk *kcb)
182{
183	__this_cpu_write(current_kprobe, p);
184	kcb->kprobe_saved_SR = kcb->kprobe_old_SR = (regs->cp0_status & ST0_IE);
185	kcb->kprobe_saved_epc = regs->cp0_epc;
186}
187
188/**
189 * evaluate_branch_instrucion -
190 *
191 * Evaluate the branch instruction at probed address during probe hit. The
192 * result of evaluation would be the updated epc. The insturction in delayslot
193 * would actually be single stepped using a normal breakpoint) on SSOL slot.
194 *
195 * The result is also saved in the kprobe control block for later use,
196 * in case we need to execute the delayslot instruction. The latter will be
197 * false for NOP instruction in dealyslot and the branch-likely instructions
198 * when the branch is taken. And for those cases we set a flag as
199 * SKIP_DELAYSLOT in the kprobe control block
200 */
201static int evaluate_branch_instruction(struct kprobe *p, struct pt_regs *regs,
202					struct kprobe_ctlblk *kcb)
203{
204	union mips_instruction insn = p->opcode;
205	long epc;
206	int ret = 0;
207
208	epc = regs->cp0_epc;
209	if (epc & 3)
210		goto unaligned;
211
212	if (p->ainsn.insn->word == 0)
213		kcb->flags |= SKIP_DELAYSLOT;
214	else
215		kcb->flags &= ~SKIP_DELAYSLOT;
216
217	ret = __compute_return_epc_for_insn(regs, insn);
218	if (ret < 0)
219		return ret;
220
221	if (ret == BRANCH_LIKELY_TAKEN)
222		kcb->flags |= SKIP_DELAYSLOT;
223
224	kcb->target_epc = regs->cp0_epc;
225
226	return 0;
227
228unaligned:
229	pr_notice("Failed to emulate branch instruction because of unaligned epc - sending SIGBUS to %s.\n", current->comm);
230	force_sig(SIGBUS);
231	return -EFAULT;
232
233}
234
235static void prepare_singlestep(struct kprobe *p, struct pt_regs *regs,
236						struct kprobe_ctlblk *kcb)
237{
238	int ret = 0;
239
240	regs->cp0_status &= ~ST0_IE;
241
242	/* single step inline if the instruction is a break */
243	if (p->opcode.word == breakpoint_insn.word ||
244	    p->opcode.word == breakpoint2_insn.word)
245		regs->cp0_epc = (unsigned long)p->addr;
246	else if (insn_has_delayslot(p->opcode)) {
247		ret = evaluate_branch_instruction(p, regs, kcb);
248		if (ret < 0)
 
249			return;
 
250	}
251	regs->cp0_epc = (unsigned long)&p->ainsn.insn[0];
252}
253
254/*
255 * Called after single-stepping.  p->addr is the address of the
256 * instruction whose first byte has been replaced by the "break 0"
257 * instruction.	 To avoid the SMP problems that can occur when we
258 * temporarily put back the original opcode to single-step, we
259 * single-stepped a copy of the instruction.  The address of this
260 * copy is p->ainsn.insn.
261 *
262 * This function prepares to return from the post-single-step
263 * breakpoint trap. In case of branch instructions, the target
264 * epc to be restored.
265 */
266static void resume_execution(struct kprobe *p,
267				       struct pt_regs *regs,
268				       struct kprobe_ctlblk *kcb)
269{
270	if (insn_has_delayslot(p->opcode))
271		regs->cp0_epc = kcb->target_epc;
272	else {
273		unsigned long orig_epc = kcb->kprobe_saved_epc;
274		regs->cp0_epc = orig_epc + 4;
275	}
276}
277NOKPROBE_SYMBOL(resume_execution);
278
279static int kprobe_handler(struct pt_regs *regs)
280{
281	struct kprobe *p;
282	int ret = 0;
283	kprobe_opcode_t *addr;
284	struct kprobe_ctlblk *kcb;
285
286	addr = (kprobe_opcode_t *) regs->cp0_epc;
287
288	/*
289	 * We don't want to be preempted for the entire
290	 * duration of kprobe processing
291	 */
292	preempt_disable();
293	kcb = get_kprobe_ctlblk();
294
295	/* Check we're not actually recursing */
296	if (kprobe_running()) {
297		p = get_kprobe(addr);
298		if (p) {
299			if (kcb->kprobe_status == KPROBE_HIT_SS &&
300			    p->ainsn.insn->word == breakpoint_insn.word) {
301				regs->cp0_status &= ~ST0_IE;
302				regs->cp0_status |= kcb->kprobe_saved_SR;
303				goto no_kprobe;
304			}
305			/*
306			 * We have reentered the kprobe_handler(), since
307			 * another probe was hit while within the handler.
308			 * We here save the original kprobes variables and
309			 * just single step on the instruction of the new probe
310			 * without calling any user handlers.
311			 */
312			save_previous_kprobe(kcb);
313			set_current_kprobe(p, regs, kcb);
314			kprobes_inc_nmissed_count(p);
315			prepare_singlestep(p, regs, kcb);
316			kcb->kprobe_status = KPROBE_REENTER;
317			if (kcb->flags & SKIP_DELAYSLOT) {
318				resume_execution(p, regs, kcb);
319				restore_previous_kprobe(kcb);
320				preempt_enable_no_resched();
321			}
322			return 1;
323		} else if (addr->word != breakpoint_insn.word) {
324			/*
325			 * The breakpoint instruction was removed by
326			 * another cpu right after we hit, no further
327			 * handling of this interrupt is appropriate
328			 */
329			ret = 1;
 
 
 
 
 
 
330		}
331		goto no_kprobe;
332	}
333
334	p = get_kprobe(addr);
335	if (!p) {
336		if (addr->word != breakpoint_insn.word) {
337			/*
338			 * The breakpoint instruction was removed right
339			 * after we hit it.  Another cpu has removed
340			 * either a probepoint or a debugger breakpoint
341			 * at this address.  In either case, no further
342			 * handling of this interrupt is appropriate.
343			 */
344			ret = 1;
345		}
346		/* Not one of ours: let kernel handle it */
347		goto no_kprobe;
348	}
349
350	set_current_kprobe(p, regs, kcb);
351	kcb->kprobe_status = KPROBE_HIT_ACTIVE;
352
353	if (p->pre_handler && p->pre_handler(p, regs)) {
354		/* handler has already set things up, so skip ss setup */
355		reset_current_kprobe();
356		preempt_enable_no_resched();
357		return 1;
358	}
359
 
360	prepare_singlestep(p, regs, kcb);
361	if (kcb->flags & SKIP_DELAYSLOT) {
362		kcb->kprobe_status = KPROBE_HIT_SSDONE;
363		if (p->post_handler)
364			p->post_handler(p, regs, 0);
365		resume_execution(p, regs, kcb);
366		preempt_enable_no_resched();
367	} else
368		kcb->kprobe_status = KPROBE_HIT_SS;
369
370	return 1;
371
372no_kprobe:
373	preempt_enable_no_resched();
374	return ret;
375
376}
377NOKPROBE_SYMBOL(kprobe_handler);
378
379static inline int post_kprobe_handler(struct pt_regs *regs)
380{
381	struct kprobe *cur = kprobe_running();
382	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
383
384	if (!cur)
385		return 0;
386
387	if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
388		kcb->kprobe_status = KPROBE_HIT_SSDONE;
389		cur->post_handler(cur, regs, 0);
390	}
391
392	resume_execution(cur, regs, kcb);
393
394	regs->cp0_status |= kcb->kprobe_saved_SR;
395
396	/* Restore back the original saved kprobes variables and continue. */
397	if (kcb->kprobe_status == KPROBE_REENTER) {
398		restore_previous_kprobe(kcb);
399		goto out;
400	}
401	reset_current_kprobe();
402out:
403	preempt_enable_no_resched();
404
405	return 1;
406}
407
408int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
409{
410	struct kprobe *cur = kprobe_running();
411	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
412
 
 
 
413	if (kcb->kprobe_status & KPROBE_HIT_SS) {
414		resume_execution(cur, regs, kcb);
415		regs->cp0_status |= kcb->kprobe_old_SR;
416
417		reset_current_kprobe();
418		preempt_enable_no_resched();
419	}
420	return 0;
421}
422
423/*
424 * Wrapper routine for handling exceptions.
425 */
426int kprobe_exceptions_notify(struct notifier_block *self,
427				       unsigned long val, void *data)
428{
429
430	struct die_args *args = (struct die_args *)data;
431	int ret = NOTIFY_DONE;
432
433	switch (val) {
434	case DIE_BREAK:
435		if (kprobe_handler(args->regs))
436			ret = NOTIFY_STOP;
437		break;
438	case DIE_SSTEPBP:
439		if (post_kprobe_handler(args->regs))
440			ret = NOTIFY_STOP;
441		break;
442
443	case DIE_PAGE_FAULT:
444		/* kprobe_running() needs smp_processor_id() */
445		preempt_disable();
446
447		if (kprobe_running()
448		    && kprobe_fault_handler(args->regs, args->trapnr))
449			ret = NOTIFY_STOP;
450		preempt_enable();
451		break;
452	default:
453		break;
454	}
455	return ret;
456}
457NOKPROBE_SYMBOL(kprobe_exceptions_notify);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
458
459/*
460 * Function return probe trampoline:
461 *	- init_kprobes() establishes a probepoint here
462 *	- When the probed function returns, this probe causes the
463 *	  handlers to fire
464 */
465static void __used kretprobe_trampoline_holder(void)
466{
467	asm volatile(
468		".set push\n\t"
469		/* Keep the assembler from reordering and placing JR here. */
470		".set noreorder\n\t"
471		"nop\n\t"
472		".global __kretprobe_trampoline\n"
473		"__kretprobe_trampoline:\n\t"
474		"nop\n\t"
475		".set pop"
476		: : : "memory");
477}
478
479void __kretprobe_trampoline(void);
480
481void arch_prepare_kretprobe(struct kretprobe_instance *ri,
482				      struct pt_regs *regs)
483{
484	ri->ret_addr = (kprobe_opcode_t *) regs->regs[31];
485	ri->fp = NULL;
486
487	/* Replace the return addr with trampoline addr */
488	regs->regs[31] = (unsigned long)__kretprobe_trampoline;
489}
490NOKPROBE_SYMBOL(arch_prepare_kretprobe);
491
492/*
493 * Called when the probe at kretprobe trampoline is hit
494 */
495static int trampoline_probe_handler(struct kprobe *p,
496						struct pt_regs *regs)
497{
498	instruction_pointer(regs) = __kretprobe_trampoline_handler(regs, NULL);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
499	/*
500	 * By returning a non-zero value, we are telling
501	 * kprobe_handler() that we don't want the post_handler
502	 * to run (and have re-enabled preemption)
503	 */
504	return 1;
505}
506NOKPROBE_SYMBOL(trampoline_probe_handler);
507
508int arch_trampoline_kprobe(struct kprobe *p)
509{
510	if (p->addr == (kprobe_opcode_t *)__kretprobe_trampoline)
511		return 1;
512
513	return 0;
514}
515NOKPROBE_SYMBOL(arch_trampoline_kprobe);
516
517static struct kprobe trampoline_p = {
518	.addr = (kprobe_opcode_t *)__kretprobe_trampoline,
519	.pre_handler = trampoline_probe_handler
520};
521
522int __init arch_init_kprobes(void)
523{
524	return register_kprobe(&trampoline_p);
525}
v4.6
 
  1/*
  2 *  Kernel Probes (KProbes)
  3 *  arch/mips/kernel/kprobes.c
  4 *
  5 *  Copyright 2006 Sony Corp.
  6 *  Copyright 2010 Cavium Networks
  7 *
  8 *  Some portions copied from the powerpc version.
  9 *
 10 *   Copyright (C) IBM Corporation, 2002, 2004
 11 *
 12 *  This program is free software; you can redistribute it and/or modify
 13 *  it under the terms of the GNU General Public License as published by
 14 *  the Free Software Foundation; version 2 of the License.
 15 *
 16 *  This program is distributed in the hope that it will be useful,
 17 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 18 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 19 *  GNU General Public License for more details.
 20 *
 21 *  You should have received a copy of the GNU General Public License
 22 *  along with this program; if not, write to the Free Software
 23 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 24 */
 25
 
 
 26#include <linux/kprobes.h>
 27#include <linux/preempt.h>
 28#include <linux/uaccess.h>
 29#include <linux/kdebug.h>
 30#include <linux/slab.h>
 31
 32#include <asm/ptrace.h>
 33#include <asm/branch.h>
 34#include <asm/break.h>
 35#include <asm/inst.h>
 
 36
 37static const union mips_instruction breakpoint_insn = {
 38	.b_format = {
 39		.opcode = spec_op,
 40		.code = BRK_KPROBE_BP,
 41		.func = break_op
 42	}
 43};
 44
 45static const union mips_instruction breakpoint2_insn = {
 46	.b_format = {
 47		.opcode = spec_op,
 48		.code = BRK_KPROBE_SSTEPBP,
 49		.func = break_op
 50	}
 51};
 52
 53DEFINE_PER_CPU(struct kprobe *, current_kprobe);
 54DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
 55
 56static int __kprobes insn_has_delayslot(union mips_instruction insn)
 57{
 58	switch (insn.i_format.opcode) {
 59
 60		/*
 61		 * This group contains:
 62		 * jr and jalr are in r_format format.
 63		 */
 64	case spec_op:
 65		switch (insn.r_format.func) {
 66		case jr_op:
 67		case jalr_op:
 68			break;
 69		default:
 70			goto insn_ok;
 71		}
 72
 73		/*
 74		 * This group contains:
 75		 * bltz_op, bgez_op, bltzl_op, bgezl_op,
 76		 * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
 77		 */
 78	case bcond_op:
 79
 80		/*
 81		 * These are unconditional and in j_format.
 82		 */
 83	case jal_op:
 84	case j_op:
 85
 86		/*
 87		 * These are conditional and in i_format.
 88		 */
 89	case beq_op:
 90	case beql_op:
 91	case bne_op:
 92	case bnel_op:
 93	case blez_op:
 94	case blezl_op:
 95	case bgtz_op:
 96	case bgtzl_op:
 97
 98		/*
 99		 * These are the FPA/cp1 branch instructions.
100		 */
101	case cop1_op:
102
103#ifdef CONFIG_CPU_CAVIUM_OCTEON
104	case lwc2_op: /* This is bbit0 on Octeon */
105	case ldc2_op: /* This is bbit032 on Octeon */
106	case swc2_op: /* This is bbit1 on Octeon */
107	case sdc2_op: /* This is bbit132 on Octeon */
108#endif
109		return 1;
110	default:
111		break;
112	}
113insn_ok:
114	return 0;
115}
 
116
117/*
118 * insn_has_ll_or_sc function checks whether instruction is ll or sc
119 * one; putting breakpoint on top of atomic ll/sc pair is bad idea;
120 * so we need to prevent it and refuse kprobes insertion for such
121 * instructions; cannot do much about breakpoint in the middle of
122 * ll/sc pair; it is upto user to avoid those places
123 */
124static int __kprobes insn_has_ll_or_sc(union mips_instruction insn)
125{
126	int ret = 0;
127
128	switch (insn.i_format.opcode) {
129	case ll_op:
130	case lld_op:
131	case sc_op:
132	case scd_op:
133		ret = 1;
134		break;
135	default:
136		break;
137	}
138	return ret;
139}
 
140
141int __kprobes arch_prepare_kprobe(struct kprobe *p)
142{
143	union mips_instruction insn;
144	union mips_instruction prev_insn;
145	int ret = 0;
146
147	insn = p->addr[0];
148
149	if (insn_has_ll_or_sc(insn)) {
150		pr_notice("Kprobes for ll and sc instructions are not"
151			  "supported\n");
152		ret = -EINVAL;
153		goto out;
154	}
155
156	if ((probe_kernel_read(&prev_insn, p->addr - 1,
157				sizeof(mips_instruction)) == 0) &&
158				insn_has_delayslot(prev_insn)) {
159		pr_notice("Kprobes for branch delayslot are not supported\n");
160		ret = -EINVAL;
161		goto out;
162	}
163
 
 
 
 
 
 
164	/* insn: must be on special executable page on mips. */
165	p->ainsn.insn = get_insn_slot();
166	if (!p->ainsn.insn) {
167		ret = -ENOMEM;
168		goto out;
169	}
170
171	/*
172	 * In the kprobe->ainsn.insn[] array we store the original
173	 * instruction at index zero and a break trap instruction at
174	 * index one.
175	 *
176	 * On MIPS arch if the instruction at probed address is a
177	 * branch instruction, we need to execute the instruction at
178	 * Branch Delayslot (BD) at the time of probe hit. As MIPS also
179	 * doesn't have single stepping support, the BD instruction can
180	 * not be executed in-line and it would be executed on SSOL slot
181	 * using a normal breakpoint instruction in the next slot.
182	 * So, read the instruction and save it for later execution.
183	 */
184	if (insn_has_delayslot(insn))
185		memcpy(&p->ainsn.insn[0], p->addr + 1, sizeof(kprobe_opcode_t));
186	else
187		memcpy(&p->ainsn.insn[0], p->addr, sizeof(kprobe_opcode_t));
188
189	p->ainsn.insn[1] = breakpoint2_insn;
190	p->opcode = *p->addr;
191
192out:
193	return ret;
194}
 
195
196void __kprobes arch_arm_kprobe(struct kprobe *p)
197{
198	*p->addr = breakpoint_insn;
199	flush_insn_slot(p);
200}
 
201
202void __kprobes arch_disarm_kprobe(struct kprobe *p)
203{
204	*p->addr = p->opcode;
205	flush_insn_slot(p);
206}
 
207
208void __kprobes arch_remove_kprobe(struct kprobe *p)
209{
210	if (p->ainsn.insn) {
211		free_insn_slot(p->ainsn.insn, 0);
212		p->ainsn.insn = NULL;
213	}
214}
 
215
216static void save_previous_kprobe(struct kprobe_ctlblk *kcb)
217{
218	kcb->prev_kprobe.kp = kprobe_running();
219	kcb->prev_kprobe.status = kcb->kprobe_status;
220	kcb->prev_kprobe.old_SR = kcb->kprobe_old_SR;
221	kcb->prev_kprobe.saved_SR = kcb->kprobe_saved_SR;
222	kcb->prev_kprobe.saved_epc = kcb->kprobe_saved_epc;
223}
224
225static void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
226{
227	__this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
228	kcb->kprobe_status = kcb->prev_kprobe.status;
229	kcb->kprobe_old_SR = kcb->prev_kprobe.old_SR;
230	kcb->kprobe_saved_SR = kcb->prev_kprobe.saved_SR;
231	kcb->kprobe_saved_epc = kcb->prev_kprobe.saved_epc;
232}
233
234static void set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
235			       struct kprobe_ctlblk *kcb)
236{
237	__this_cpu_write(current_kprobe, p);
238	kcb->kprobe_saved_SR = kcb->kprobe_old_SR = (regs->cp0_status & ST0_IE);
239	kcb->kprobe_saved_epc = regs->cp0_epc;
240}
241
242/**
243 * evaluate_branch_instrucion -
244 *
245 * Evaluate the branch instruction at probed address during probe hit. The
246 * result of evaluation would be the updated epc. The insturction in delayslot
247 * would actually be single stepped using a normal breakpoint) on SSOL slot.
248 *
249 * The result is also saved in the kprobe control block for later use,
250 * in case we need to execute the delayslot instruction. The latter will be
251 * false for NOP instruction in dealyslot and the branch-likely instructions
252 * when the branch is taken. And for those cases we set a flag as
253 * SKIP_DELAYSLOT in the kprobe control block
254 */
255static int evaluate_branch_instruction(struct kprobe *p, struct pt_regs *regs,
256					struct kprobe_ctlblk *kcb)
257{
258	union mips_instruction insn = p->opcode;
259	long epc;
260	int ret = 0;
261
262	epc = regs->cp0_epc;
263	if (epc & 3)
264		goto unaligned;
265
266	if (p->ainsn.insn->word == 0)
267		kcb->flags |= SKIP_DELAYSLOT;
268	else
269		kcb->flags &= ~SKIP_DELAYSLOT;
270
271	ret = __compute_return_epc_for_insn(regs, insn);
272	if (ret < 0)
273		return ret;
274
275	if (ret == BRANCH_LIKELY_TAKEN)
276		kcb->flags |= SKIP_DELAYSLOT;
277
278	kcb->target_epc = regs->cp0_epc;
279
280	return 0;
281
282unaligned:
283	pr_notice("%s: unaligned epc - sending SIGBUS.\n", current->comm);
284	force_sig(SIGBUS, current);
285	return -EFAULT;
286
287}
288
289static void prepare_singlestep(struct kprobe *p, struct pt_regs *regs,
290						struct kprobe_ctlblk *kcb)
291{
292	int ret = 0;
293
294	regs->cp0_status &= ~ST0_IE;
295
296	/* single step inline if the instruction is a break */
297	if (p->opcode.word == breakpoint_insn.word ||
298	    p->opcode.word == breakpoint2_insn.word)
299		regs->cp0_epc = (unsigned long)p->addr;
300	else if (insn_has_delayslot(p->opcode)) {
301		ret = evaluate_branch_instruction(p, regs, kcb);
302		if (ret < 0) {
303			pr_notice("Kprobes: Error in evaluating branch\n");
304			return;
305		}
306	}
307	regs->cp0_epc = (unsigned long)&p->ainsn.insn[0];
308}
309
310/*
311 * Called after single-stepping.  p->addr is the address of the
312 * instruction whose first byte has been replaced by the "break 0"
313 * instruction.	 To avoid the SMP problems that can occur when we
314 * temporarily put back the original opcode to single-step, we
315 * single-stepped a copy of the instruction.  The address of this
316 * copy is p->ainsn.insn.
317 *
318 * This function prepares to return from the post-single-step
319 * breakpoint trap. In case of branch instructions, the target
320 * epc to be restored.
321 */
322static void __kprobes resume_execution(struct kprobe *p,
323				       struct pt_regs *regs,
324				       struct kprobe_ctlblk *kcb)
325{
326	if (insn_has_delayslot(p->opcode))
327		regs->cp0_epc = kcb->target_epc;
328	else {
329		unsigned long orig_epc = kcb->kprobe_saved_epc;
330		regs->cp0_epc = orig_epc + 4;
331	}
332}
 
333
334static int __kprobes kprobe_handler(struct pt_regs *regs)
335{
336	struct kprobe *p;
337	int ret = 0;
338	kprobe_opcode_t *addr;
339	struct kprobe_ctlblk *kcb;
340
341	addr = (kprobe_opcode_t *) regs->cp0_epc;
342
343	/*
344	 * We don't want to be preempted for the entire
345	 * duration of kprobe processing
346	 */
347	preempt_disable();
348	kcb = get_kprobe_ctlblk();
349
350	/* Check we're not actually recursing */
351	if (kprobe_running()) {
352		p = get_kprobe(addr);
353		if (p) {
354			if (kcb->kprobe_status == KPROBE_HIT_SS &&
355			    p->ainsn.insn->word == breakpoint_insn.word) {
356				regs->cp0_status &= ~ST0_IE;
357				regs->cp0_status |= kcb->kprobe_saved_SR;
358				goto no_kprobe;
359			}
360			/*
361			 * We have reentered the kprobe_handler(), since
362			 * another probe was hit while within the handler.
363			 * We here save the original kprobes variables and
364			 * just single step on the instruction of the new probe
365			 * without calling any user handlers.
366			 */
367			save_previous_kprobe(kcb);
368			set_current_kprobe(p, regs, kcb);
369			kprobes_inc_nmissed_count(p);
370			prepare_singlestep(p, regs, kcb);
371			kcb->kprobe_status = KPROBE_REENTER;
372			if (kcb->flags & SKIP_DELAYSLOT) {
373				resume_execution(p, regs, kcb);
374				restore_previous_kprobe(kcb);
375				preempt_enable_no_resched();
376			}
377			return 1;
378		} else {
379			if (addr->word != breakpoint_insn.word) {
380				/*
381				 * The breakpoint instruction was removed by
382				 * another cpu right after we hit, no further
383				 * handling of this interrupt is appropriate
384				 */
385				ret = 1;
386				goto no_kprobe;
387			}
388			p = __this_cpu_read(current_kprobe);
389			if (p->break_handler && p->break_handler(p, regs))
390				goto ss_probe;
391		}
392		goto no_kprobe;
393	}
394
395	p = get_kprobe(addr);
396	if (!p) {
397		if (addr->word != breakpoint_insn.word) {
398			/*
399			 * The breakpoint instruction was removed right
400			 * after we hit it.  Another cpu has removed
401			 * either a probepoint or a debugger breakpoint
402			 * at this address.  In either case, no further
403			 * handling of this interrupt is appropriate.
404			 */
405			ret = 1;
406		}
407		/* Not one of ours: let kernel handle it */
408		goto no_kprobe;
409	}
410
411	set_current_kprobe(p, regs, kcb);
412	kcb->kprobe_status = KPROBE_HIT_ACTIVE;
413
414	if (p->pre_handler && p->pre_handler(p, regs)) {
415		/* handler has already set things up, so skip ss setup */
 
 
416		return 1;
417	}
418
419ss_probe:
420	prepare_singlestep(p, regs, kcb);
421	if (kcb->flags & SKIP_DELAYSLOT) {
422		kcb->kprobe_status = KPROBE_HIT_SSDONE;
423		if (p->post_handler)
424			p->post_handler(p, regs, 0);
425		resume_execution(p, regs, kcb);
426		preempt_enable_no_resched();
427	} else
428		kcb->kprobe_status = KPROBE_HIT_SS;
429
430	return 1;
431
432no_kprobe:
433	preempt_enable_no_resched();
434	return ret;
435
436}
 
437
438static inline int post_kprobe_handler(struct pt_regs *regs)
439{
440	struct kprobe *cur = kprobe_running();
441	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
442
443	if (!cur)
444		return 0;
445
446	if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
447		kcb->kprobe_status = KPROBE_HIT_SSDONE;
448		cur->post_handler(cur, regs, 0);
449	}
450
451	resume_execution(cur, regs, kcb);
452
453	regs->cp0_status |= kcb->kprobe_saved_SR;
454
455	/* Restore back the original saved kprobes variables and continue. */
456	if (kcb->kprobe_status == KPROBE_REENTER) {
457		restore_previous_kprobe(kcb);
458		goto out;
459	}
460	reset_current_kprobe();
461out:
462	preempt_enable_no_resched();
463
464	return 1;
465}
466
467static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
468{
469	struct kprobe *cur = kprobe_running();
470	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
471
472	if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr))
473		return 1;
474
475	if (kcb->kprobe_status & KPROBE_HIT_SS) {
476		resume_execution(cur, regs, kcb);
477		regs->cp0_status |= kcb->kprobe_old_SR;
478
479		reset_current_kprobe();
480		preempt_enable_no_resched();
481	}
482	return 0;
483}
484
485/*
486 * Wrapper routine for handling exceptions.
487 */
488int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
489				       unsigned long val, void *data)
490{
491
492	struct die_args *args = (struct die_args *)data;
493	int ret = NOTIFY_DONE;
494
495	switch (val) {
496	case DIE_BREAK:
497		if (kprobe_handler(args->regs))
498			ret = NOTIFY_STOP;
499		break;
500	case DIE_SSTEPBP:
501		if (post_kprobe_handler(args->regs))
502			ret = NOTIFY_STOP;
503		break;
504
505	case DIE_PAGE_FAULT:
506		/* kprobe_running() needs smp_processor_id() */
507		preempt_disable();
508
509		if (kprobe_running()
510		    && kprobe_fault_handler(args->regs, args->trapnr))
511			ret = NOTIFY_STOP;
512		preempt_enable();
513		break;
514	default:
515		break;
516	}
517	return ret;
518}
519
520int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
521{
522	struct jprobe *jp = container_of(p, struct jprobe, kp);
523	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
524
525	kcb->jprobe_saved_regs = *regs;
526	kcb->jprobe_saved_sp = regs->regs[29];
527
528	memcpy(kcb->jprobes_stack, (void *)kcb->jprobe_saved_sp,
529	       MIN_JPROBES_STACK_SIZE(kcb->jprobe_saved_sp));
530
531	regs->cp0_epc = (unsigned long)(jp->entry);
532
533	return 1;
534}
535
536/* Defined in the inline asm below. */
537void jprobe_return_end(void);
538
539void __kprobes jprobe_return(void)
540{
541	/* Assembler quirk necessitates this '0,code' business.	 */
542	asm volatile(
543		"break 0,%0\n\t"
544		".globl jprobe_return_end\n"
545		"jprobe_return_end:\n"
546		: : "n" (BRK_KPROBE_BP) : "memory");
547}
548
549int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
550{
551	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
552
553	if (regs->cp0_epc >= (unsigned long)jprobe_return &&
554	    regs->cp0_epc <= (unsigned long)jprobe_return_end) {
555		*regs = kcb->jprobe_saved_regs;
556		memcpy((void *)kcb->jprobe_saved_sp, kcb->jprobes_stack,
557		       MIN_JPROBES_STACK_SIZE(kcb->jprobe_saved_sp));
558		preempt_enable_no_resched();
559
560		return 1;
561	}
562	return 0;
563}
564
565/*
566 * Function return probe trampoline:
567 *	- init_kprobes() establishes a probepoint here
568 *	- When the probed function returns, this probe causes the
569 *	  handlers to fire
570 */
571static void __used kretprobe_trampoline_holder(void)
572{
573	asm volatile(
574		".set push\n\t"
575		/* Keep the assembler from reordering and placing JR here. */
576		".set noreorder\n\t"
577		"nop\n\t"
578		".global kretprobe_trampoline\n"
579		"kretprobe_trampoline:\n\t"
580		"nop\n\t"
581		".set pop"
582		: : : "memory");
583}
584
585void kretprobe_trampoline(void);
586
587void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
588				      struct pt_regs *regs)
589{
590	ri->ret_addr = (kprobe_opcode_t *) regs->regs[31];
 
591
592	/* Replace the return addr with trampoline addr */
593	regs->regs[31] = (unsigned long)kretprobe_trampoline;
594}
 
595
596/*
597 * Called when the probe at kretprobe trampoline is hit
598 */
599static int __kprobes trampoline_probe_handler(struct kprobe *p,
600						struct pt_regs *regs)
601{
602	struct kretprobe_instance *ri = NULL;
603	struct hlist_head *head, empty_rp;
604	struct hlist_node *tmp;
605	unsigned long flags, orig_ret_address = 0;
606	unsigned long trampoline_address = (unsigned long)kretprobe_trampoline;
607
608	INIT_HLIST_HEAD(&empty_rp);
609	kretprobe_hash_lock(current, &head, &flags);
610
611	/*
612	 * It is possible to have multiple instances associated with a given
613	 * task either because an multiple functions in the call path
614	 * have a return probe installed on them, and/or more than one return
615	 * return probe was registered for a target function.
616	 *
617	 * We can handle this because:
618	 *     - instances are always inserted at the head of the list
619	 *     - when multiple return probes are registered for the same
620	 *	 function, the first instance's ret_addr will point to the
621	 *	 real return address, and all the rest will point to
622	 *	 kretprobe_trampoline
623	 */
624	hlist_for_each_entry_safe(ri, tmp, head, hlist) {
625		if (ri->task != current)
626			/* another task is sharing our hash bucket */
627			continue;
628
629		if (ri->rp && ri->rp->handler)
630			ri->rp->handler(ri, regs);
631
632		orig_ret_address = (unsigned long)ri->ret_addr;
633		recycle_rp_inst(ri, &empty_rp);
634
635		if (orig_ret_address != trampoline_address)
636			/*
637			 * This is the real return address. Any other
638			 * instances associated with this task are for
639			 * other calls deeper on the call stack
640			 */
641			break;
642	}
643
644	kretprobe_assert(ri, orig_ret_address, trampoline_address);
645	instruction_pointer(regs) = orig_ret_address;
646
647	reset_current_kprobe();
648	kretprobe_hash_unlock(current, &flags);
649	preempt_enable_no_resched();
650
651	hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) {
652		hlist_del(&ri->hlist);
653		kfree(ri);
654	}
655	/*
656	 * By returning a non-zero value, we are telling
657	 * kprobe_handler() that we don't want the post_handler
658	 * to run (and have re-enabled preemption)
659	 */
660	return 1;
661}
 
662
663int __kprobes arch_trampoline_kprobe(struct kprobe *p)
664{
665	if (p->addr == (kprobe_opcode_t *)kretprobe_trampoline)
666		return 1;
667
668	return 0;
669}
 
670
671static struct kprobe trampoline_p = {
672	.addr = (kprobe_opcode_t *)kretprobe_trampoline,
673	.pre_handler = trampoline_probe_handler
674};
675
676int __init arch_init_kprobes(void)
677{
678	return register_kprobe(&trampoline_p);
679}