1// SPDX-License-Identifier: GPL-2.0-only
  2// Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
  3
  4/dts-v1/;
  5
  6#include <dt-bindings/gpio/gpio.h>
  7#include <dt-bindings/input/input.h>
  8#include "orion5x-mv88f5181.dtsi"
  9
 10/ {
 11	model = "Netgear WNR854-t";
 12	compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
 13		     "marvell,orion5x";
 14	aliases {
 15		serial0 = &uart0;
 16	};
 17
 18	memory {
 19		device_type = "memory";
 20		reg = <0x00000000 0x2000000>; /* 32 MB */
 21	};
 22
 23	chosen {
 24		stdout-path = "serial0:115200n8";
 25	};
 26
 27	soc {
 28		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
 29			 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
 30			 <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
 31	};
 32
 33	gpio-keys {
 34		compatible = "gpio-keys";
 35		pinctrl-0 = <&pmx_reset_button>;
 36		pinctrl-names = "default";
 37
 38		reset {
 39			label = "Reset Button";
 40			linux,code = <KEY_RESTART>;
 41			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
 42		};
 43	};
 44
 45	gpio-leds {
 46		compatible = "gpio-leds";
 47		pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
 48		pinctrl-names = "default";
 49
 50		led@0 {
 51			label = "wnr854t:green:power";
 52			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
 53		};
 54
 55		led@1 {
 56			label = "wnr854t:blink:power";
 57			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
 58		};
 59
 60		led@2 {
 61			label = "wnr854t:green:wan";
 62			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
 63		};
 64	};
 65};
 66
 67&devbus_bootcs {
 68	status = "okay";
 69
 70	devbus,keep-config;
 71
 72	flash@0 {
 73		compatible = "cfi-flash";
 74		reg = <0 0x800000>;
 75		bank-width = <2>;
 76
 77		partitions {
 78			compatible = "fixed-partitions";
 79			#address-cells = <1>;
 80			#size-cells = <1>;
 81
 82			partition@0 {
 83				label = "kernel";
 84				reg = <0x0 0x100000>;
 85			};
 86
 87			partition@100000 {
 88				label = "rootfs";
 89				reg = <0x100000 0x660000>;
 90			};
 91
 92			partition@760000 {
 93				label = "uboot_env";
 94				reg = <0x760000 0x20000>;
 95			};
 96
 97			partition@780000 {
 98				label = "uboot";
 99				reg = <0x780000 0x80000>;
100				read-only;
101			};
102		};
103	};
104};
105
106&mdio {
107	status = "okay";
108
109	switch: switch@0 {
110		compatible = "marvell,mv88e6085";
111		#address-cells = <1>;
112		#size-cells = <0>;
113		reg = <0>;
114		dsa,member = <0 0>;
115
116		ports {
117			#address-cells = <1>;
118			#size-cells = <0>;
119
120			port@0 {
121				reg = <0>;
122				label = "lan3";
123				phy-handle = <&lan3phy>;
124			};
125
126			port@1 {
127				reg = <1>;
128				label = "lan4";
129				phy-handle = <&lan4phy>;
130			};
131
132			port@2 {
133				reg = <2>;
134				label = "wan";
135				phy-handle = <&wanphy>;
136			};
137
138			port@3 {
139				reg = <3>;
140				label = "cpu";
141				ethernet = <&ethport>;
142			};
143
144			port@5 {
145				reg = <5>;
146				label = "lan1";
147				phy-handle = <&lan1phy>;
148			};
149
150			port@7 {
151				reg = <7>;
152				label = "lan2";
153				phy-handle = <&lan2phy>;
154			};
155		};
156
157		mdio {
158			#address-cells = <1>;
159			#size-cells = <0>;
160
161			lan3phy: ethernet-phy@0 {
162				/* Marvell 88E1121R (port 1) */
163				compatible = "ethernet-phy-id0141.0cb0",
164					     "ethernet-phy-ieee802.3-c22";
165				reg = <0>;
166				marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
167			};
168
169			lan4phy: ethernet-phy@1 {
170				/* Marvell 88E1121R (port 2) */
171				compatible = "ethernet-phy-id0141.0cb0",
172					     "ethernet-phy-ieee802.3-c22";
173				reg = <1>;
174				marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
175			};
176
177			wanphy: ethernet-phy@2 {
178				/* Marvell 88E1121R (port 1) */
179				compatible = "ethernet-phy-id0141.0cb0",
180					     "ethernet-phy-ieee802.3-c22";
181				reg = <2>;
182				marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
183			};
184
185			lan1phy: ethernet-phy@5 {
186				/* Marvell 88E1112 */
187				compatible = "ethernet-phy-id0141.0cb0",
188					     "ethernet-phy-ieee802.3-c22";
189				reg = <5>;
190				marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
191			};
192
193			lan2phy: ethernet-phy@7 {
194				/* Marvell 88E1112 */
195				compatible = "ethernet-phy-id0141.0cb0",
196					     "ethernet-phy-ieee802.3-c22";
197				reg = <7>;
198				marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
199			};
200		};
201	};
202};
203
204&eth {
205	status = "okay";
206
207	ethernet-port@0 {
208		/* Hardwired to DSA switch */
209		speed = <1000>;
210		duplex = <1>;
211	};
212};
213
214&pinctrl {
215	pinctrl-0 = <&pmx_pci_gpios>;
216	pinctrl-names = "default";
217
218	pmx_power_led: pmx-power-led {
219		marvell,pins = "mpp0";
220		marvell,function = "gpio";
221	};
222
223	pmx_reset_button: pmx-reset-button {
224		marvell,pins = "mpp1";
225		marvell,function = "gpio";
226	};
227
228	pmx_power_led_blink: pmx-power-led-blink {
229		marvell,pins = "mpp2";
230		marvell,function = "gpio";
231	};
232
233	pmx_wan_led: pmx-wan-led {
234		marvell,pins = "mpp3";
235		marvell,function = "gpio";
236	};
237
238	pmx_pci_gpios: pmx-pci-gpios {
239		marvell,pins = "mpp4";
240		marvell,function = "gpio";
241	};
242};
243
244&uart0 {
245	/* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
246	status = "okay";
247};