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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2013 Freescale Semiconductor, Inc.
4 *
5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9
10/ {
11 aliases {
12 backlight = &backlight;
13 panelchan = &panelchan;
14 panel7 = &panel7;
15 touchscreenp7 = &touchscreenp7;
16 };
17
18 chosen {
19 stdout-path = &uart2;
20 };
21
22 backlight: backlight {
23 compatible = "gpio-backlight";
24 gpios = <&gpio1 4 0>;
25 default-on;
26 status = "disabled";
27 };
28
29 gpio-poweroff {
30 compatible = "gpio-poweroff";
31 gpios = <&gpio2 4 0>;
32 pinctrl-0 = <&pinctrl_power_off>;
33 pinctrl-names = "default";
34 };
35
36 memory@10000000 {
37 device_type = "memory";
38 reg = <0x10000000 0x40000000>;
39 };
40
41 panel7: panel7 {
42 /*
43 * in reality it is a -20t (parallel) model,
44 * but with LVDS bridge chip attached,
45 * so it is equivalent to -19t model in drive
46 * characteristics
47 */
48 compatible = "urt,umsh-8596md-19t";
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_panel>;
51 power-supply = <®_panel>;
52 backlight = <&backlight>;
53 status = "disabled";
54
55 port {
56 panel_in: endpoint {
57 remote-endpoint = <&lvds0_out>;
58 };
59 };
60 };
61
62 regulators {
63 compatible = "simple-bus";
64 #address-cells = <1>;
65 #size-cells = <0>;
66
67 reg_usb_h1_vbus: regulator@0 {
68 compatible = "regulator-fixed";
69 reg = <0>;
70 regulator-name = "usb_h1_vbus";
71 regulator-min-microvolt = <5000000>;
72 regulator-max-microvolt = <5000000>;
73 enable-active-high;
74 startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
75 gpio = <&gpio7 12 0>;
76 };
77
78 reg_panel: regulator@1 {
79 compatible = "regulator-fixed";
80 reg = <1>;
81 regulator-name = "lcd_panel";
82 enable-active-high;
83 gpio = <&gpio1 2 0>;
84 };
85 };
86
87 sound {
88 compatible = "fsl,imx6q-udoo-ac97",
89 "fsl,imx-audio-ac97";
90 model = "fsl,imx6q-udoo-ac97";
91 audio-cpu = <&ssi1>;
92 audio-routing =
93 "RX", "Mic Jack",
94 "Headphone Jack", "TX";
95 mux-int-port = <1>;
96 mux-ext-port = <6>;
97 };
98};
99
100&fec {
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_enet>;
103 phy-mode = "rgmii-id";
104 status = "okay";
105};
106
107&hdmi {
108 ddc-i2c-bus = <&i2c2>;
109 status = "okay";
110};
111
112&i2c2 {
113 clock-frequency = <100000>;
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_i2c2>;
116 status = "okay";
117};
118
119&i2c3 {
120 clock-frequency = <100000>;
121 pinctrl-names = "default";
122 pinctrl-0 = <&pinctrl_i2c3>;
123 status = "okay";
124
125 touchscreenp7: touchscreenp7@55 {
126 compatible = "sitronix,st1232";
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_touchscreenp7>;
129 reg = <0x55>;
130 interrupt-parent = <&gpio1>;
131 interrupts = <13 8>;
132 gpios = <&gpio1 15 0>;
133 status = "disabled";
134 };
135};
136
137&iomuxc {
138 imx6q-udoo {
139 pinctrl_enet: enetgrp {
140 fsl,pins = <
141 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
142 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
143 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
144 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
145 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
146 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
147 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
148 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
149 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
150 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
151 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
152 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
153 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
154 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
155 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
156 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
157 >;
158 };
159
160 pinctrl_i2c2: i2c2grp {
161 fsl,pins = <
162 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
163 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
164 >;
165 };
166
167 pinctrl_i2c3: i2c3grp {
168 fsl,pins = <
169 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001f8b1
170 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001f8b1
171 >;
172 };
173
174 pinctrl_panel: panelgrp {
175 fsl,pins = <
176 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x70
177 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x70
178 >;
179 };
180
181 pinctrl_power_off: poweroffgrp {
182 fsl,pins = <
183 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x30
184 >;
185 };
186
187 pinctrl_touchscreenp7: touchscreenp7grp {
188 fsl,pins = <
189 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x70
190 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
191 >;
192 };
193
194 pinctrl_uart2: uart2grp {
195 fsl,pins = <
196 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
197 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
198 >;
199 };
200
201 pinctrl_uart4: uart4grp {
202 fsl,pins = <
203 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
204 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
205 >;
206 };
207
208 pinctrl_usbh: usbhgrp {
209 fsl,pins = <
210 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
211 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
212 >;
213 };
214
215 pinctrl_usbotg: usbotg {
216 fsl,pins = <
217 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
218 MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x17059
219 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x17059
220 >;
221 };
222
223 pinctrl_usdhc3: usdhc3grp {
224 fsl,pins = <
225 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
226 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
227 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
228 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
229 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
230 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
231 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
232 >;
233 };
234
235 pinctrl_ac97_running: ac97running {
236 fsl,pins = <
237 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
238 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0
239 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
240 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
241 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
242 >;
243 };
244
245 pinctrl_ac97_warm_reset: ac97warmreset {
246 fsl,pins = <
247 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
248 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
249 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
250 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
251 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
252 >;
253 };
254
255 pinctrl_ac97_reset: ac97reset {
256 fsl,pins = <
257 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
258 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
259 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
260 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
261 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
262 >;
263 };
264 };
265};
266
267&ldb {
268 status = "okay";
269
270 panelchan: lvds-channel@0 {
271 port@4 {
272 reg = <4>;
273
274 lvds0_out: endpoint {
275 remote-endpoint = <&panel_in>;
276 };
277 };
278 };
279};
280
281&uart2 {
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_uart2>;
284 status = "okay";
285};
286
287&uart4 {
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_uart4>;
290 status = "okay";
291};
292
293&usbh1 {
294 pinctrl-names = "default";
295 pinctrl-0 = <&pinctrl_usbh>;
296 vbus-supply = <®_usb_h1_vbus>;
297 clocks = <&clks IMX6QDL_CLK_CKO>;
298 status = "disabled";
299};
300
301&usbotg {
302 pinctrl-names = "default";
303 pinctrl-0 = <&pinctrl_usbotg>;
304 status = "okay";
305};
306
307&usdhc3 {
308 pinctrl-names = "default";
309 pinctrl-0 = <&pinctrl_usdhc3>;
310 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
311 status = "okay";
312};
313
314&audmux {
315 status = "okay";
316};
317
318&ssi1 {
319 cell-index = <0>;
320 fsl,mode = "ac97-slave";
321 pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
322 pinctrl-0 = <&pinctrl_ac97_running>;
323 pinctrl-1 = <&pinctrl_ac97_reset>;
324 pinctrl-2 = <&pinctrl_ac97_warm_reset>;
325 ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
326 status = "okay";
327};
1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12/ {
13 chosen {
14 stdout-path = &uart2;
15 };
16
17 memory {
18 reg = <0x10000000 0x40000000>;
19 };
20
21 regulators {
22 compatible = "simple-bus";
23 #address-cells = <1>;
24 #size-cells = <0>;
25
26 reg_usb_h1_vbus: regulator@0 {
27 compatible = "regulator-fixed";
28 reg = <0>;
29 regulator-name = "usb_h1_vbus";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
32 enable-active-high;
33 startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
34 gpio = <&gpio7 12 0>;
35 };
36 };
37
38 sound {
39 compatible = "fsl,imx6q-udoo-ac97",
40 "fsl,imx-audio-ac97";
41 model = "fsl,imx6q-udoo-ac97";
42 audio-cpu = <&ssi1>;
43 audio-routing =
44 "RX", "Mic Jack",
45 "Headphone Jack", "TX";
46 mux-int-port = <1>;
47 mux-ext-port = <6>;
48 };
49};
50
51&fec {
52 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_enet>;
54 phy-mode = "rgmii";
55 status = "okay";
56};
57
58&hdmi {
59 ddc-i2c-bus = <&i2c2>;
60 status = "okay";
61};
62
63&i2c2 {
64 clock-frequency = <100000>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_i2c2>;
67 status = "okay";
68};
69
70&iomuxc {
71 imx6q-udoo {
72 pinctrl_enet: enetgrp {
73 fsl,pins = <
74 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
75 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
76 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
77 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
78 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
79 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
80 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
81 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
82 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
83 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
84 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
85 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
86 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
87 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
88 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
89 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
90 >;
91 };
92
93 pinctrl_i2c2: i2c2grp {
94 fsl,pins = <
95 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
96 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
97 >;
98 };
99
100 pinctrl_uart2: uart2grp {
101 fsl,pins = <
102 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
103 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
104 >;
105 };
106
107 pinctrl_usbh: usbhgrp {
108 fsl,pins = <
109 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
110 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
111 >;
112 };
113
114 pinctrl_usdhc3: usdhc3grp {
115 fsl,pins = <
116 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
117 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
118 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
119 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
120 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
121 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
122 >;
123 };
124
125 pinctrl_ac97_running: ac97running {
126 fsl,pins = <
127 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
128 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0
129 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
130 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
131 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
132 >;
133 };
134
135 pinctrl_ac97_warm_reset: ac97warmreset {
136 fsl,pins = <
137 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
138 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
139 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
140 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
141 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
142 >;
143 };
144
145 pinctrl_ac97_reset: ac97reset {
146 fsl,pins = <
147 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
148 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
149 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
150 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
151 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
152 >;
153 };
154 };
155};
156
157&uart2 {
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_uart2>;
160 status = "okay";
161};
162
163&usbh1 {
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_usbh>;
166 vbus-supply = <®_usb_h1_vbus>;
167 clocks = <&clks 201>;
168 status = "okay";
169};
170
171&usdhc3 {
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_usdhc3>;
174 non-removable;
175 status = "okay";
176};
177
178&audmux {
179 status = "okay";
180};
181
182&ssi1 {
183 cell-index = <0>;
184 fsl,mode = "ac97-slave";
185 pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
186 pinctrl-0 = <&pinctrl_ac97_running>;
187 pinctrl-1 = <&pinctrl_ac97_reset>;
188 pinctrl-2 = <&pinctrl_ac97_warm_reset>;
189 ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
190 status = "okay";
191};