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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung's Exynos5420 based Arndale Octa board device tree source
4 *
5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
7 */
8
9/dts-v1/;
10#include "exynos5420.dtsi"
11#include "exynos5420-cpus.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/input/input.h>
15#include <dt-bindings/clock/samsung,s2mps11.h>
16
17/ {
18 model = "Insignal Arndale Octa evaluation board based on Exynos5420";
19 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
20
21 memory@20000000 {
22 device_type = "memory";
23 reg = <0x20000000 0x80000000>;
24 };
25
26 chosen {
27 stdout-path = "serial3:115200n8";
28 };
29
30 firmware@2073000 {
31 compatible = "samsung,secure-firmware";
32 reg = <0x02073000 0x1000>;
33 };
34
35 fixed-rate-clocks {
36 oscclk {
37 compatible = "samsung,exynos5420-oscclk";
38 clock-frequency = <24000000>;
39 };
40 };
41
42 gpio-keys {
43 compatible = "gpio-keys";
44
45 key-wakeup {
46 label = "SW-TACT1";
47 gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
48 linux,code = <KEY_WAKEUP>;
49 wakeup-source;
50 };
51 };
52};
53
54&adc {
55 vdd-supply = <&ldo4_reg>;
56 status = "okay";
57};
58
59&cci {
60 status = "disabled";
61};
62
63&cpu0 {
64 cpu-supply = <&buck2_reg>;
65};
66
67&cpu4 {
68 cpu-supply = <&buck6_reg>;
69};
70
71&cpu0_thermal {
72 trips {
73 cpu0_alert0: cpu-alert-0 {
74 temperature = <60000>; /* millicelsius */
75 hysteresis = <5000>; /* millicelsius */
76 type = "passive";
77 };
78 cpu0_alert1: cpu-alert-1 {
79 temperature = <80000>; /* millicelsius */
80 hysteresis = <10000>; /* millicelsius */
81 type = "passive";
82 };
83 cpu0_alert2: cpu-alert-2 {
84 temperature = <110000>; /* millicelsius */
85 hysteresis = <10000>; /* millicelsius */
86 type = "passive";
87 };
88 cpu0_crit0: cpu-crit-0 {
89 temperature = <120000>; /* millicelsius */
90 hysteresis = <0>; /* millicelsius */
91 type = "critical";
92 };
93 };
94
95 cooling-maps {
96 /*
97 * Reduce the CPU speed by 2 steps, down to: 1600 MHz
98 * and 1100 MHz.
99 */
100 map0 {
101 trip = <&cpu0_alert0>;
102 cooling-device = <&cpu0 0 2>,
103 <&cpu1 0 2>,
104 <&cpu2 0 2>,
105 <&cpu3 0 2>,
106 <&cpu4 0 2>,
107 <&cpu5 0 2>,
108 <&cpu6 0 2>,
109 <&cpu7 0 2>;
110 };
111
112 /*
113 * Reduce the CPU speed down to 1200 MHz big (6 steps)
114 * and 800 MHz LITTLE (5 steps).
115 */
116 map1 {
117 trip = <&cpu0_alert1>;
118 cooling-device = <&cpu0 3 6>,
119 <&cpu1 3 6>,
120 <&cpu2 3 6>,
121 <&cpu3 3 6>,
122 <&cpu4 3 5>,
123 <&cpu5 3 5>,
124 <&cpu6 3 5>,
125 <&cpu7 3 5>;
126 };
127
128 /*
129 * Reduce the CPU speed as much as possible, down to 700 MHz
130 * big (11 steps) and 600 MHz LITTLE (7 steps).
131 */
132 map2 {
133 trip = <&cpu0_alert2>;
134 cooling-device = <&cpu0 6 11>,
135 <&cpu1 6 11>,
136 <&cpu2 6 11>,
137 <&cpu3 6 11>,
138 <&cpu4 5 7>,
139 <&cpu5 5 7>,
140 <&cpu6 5 7>,
141 <&cpu7 5 7>;
142 };
143 };
144};
145
146&cpu1_thermal {
147 trips {
148 cpu1_alert0: cpu-alert-0 {
149 temperature = <60000>; /* millicelsius */
150 hysteresis = <5000>; /* millicelsius */
151 type = "passive";
152 };
153 cpu1_alert1: cpu-alert-1 {
154 temperature = <80000>; /* millicelsius */
155 hysteresis = <10000>; /* millicelsius */
156 type = "passive";
157 };
158 cpu1_alert2: cpu-alert-2 {
159 temperature = <110000>; /* millicelsius */
160 hysteresis = <10000>; /* millicelsius */
161 type = "passive";
162 };
163 cpu1_crit0: cpu-crit-0 {
164 temperature = <120000>; /* millicelsius */
165 hysteresis = <0>; /* millicelsius */
166 type = "critical";
167 };
168 };
169
170 cooling-maps {
171 map0 {
172 trip = <&cpu1_alert0>;
173 cooling-device = <&cpu0 0 2>,
174 <&cpu1 0 2>,
175 <&cpu2 0 2>,
176 <&cpu3 0 2>,
177 <&cpu4 0 2>,
178 <&cpu5 0 2>,
179 <&cpu6 0 2>,
180 <&cpu7 0 2>;
181 };
182
183 map1 {
184 trip = <&cpu1_alert1>;
185 cooling-device = <&cpu0 3 6>,
186 <&cpu1 3 6>,
187 <&cpu2 3 6>,
188 <&cpu3 3 6>,
189 <&cpu4 3 5>,
190 <&cpu5 3 5>,
191 <&cpu6 3 5>,
192 <&cpu7 3 5>;
193 };
194
195 map2 {
196 trip = <&cpu1_alert2>;
197 cooling-device = <&cpu0 6 11>,
198 <&cpu1 6 11>,
199 <&cpu2 6 11>,
200 <&cpu3 6 11>,
201 <&cpu4 5 7>,
202 <&cpu5 5 7>,
203 <&cpu6 5 7>,
204 <&cpu7 5 7>;
205 };
206 };
207};
208
209&cpu2_thermal {
210 trips {
211 cpu2_alert0: cpu-alert-0 {
212 temperature = <60000>; /* millicelsius */
213 hysteresis = <5000>; /* millicelsius */
214 type = "passive";
215 };
216 cpu2_alert1: cpu-alert-1 {
217 temperature = <80000>; /* millicelsius */
218 hysteresis = <10000>; /* millicelsius */
219 type = "passive";
220 };
221 cpu2_alert2: cpu-alert-2 {
222 temperature = <110000>; /* millicelsius */
223 hysteresis = <10000>; /* millicelsius */
224 type = "passive";
225 };
226 cpu2_crit0: cpu-crit-0 {
227 temperature = <120000>; /* millicelsius */
228 hysteresis = <0>; /* millicelsius */
229 type = "critical";
230 };
231 };
232
233 cooling-maps {
234 map0 {
235 trip = <&cpu2_alert0>;
236 cooling-device = <&cpu0 0 2>,
237 <&cpu1 0 2>,
238 <&cpu2 0 2>,
239 <&cpu3 0 2>,
240 <&cpu4 0 2>,
241 <&cpu5 0 2>,
242 <&cpu6 0 2>,
243 <&cpu7 0 2>;
244 };
245
246 map1 {
247 trip = <&cpu2_alert1>;
248 cooling-device = <&cpu0 3 6>,
249 <&cpu1 3 6>,
250 <&cpu2 3 6>,
251 <&cpu3 3 6>,
252 <&cpu4 3 5>,
253 <&cpu5 3 5>,
254 <&cpu6 3 5>,
255 <&cpu7 3 5>;
256 };
257
258 map2 {
259 trip = <&cpu2_alert2>;
260 cooling-device = <&cpu0 6 11>,
261 <&cpu1 6 11>,
262 <&cpu2 6 11>,
263 <&cpu3 6 11>,
264 <&cpu4 6 7>,
265 <&cpu5 6 7>,
266 <&cpu6 6 7>,
267 <&cpu7 6 7>;
268 };
269 };
270};
271
272&cpu3_thermal {
273 trips {
274 cpu3_alert0: cpu-alert-0 {
275 temperature = <60000>; /* millicelsius */
276 hysteresis = <5000>; /* millicelsius */
277 type = "passive";
278 };
279 cpu3_alert1: cpu-alert-1 {
280 temperature = <80000>; /* millicelsius */
281 hysteresis = <10000>; /* millicelsius */
282 type = "passive";
283 };
284 cpu3_alert2: cpu-alert-2 {
285 temperature = <110000>; /* millicelsius */
286 hysteresis = <10000>; /* millicelsius */
287 type = "passive";
288 };
289 cpu3_crit0: cpu-crit-0 {
290 temperature = <120000>; /* millicelsius */
291 hysteresis = <0>; /* millicelsius */
292 type = "critical";
293 };
294 };
295
296 cooling-maps {
297 map0 {
298 trip = <&cpu3_alert0>;
299 cooling-device = <&cpu0 0 2>,
300 <&cpu1 0 2>,
301 <&cpu2 0 2>,
302 <&cpu3 0 2>,
303 <&cpu4 0 2>,
304 <&cpu5 0 2>,
305 <&cpu6 0 2>,
306 <&cpu7 0 2>;
307 };
308
309 map1 {
310 trip = <&cpu3_alert1>;
311 cooling-device = <&cpu0 3 6>,
312 <&cpu1 3 6>,
313 <&cpu2 3 6>,
314 <&cpu3 3 6>,
315 <&cpu4 3 5>,
316 <&cpu5 3 5>,
317 <&cpu6 3 5>,
318 <&cpu7 3 5>;
319 };
320
321 map2 {
322 trip = <&cpu3_alert2>;
323 cooling-device = <&cpu0 6 11>,
324 <&cpu1 6 11>,
325 <&cpu2 6 11>,
326 <&cpu3 6 11>,
327 <&cpu4 5 7>,
328 <&cpu5 5 7>,
329 <&cpu6 5 7>,
330 <&cpu7 5 7>;
331 };
332 };
333};
334
335&hdmi {
336 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
337 vdd_osc-supply = <&ldo7_reg>;
338 vdd_pll-supply = <&ldo6_reg>;
339 vdd-supply = <&ldo6_reg>;
340 ddc = <&i2c_2>;
341 status = "okay";
342};
343
344&hsi2c_4 {
345 status = "okay";
346
347 pmic@66 {
348 compatible = "samsung,s2mps11-pmic";
349 reg = <0x66>;
350
351 interrupt-parent = <&gpx3>;
352 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
353 pinctrl-names = "default";
354 pinctrl-0 = <&s2mps11_irq>;
355 wakeup-source;
356
357 s2mps11_osc: clocks {
358 compatible = "samsung,s2mps11-clk";
359 #clock-cells = <1>;
360 clock-output-names = "s2mps11_ap",
361 "s2mps11_cp", "s2mps11_bt";
362 };
363
364 regulators {
365 ldo1_reg: LDO1 {
366 regulator-name = "PVDD_ALIVE_1V0";
367 regulator-min-microvolt = <1000000>;
368 regulator-max-microvolt = <1000000>;
369 regulator-always-on;
370 };
371
372 ldo2_reg: LDO2 {
373 regulator-name = "PVDD_APIO_1V8";
374 regulator-min-microvolt = <1800000>;
375 regulator-max-microvolt = <1800000>;
376 regulator-always-on;
377 };
378
379 ldo3_reg: LDO3 {
380 regulator-name = "PVDD_APIO_MMCON_1V8";
381 regulator-min-microvolt = <1800000>;
382 regulator-max-microvolt = <1800000>;
383 /*
384 * Must be always on, even though there is
385 * a consumer (mmc_0). Otherwise the board
386 * does not reboot with vendor U-Boot
387 * (Linaro for Arndale Octa, v2012.07).
388 */
389 regulator-always-on;
390
391 regulator-state-mem {
392 regulator-off-in-suspend;
393 };
394 };
395
396 ldo4_reg: LDO4 {
397 regulator-name = "PVDD_ADC_1V8";
398 regulator-min-microvolt = <1800000>;
399 regulator-max-microvolt = <1800000>;
400 };
401
402 ldo5_reg: LDO5 {
403 regulator-name = "PVDD_PLL_1V8";
404 regulator-min-microvolt = <1800000>;
405 regulator-max-microvolt = <1800000>;
406 regulator-always-on;
407 };
408
409 ldo6_reg: LDO6 {
410 regulator-name = "PVDD_ANAIP_1V0";
411 regulator-min-microvolt = <1000000>;
412 regulator-max-microvolt = <1000000>;
413 };
414
415 ldo7_reg: LDO7 {
416 regulator-name = "PVDD_ANAIP_1V8";
417 regulator-min-microvolt = <1800000>;
418 regulator-max-microvolt = <1800000>;
419
420 regulator-state-mem {
421 regulator-off-in-suspend;
422 };
423 };
424
425 ldo8_reg: LDO8 {
426 regulator-name = "PVDD_ABB_1V8";
427 regulator-min-microvolt = <1800000>;
428 regulator-max-microvolt = <1800000>;
429 regulator-always-on;
430 };
431
432 ldo9_reg: LDO9 {
433 regulator-name = "PVDD_USB_3V3";
434 regulator-min-microvolt = <3000000>;
435 regulator-max-microvolt = <3000000>;
436 regulator-always-on;
437 };
438
439 ldo10_reg: LDO10 {
440 regulator-name = "PVDD_PRE_1V8";
441 regulator-min-microvolt = <1800000>;
442 regulator-max-microvolt = <1800000>;
443 regulator-always-on;
444 };
445
446 ldo11_reg: LDO11 {
447 regulator-name = "PVDD_USB_1V0";
448 regulator-min-microvolt = <1000000>;
449 regulator-max-microvolt = <1000000>;
450 regulator-always-on;
451 };
452
453 ldo12_reg: LDO12 {
454 regulator-name = "PVDD_HSIC_1V8";
455 regulator-min-microvolt = <1800000>;
456 regulator-max-microvolt = <1800000>;
457 };
458
459 ldo13_reg: LDO13 {
460 regulator-name = "PVDD_APIO_MMCOFF_2V8";
461 regulator-min-microvolt = <1800000>;
462 regulator-max-microvolt = <2800000>;
463
464 regulator-state-mem {
465 regulator-off-in-suspend;
466 };
467 };
468
469 ldo14_reg: LDO14 {
470 /* Unused */
471 regulator-name = "PVDD_LDO14";
472 regulator-min-microvolt = <800000>;
473 regulator-max-microvolt = <3950000>;
474 };
475
476 ldo15_reg: LDO15 {
477 regulator-name = "PVDD_PERI_2V8";
478 regulator-min-microvolt = <3300000>;
479 regulator-max-microvolt = <3300000>;
480
481 regulator-state-mem {
482 regulator-on-in-suspend;
483 };
484 };
485
486 ldo16_reg: LDO16 {
487 regulator-name = "PVDD_PERI_3V3";
488 regulator-min-microvolt = <2200000>;
489 regulator-max-microvolt = <2200000>;
490
491 regulator-state-mem {
492 regulator-on-in-suspend;
493 };
494 };
495
496 ldo17_reg: LDO17 {
497 /* Unused */
498 regulator-name = "PVDD_LDO17";
499 regulator-min-microvolt = <800000>;
500 regulator-max-microvolt = <3950000>;
501 };
502
503 ldo18_reg: LDO18 {
504 regulator-name = "PVDD_EMMC_1V8";
505 regulator-min-microvolt = <1800000>;
506 regulator-max-microvolt = <1800000>;
507 /*
508 * Must stay in "off" mode during shutdown for
509 * proper eMMC reset. The "off" mode is in
510 * fact controlled by LDO18EN. The eMMC does
511 * not have reset pin connected so the reset
512 * will be triggered by falling edge of
513 * LDO18EN.
514 */
515
516 regulator-state-mem {
517 regulator-off-in-suspend;
518 };
519 };
520
521 ldo19_reg: LDO19 {
522 regulator-name = "PVDD_TFLASH_2V8";
523 regulator-min-microvolt = <2800000>;
524 regulator-max-microvolt = <2800000>;
525
526 regulator-state-mem {
527 regulator-off-in-suspend;
528 };
529 };
530
531 ldo20_reg: LDO20 {
532 regulator-name = "PVDD_BTWIFI_1V8";
533 regulator-min-microvolt = <1800000>;
534 regulator-max-microvolt = <1800000>;
535 };
536
537 ldo21_reg: LDO21 {
538 regulator-name = "PVDD_CAM1IO_1V8";
539 regulator-min-microvolt = <1800000>;
540 regulator-max-microvolt = <1800000>;
541 };
542
543 ldo22_reg: LDO22 {
544 /* Unused */
545 regulator-name = "PVDD_LDO22";
546 regulator-min-microvolt = <800000>;
547 regulator-max-microvolt = <2375000>;
548 };
549
550 ldo23_reg: LDO23 {
551 regulator-name = "PVDD_MIFS_1V1";
552 regulator-min-microvolt = <800000>;
553 regulator-max-microvolt = <1100000>;
554 regulator-always-on;
555
556 regulator-state-mem {
557 regulator-on-in-suspend;
558 };
559 };
560
561 ldo24_reg: LDO24 {
562 regulator-name = "PVDD_CAM1_AVDD_2V8";
563 regulator-min-microvolt = <2800000>;
564 regulator-max-microvolt = <2800000>;
565
566 regulator-state-mem {
567 regulator-on-in-suspend;
568 };
569 };
570
571 ldo25_reg: LDO25 {
572 /* Unused */
573 regulator-name = "PVDD_LDO25";
574 regulator-min-microvolt = <800000>;
575 regulator-max-microvolt = <3950000>;
576 };
577
578 ldo26_reg: LDO26 {
579 regulator-name = "PVDD_CAM0_AF_2V8";
580 regulator-min-microvolt = <3000000>;
581 regulator-max-microvolt = <3000000>;
582 };
583
584 ldo27_reg: LDO27 {
585 regulator-name = "PVDD_G3DS_1V0";
586 regulator-min-microvolt = <800000>;
587 regulator-max-microvolt = <1100000>;
588 regulator-always-on;
589
590 regulator-state-mem {
591 regulator-on-in-suspend;
592 };
593 };
594
595 ldo28_reg: LDO28 {
596 regulator-name = "PVDD_TSP_3V3";
597 regulator-min-microvolt = <3300000>;
598 regulator-max-microvolt = <3300000>;
599 };
600
601 ldo29_reg: LDO29 {
602 regulator-name = "PVDD_AUDIO_1V8";
603 regulator-min-microvolt = <1800000>;
604 regulator-max-microvolt = <1800000>;
605 };
606
607 ldo30_reg: LDO30 {
608 /* Unused */
609 regulator-name = "PVDD_LDO30";
610 regulator-min-microvolt = <800000>;
611 regulator-max-microvolt = <3950000>;
612 };
613
614 ldo31_reg: LDO31 {
615 regulator-name = "PVDD_PERI_1V8";
616 regulator-min-microvolt = <1800000>;
617 regulator-max-microvolt = <1800000>;
618 };
619
620 ldo32_reg: LDO32 {
621 regulator-name = "PVDD_LCD_1V8";
622 regulator-min-microvolt = <1800000>;
623 regulator-max-microvolt = <1800000>;
624 };
625
626 ldo33_reg: LDO33 {
627 regulator-name = "PVDD_CAM0IO_1V8";
628 regulator-min-microvolt = <1800000>;
629 regulator-max-microvolt = <1800000>;
630 };
631
632 ldo34_reg: LDO34 {
633 /* Unused */
634 regulator-name = "PVDD_LDO34";
635 regulator-min-microvolt = <800000>;
636 regulator-max-microvolt = <3950000>;
637 };
638
639 ldo35_reg: LDO35 {
640 regulator-name = "PVDD_CAM0_DVDD_1V2";
641 regulator-min-microvolt = <1200000>;
642 regulator-max-microvolt = <1200000>;
643 };
644
645 ldo36_reg: LDO36 {
646 /* Unused */
647 regulator-name = "PVDD_LDO36";
648 regulator-min-microvolt = <800000>;
649 regulator-max-microvolt = <3950000>;
650 };
651
652 ldo37_reg: LDO37 {
653 /* Unused */
654 regulator-name = "PVDD_LDO37";
655 regulator-min-microvolt = <800000>;
656 regulator-max-microvolt = <3950000>;
657 };
658
659 ldo38_reg: LDO38 {
660 regulator-name = "PVDD_CAM0_AVDD_2V8";
661 regulator-min-microvolt = <2800000>;
662 regulator-max-microvolt = <2800000>;
663 };
664
665 buck1_reg: BUCK1 {
666 regulator-name = "PVDD_MIF_1V1";
667 regulator-min-microvolt = <800000>;
668 regulator-max-microvolt = <1300000>;
669 regulator-always-on;
670
671 regulator-state-mem {
672 regulator-off-in-suspend;
673 };
674 };
675
676 buck2_reg: BUCK2 {
677 regulator-name = "PVDD_ARM_1V0";
678 regulator-min-microvolt = <800000>;
679 regulator-max-microvolt = <1500000>;
680 regulator-always-on;
681
682 regulator-state-mem {
683 regulator-off-in-suspend;
684 };
685 };
686
687 buck3_reg: BUCK3 {
688 regulator-name = "PVDD_INT_1V0";
689 regulator-min-microvolt = <800000>;
690 regulator-max-microvolt = <1400000>;
691 regulator-always-on;
692
693 regulator-state-mem {
694 regulator-off-in-suspend;
695 };
696 };
697
698 buck4_reg: BUCK4 {
699 regulator-name = "PVDD_G3D_1V0";
700 regulator-min-microvolt = <800000>;
701 regulator-max-microvolt = <1400000>;
702 regulator-always-on;
703
704 regulator-state-mem {
705 regulator-off-in-suspend;
706 };
707 };
708
709 buck5_reg: BUCK5 {
710 regulator-name = "PVDD_LPDDR3_1V2";
711 regulator-min-microvolt = <800000>;
712 regulator-max-microvolt = <1400000>;
713 regulator-always-on;
714 };
715
716 buck6_reg: BUCK6 {
717 regulator-name = "PVDD_KFC_1V0";
718 regulator-min-microvolt = <800000>;
719 regulator-max-microvolt = <1500000>;
720 regulator-always-on;
721
722 regulator-state-mem {
723 regulator-off-in-suspend;
724 };
725 };
726
727 buck7_reg: BUCK7 {
728 regulator-name = "VIN_LLDO_1V4";
729 regulator-min-microvolt = <1200000>;
730 regulator-max-microvolt = <1500000>;
731 regulator-always-on;
732 };
733
734 buck8_reg: BUCK8 {
735 regulator-name = "VIN_MLDO_2V0";
736 regulator-min-microvolt = <1800000>;
737 regulator-max-microvolt = <2100000>;
738 regulator-always-on;
739 };
740
741 buck9_reg: BUCK9 {
742 regulator-name = "VIN_HLDO_3V5";
743 regulator-min-microvolt = <3000000>;
744 regulator-max-microvolt = <3500000>;
745 regulator-always-on;
746 };
747
748 buck10_reg: BUCK10 {
749 regulator-name = "PVDD_EMMCF_2V8";
750 regulator-min-microvolt = <2800000>;
751 regulator-max-microvolt = <2800000>;
752 /*
753 * Must stay in "off" mode during shutdown for
754 * proper eMMC reset. The "off" mode is in
755 * fact controlled by BUCK10EN. The eMMC does
756 * not have reset pin connected so the reset
757 * will be triggered by falling edge of
758 * BUCK10EN.
759 */
760
761 regulator-state-mem {
762 regulator-off-in-suspend;
763 };
764 };
765 };
766 };
767};
768
769&i2c_2 {
770 status = "okay";
771};
772
773&mixer {
774 status = "okay";
775};
776
777&mmc_0 {
778 status = "okay";
779 non-removable;
780 card-detect-delay = <200>;
781 samsung,dw-mshc-ciu-div = <3>;
782 samsung,dw-mshc-sdr-timing = <0 4>;
783 samsung,dw-mshc-ddr-timing = <0 2>;
784 pinctrl-names = "default";
785 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
786 vmmc-supply = <&ldo18_reg>;
787 vqmmc-supply = <&ldo3_reg>;
788 bus-width = <8>;
789 cap-mmc-highspeed;
790 mmc-hs200-1_8v;
791};
792
793&mmc_2 {
794 status = "okay";
795 card-detect-delay = <200>;
796 samsung,dw-mshc-ciu-div = <3>;
797 samsung,dw-mshc-sdr-timing = <0 4>;
798 samsung,dw-mshc-ddr-timing = <0 2>;
799 pinctrl-names = "default";
800 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
801 vmmc-supply = <&ldo19_reg>;
802 vqmmc-supply = <&ldo13_reg>;
803 bus-width = <4>;
804 cap-sd-highspeed;
805 sd-uhs-sdr50;
806 sd-uhs-sdr104;
807 sd-uhs-ddr50;
808};
809
810&pinctrl_0 {
811 s2mps11_irq: s2mps11-irq-pins {
812 samsung,pins = "gpx3-2";
813 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
814 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
815 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
816 };
817};
818
819&rtc {
820 status = "okay";
821 clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
822 clock-names = "rtc", "rtc_src";
823};
824
825&usbdrd_dwc3_1 {
826 dr_mode = "host";
827};
828
829&usbdrd3_0 {
830 vdd10-supply = <&ldo11_reg>;
831 vdd33-supply = <&ldo9_reg>;
832};
833
834&usbdrd3_1 {
835 vdd10-supply = <&ldo11_reg>;
836 vdd33-supply = <&ldo9_reg>;
837};
1/*
2 * Samsung's Exynos5420 based Arndale Octa board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/dts-v1/;
13#include "exynos5420.dtsi"
14#include "exynos5420-cpus.dtsi"
15#include <dt-bindings/gpio/gpio.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/input/input.h>
18#include <dt-bindings/clock/samsung,s2mps11.h>
19
20/ {
21 model = "Insignal Arndale Octa evaluation board based on EXYNOS5420";
22 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
23
24 memory {
25 reg = <0x20000000 0x80000000>;
26 };
27
28 chosen {
29 bootargs = "console=ttySAC3,115200";
30 };
31
32 firmware@02073000 {
33 compatible = "samsung,secure-firmware";
34 reg = <0x02073000 0x1000>;
35 };
36
37 fixed-rate-clocks {
38 oscclk {
39 compatible = "samsung,exynos5420-oscclk";
40 clock-frequency = <24000000>;
41 };
42 };
43
44 gpio_keys {
45 compatible = "gpio-keys";
46
47 wakeup {
48 label = "SW-TACT1";
49 gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
50 linux,code = <KEY_WAKEUP>;
51 wakeup-source;
52 };
53 };
54};
55
56&cpu0 {
57 cpu-supply = <&buck2_reg>;
58};
59
60&cpu4 {
61 cpu-supply = <&buck6_reg>;
62};
63
64&usbdrd_dwc3_1 {
65 dr_mode = "host";
66};
67
68&cci {
69 status = "disabled";
70};
71
72&hsi2c_4 {
73 status = "okay";
74
75 s2mps11_pmic@66 {
76 compatible = "samsung,s2mps11-pmic";
77 reg = <0x66>;
78 s2mps11,buck2-ramp-delay = <12>;
79 s2mps11,buck34-ramp-delay = <12>;
80 s2mps11,buck16-ramp-delay = <12>;
81 s2mps11,buck6-ramp-enable = <1>;
82 s2mps11,buck2-ramp-enable = <1>;
83 s2mps11,buck3-ramp-enable = <1>;
84 s2mps11,buck4-ramp-enable = <1>;
85
86 interrupt-parent = <&gpx3>;
87 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&s2mps11_irq>;
90
91 s2mps11_osc: clocks {
92 #clock-cells = <1>;
93 clock-output-names = "s2mps11_ap",
94 "s2mps11_cp", "s2mps11_bt";
95 };
96
97 regulators {
98 ldo1_reg: LDO1 {
99 regulator-name = "PVDD_ALIVE_1V0";
100 regulator-min-microvolt = <1000000>;
101 regulator-max-microvolt = <1000000>;
102 regulator-always-on;
103 };
104
105 ldo2_reg: LDO2 {
106 regulator-name = "PVDD_APIO_1V8";
107 regulator-min-microvolt = <1800000>;
108 regulator-max-microvolt = <1800000>;
109 };
110
111 ldo3_reg: LDO3 {
112 regulator-name = "PVDD_APIO_MMCON_1V8";
113 regulator-min-microvolt = <1800000>;
114 regulator-max-microvolt = <1800000>;
115 regulator-always-on;
116 };
117
118 ldo4_reg: LDO4 {
119 regulator-name = "PVDD_ADC_1V8";
120 regulator-min-microvolt = <1800000>;
121 regulator-max-microvolt = <1800000>;
122 };
123
124 ldo5_reg: LDO5 {
125 regulator-name = "PVDD_PLL_1V8";
126 regulator-min-microvolt = <1800000>;
127 regulator-max-microvolt = <1800000>;
128 regulator-always-on;
129 };
130
131 ldo6_reg: LDO6 {
132 regulator-name = "PVDD_ANAIP_1V0";
133 regulator-min-microvolt = <1000000>;
134 regulator-max-microvolt = <1000000>;
135 };
136
137 ldo7_reg: LDO7 {
138 regulator-name = "PVDD_ANAIP_1V8";
139 regulator-min-microvolt = <1800000>;
140 regulator-max-microvolt = <1800000>;
141 };
142
143 ldo8_reg: LDO8 {
144 regulator-name = "PVDD_ABB_1V8";
145 regulator-min-microvolt = <1800000>;
146 regulator-max-microvolt = <1800000>;
147 };
148
149 ldo9_reg: LDO9 {
150 regulator-name = "PVDD_USB_3V3";
151 regulator-min-microvolt = <3000000>;
152 regulator-max-microvolt = <3000000>;
153 regulator-always-on;
154 };
155
156 ldo10_reg: LDO10 {
157 regulator-name = "PVDD_PRE_1V8";
158 regulator-min-microvolt = <1800000>;
159 regulator-max-microvolt = <1800000>;
160 regulator-always-on;
161 };
162
163 ldo11_reg: LDO11 {
164 regulator-name = "PVDD_USB_1V0";
165 regulator-min-microvolt = <1000000>;
166 regulator-max-microvolt = <1000000>;
167 regulator-always-on;
168 };
169
170 ldo12_reg: LDO12 {
171 regulator-name = "PVDD_HSIC_1V8";
172 regulator-min-microvolt = <1800000>;
173 regulator-max-microvolt = <1800000>;
174 };
175
176 ldo13_reg: LDO13 {
177 regulator-name = "PVDD_APIO_MMCOFF_2V8";
178 regulator-min-microvolt = <2800000>;
179 regulator-max-microvolt = <2800000>;
180 };
181
182 ldo15_reg: LDO15 {
183 regulator-name = "PVDD_PERI_2V8";
184 regulator-min-microvolt = <3300000>;
185 regulator-max-microvolt = <3300000>;
186 };
187
188 ldo16_reg: LDO16 {
189 regulator-name = "PVDD_PERI_3V3";
190 regulator-min-microvolt = <2200000>;
191 regulator-max-microvolt = <2200000>;
192 };
193
194 ldo18_reg: LDO18 {
195 regulator-name = "PVDD_EMMC_1V8";
196 regulator-min-microvolt = <1800000>;
197 regulator-max-microvolt = <1800000>;
198 };
199
200 ldo19_reg: LDO19 {
201 regulator-name = "PVDD_TFLASH_2V8";
202 regulator-min-microvolt = <2800000>;
203 regulator-max-microvolt = <2800000>;
204 };
205
206 ldo20_reg: LDO20 {
207 regulator-name = "PVDD_BTWIFI_1V8";
208 regulator-min-microvolt = <1800000>;
209 regulator-max-microvolt = <1800000>;
210 };
211
212 ldo21_reg: LDO21 {
213 regulator-name = "PVDD_CAM1IO_1V8";
214 regulator-min-microvolt = <1800000>;
215 regulator-max-microvolt = <1800000>;
216 };
217
218 ldo23_reg: LDO23 {
219 regulator-name = "PVDD_MIFS_1V1";
220 regulator-min-microvolt = <1200000>;
221 regulator-max-microvolt = <1200000>;
222 regulator-always-on;
223 };
224
225 ldo24_reg: LDO24 {
226 regulator-name = "PVDD_CAM1_AVDD_2V8";
227 regulator-min-microvolt = <2800000>;
228 regulator-max-microvolt = <2800000>;
229 };
230
231 ldo26_reg: LDO26 {
232 regulator-name = "PVDD_CAM0_AF_2V8";
233 regulator-min-microvolt = <3000000>;
234 regulator-max-microvolt = <3000000>;
235 };
236
237 ldo27_reg: LDO27 {
238 regulator-name = "PVDD_G3DS_1V0";
239 regulator-min-microvolt = <1200000>;
240 regulator-max-microvolt = <1200000>;
241 };
242
243 ldo28_reg: LDO28 {
244 regulator-name = "PVDD_TSP_3V3";
245 regulator-min-microvolt = <3300000>;
246 regulator-max-microvolt = <3300000>;
247 };
248
249 ldo29_reg: LDO29 {
250 regulator-name = "PVDD_AUDIO_1V8";
251 regulator-min-microvolt = <1800000>;
252 regulator-max-microvolt = <1800000>;
253 };
254
255 ldo31_reg: LDO31 {
256 regulator-name = "PVDD_PERI_1V8";
257 regulator-min-microvolt = <1800000>;
258 regulator-max-microvolt = <1800000>;
259 };
260
261 ldo32_reg: LDO32 {
262 regulator-name = "PVDD_LCD_1V8";
263 regulator-min-microvolt = <1800000>;
264 regulator-max-microvolt = <1800000>;
265 };
266
267 ldo33_reg: LDO33 {
268 regulator-name = "PVDD_CAM0IO_1V8";
269 regulator-min-microvolt = <1800000>;
270 regulator-max-microvolt = <1800000>;
271 };
272
273 ldo35_reg: LDO35 {
274 regulator-name = "PVDD_CAM0_DVDD_1V2";
275 regulator-min-microvolt = <1200000>;
276 regulator-max-microvolt = <1200000>;
277 };
278
279 ldo38_reg: LDO38 {
280 regulator-name = "PVDD_CAM0_AVDD_2V8";
281 regulator-min-microvolt = <2800000>;
282 regulator-max-microvolt = <2800000>;
283 };
284
285 buck1_reg: BUCK1 {
286 regulator-name = "PVDD_MIF_1V1";
287 regulator-min-microvolt = <800000>;
288 regulator-max-microvolt = <1100000>;
289 regulator-always-on;
290 };
291
292 buck2_reg: BUCK2 {
293 regulator-name = "vdd_arm";
294 regulator-min-microvolt = <800000>;
295 regulator-max-microvolt = <1000000>;
296 regulator-always-on;
297 };
298
299 buck3_reg: BUCK3 {
300 regulator-name = "PVDD_INT_1V0";
301 regulator-min-microvolt = <800000>;
302 regulator-max-microvolt = <1000000>;
303 regulator-always-on;
304 };
305
306 buck4_reg: BUCK4 {
307 regulator-name = "PVDD_G3D_1V0";
308 regulator-min-microvolt = <800000>;
309 regulator-max-microvolt = <1000000>;
310 };
311
312 buck5_reg: BUCK5 {
313 regulator-name = "PVDD_LPDDR3_1V2";
314 regulator-min-microvolt = <800000>;
315 regulator-max-microvolt = <1200000>;
316 regulator-always-on;
317 };
318
319 buck6_reg: BUCK6 {
320 regulator-name = "PVDD_KFC_1V0";
321 regulator-min-microvolt = <800000>;
322 regulator-max-microvolt = <1000000>;
323 regulator-always-on;
324 };
325
326 buck7_reg: BUCK7 {
327 regulator-name = "VIN_LLDO_1V4";
328 regulator-min-microvolt = <800000>;
329 regulator-max-microvolt = <1400000>;
330 regulator-always-on;
331 };
332
333 buck8_reg: BUCK8 {
334 regulator-name = "VIN_MLDO_2V0";
335 regulator-min-microvolt = <800000>;
336 regulator-max-microvolt = <2000000>;
337 regulator-always-on;
338 };
339
340 buck9_reg: BUCK9 {
341 regulator-name = "VIN_HLDO_3V5";
342 regulator-min-microvolt = <3000000>;
343 regulator-max-microvolt = <3500000>;
344 regulator-always-on;
345 };
346
347 buck10_reg: BUCK10 {
348 regulator-name = "PVDD_EMMCF_2V8";
349 regulator-min-microvolt = <2800000>;
350 regulator-max-microvolt = <2800000>;
351 };
352 };
353 };
354};
355
356&mfc {
357 samsung,mfc-r = <0x43000000 0x800000>;
358 samsung,mfc-l = <0x51000000 0x800000>;
359};
360
361&mmc_0 {
362 status = "okay";
363 broken-cd;
364 card-detect-delay = <200>;
365 samsung,dw-mshc-ciu-div = <3>;
366 samsung,dw-mshc-sdr-timing = <0 4>;
367 samsung,dw-mshc-ddr-timing = <0 2>;
368 pinctrl-names = "default";
369 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
370 vmmc-supply = <&ldo10_reg>;
371 bus-width = <8>;
372 cap-mmc-highspeed;
373};
374
375&mmc_2 {
376 status = "okay";
377 card-detect-delay = <200>;
378 samsung,dw-mshc-ciu-div = <3>;
379 samsung,dw-mshc-sdr-timing = <2 3>;
380 samsung,dw-mshc-ddr-timing = <1 2>;
381 pinctrl-names = "default";
382 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
383 vmmc-supply = <&ldo19_reg>;
384 vqmmc-supply = <&ldo13_reg>;
385 bus-width = <4>;
386 cap-sd-highspeed;
387};
388
389&pinctrl_0 {
390 s2mps11_irq: s2mps11-irq {
391 samsung,pins = "gpx3-2";
392 samsung,pin-function = <0xf>;
393 samsung,pin-pud = <0>;
394 samsung,pin-drv = <0>;
395 };
396};
397
398&rtc {
399 status = "okay";
400 clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
401 clock-names = "rtc", "rtc_src";
402};