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1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Device Tree include file for Armada 385 based Linksys boards
4 *
5 * Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10#include "armada-385.dtsi"
11
12/ {
13 model = "Linksys boards based on Armada 385";
14 compatible = "linksys,armada385", "marvell,armada385",
15 "marvell,armada380";
16
17 chosen {
18 stdout-path = "serial0:115200n8";
19 };
20
21 memory {
22 device_type = "memory";
23 reg = <0x00000000 0x20000000>; /* 512 MiB */
24 };
25
26 soc {
27 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
28 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
29 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
30 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
31 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
32 };
33
34 usb3_1_phy: usb3_1-phy {
35 compatible = "usb-nop-xceiv";
36 vcc-supply = <&usb3_1_vbus>;
37 #phy-cells = <0>;
38 };
39
40 usb3_1_vbus: usb3_1-vbus {
41 compatible = "regulator-fixed";
42 pinctrl-names = "default";
43 pinctrl-0 = <&usb3_1_vbus_pins>;
44 regulator-name = "usb3_1-vbus";
45 regulator-min-microvolt = <5000000>;
46 regulator-max-microvolt = <5000000>;
47 enable-active-high;
48 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
49 };
50
51 gpio_keys: gpio-keys {
52 compatible = "gpio-keys";
53 pinctrl-0 = <&gpio_keys_pins>;
54 pinctrl-names = "default";
55
56 button-wps {
57 label = "WPS";
58 linux,code = <KEY_WPS_BUTTON>;
59 gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
60 };
61
62 button-reset {
63 label = "Factory Reset Button";
64 linux,code = <KEY_RESTART>;
65 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
66 };
67 };
68
69 gpio_leds: gpio-leds {
70 compatible = "gpio-leds";
71 pinctrl-0 = <&gpio_leds_pins>;
72 pinctrl-names = "default";
73
74 led-power {
75 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
76 default-state = "on";
77 };
78
79 led-sata {
80 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
81 default-state = "off";
82 linux,default-trigger = "disk-activity";
83 };
84 };
85};
86
87&ahci0 {
88 status = "okay";
89};
90
91&bm {
92 status = "okay";
93};
94
95&bm_bppi {
96 status = "okay";
97};
98
99ð0 {
100 status = "okay";
101 phy-mode = "rgmii-id";
102 buffer-manager = <&bm>;
103 bm,pool-long = <0>;
104 bm,pool-short = <1>;
105 fixed-link {
106 speed = <1000>;
107 full-duplex;
108 };
109};
110
111ð2 {
112 status = "okay";
113 phy-mode = "sgmii";
114 buffer-manager = <&bm>;
115 bm,pool-long = <2>;
116 bm,pool-short = <3>;
117 fixed-link {
118 speed = <1000>;
119 full-duplex;
120 };
121};
122
123&i2c0 {
124 pinctrl-names = "default";
125 pinctrl-0 = <&i2c0_pins>;
126 status = "okay";
127
128 tmp421@4c {
129 compatible = "ti,tmp421";
130 reg = <0x4c>;
131 };
132
133 expander0: pca9635@68 {
134 #address-cells = <1>;
135 #size-cells = <0>;
136 compatible = "nxp,pca9635";
137 reg = <0x68>;
138 };
139};
140
141&nand_controller {
142 /* 128MiB or 256MiB */
143 status = "okay";
144 #address-cells = <1>;
145 #size-cells = <0>;
146
147 nand: nand@0 {
148 reg = <0>;
149 label = "pxa3xx_nand-0";
150 nand-rb = <0>;
151 nand-ecc-strength = <4>;
152 nand-ecc-step-size = <512>;
153 marvell,nand-keep-config;
154 nand-on-flash-bbt;
155 };
156};
157
158&mdio {
159 status = "okay";
160
161 switch@0 {
162 compatible = "marvell,mv88e6085";
163 #address-cells = <1>;
164 #size-cells = <0>;
165 reg = <0>;
166
167 ports {
168 #address-cells = <1>;
169 #size-cells = <0>;
170
171 port@0 {
172 reg = <0>;
173 label = "lan4";
174 };
175
176 port@1 {
177 reg = <1>;
178 label = "lan3";
179 };
180
181 port@2 {
182 reg = <2>;
183 label = "lan2";
184 };
185
186 port@3 {
187 reg = <3>;
188 label = "lan1";
189 };
190
191 port@4 {
192 reg = <4>;
193 label = "wan";
194 };
195
196 port@5 {
197 reg = <5>;
198 label = "cpu";
199 ethernet = <ð2>;
200
201 fixed-link {
202 speed = <1000>;
203 full-duplex;
204 };
205 };
206 };
207 };
208};
209
210&pciec {
211 status = "okay";
212};
213
214&pcie1 {
215 /* Marvell 88W8864, 5GHz-only */
216 status = "okay";
217};
218
219&pcie2 {
220 /* Marvell 88W8864, 2GHz-only */
221 status = "okay";
222};
223
224&pinctrl {
225 gpio_keys_pins: gpio-keys-pins {
226 /* mpp24: wps, mpp29: reset */
227 marvell,pins = "mpp24", "mpp29";
228 marvell,function = "gpio";
229 };
230
231 gpio_leds_pins: gpio-leds-pins {
232 /* mpp54: sata, mpp55: power */
233 marvell,pins = "mpp54", "mpp55";
234 marvell,function = "gpio";
235 };
236
237 usb3_1_vbus_pins: usb3_1-vbus-pins {
238 marvell,pins = "mpp50";
239 marvell,function = "gpio";
240 };
241};
242
243&spi0 {
244 status = "disabled";
245};
246
247&uart0 {
248 /* J10: VCC, NC, RX, NC, TX, GND */
249 status = "okay";
250};
251
252&usb0 {
253 /* USB part of the eSATA/USB 2.0 port */
254 status = "okay";
255};
256
257&usb3_1 {
258 status = "okay";
259 usb-phy = <&usb3_1_phy>;
260};
261
262&rtc {
263 /* No crystal connected to the internal RTC */
264 status = "disabled";
265};
1/*
2 * Device Tree include file for Armada 385 based Linksys boards
3 *
4 * Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
5 *
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without
14 * any warranty of any kind, whether express or implied.
15 *
16 * Or, alternatively,
17 *
18 * b) Permission is hereby granted, free of charge, to any person
19 * obtaining a copy of this software and associated documentation
20 * files (the "Software"), to deal in the Software without
21 * restriction, including without limitation the rights to use,
22 * copy, modify, merge, publish, distribute, sublicense, and/or
23 * sell copies of the Software, and to permit persons to whom the
24 * Software is furnished to do so, subject to the following
25 * conditions:
26 *
27 * The above copyright notice and this permission notice shall be
28 * included in all copies or substantial portions of the Software.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
31 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
32 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
33 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
34 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
35 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
36 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
37 * OTHER DEALINGS IN THE SOFTWARE.
38 */
39
40#include <dt-bindings/gpio/gpio.h>
41#include <dt-bindings/input/input.h>
42#include "armada-385.dtsi"
43
44/ {
45 model = "Linksys boards based on Armada 385";
46 compatible = "linksys,armada385", "marvell,armada385",
47 "marvell,armada380";
48
49 chosen {
50 stdout-path = "serial0:115200n8";
51 };
52
53 memory {
54 device_type = "memory";
55 reg = <0x00000000 0x20000000>; /* 512 MB */
56 };
57
58 soc {
59 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
60 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
61 MBUS_ID(0x09, 0x09) 0 0xf1100000 0x10000
62 MBUS_ID(0x09, 0x05) 0 0xf1110000 0x10000>;
63
64 internal-regs {
65
66 spi@10600 {
67 status = "disabled";
68 };
69
70 i2c@11000 {
71 pinctrl-names = "default";
72 pinctrl-0 = <&i2c0_pins>;
73 status = "okay";
74
75 tmp421@4c {
76 compatible = "ti,tmp421";
77 reg = <0x4c>;
78 };
79
80 pca9635@68 {
81 #address-cells = <1>;
82 #size-cells = <0>;
83 compatible = "nxp,pca9635";
84 reg = <0x68>;
85 };
86 };
87
88 /* J10: VCC, NC, RX, NC, TX, GND */
89 serial@12000 {
90 status = "okay";
91 };
92
93 ethernet@70000 {
94 status = "okay";
95 phy-mode = "rgmii-id";
96 fixed-link {
97 speed = <1000>;
98 full-duplex;
99 };
100 };
101
102 ethernet@34000 {
103 status = "okay";
104 phy-mode = "sgmii";
105 fixed-link {
106 speed = <1000>;
107 full-duplex;
108 };
109 };
110
111 mdio {
112 status = "okay";
113 };
114
115 sata@a8000 {
116 status = "okay";
117 };
118
119 /* USB part of the eSATA/USB 2.0 port */
120 usb@58000 {
121 status = "okay";
122 };
123
124 usb3@f8000 {
125 status = "okay";
126 usb-phy = <&usb3_phy>;
127 };
128
129 flash@d0000 {
130 status = "okay";
131 num-cs = <1>;
132 marvell,nand-keep-config;
133 marvell,nand-enable-arbiter;
134 nand-on-flash-bbt;
135
136 partition@0 {
137 label = "u-boot";
138 reg = <0x0000000 0x200000>; /* 2MB */
139 read-only;
140 };
141
142 partition@100000 {
143 label = "u_env";
144 reg = <0x200000 0x40000>; /* 256KB */
145 };
146
147 partition@140000 {
148 label = "s_env";
149 reg = <0x240000 0x40000>; /* 256KB */
150 };
151
152 partition@900000 {
153 label = "devinfo";
154 reg = <0x900000 0x100000>; /* 1MB */
155 read-only;
156 };
157
158 /* kernel1 overlaps with rootfs1 by design */
159 partition@a00000 {
160 label = "kernel1";
161 reg = <0xa00000 0x2800000>; /* 40MB */
162 };
163
164 partition@1000000 {
165 label = "rootfs1";
166 reg = <0x1000000 0x2200000>; /* 34MB */
167 };
168
169 /* kernel2 overlaps with rootfs2 by design */
170 partition@3200000 {
171 label = "kernel2";
172 reg = <0x3200000 0x2800000>; /* 40MB */
173 };
174
175 partition@3800000 {
176 label = "rootfs2";
177 reg = <0x3800000 0x2200000>; /* 34MB */
178 };
179
180 /*
181 * 38MB, last MB is for the BBT, not writable
182 */
183 partition@5a00000 {
184 label = "syscfg";
185 reg = <0x5a00000 0x2600000>;
186 };
187
188 /*
189 * Unused area between "s_env" and "devinfo".
190 * Moved here because otherwise the renumbered
191 * partitions would break the bootloader
192 * supplied bootargs
193 */
194 partition@180000 {
195 label = "unused_area";
196 reg = <0x280000 0x680000>; /* 6.5MB */
197 };
198 };
199 };
200
201 pcie-controller {
202 status = "okay";
203
204 pcie@1,0 {
205 /* Marvell 88W8864, 5GHz-only */
206 status = "okay";
207 };
208
209 pcie@2,0 {
210 /* Marvell 88W8864, 2GHz-only */
211 status = "okay";
212 };
213 };
214 };
215
216 usb3_phy: usb3_phy {
217 compatible = "usb-nop-xceiv";
218 vcc-supply = <®_xhci0_vbus>;
219 };
220
221 reg_xhci0_vbus: xhci0-vbus {
222 compatible = "regulator-fixed";
223 pinctrl-names = "default";
224 pinctrl-0 = <&xhci0_vbus_pins>;
225 regulator-name = "xhci0-vbus";
226 regulator-min-microvolt = <5000000>;
227 regulator-max-microvolt = <5000000>;
228 enable-active-high;
229 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
230 };
231
232 gpio_keys {
233 compatible = "gpio-keys";
234 #address-cells = <1>;
235 #size-cells = <0>;
236 pinctrl-0 = <&keys_pin>;
237 pinctrl-names = "default";
238
239 button@1 {
240 label = "WPS";
241 linux,code = <KEY_WPS_BUTTON>;
242 gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
243 };
244
245 button@2 {
246 label = "Factory Reset Button";
247 linux,code = <KEY_RESTART>;
248 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
249 };
250 };
251
252 gpio-leds {
253 compatible = "gpio-leds";
254 pinctrl-0 = <&power_led_pin &sata_led_pin>;
255 pinctrl-names = "default";
256
257 power {
258 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
259 default-state = "on";
260 };
261
262 sata {
263 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
264 default-state = "off";
265 };
266 };
267
268 dsa@0 {
269 compatible = "marvell,dsa";
270 #address-cells = <2>;
271 #size-cells = <0>;
272
273 dsa,ethernet = <ð2>;
274 dsa,mii-bus = <&mdio>;
275
276 switch@0 {
277 #address-cells = <1>;
278 #size-cells = <0>;
279 reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
280
281 port@0 {
282 reg = <0>;
283 label = "lan4";
284 };
285
286 port@1 {
287 reg = <1>;
288 label = "lan3";
289 };
290
291 port@2 {
292 reg = <2>;
293 label = "lan2";
294 };
295
296 port@3 {
297 reg = <3>;
298 label = "lan1";
299 };
300
301 port@4 {
302 reg = <4>;
303 label = "wan";
304 };
305
306 port@5 {
307 reg = <5>;
308 label = "cpu";
309 };
310 };
311 };
312};
313
314&pinctrl {
315 keys_pin: keys-pin {
316 marvell,pins = "mpp24", "mpp47";
317 marvell,function = "gpio";
318 };
319
320 power_led_pin: power-led-pin {
321 marvell,pins = "mpp55";
322 marvell,function = "gpio";
323 };
324
325 sata_led_pin: sata-led-pin {
326 marvell,pins = "mpp54";
327 marvell,function = "gpio";
328 };
329
330 xhci0_vbus_pins: xhci0-vbus-pins {
331 marvell,pins = "mpp50";
332 marvell,function = "gpio";
333 };
334};