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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Thunderbolt control channel messages
4 *
5 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com>
6 * Copyright (C) 2017, Intel Corporation
7 */
8
9#ifndef _TB_MSGS
10#define _TB_MSGS
11
12#include <linux/types.h>
13#include <linux/uuid.h>
14
15enum tb_cfg_space {
16 TB_CFG_HOPS = 0,
17 TB_CFG_PORT = 1,
18 TB_CFG_SWITCH = 2,
19 TB_CFG_COUNTERS = 3,
20};
21
22enum tb_cfg_error {
23 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
24 TB_CFG_ERROR_LINK_ERROR = 1,
25 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
26 TB_CFG_ERROR_NO_SUCH_PORT = 4,
27 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
28 TB_CFG_ERROR_LOOP = 8,
29 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
30 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
31 TB_CFG_ERROR_LOCK = 15,
32};
33
34/* common header */
35struct tb_cfg_header {
36 u32 route_hi:22;
37 u32 unknown:10; /* highest order bit is set on replies */
38 u32 route_lo;
39} __packed;
40
41/* additional header for read/write packets */
42struct tb_cfg_address {
43 u32 offset:13; /* in dwords */
44 u32 length:6; /* in dwords */
45 u32 port:6;
46 enum tb_cfg_space space:2;
47 u32 seq:2; /* sequence number */
48 u32 zero:3;
49} __packed;
50
51/* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
52struct cfg_read_pkg {
53 struct tb_cfg_header header;
54 struct tb_cfg_address addr;
55} __packed;
56
57/* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
58struct cfg_write_pkg {
59 struct tb_cfg_header header;
60 struct tb_cfg_address addr;
61 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
62} __packed;
63
64/* TB_CFG_PKG_ERROR */
65struct cfg_error_pkg {
66 struct tb_cfg_header header;
67 enum tb_cfg_error error:4;
68 u32 zero1:4;
69 u32 port:6;
70 u32 zero2:2; /* Both should be zero, still they are different fields. */
71 u32 zero3:14;
72 u32 pg:2;
73} __packed;
74
75#define TB_CFG_ERROR_PG_HOT_PLUG 0x2
76#define TB_CFG_ERROR_PG_HOT_UNPLUG 0x3
77
78/* TB_CFG_PKG_EVENT */
79struct cfg_event_pkg {
80 struct tb_cfg_header header;
81 u32 port:6;
82 u32 zero:25;
83 bool unplug:1;
84} __packed;
85
86/* TB_CFG_PKG_RESET */
87struct cfg_reset_pkg {
88 struct tb_cfg_header header;
89} __packed;
90
91/* TB_CFG_PKG_PREPARE_TO_SLEEP */
92struct cfg_pts_pkg {
93 struct tb_cfg_header header;
94 u32 data;
95} __packed;
96
97/* ICM messages */
98
99enum icm_pkg_code {
100 ICM_GET_TOPOLOGY = 0x1,
101 ICM_DRIVER_READY = 0x3,
102 ICM_APPROVE_DEVICE = 0x4,
103 ICM_CHALLENGE_DEVICE = 0x5,
104 ICM_ADD_DEVICE_KEY = 0x6,
105 ICM_GET_ROUTE = 0xa,
106 ICM_APPROVE_XDOMAIN = 0x10,
107 ICM_DISCONNECT_XDOMAIN = 0x11,
108 ICM_PREBOOT_ACL = 0x18,
109 ICM_USB4_SWITCH_OP = 0x20,
110};
111
112enum icm_event_code {
113 ICM_EVENT_DEVICE_CONNECTED = 0x3,
114 ICM_EVENT_DEVICE_DISCONNECTED = 0x4,
115 ICM_EVENT_XDOMAIN_CONNECTED = 0x6,
116 ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7,
117 ICM_EVENT_RTD3_VETO = 0xa,
118};
119
120struct icm_pkg_header {
121 u8 code;
122 u8 flags;
123 u8 packet_id;
124 u8 total_packets;
125};
126
127#define ICM_FLAGS_ERROR BIT(0)
128#define ICM_FLAGS_NO_KEY BIT(1)
129#define ICM_FLAGS_SLEVEL_SHIFT 3
130#define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
131#define ICM_FLAGS_DUAL_LANE BIT(5)
132#define ICM_FLAGS_SPEED_GEN3 BIT(7)
133#define ICM_FLAGS_WRITE BIT(7)
134
135struct icm_pkg_driver_ready {
136 struct icm_pkg_header hdr;
137};
138
139/* Falcon Ridge only messages */
140
141struct icm_fr_pkg_driver_ready_response {
142 struct icm_pkg_header hdr;
143 u8 romver;
144 u8 ramver;
145 u16 security_level;
146};
147
148#define ICM_FR_SLEVEL_MASK 0xf
149
150/* Falcon Ridge & Alpine Ridge common messages */
151
152struct icm_fr_pkg_get_topology {
153 struct icm_pkg_header hdr;
154};
155
156#define ICM_GET_TOPOLOGY_PACKETS 14
157
158struct icm_fr_pkg_get_topology_response {
159 struct icm_pkg_header hdr;
160 u32 route_lo;
161 u32 route_hi;
162 u8 first_data;
163 u8 second_data;
164 u8 drom_i2c_address_index;
165 u8 switch_index;
166 u32 reserved[2];
167 u32 ports[16];
168 u32 port_hop_info[16];
169};
170
171#define ICM_SWITCH_USED BIT(0)
172#define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
173#define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
174
175#define ICM_PORT_TYPE_MASK GENMASK(23, 0)
176#define ICM_PORT_INDEX_SHIFT 24
177#define ICM_PORT_INDEX_MASK GENMASK(31, 24)
178
179struct icm_fr_event_device_connected {
180 struct icm_pkg_header hdr;
181 uuid_t ep_uuid;
182 u8 connection_key;
183 u8 connection_id;
184 u16 link_info;
185 u32 ep_name[55];
186};
187
188#define ICM_LINK_INFO_LINK_MASK 0x7
189#define ICM_LINK_INFO_DEPTH_SHIFT 4
190#define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
191#define ICM_LINK_INFO_APPROVED BIT(8)
192#define ICM_LINK_INFO_REJECTED BIT(9)
193#define ICM_LINK_INFO_BOOT BIT(10)
194
195struct icm_fr_pkg_approve_device {
196 struct icm_pkg_header hdr;
197 uuid_t ep_uuid;
198 u8 connection_key;
199 u8 connection_id;
200 u16 reserved;
201};
202
203struct icm_fr_event_device_disconnected {
204 struct icm_pkg_header hdr;
205 u16 reserved;
206 u16 link_info;
207};
208
209struct icm_fr_event_xdomain_connected {
210 struct icm_pkg_header hdr;
211 u16 reserved;
212 u16 link_info;
213 uuid_t remote_uuid;
214 uuid_t local_uuid;
215 u32 local_route_hi;
216 u32 local_route_lo;
217 u32 remote_route_hi;
218 u32 remote_route_lo;
219};
220
221struct icm_fr_event_xdomain_disconnected {
222 struct icm_pkg_header hdr;
223 u16 reserved;
224 u16 link_info;
225 uuid_t remote_uuid;
226};
227
228struct icm_fr_pkg_add_device_key {
229 struct icm_pkg_header hdr;
230 uuid_t ep_uuid;
231 u8 connection_key;
232 u8 connection_id;
233 u16 reserved;
234 u32 key[8];
235};
236
237struct icm_fr_pkg_add_device_key_response {
238 struct icm_pkg_header hdr;
239 uuid_t ep_uuid;
240 u8 connection_key;
241 u8 connection_id;
242 u16 reserved;
243};
244
245struct icm_fr_pkg_challenge_device {
246 struct icm_pkg_header hdr;
247 uuid_t ep_uuid;
248 u8 connection_key;
249 u8 connection_id;
250 u16 reserved;
251 u32 challenge[8];
252};
253
254struct icm_fr_pkg_challenge_device_response {
255 struct icm_pkg_header hdr;
256 uuid_t ep_uuid;
257 u8 connection_key;
258 u8 connection_id;
259 u16 reserved;
260 u32 challenge[8];
261 u32 response[8];
262};
263
264struct icm_fr_pkg_approve_xdomain {
265 struct icm_pkg_header hdr;
266 u16 reserved;
267 u16 link_info;
268 uuid_t remote_uuid;
269 u16 transmit_path;
270 u16 transmit_ring;
271 u16 receive_path;
272 u16 receive_ring;
273};
274
275struct icm_fr_pkg_approve_xdomain_response {
276 struct icm_pkg_header hdr;
277 u16 reserved;
278 u16 link_info;
279 uuid_t remote_uuid;
280 u16 transmit_path;
281 u16 transmit_ring;
282 u16 receive_path;
283 u16 receive_ring;
284};
285
286/* Alpine Ridge only messages */
287
288struct icm_ar_pkg_driver_ready_response {
289 struct icm_pkg_header hdr;
290 u8 romver;
291 u8 ramver;
292 u16 info;
293};
294
295#define ICM_AR_FLAGS_RTD3 BIT(6)
296
297#define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
298#define ICM_AR_INFO_BOOT_ACL_SHIFT 7
299#define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
300#define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
301
302struct icm_ar_pkg_get_route {
303 struct icm_pkg_header hdr;
304 u16 reserved;
305 u16 link_info;
306};
307
308struct icm_ar_pkg_get_route_response {
309 struct icm_pkg_header hdr;
310 u16 reserved;
311 u16 link_info;
312 u32 route_hi;
313 u32 route_lo;
314};
315
316struct icm_ar_boot_acl_entry {
317 u32 uuid_lo;
318 u32 uuid_hi;
319};
320
321#define ICM_AR_PREBOOT_ACL_ENTRIES 16
322
323struct icm_ar_pkg_preboot_acl {
324 struct icm_pkg_header hdr;
325 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
326};
327
328struct icm_ar_pkg_preboot_acl_response {
329 struct icm_pkg_header hdr;
330 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
331};
332
333/* Titan Ridge messages */
334
335struct icm_tr_pkg_driver_ready_response {
336 struct icm_pkg_header hdr;
337 u16 reserved1;
338 u16 info;
339 u32 nvm_version;
340 u16 device_id;
341 u16 reserved2;
342};
343
344#define ICM_TR_FLAGS_RTD3 BIT(6)
345
346#define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0)
347#define ICM_TR_INFO_PROTO_VERSION_MASK GENMASK(6, 4)
348#define ICM_TR_INFO_PROTO_VERSION_SHIFT 4
349#define ICM_TR_INFO_BOOT_ACL_SHIFT 7
350#define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7)
351
352struct icm_tr_event_device_connected {
353 struct icm_pkg_header hdr;
354 uuid_t ep_uuid;
355 u32 route_hi;
356 u32 route_lo;
357 u8 connection_id;
358 u8 reserved;
359 u16 link_info;
360 u32 ep_name[55];
361};
362
363struct icm_tr_event_device_disconnected {
364 struct icm_pkg_header hdr;
365 u32 route_hi;
366 u32 route_lo;
367};
368
369struct icm_tr_event_xdomain_connected {
370 struct icm_pkg_header hdr;
371 u16 reserved;
372 u16 link_info;
373 uuid_t remote_uuid;
374 uuid_t local_uuid;
375 u32 local_route_hi;
376 u32 local_route_lo;
377 u32 remote_route_hi;
378 u32 remote_route_lo;
379};
380
381struct icm_tr_event_xdomain_disconnected {
382 struct icm_pkg_header hdr;
383 u32 route_hi;
384 u32 route_lo;
385 uuid_t remote_uuid;
386};
387
388struct icm_tr_pkg_approve_device {
389 struct icm_pkg_header hdr;
390 uuid_t ep_uuid;
391 u32 route_hi;
392 u32 route_lo;
393 u8 connection_id;
394 u8 reserved1[3];
395};
396
397struct icm_tr_pkg_add_device_key {
398 struct icm_pkg_header hdr;
399 uuid_t ep_uuid;
400 u32 route_hi;
401 u32 route_lo;
402 u8 connection_id;
403 u8 reserved[3];
404 u32 key[8];
405};
406
407struct icm_tr_pkg_challenge_device {
408 struct icm_pkg_header hdr;
409 uuid_t ep_uuid;
410 u32 route_hi;
411 u32 route_lo;
412 u8 connection_id;
413 u8 reserved[3];
414 u32 challenge[8];
415};
416
417struct icm_tr_pkg_approve_xdomain {
418 struct icm_pkg_header hdr;
419 u32 route_hi;
420 u32 route_lo;
421 uuid_t remote_uuid;
422 u16 transmit_path;
423 u16 transmit_ring;
424 u16 receive_path;
425 u16 receive_ring;
426};
427
428struct icm_tr_pkg_disconnect_xdomain {
429 struct icm_pkg_header hdr;
430 u8 stage;
431 u8 reserved[3];
432 u32 route_hi;
433 u32 route_lo;
434 uuid_t remote_uuid;
435};
436
437struct icm_tr_pkg_challenge_device_response {
438 struct icm_pkg_header hdr;
439 uuid_t ep_uuid;
440 u32 route_hi;
441 u32 route_lo;
442 u8 connection_id;
443 u8 reserved[3];
444 u32 challenge[8];
445 u32 response[8];
446};
447
448struct icm_tr_pkg_add_device_key_response {
449 struct icm_pkg_header hdr;
450 uuid_t ep_uuid;
451 u32 route_hi;
452 u32 route_lo;
453 u8 connection_id;
454 u8 reserved[3];
455};
456
457struct icm_tr_pkg_approve_xdomain_response {
458 struct icm_pkg_header hdr;
459 u32 route_hi;
460 u32 route_lo;
461 uuid_t remote_uuid;
462 u16 transmit_path;
463 u16 transmit_ring;
464 u16 receive_path;
465 u16 receive_ring;
466};
467
468struct icm_tr_pkg_disconnect_xdomain_response {
469 struct icm_pkg_header hdr;
470 u8 stage;
471 u8 reserved[3];
472 u32 route_hi;
473 u32 route_lo;
474 uuid_t remote_uuid;
475};
476
477/* Ice Lake messages */
478
479struct icm_icl_event_rtd3_veto {
480 struct icm_pkg_header hdr;
481 u32 veto_reason;
482};
483
484/* USB4 ICM messages */
485
486struct icm_usb4_switch_op {
487 struct icm_pkg_header hdr;
488 u32 route_hi;
489 u32 route_lo;
490 u32 metadata;
491 u16 opcode;
492 u16 data_len_valid;
493 u32 data[16];
494};
495
496#define ICM_USB4_SWITCH_DATA_LEN_MASK GENMASK(3, 0)
497#define ICM_USB4_SWITCH_DATA_VALID BIT(4)
498
499struct icm_usb4_switch_op_response {
500 struct icm_pkg_header hdr;
501 u32 route_hi;
502 u32 route_lo;
503 u32 metadata;
504 u16 opcode;
505 u16 status;
506 u32 data[16];
507};
508
509/* XDomain messages */
510
511struct tb_xdomain_header {
512 u32 route_hi;
513 u32 route_lo;
514 u32 length_sn;
515};
516
517#define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
518#define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
519#define TB_XDOMAIN_SN_SHIFT 27
520
521enum tb_xdp_type {
522 UUID_REQUEST_OLD = 1,
523 UUID_RESPONSE = 2,
524 PROPERTIES_REQUEST,
525 PROPERTIES_RESPONSE,
526 PROPERTIES_CHANGED_REQUEST,
527 PROPERTIES_CHANGED_RESPONSE,
528 ERROR_RESPONSE,
529 UUID_REQUEST = 12,
530 LINK_STATE_STATUS_REQUEST = 15,
531 LINK_STATE_STATUS_RESPONSE,
532 LINK_STATE_CHANGE_REQUEST,
533 LINK_STATE_CHANGE_RESPONSE,
534};
535
536struct tb_xdp_header {
537 struct tb_xdomain_header xd_hdr;
538 uuid_t uuid;
539 u32 type;
540};
541
542struct tb_xdp_error_response {
543 struct tb_xdp_header hdr;
544 u32 error;
545};
546
547struct tb_xdp_link_state_status {
548 struct tb_xdp_header hdr;
549};
550
551struct tb_xdp_link_state_status_response {
552 union {
553 struct tb_xdp_error_response err;
554 struct {
555 struct tb_xdp_header hdr;
556 u32 status;
557 u8 slw;
558 u8 tlw;
559 u8 sls;
560 u8 tls;
561 };
562 };
563};
564
565struct tb_xdp_link_state_change {
566 struct tb_xdp_header hdr;
567 u8 tlw;
568 u8 tls;
569 u16 reserved;
570};
571
572struct tb_xdp_link_state_change_response {
573 union {
574 struct tb_xdp_error_response err;
575 struct {
576 struct tb_xdp_header hdr;
577 u32 status;
578 };
579 };
580};
581
582struct tb_xdp_uuid {
583 struct tb_xdp_header hdr;
584};
585
586struct tb_xdp_uuid_response {
587 union {
588 struct tb_xdp_error_response err;
589 struct {
590 struct tb_xdp_header hdr;
591 uuid_t src_uuid;
592 u32 src_route_hi;
593 u32 src_route_lo;
594 };
595 };
596};
597
598struct tb_xdp_properties {
599 struct tb_xdp_header hdr;
600 uuid_t src_uuid;
601 uuid_t dst_uuid;
602 u16 offset;
603 u16 reserved;
604};
605
606struct tb_xdp_properties_response {
607 union {
608 struct tb_xdp_error_response err;
609 struct {
610 struct tb_xdp_header hdr;
611 uuid_t src_uuid;
612 uuid_t dst_uuid;
613 u16 offset;
614 u16 data_length;
615 u32 generation;
616 u32 data[];
617 };
618 };
619};
620
621/*
622 * Max length of data array single XDomain property response is allowed
623 * to carry.
624 */
625#define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
626 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
627
628/* Maximum size of the total property block in dwords we allow */
629#define TB_XDP_PROPERTIES_MAX_LENGTH 500
630
631struct tb_xdp_properties_changed {
632 struct tb_xdp_header hdr;
633 uuid_t src_uuid;
634};
635
636struct tb_xdp_properties_changed_response {
637 union {
638 struct tb_xdp_error_response err;
639 struct tb_xdp_header hdr;
640 };
641};
642
643enum tb_xdp_error {
644 ERROR_SUCCESS,
645 ERROR_UNKNOWN_PACKET,
646 ERROR_UNKNOWN_DOMAIN,
647 ERROR_NOT_SUPPORTED,
648 ERROR_NOT_READY,
649};
650
651#endif