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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * VISsave.S: Code for saving FPU register state for
4 * VIS routines. One should not call this directly,
5 * but use macros provided in <asm/visasm.h>.
6 *
7 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
8 */
9
10#include <linux/linkage.h>
11
12#include <asm/asi.h>
13#include <asm/page.h>
14#include <asm/ptrace.h>
15#include <asm/visasm.h>
16#include <asm/thread_info.h>
17#include <asm/export.h>
18
19 /* On entry: %o5=current FPRS value, %g7 is callers address */
20 /* May clobber %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
21
22 /* Nothing special need be done here to handle pre-emption, this
23 * FPU save/restore mechanism is already preemption safe.
24 */
25 .text
26 .align 32
27ENTRY(VISenter)
28 ldub [%g6 + TI_FPDEPTH], %g1
29 brnz,a,pn %g1, 1f
30 cmp %g1, 1
31 stb %g0, [%g6 + TI_FPSAVED]
32 stx %fsr, [%g6 + TI_XFSR]
339: jmpl %g7 + %g0, %g0
34 nop
351: bne,pn %icc, 2f
36
37 srl %g1, 1, %g1
38vis1: ldub [%g6 + TI_FPSAVED], %g3
39 stx %fsr, [%g6 + TI_XFSR]
40 or %g3, %o5, %g3
41 stb %g3, [%g6 + TI_FPSAVED]
42 rd %gsr, %g3
43 clr %g1
44 ba,pt %xcc, 3f
45
46 stx %g3, [%g6 + TI_GSR]
472: add %g6, %g1, %g3
48 mov FPRS_DU | FPRS_DL | FPRS_FEF, %o5
49 sll %g1, 3, %g1
50 stb %o5, [%g3 + TI_FPSAVED]
51 rd %gsr, %g2
52 add %g6, %g1, %g3
53 stx %g2, [%g3 + TI_GSR]
54
55 add %g6, %g1, %g2
56 stx %fsr, [%g2 + TI_XFSR]
57 sll %g1, 5, %g1
583: andcc %o5, FPRS_DL|FPRS_DU, %g0
59 be,pn %icc, 9b
60 add %g6, TI_FPREGS, %g2
61 andcc %o5, FPRS_DL, %g0
62
63 be,pn %icc, 4f
64 add %g6, TI_FPREGS+0x40, %g3
65 membar #Sync
66 stda %f0, [%g2 + %g1] ASI_BLK_P
67 stda %f16, [%g3 + %g1] ASI_BLK_P
68 membar #Sync
69 andcc %o5, FPRS_DU, %g0
70 be,pn %icc, 5f
714: add %g1, 128, %g1
72 membar #Sync
73 stda %f32, [%g2 + %g1] ASI_BLK_P
74
75 stda %f48, [%g3 + %g1] ASI_BLK_P
765: membar #Sync
77 ba,pt %xcc, 80f
78 nop
79
80 .align 32
8180: jmpl %g7 + %g0, %g0
82 nop
83ENDPROC(VISenter)
84EXPORT_SYMBOL(VISenter)
1/*
2 * VISsave.S: Code for saving FPU register state for
3 * VIS routines. One should not call this directly,
4 * but use macros provided in <asm/visasm.h>.
5 *
6 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
7 */
8
9#include <linux/linkage.h>
10
11#include <asm/asi.h>
12#include <asm/page.h>
13#include <asm/ptrace.h>
14#include <asm/visasm.h>
15#include <asm/thread_info.h>
16
17 /* On entry: %o5=current FPRS value, %g7 is callers address */
18 /* May clobber %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
19
20 /* Nothing special need be done here to handle pre-emption, this
21 * FPU save/restore mechanism is already preemption safe.
22 */
23 .text
24 .align 32
25ENTRY(VISenter)
26 ldub [%g6 + TI_FPDEPTH], %g1
27 brnz,a,pn %g1, 1f
28 cmp %g1, 1
29 stb %g0, [%g6 + TI_FPSAVED]
30 stx %fsr, [%g6 + TI_XFSR]
319: jmpl %g7 + %g0, %g0
32 nop
331: bne,pn %icc, 2f
34
35 srl %g1, 1, %g1
36vis1: ldub [%g6 + TI_FPSAVED], %g3
37 stx %fsr, [%g6 + TI_XFSR]
38 or %g3, %o5, %g3
39 stb %g3, [%g6 + TI_FPSAVED]
40 rd %gsr, %g3
41 clr %g1
42 ba,pt %xcc, 3f
43
44 stx %g3, [%g6 + TI_GSR]
452: add %g6, %g1, %g3
46 mov FPRS_DU | FPRS_DL | FPRS_FEF, %o5
47 sll %g1, 3, %g1
48 stb %o5, [%g3 + TI_FPSAVED]
49 rd %gsr, %g2
50 add %g6, %g1, %g3
51 stx %g2, [%g3 + TI_GSR]
52
53 add %g6, %g1, %g2
54 stx %fsr, [%g2 + TI_XFSR]
55 sll %g1, 5, %g1
563: andcc %o5, FPRS_DL|FPRS_DU, %g0
57 be,pn %icc, 9b
58 add %g6, TI_FPREGS, %g2
59 andcc %o5, FPRS_DL, %g0
60
61 be,pn %icc, 4f
62 add %g6, TI_FPREGS+0x40, %g3
63 membar #Sync
64 stda %f0, [%g2 + %g1] ASI_BLK_P
65 stda %f16, [%g3 + %g1] ASI_BLK_P
66 membar #Sync
67 andcc %o5, FPRS_DU, %g0
68 be,pn %icc, 5f
694: add %g1, 128, %g1
70 membar #Sync
71 stda %f32, [%g2 + %g1] ASI_BLK_P
72
73 stda %f48, [%g3 + %g1] ASI_BLK_P
745: membar #Sync
75 ba,pt %xcc, 80f
76 nop
77
78 .align 32
7980: jmpl %g7 + %g0, %g0
80 nop
81ENDPROC(VISenter)