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1# SPDX-License-Identifier: GPL-2.0
2config SIBYTE_SB1250
3 bool
4 select CEVT_SB1250
5 select CSRC_SB1250
6 select HAVE_PCI
7 select IRQ_MIPS_CPU
8 select SIBYTE_ENABLE_LDT_IF_PCI
9 select SIBYTE_HAS_ZBUS_PROFILING
10 select SIBYTE_SB1xxx_SOC
11 select SYS_SUPPORTS_SMP
12
13config SIBYTE_BCM1120
14 bool
15 select CEVT_SB1250
16 select CSRC_SB1250
17 select IRQ_MIPS_CPU
18 select SIBYTE_BCM112X
19 select SIBYTE_HAS_ZBUS_PROFILING
20 select SIBYTE_SB1xxx_SOC
21
22config SIBYTE_BCM1125
23 bool
24 select CEVT_SB1250
25 select CSRC_SB1250
26 select HAVE_PCI
27 select IRQ_MIPS_CPU
28 select SIBYTE_BCM112X
29 select SIBYTE_HAS_ZBUS_PROFILING
30 select SIBYTE_SB1xxx_SOC
31
32config SIBYTE_BCM1125H
33 bool
34 select CEVT_SB1250
35 select CSRC_SB1250
36 select HAVE_PCI
37 select IRQ_MIPS_CPU
38 select SIBYTE_BCM112X
39 select SIBYTE_ENABLE_LDT_IF_PCI
40 select SIBYTE_HAS_ZBUS_PROFILING
41 select SIBYTE_SB1xxx_SOC
42
43config SIBYTE_BCM112X
44 bool
45 select CEVT_SB1250
46 select CSRC_SB1250
47 select IRQ_MIPS_CPU
48 select SIBYTE_SB1xxx_SOC
49 select SIBYTE_HAS_ZBUS_PROFILING
50
51config SIBYTE_BCM1x80
52 bool
53 select CEVT_BCM1480
54 select CSRC_BCM1480
55 select HAVE_PCI
56 select IRQ_MIPS_CPU
57 select SIBYTE_HAS_ZBUS_PROFILING
58 select SIBYTE_SB1xxx_SOC
59 select SYS_SUPPORTS_SMP
60
61config SIBYTE_BCM1x55
62 bool
63 select CEVT_BCM1480
64 select CSRC_BCM1480
65 select HAVE_PCI
66 select IRQ_MIPS_CPU
67 select SIBYTE_SB1xxx_SOC
68 select SIBYTE_HAS_ZBUS_PROFILING
69 select SYS_SUPPORTS_SMP
70
71config SIBYTE_SB1xxx_SOC
72 bool
73 select IRQ_MIPS_CPU
74 select SWAP_IO_SPACE
75 select SYS_SUPPORTS_32BIT_KERNEL
76 select SYS_SUPPORTS_64BIT_KERNEL
77 select FW_CFE
78 select SYS_HAS_EARLY_PRINTK
79
80choice
81 prompt "SiByte SOC Stepping"
82 depends on SIBYTE_SB1xxx_SOC
83
84config CPU_SB1_PASS_2_1250
85 bool "1250 An"
86 depends on SIBYTE_SB1250
87 select CPU_SB1_PASS_2
88 help
89 Also called BCM1250 Pass 2
90
91config CPU_SB1_PASS_2_2
92 bool "1250 Bn"
93 depends on SIBYTE_SB1250
94 select CPU_HAS_PREFETCH
95 help
96 Also called BCM1250 Pass 2.2
97
98config CPU_SB1_PASS_4
99 bool "1250 Cn"
100 depends on SIBYTE_SB1250
101 select CPU_HAS_PREFETCH
102 help
103 Also called BCM1250 Pass 3
104
105config CPU_SB1_PASS_2_112x
106 bool "112x Hybrid"
107 depends on SIBYTE_BCM112X
108 select CPU_SB1_PASS_2
109
110config CPU_SB1_PASS_3
111 bool "112x An"
112 depends on SIBYTE_BCM112X
113 select CPU_HAS_PREFETCH
114
115endchoice
116
117config CPU_SB1_PASS_2
118 bool
119
120config SIBYTE_HAS_LDT
121 bool
122
123config SIBYTE_ENABLE_LDT_IF_PCI
124 bool
125 select SIBYTE_HAS_LDT if PCI
126
127config SB1_CEX_ALWAYS_FATAL
128 bool "All cache exceptions considered fatal (no recovery attempted)"
129 depends on SIBYTE_SB1xxx_SOC
130
131config SB1_CERR_STALL
132 bool "Stall (rather than panic) on fatal cache error"
133 depends on SIBYTE_SB1xxx_SOC
134
135config SIBYTE_CFE_CONSOLE
136 bool "Use firmware console"
137 depends on SIBYTE_SB1xxx_SOC
138 help
139 Use the CFE API's console write routines during boot. Other console
140 options (VT console, sb1250 duart console, etc.) should not be
141 configured.
142
143config SIBYTE_BUS_WATCHER
144 bool "Support for Bus Watcher statistics"
145 depends on SIBYTE_SB1xxx_SOC && \
146 (SIBYTE_BCM112X || SIBYTE_SB1250 || \
147 SIBYTE_BCM1x55 || SIBYTE_BCM1x80)
148 help
149 Handle and keep statistics on the bus error interrupts (COR_ECC,
150 BAD_ECC, IO_BUS).
151
152config SIBYTE_BW_TRACE
153 bool "Capture bus trace before bus error"
154 depends on SIBYTE_BUS_WATCHER
155 help
156 Run a continuous bus trace, dumping the raw data as soon as
157 a ZBbus error is detected. Cannot work if ZBbus profiling
158 is turned on, and also will interfere with JTAG-based trace
159 buffer activity. Raw buffer data is dumped to console, and
160 must be processed off-line.
161
162config SIBYTE_TBPROF
163 tristate "Support for ZBbus profiling"
164 depends on SIBYTE_HAS_ZBUS_PROFILING
165
166config SIBYTE_HAS_ZBUS_PROFILING
167 bool
1config SIBYTE_SB1250
2 bool
3 select CEVT_SB1250
4 select CSRC_SB1250
5 select HW_HAS_PCI
6 select IRQ_MIPS_CPU
7 select SIBYTE_ENABLE_LDT_IF_PCI
8 select SIBYTE_HAS_ZBUS_PROFILING
9 select SIBYTE_SB1xxx_SOC
10 select SYS_SUPPORTS_SMP
11
12config SIBYTE_BCM1120
13 bool
14 select CEVT_SB1250
15 select CSRC_SB1250
16 select IRQ_MIPS_CPU
17 select SIBYTE_BCM112X
18 select SIBYTE_HAS_ZBUS_PROFILING
19 select SIBYTE_SB1xxx_SOC
20
21config SIBYTE_BCM1125
22 bool
23 select CEVT_SB1250
24 select CSRC_SB1250
25 select HW_HAS_PCI
26 select IRQ_MIPS_CPU
27 select SIBYTE_BCM112X
28 select SIBYTE_HAS_ZBUS_PROFILING
29 select SIBYTE_SB1xxx_SOC
30
31config SIBYTE_BCM1125H
32 bool
33 select CEVT_SB1250
34 select CSRC_SB1250
35 select HW_HAS_PCI
36 select IRQ_MIPS_CPU
37 select SIBYTE_BCM112X
38 select SIBYTE_ENABLE_LDT_IF_PCI
39 select SIBYTE_HAS_ZBUS_PROFILING
40 select SIBYTE_SB1xxx_SOC
41
42config SIBYTE_BCM112X
43 bool
44 select CEVT_SB1250
45 select CSRC_SB1250
46 select IRQ_MIPS_CPU
47 select SIBYTE_SB1xxx_SOC
48 select SIBYTE_HAS_ZBUS_PROFILING
49
50config SIBYTE_BCM1x80
51 bool
52 select CEVT_BCM1480
53 select CSRC_BCM1480
54 select HW_HAS_PCI
55 select IRQ_MIPS_CPU
56 select SIBYTE_HAS_ZBUS_PROFILING
57 select SIBYTE_SB1xxx_SOC
58 select SYS_SUPPORTS_SMP
59
60config SIBYTE_BCM1x55
61 bool
62 select CEVT_BCM1480
63 select CSRC_BCM1480
64 select HW_HAS_PCI
65 select IRQ_MIPS_CPU
66 select SIBYTE_SB1xxx_SOC
67 select SIBYTE_HAS_ZBUS_PROFILING
68 select SYS_SUPPORTS_SMP
69
70config SIBYTE_SB1xxx_SOC
71 bool
72 select DMA_COHERENT
73 select IRQ_MIPS_CPU
74 select SWAP_IO_SPACE
75 select SYS_SUPPORTS_32BIT_KERNEL
76 select SYS_SUPPORTS_64BIT_KERNEL
77 select FW_CFE
78 select SYS_HAS_EARLY_PRINTK
79
80choice
81 prompt "SiByte SOC Stepping"
82 depends on SIBYTE_SB1xxx_SOC
83
84config CPU_SB1_PASS_2_1250
85 bool "1250 An"
86 depends on SIBYTE_SB1250
87 select CPU_SB1_PASS_2
88 help
89 Also called BCM1250 Pass 2
90
91config CPU_SB1_PASS_2_2
92 bool "1250 Bn"
93 depends on SIBYTE_SB1250
94 select CPU_HAS_PREFETCH
95 help
96 Also called BCM1250 Pass 2.2
97
98config CPU_SB1_PASS_4
99 bool "1250 Cn"
100 depends on SIBYTE_SB1250
101 select CPU_HAS_PREFETCH
102 help
103 Also called BCM1250 Pass 3
104
105config CPU_SB1_PASS_2_112x
106 bool "112x Hybrid"
107 depends on SIBYTE_BCM112X
108 select CPU_SB1_PASS_2
109
110config CPU_SB1_PASS_3
111 bool "112x An"
112 depends on SIBYTE_BCM112X
113 select CPU_HAS_PREFETCH
114
115endchoice
116
117config CPU_SB1_PASS_2
118 bool
119
120config SIBYTE_HAS_LDT
121 bool
122
123config SIBYTE_ENABLE_LDT_IF_PCI
124 bool
125 select SIBYTE_HAS_LDT if PCI
126
127config SB1_CEX_ALWAYS_FATAL
128 bool "All cache exceptions considered fatal (no recovery attempted)"
129 depends on SIBYTE_SB1xxx_SOC
130
131config SB1_CERR_STALL
132 bool "Stall (rather than panic) on fatal cache error"
133 depends on SIBYTE_SB1xxx_SOC
134
135config SIBYTE_CFE_CONSOLE
136 bool "Use firmware console"
137 depends on SIBYTE_SB1xxx_SOC
138 help
139 Use the CFE API's console write routines during boot. Other console
140 options (VT console, sb1250 duart console, etc.) should not be
141 configured.
142
143config SIBYTE_BUS_WATCHER
144 bool "Support for Bus Watcher statistics"
145 depends on SIBYTE_SB1xxx_SOC && \
146 (SIBYTE_BCM112X || SIBYTE_SB1250)
147 help
148 Handle and keep statistics on the bus error interrupts (COR_ECC,
149 BAD_ECC, IO_BUS).
150
151config SIBYTE_BW_TRACE
152 bool "Capture bus trace before bus error"
153 depends on SIBYTE_BUS_WATCHER
154 help
155 Run a continuous bus trace, dumping the raw data as soon as
156 a ZBbus error is detected. Cannot work if ZBbus profiling
157 is turned on, and also will interfere with JTAG-based trace
158 buffer activity. Raw buffer data is dumped to console, and
159 must be processed off-line.
160
161config SIBYTE_TBPROF
162 tristate "Support for ZBbus profiling"
163 depends on SIBYTE_HAS_ZBUS_PROFILING
164
165config SIBYTE_HAS_ZBUS_PROFILING
166 bool