1/*
 2 * This file is subject to the terms and conditions of the GNU General Public
 3 * License.  See the file "COPYING" in the main directory of this archive
 4 * for more details.
 5 *
 6 * Copyright (C) 1994, 1995 Waldorf Electronics
 7 * Written by Ralf Baechle and Andreas Busse
 8 * Copyright (C) 1995 - 1999 Ralf Baechle
 9 * Copyright (C) 1996 Paul M. Antoine
10 * Modified for DECStation and hence R3000 support by Paul M. Antoine
11 * Further modifications by David S. Miller and Harald Koerfgen
12 * Copyright (C) 1999 Silicon Graphics, Inc.
13 */
14
15#include <asm/asm.h>
16#include <asm/regdef.h>
17
 
 
18	LEAF(start)
 
19	/* Save boot rom start args */
20	move	s0, a0
21	move	s1, a1
22	move	s2, a2
23	move	s3, a3
24
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
25	/* Clear BSS */
26	PTR_LA	a0, _edata
27	PTR_LA	a2, _end
281:	sw	zero, 0(a0)
29	addiu	a0, a0, 4
30	bne	a2, a0, 1b
 
31
32	PTR_LA	a0, (.heap)	     /* heap address */
33	PTR_LA	sp, (.stack + 8192)  /* stack address */
34
35	PTR_LA	t9, decompress_kernel
36	jalr	t9
37
 
382:
39	move	a0, s0
40	move	a1, s1
41	move	a2, s2
42	move	a3, s3
43	PTR_LI	t9, KERNEL_ENTRY
44	jalr	t9
45
463:
47	b	3b
48
49	END(start)
50
51	.comm .heap,BOOT_HEAP_SIZE,4
52	.comm .stack,4096*2,4

 1/*
 2 * This file is subject to the terms and conditions of the GNU General Public
 3 * License.  See the file "COPYING" in the main directory of this archive
 4 * for more details.
 5 *
 6 * Copyright (C) 1994, 1995 Waldorf Electronics
 7 * Written by Ralf Baechle and Andreas Busse
 8 * Copyright (C) 1995 - 1999 Ralf Baechle
 9 * Copyright (C) 1996 Paul M. Antoine
10 * Modified for DECStation and hence R3000 support by Paul M. Antoine
11 * Further modifications by David S. Miller and Harald Koerfgen
12 * Copyright (C) 1999 Silicon Graphics, Inc.
13 */
14
15#include <asm/asm.h>
16#include <asm/regdef.h>
17
18	.set noreorder
19	.cprestore
20	LEAF(start)
21start:
22	/* Save boot rom start args */
23	move	s0, a0
24	move	s1, a1
25	move	s2, a2
26	move	s3, a3
27
28#ifdef CONFIG_MIPS_ZBOOT_APPENDED_DTB
29	PTR_LA	t0, __appended_dtb
30#ifdef CONFIG_CPU_BIG_ENDIAN
31	li	t1, 0xd00dfeed
32#else
33	li	t1, 0xedfe0dd0
34#endif
35	lw	t2, (t0)
36	bne	t1, t2, not_found
37	 nop
38
39	move	s1, t0
40	PTR_LI	s0, -2
41not_found:
42#endif
43
44	/* Clear BSS */
45	PTR_LA	a0, _edata
46	PTR_LA	a2, _end
471:	sw	zero, 0(a0)
 
48	bne	a2, a0, 1b
49	 addiu	a0, a0, 4
50
51	PTR_LA	a0, (.heap)	     /* heap address */
52	PTR_LA	sp, (.stack + 8192)  /* stack address */
53
54	PTR_LA	ra, 2f
55	PTR_LA	k0, decompress_kernel
56	jr	k0
57	 nop
582:
59	move	a0, s0
60	move	a1, s1
61	move	a2, s2
62	move	a3, s3
63	PTR_LI	k0, KERNEL_ENTRY
64	jr	k0
65	 nop
663:
67	b	3b
68	 nop
69	END(start)
70
71	.comm .heap,BOOT_HEAP_SIZE,4
72	.comm .stack,4096*2,4