Loading...
1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include "tegra20.dtsi"
6
7/ {
8 model = "NVIDIA Tegra20 Harmony evaluation board";
9 compatible = "nvidia,harmony", "nvidia,tegra20";
10
11 aliases {
12 rtc0 = "/i2c@7000d000/tps6586x@34";
13 rtc1 = "/rtc@7000e000";
14 serial0 = &uartd;
15 };
16
17 chosen {
18 stdout-path = "serial0:115200n8";
19 };
20
21 memory@0 {
22 reg = <0x00000000 0x40000000>;
23 };
24
25 host1x@50000000 {
26 dc@54200000 {
27 rgb {
28 status = "okay";
29
30 nvidia,panel = <&panel>;
31 };
32 };
33
34 hdmi@54280000 {
35 status = "okay";
36
37 hdmi-supply = <&vdd_5v0_hdmi>;
38 vdd-supply = <&hdmi_vdd_reg>;
39 pll-supply = <&hdmi_pll_reg>;
40
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
43 GPIO_ACTIVE_HIGH>;
44 };
45 };
46
47 pinmux@70000014 {
48 pinctrl-names = "default";
49 pinctrl-0 = <&state_default>;
50
51 state_default: pinmux {
52 ata {
53 nvidia,pins = "ata";
54 nvidia,function = "ide";
55 };
56 atb {
57 nvidia,pins = "atb", "gma", "gme";
58 nvidia,function = "sdio4";
59 };
60 atc {
61 nvidia,pins = "atc";
62 nvidia,function = "nand";
63 };
64 atd {
65 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
66 "spia", "spib", "spic";
67 nvidia,function = "gmi";
68 };
69 cdev1 {
70 nvidia,pins = "cdev1";
71 nvidia,function = "plla_out";
72 };
73 cdev2 {
74 nvidia,pins = "cdev2";
75 nvidia,function = "pllp_out4";
76 };
77 crtp {
78 nvidia,pins = "crtp";
79 nvidia,function = "crt";
80 };
81 csus {
82 nvidia,pins = "csus";
83 nvidia,function = "vi_sensor_clk";
84 };
85 dap1 {
86 nvidia,pins = "dap1";
87 nvidia,function = "dap1";
88 };
89 dap2 {
90 nvidia,pins = "dap2";
91 nvidia,function = "dap2";
92 };
93 dap3 {
94 nvidia,pins = "dap3";
95 nvidia,function = "dap3";
96 };
97 dap4 {
98 nvidia,pins = "dap4";
99 nvidia,function = "dap4";
100 };
101 ddc {
102 nvidia,pins = "ddc";
103 nvidia,function = "i2c2";
104 };
105 dta {
106 nvidia,pins = "dta", "dtd";
107 nvidia,function = "sdio2";
108 };
109 dtb {
110 nvidia,pins = "dtb", "dtc", "dte";
111 nvidia,function = "rsvd1";
112 };
113 dtf {
114 nvidia,pins = "dtf";
115 nvidia,function = "i2c3";
116 };
117 gmc {
118 nvidia,pins = "gmc";
119 nvidia,function = "uartd";
120 };
121 gpu7 {
122 nvidia,pins = "gpu7";
123 nvidia,function = "rtck";
124 };
125 gpv {
126 nvidia,pins = "gpv", "slxa", "slxk";
127 nvidia,function = "pcie";
128 };
129 hdint {
130 nvidia,pins = "hdint", "pta";
131 nvidia,function = "hdmi";
132 };
133 i2cp {
134 nvidia,pins = "i2cp";
135 nvidia,function = "i2cp";
136 };
137 irrx {
138 nvidia,pins = "irrx", "irtx";
139 nvidia,function = "uarta";
140 };
141 kbca {
142 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
143 "kbce", "kbcf";
144 nvidia,function = "kbc";
145 };
146 lcsn {
147 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
148 "ld3", "ld4", "ld5", "ld6", "ld7",
149 "ld8", "ld9", "ld10", "ld11", "ld12",
150 "ld13", "ld14", "ld15", "ld16", "ld17",
151 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
152 "lhs", "lm0", "lm1", "lpp", "lpw0",
153 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
154 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
155 "lvs";
156 nvidia,function = "displaya";
157 };
158 owc {
159 nvidia,pins = "owc", "spdi", "spdo", "uac";
160 nvidia,function = "rsvd2";
161 };
162 pmc {
163 nvidia,pins = "pmc";
164 nvidia,function = "pwr_on";
165 };
166 rm {
167 nvidia,pins = "rm";
168 nvidia,function = "i2c1";
169 };
170 sdb {
171 nvidia,pins = "sdb", "sdc", "sdd";
172 nvidia,function = "pwm";
173 };
174 sdio1 {
175 nvidia,pins = "sdio1";
176 nvidia,function = "sdio1";
177 };
178 slxc {
179 nvidia,pins = "slxc", "slxd";
180 nvidia,function = "spdif";
181 };
182 spid {
183 nvidia,pins = "spid", "spie", "spif";
184 nvidia,function = "spi1";
185 };
186 spig {
187 nvidia,pins = "spig", "spih";
188 nvidia,function = "spi2_alt";
189 };
190 uaa {
191 nvidia,pins = "uaa", "uab", "uda";
192 nvidia,function = "ulpi";
193 };
194 uad {
195 nvidia,pins = "uad";
196 nvidia,function = "irda";
197 };
198 uca {
199 nvidia,pins = "uca", "ucb";
200 nvidia,function = "uartc";
201 };
202 conf_ata {
203 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
204 "cdev1", "cdev2", "dap1", "dtb", "gma",
205 "gmb", "gmc", "gmd", "gme", "gpu7",
206 "gpv", "i2cp", "pta", "rm", "slxa",
207 "slxk", "spia", "spib", "uac";
208 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
209 nvidia,tristate = <TEGRA_PIN_DISABLE>;
210 };
211 conf_ck32 {
212 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
213 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
214 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
215 };
216 conf_csus {
217 nvidia,pins = "csus", "spid", "spif";
218 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
219 nvidia,tristate = <TEGRA_PIN_ENABLE>;
220 };
221 conf_crtp {
222 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
223 "dtc", "dte", "dtf", "gpu", "sdio1",
224 "slxc", "slxd", "spdi", "spdo", "spig",
225 "uda";
226 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
227 nvidia,tristate = <TEGRA_PIN_ENABLE>;
228 };
229 conf_ddc {
230 nvidia,pins = "ddc", "dta", "dtd", "kbca",
231 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
232 "sdc";
233 nvidia,pull = <TEGRA_PIN_PULL_UP>;
234 nvidia,tristate = <TEGRA_PIN_DISABLE>;
235 };
236 conf_hdint {
237 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
238 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
239 "lvp0", "owc", "sdb";
240 nvidia,tristate = <TEGRA_PIN_ENABLE>;
241 };
242 conf_irrx {
243 nvidia,pins = "irrx", "irtx", "sdd", "spic",
244 "spie", "spih", "uaa", "uab", "uad",
245 "uca", "ucb";
246 nvidia,pull = <TEGRA_PIN_PULL_UP>;
247 nvidia,tristate = <TEGRA_PIN_ENABLE>;
248 };
249 conf_lc {
250 nvidia,pins = "lc", "ls";
251 nvidia,pull = <TEGRA_PIN_PULL_UP>;
252 };
253 conf_ld0 {
254 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
255 "ld5", "ld6", "ld7", "ld8", "ld9",
256 "ld10", "ld11", "ld12", "ld13", "ld14",
257 "ld15", "ld16", "ld17", "ldi", "lhp0",
258 "lhp1", "lhp2", "lhs", "lm0", "lpp",
259 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
260 "lvs", "pmc";
261 nvidia,tristate = <TEGRA_PIN_DISABLE>;
262 };
263 conf_ld17_0 {
264 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
265 "ld23_22";
266 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
267 };
268 };
269 };
270
271 i2s@70002800 {
272 status = "okay";
273 };
274
275 serial@70006300 {
276 status = "okay";
277 };
278
279 pwm: pwm@7000a000 {
280 status = "okay";
281 };
282
283 i2c@7000c000 {
284 status = "okay";
285 clock-frequency = <400000>;
286
287 wm8903: wm8903@1a {
288 compatible = "wlf,wm8903";
289 reg = <0x1a>;
290 interrupt-parent = <&gpio>;
291 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
292
293 gpio-controller;
294 #gpio-cells = <2>;
295
296 micdet-cfg = <0>;
297 micdet-delay = <100>;
298 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
299 };
300 };
301
302 hdmi_ddc: i2c@7000c400 {
303 status = "okay";
304 clock-frequency = <100000>;
305 };
306
307 i2c@7000c500 {
308 status = "okay";
309 clock-frequency = <400000>;
310 };
311
312 i2c@7000d000 {
313 status = "okay";
314 clock-frequency = <400000>;
315
316 pmic: tps6586x@34 {
317 compatible = "ti,tps6586x";
318 reg = <0x34>;
319 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
320
321 ti,system-power-controller;
322
323 #gpio-cells = <2>;
324 gpio-controller;
325
326 sys-supply = <&vdd_5v0_reg>;
327 vin-sm0-supply = <&sys_reg>;
328 vin-sm1-supply = <&sys_reg>;
329 vin-sm2-supply = <&sys_reg>;
330 vinldo01-supply = <&sm2_reg>;
331 vinldo23-supply = <&sm2_reg>;
332 vinldo4-supply = <&sm2_reg>;
333 vinldo678-supply = <&sm2_reg>;
334 vinldo9-supply = <&sm2_reg>;
335
336 regulators {
337 sys_reg: sys {
338 regulator-name = "vdd_sys";
339 regulator-always-on;
340 };
341
342 vdd_core: sm0 {
343 regulator-name = "vdd_sm0,vdd_core";
344 regulator-min-microvolt = <1200000>;
345 regulator-max-microvolt = <1200000>;
346 regulator-always-on;
347 };
348
349 sm1 {
350 regulator-name = "vdd_sm1,vdd_cpu";
351 regulator-min-microvolt = <1000000>;
352 regulator-max-microvolt = <1000000>;
353 regulator-always-on;
354 };
355
356 sm2_reg: sm2 {
357 regulator-name = "vdd_sm2,vin_ldo*";
358 regulator-min-microvolt = <3700000>;
359 regulator-max-microvolt = <3700000>;
360 regulator-always-on;
361 };
362
363 pci_clk_reg: ldo0 {
364 regulator-name = "vdd_ldo0,vddio_pex_clk";
365 regulator-min-microvolt = <3300000>;
366 regulator-max-microvolt = <3300000>;
367 };
368
369 ldo1 {
370 regulator-name = "vdd_ldo1,avdd_pll*";
371 regulator-min-microvolt = <1100000>;
372 regulator-max-microvolt = <1100000>;
373 regulator-always-on;
374 };
375
376 ldo2 {
377 regulator-name = "vdd_ldo2,vdd_rtc";
378 regulator-min-microvolt = <1200000>;
379 regulator-max-microvolt = <1200000>;
380 };
381
382 ldo3 {
383 regulator-name = "vdd_ldo3,avdd_usb*";
384 regulator-min-microvolt = <3300000>;
385 regulator-max-microvolt = <3300000>;
386 regulator-always-on;
387 };
388
389 ldo4 {
390 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
391 regulator-min-microvolt = <1800000>;
392 regulator-max-microvolt = <1800000>;
393 regulator-always-on;
394 };
395
396 ldo5 {
397 regulator-name = "vdd_ldo5,vcore_mmc";
398 regulator-min-microvolt = <2850000>;
399 regulator-max-microvolt = <2850000>;
400 regulator-always-on;
401 };
402
403 ldo6 {
404 regulator-name = "vdd_ldo6,avdd_vdac";
405 regulator-min-microvolt = <1800000>;
406 regulator-max-microvolt = <1800000>;
407 };
408
409 hdmi_vdd_reg: ldo7 {
410 regulator-name = "vdd_ldo7,avdd_hdmi";
411 regulator-min-microvolt = <3300000>;
412 regulator-max-microvolt = <3300000>;
413 };
414
415 hdmi_pll_reg: ldo8 {
416 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
417 regulator-min-microvolt = <1800000>;
418 regulator-max-microvolt = <1800000>;
419 };
420
421 ldo9 {
422 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
423 regulator-min-microvolt = <2850000>;
424 regulator-max-microvolt = <2850000>;
425 regulator-always-on;
426 };
427
428 ldo_rtc {
429 regulator-name = "vdd_rtc_out,vdd_cell";
430 regulator-min-microvolt = <3300000>;
431 regulator-max-microvolt = <3300000>;
432 regulator-always-on;
433 };
434 };
435 };
436
437 temperature-sensor@4c {
438 compatible = "adi,adt7461";
439 reg = <0x4c>;
440 };
441 };
442
443 kbc@7000e200 {
444 status = "okay";
445 nvidia,debounce-delay-ms = <2>;
446 nvidia,repeat-delay-ms = <160>;
447 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
448 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
449 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
450 MATRIX_KEY(0x00, 0x03, KEY_S)
451 MATRIX_KEY(0x00, 0x04, KEY_A)
452 MATRIX_KEY(0x00, 0x05, KEY_Z)
453 MATRIX_KEY(0x00, 0x07, KEY_FN)
454 MATRIX_KEY(0x01, 0x07, KEY_MENU)
455 MATRIX_KEY(0x02, 0x06, KEY_LEFTALT)
456 MATRIX_KEY(0x02, 0x07, KEY_RIGHTALT)
457 MATRIX_KEY(0x03, 0x00, KEY_5)
458 MATRIX_KEY(0x03, 0x01, KEY_4)
459 MATRIX_KEY(0x03, 0x02, KEY_R)
460 MATRIX_KEY(0x03, 0x03, KEY_E)
461 MATRIX_KEY(0x03, 0x04, KEY_F)
462 MATRIX_KEY(0x03, 0x05, KEY_D)
463 MATRIX_KEY(0x03, 0x06, KEY_X)
464 MATRIX_KEY(0x04, 0x00, KEY_7)
465 MATRIX_KEY(0x04, 0x01, KEY_6)
466 MATRIX_KEY(0x04, 0x02, KEY_T)
467 MATRIX_KEY(0x04, 0x03, KEY_H)
468 MATRIX_KEY(0x04, 0x04, KEY_G)
469 MATRIX_KEY(0x04, 0x05, KEY_V)
470 MATRIX_KEY(0x04, 0x06, KEY_C)
471 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
472 MATRIX_KEY(0x05, 0x00, KEY_9)
473 MATRIX_KEY(0x05, 0x01, KEY_8)
474 MATRIX_KEY(0x05, 0x02, KEY_U)
475 MATRIX_KEY(0x05, 0x03, KEY_Y)
476 MATRIX_KEY(0x05, 0x04, KEY_J)
477 MATRIX_KEY(0x05, 0x05, KEY_N)
478 MATRIX_KEY(0x05, 0x06, KEY_B)
479 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
480 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
481 MATRIX_KEY(0x06, 0x01, KEY_0)
482 MATRIX_KEY(0x06, 0x02, KEY_O)
483 MATRIX_KEY(0x06, 0x03, KEY_I)
484 MATRIX_KEY(0x06, 0x04, KEY_L)
485 MATRIX_KEY(0x06, 0x05, KEY_K)
486 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
487 MATRIX_KEY(0x06, 0x07, KEY_M)
488 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
489 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
490 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
491 MATRIX_KEY(0x07, 0x07, KEY_MENU)
492 MATRIX_KEY(0x08, 0x04, KEY_LEFTSHIFT)
493 MATRIX_KEY(0x08, 0x05, KEY_RIGHTSHIFT)
494 MATRIX_KEY(0x09, 0x05, KEY_LEFTCTRL)
495 MATRIX_KEY(0x09, 0x07, KEY_RIGHTCTRL)
496 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
497 MATRIX_KEY(0x0B, 0x01, KEY_P)
498 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
499 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
500 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
501 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
502 MATRIX_KEY(0x0C, 0x00, KEY_F10)
503 MATRIX_KEY(0x0C, 0x01, KEY_F9)
504 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
505 MATRIX_KEY(0x0C, 0x03, KEY_3)
506 MATRIX_KEY(0x0C, 0x04, KEY_2)
507 MATRIX_KEY(0x0C, 0x05, KEY_UP)
508 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
509 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
510 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
511 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
512 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
513 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
514 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
515 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
516 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
517 MATRIX_KEY(0x0E, 0x00, KEY_F11)
518 MATRIX_KEY(0x0E, 0x01, KEY_F12)
519 MATRIX_KEY(0x0E, 0x02, KEY_F8)
520 MATRIX_KEY(0x0E, 0x03, KEY_Q)
521 MATRIX_KEY(0x0E, 0x04, KEY_F4)
522 MATRIX_KEY(0x0E, 0x05, KEY_F3)
523 MATRIX_KEY(0x0E, 0x06, KEY_1)
524 MATRIX_KEY(0x0E, 0x07, KEY_F7)
525 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
526 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
527 MATRIX_KEY(0x0F, 0x02, KEY_F5)
528 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
529 MATRIX_KEY(0x0F, 0x04, KEY_F1)
530 MATRIX_KEY(0x0F, 0x05, KEY_F2)
531 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
532 MATRIX_KEY(0x0F, 0x07, KEY_F6)
533 MATRIX_KEY(0x14, 0x00, KEY_KP7)
534 MATRIX_KEY(0x15, 0x00, KEY_KP9)
535 MATRIX_KEY(0x15, 0x01, KEY_KP8)
536 MATRIX_KEY(0x15, 0x02, KEY_KP4)
537 MATRIX_KEY(0x15, 0x04, KEY_KP1)
538 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
539 MATRIX_KEY(0x16, 0x02, KEY_KP6)
540 MATRIX_KEY(0x16, 0x03, KEY_KP5)
541 MATRIX_KEY(0x16, 0x04, KEY_KP3)
542 MATRIX_KEY(0x16, 0x05, KEY_KP2)
543 MATRIX_KEY(0x16, 0x07, KEY_KP0)
544 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
545 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
546 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
547 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
548 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
549 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
550 MATRIX_KEY(0x1D, 0x04, KEY_END)
551 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSUP)
552 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
553 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSDOWN)
554 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
555 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
556 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
557 MATRIX_KEY(0x1F, 0x04, KEY_QUESTION)>;
558 };
559
560 pmc@7000e400 {
561 nvidia,invert-interrupt;
562 nvidia,suspend-mode = <1>;
563 nvidia,cpu-pwr-good-time = <5000>;
564 nvidia,cpu-pwr-off-time = <5000>;
565 nvidia,core-pwr-good-time = <3845 3845>;
566 nvidia,core-pwr-off-time = <3875>;
567 nvidia,sys-clock-req-active-high;
568 core-supply = <&vdd_core>;
569 };
570
571 pcie@80003000 {
572 status = "okay";
573
574 avdd-pex-supply = <&pci_vdd_reg>;
575 vdd-pex-supply = <&pci_vdd_reg>;
576 avdd-pex-pll-supply = <&pci_vdd_reg>;
577 avdd-plle-supply = <&pci_vdd_reg>;
578 vddio-pex-clk-supply = <&pci_clk_reg>;
579
580 pci@1,0 {
581 status = "okay";
582 };
583
584 pci@2,0 {
585 status = "okay";
586 };
587 };
588
589 usb@c5000000 {
590 status = "okay";
591 };
592
593 usb-phy@c5000000 {
594 status = "okay";
595 };
596
597 usb@c5004000 {
598 status = "okay";
599 };
600
601 usb-phy@c5004000 {
602 status = "okay";
603 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
604 GPIO_ACTIVE_LOW>;
605 };
606
607 usb@c5008000 {
608 status = "okay";
609 };
610
611 usb-phy@c5008000 {
612 status = "okay";
613 };
614
615 mmc@c8000200 {
616 status = "okay";
617 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
618 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
619 power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
620 bus-width = <4>;
621 };
622
623 mmc@c8000600 {
624 status = "okay";
625 cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
626 wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
627 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
628 bus-width = <8>;
629 };
630
631 backlight: backlight {
632 compatible = "pwm-backlight";
633
634 enable-gpios = <&gpio TEGRA_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
635 power-supply = <&vdd_bl_reg>;
636 pwms = <&pwm 0 5000000>;
637
638 brightness-levels = <0 4 8 16 32 64 128 255>;
639 default-brightness-level = <6>;
640 };
641
642 clk32k_in: clock-32k {
643 compatible = "fixed-clock";
644 clock-frequency = <32768>;
645 #clock-cells = <0>;
646 };
647
648 gpio-keys {
649 compatible = "gpio-keys";
650
651 key-power {
652 label = "Power";
653 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
654 linux,code = <KEY_POWER>;
655 wakeup-source;
656 };
657 };
658
659 panel: panel {
660 compatible = "auo,b101aw03";
661
662 power-supply = <&vdd_pnl_reg>;
663 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
664
665 backlight = <&backlight>;
666 };
667
668 vdd_5v0_reg: regulator-5v0 {
669 compatible = "regulator-fixed";
670 regulator-name = "vdd_5v0";
671 regulator-min-microvolt = <5000000>;
672 regulator-max-microvolt = <5000000>;
673 regulator-always-on;
674 };
675
676 regulator-1v5 {
677 compatible = "regulator-fixed";
678 regulator-name = "vdd_1v5";
679 regulator-min-microvolt = <1500000>;
680 regulator-max-microvolt = <1500000>;
681 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
682 };
683
684 regulator-1v2 {
685 compatible = "regulator-fixed";
686 regulator-name = "vdd_1v2";
687 regulator-min-microvolt = <1200000>;
688 regulator-max-microvolt = <1200000>;
689 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
690 enable-active-high;
691 };
692
693 pci_vdd_reg: regulator-1v05 {
694 compatible = "regulator-fixed";
695 regulator-name = "vdd_1v05";
696 regulator-min-microvolt = <1050000>;
697 regulator-max-microvolt = <1050000>;
698 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
699 enable-active-high;
700 };
701
702 vdd_pnl_reg: regulator-pn1 {
703 compatible = "regulator-fixed";
704 regulator-name = "vdd_pnl";
705 regulator-min-microvolt = <2800000>;
706 regulator-max-microvolt = <2800000>;
707 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
708 enable-active-high;
709 };
710
711 vdd_bl_reg: regulator-bl {
712 compatible = "regulator-fixed";
713 regulator-name = "vdd_bl";
714 regulator-min-microvolt = <2800000>;
715 regulator-max-microvolt = <2800000>;
716 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
717 enable-active-high;
718 };
719
720 vdd_5v0_hdmi: regulator-hdmi {
721 compatible = "regulator-fixed";
722 regulator-name = "VDDIO_HDMI";
723 regulator-min-microvolt = <5000000>;
724 regulator-max-microvolt = <5000000>;
725 gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>;
726 enable-active-high;
727 vin-supply = <&vdd_5v0_reg>;
728 };
729
730 sound {
731 compatible = "nvidia,tegra-audio-wm8903-harmony",
732 "nvidia,tegra-audio-wm8903";
733 nvidia,model = "NVIDIA Tegra Harmony";
734
735 nvidia,audio-routing =
736 "Headphone Jack", "HPOUTR",
737 "Headphone Jack", "HPOUTL",
738 "Int Spk", "ROP",
739 "Int Spk", "RON",
740 "Int Spk", "LOP",
741 "Int Spk", "LON",
742 "Mic Jack", "MICBIAS",
743 "IN1L", "Mic Jack";
744
745 nvidia,i2s-controller = <&tegra_i2s1>;
746 nvidia,audio-codec = <&wm8903>;
747
748 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
749 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
750 GPIO_ACTIVE_LOW>;
751 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
752 GPIO_ACTIVE_HIGH>;
753 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
754 GPIO_ACTIVE_HIGH>;
755
756 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
757 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
758 <&tegra_car TEGRA20_CLK_CDEV1>;
759 clock-names = "pll_a", "pll_a_out0", "mclk";
760 };
761};
1/dts-v1/;
2
3#include <dt-bindings/input/input.h>
4#include "tegra20.dtsi"
5
6/ {
7 model = "NVIDIA Tegra20 Harmony evaluation board";
8 compatible = "nvidia,harmony", "nvidia,tegra20";
9
10 aliases {
11 rtc0 = "/i2c@7000d000/tps6586x@34";
12 rtc1 = "/rtc@7000e000";
13 serial0 = &uartd;
14 };
15
16 memory {
17 reg = <0x00000000 0x40000000>;
18 };
19
20 host1x@50000000 {
21 dc@54200000 {
22 rgb {
23 status = "okay";
24
25 nvidia,panel = <&panel>;
26 };
27 };
28
29 hdmi@54280000 {
30 status = "okay";
31
32 hdmi-supply = <&vdd_5v0_hdmi>;
33 vdd-supply = <&hdmi_vdd_reg>;
34 pll-supply = <&hdmi_pll_reg>;
35
36 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
37 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
38 GPIO_ACTIVE_HIGH>;
39 };
40 };
41
42 pinmux@70000014 {
43 pinctrl-names = "default";
44 pinctrl-0 = <&state_default>;
45
46 state_default: pinmux {
47 ata {
48 nvidia,pins = "ata";
49 nvidia,function = "ide";
50 };
51 atb {
52 nvidia,pins = "atb", "gma", "gme";
53 nvidia,function = "sdio4";
54 };
55 atc {
56 nvidia,pins = "atc";
57 nvidia,function = "nand";
58 };
59 atd {
60 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
61 "spia", "spib", "spic";
62 nvidia,function = "gmi";
63 };
64 cdev1 {
65 nvidia,pins = "cdev1";
66 nvidia,function = "plla_out";
67 };
68 cdev2 {
69 nvidia,pins = "cdev2";
70 nvidia,function = "pllp_out4";
71 };
72 crtp {
73 nvidia,pins = "crtp";
74 nvidia,function = "crt";
75 };
76 csus {
77 nvidia,pins = "csus";
78 nvidia,function = "vi_sensor_clk";
79 };
80 dap1 {
81 nvidia,pins = "dap1";
82 nvidia,function = "dap1";
83 };
84 dap2 {
85 nvidia,pins = "dap2";
86 nvidia,function = "dap2";
87 };
88 dap3 {
89 nvidia,pins = "dap3";
90 nvidia,function = "dap3";
91 };
92 dap4 {
93 nvidia,pins = "dap4";
94 nvidia,function = "dap4";
95 };
96 ddc {
97 nvidia,pins = "ddc";
98 nvidia,function = "i2c2";
99 };
100 dta {
101 nvidia,pins = "dta", "dtd";
102 nvidia,function = "sdio2";
103 };
104 dtb {
105 nvidia,pins = "dtb", "dtc", "dte";
106 nvidia,function = "rsvd1";
107 };
108 dtf {
109 nvidia,pins = "dtf";
110 nvidia,function = "i2c3";
111 };
112 gmc {
113 nvidia,pins = "gmc";
114 nvidia,function = "uartd";
115 };
116 gpu7 {
117 nvidia,pins = "gpu7";
118 nvidia,function = "rtck";
119 };
120 gpv {
121 nvidia,pins = "gpv", "slxa", "slxk";
122 nvidia,function = "pcie";
123 };
124 hdint {
125 nvidia,pins = "hdint", "pta";
126 nvidia,function = "hdmi";
127 };
128 i2cp {
129 nvidia,pins = "i2cp";
130 nvidia,function = "i2cp";
131 };
132 irrx {
133 nvidia,pins = "irrx", "irtx";
134 nvidia,function = "uarta";
135 };
136 kbca {
137 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
138 "kbce", "kbcf";
139 nvidia,function = "kbc";
140 };
141 lcsn {
142 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
143 "ld3", "ld4", "ld5", "ld6", "ld7",
144 "ld8", "ld9", "ld10", "ld11", "ld12",
145 "ld13", "ld14", "ld15", "ld16", "ld17",
146 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
147 "lhs", "lm0", "lm1", "lpp", "lpw0",
148 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
149 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
150 "lvs";
151 nvidia,function = "displaya";
152 };
153 owc {
154 nvidia,pins = "owc", "spdi", "spdo", "uac";
155 nvidia,function = "rsvd2";
156 };
157 pmc {
158 nvidia,pins = "pmc";
159 nvidia,function = "pwr_on";
160 };
161 rm {
162 nvidia,pins = "rm";
163 nvidia,function = "i2c1";
164 };
165 sdb {
166 nvidia,pins = "sdb", "sdc", "sdd";
167 nvidia,function = "pwm";
168 };
169 sdio1 {
170 nvidia,pins = "sdio1";
171 nvidia,function = "sdio1";
172 };
173 slxc {
174 nvidia,pins = "slxc", "slxd";
175 nvidia,function = "spdif";
176 };
177 spid {
178 nvidia,pins = "spid", "spie", "spif";
179 nvidia,function = "spi1";
180 };
181 spig {
182 nvidia,pins = "spig", "spih";
183 nvidia,function = "spi2_alt";
184 };
185 uaa {
186 nvidia,pins = "uaa", "uab", "uda";
187 nvidia,function = "ulpi";
188 };
189 uad {
190 nvidia,pins = "uad";
191 nvidia,function = "irda";
192 };
193 uca {
194 nvidia,pins = "uca", "ucb";
195 nvidia,function = "uartc";
196 };
197 conf_ata {
198 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
199 "cdev1", "cdev2", "dap1", "dtb", "gma",
200 "gmb", "gmc", "gmd", "gme", "gpu7",
201 "gpv", "i2cp", "pta", "rm", "slxa",
202 "slxk", "spia", "spib", "uac";
203 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
204 nvidia,tristate = <TEGRA_PIN_DISABLE>;
205 };
206 conf_ck32 {
207 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
208 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
209 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
210 };
211 conf_csus {
212 nvidia,pins = "csus", "spid", "spif";
213 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
214 nvidia,tristate = <TEGRA_PIN_ENABLE>;
215 };
216 conf_crtp {
217 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
218 "dtc", "dte", "dtf", "gpu", "sdio1",
219 "slxc", "slxd", "spdi", "spdo", "spig",
220 "uda";
221 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
222 nvidia,tristate = <TEGRA_PIN_ENABLE>;
223 };
224 conf_ddc {
225 nvidia,pins = "ddc", "dta", "dtd", "kbca",
226 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
227 "sdc";
228 nvidia,pull = <TEGRA_PIN_PULL_UP>;
229 nvidia,tristate = <TEGRA_PIN_DISABLE>;
230 };
231 conf_hdint {
232 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
233 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
234 "lvp0", "owc", "sdb";
235 nvidia,tristate = <TEGRA_PIN_ENABLE>;
236 };
237 conf_irrx {
238 nvidia,pins = "irrx", "irtx", "sdd", "spic",
239 "spie", "spih", "uaa", "uab", "uad",
240 "uca", "ucb";
241 nvidia,pull = <TEGRA_PIN_PULL_UP>;
242 nvidia,tristate = <TEGRA_PIN_ENABLE>;
243 };
244 conf_lc {
245 nvidia,pins = "lc", "ls";
246 nvidia,pull = <TEGRA_PIN_PULL_UP>;
247 };
248 conf_ld0 {
249 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
250 "ld5", "ld6", "ld7", "ld8", "ld9",
251 "ld10", "ld11", "ld12", "ld13", "ld14",
252 "ld15", "ld16", "ld17", "ldi", "lhp0",
253 "lhp1", "lhp2", "lhs", "lm0", "lpp",
254 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
255 "lvs", "pmc";
256 nvidia,tristate = <TEGRA_PIN_DISABLE>;
257 };
258 conf_ld17_0 {
259 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
260 "ld23_22";
261 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
262 };
263 };
264 };
265
266 i2s@70002800 {
267 status = "okay";
268 };
269
270 serial@70006300 {
271 status = "okay";
272 };
273
274 pwm: pwm@7000a000 {
275 status = "okay";
276 };
277
278 i2c@7000c000 {
279 status = "okay";
280 clock-frequency = <400000>;
281
282 wm8903: wm8903@1a {
283 compatible = "wlf,wm8903";
284 reg = <0x1a>;
285 interrupt-parent = <&gpio>;
286 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
287
288 gpio-controller;
289 #gpio-cells = <2>;
290
291 micdet-cfg = <0>;
292 micdet-delay = <100>;
293 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
294 };
295 };
296
297 hdmi_ddc: i2c@7000c400 {
298 status = "okay";
299 clock-frequency = <100000>;
300 };
301
302 i2c@7000c500 {
303 status = "okay";
304 clock-frequency = <400000>;
305 };
306
307 i2c@7000d000 {
308 status = "okay";
309 clock-frequency = <400000>;
310
311 pmic: tps6586x@34 {
312 compatible = "ti,tps6586x";
313 reg = <0x34>;
314 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
315
316 ti,system-power-controller;
317
318 #gpio-cells = <2>;
319 gpio-controller;
320
321 sys-supply = <&vdd_5v0_reg>;
322 vin-sm0-supply = <&sys_reg>;
323 vin-sm1-supply = <&sys_reg>;
324 vin-sm2-supply = <&sys_reg>;
325 vinldo01-supply = <&sm2_reg>;
326 vinldo23-supply = <&sm2_reg>;
327 vinldo4-supply = <&sm2_reg>;
328 vinldo678-supply = <&sm2_reg>;
329 vinldo9-supply = <&sm2_reg>;
330
331 regulators {
332 sys_reg: sys {
333 regulator-name = "vdd_sys";
334 regulator-always-on;
335 };
336
337 sm0 {
338 regulator-name = "vdd_sm0,vdd_core";
339 regulator-min-microvolt = <1200000>;
340 regulator-max-microvolt = <1200000>;
341 regulator-always-on;
342 };
343
344 sm1 {
345 regulator-name = "vdd_sm1,vdd_cpu";
346 regulator-min-microvolt = <1000000>;
347 regulator-max-microvolt = <1000000>;
348 regulator-always-on;
349 };
350
351 sm2_reg: sm2 {
352 regulator-name = "vdd_sm2,vin_ldo*";
353 regulator-min-microvolt = <3700000>;
354 regulator-max-microvolt = <3700000>;
355 regulator-always-on;
356 };
357
358 pci_clk_reg: ldo0 {
359 regulator-name = "vdd_ldo0,vddio_pex_clk";
360 regulator-min-microvolt = <3300000>;
361 regulator-max-microvolt = <3300000>;
362 };
363
364 ldo1 {
365 regulator-name = "vdd_ldo1,avdd_pll*";
366 regulator-min-microvolt = <1100000>;
367 regulator-max-microvolt = <1100000>;
368 regulator-always-on;
369 };
370
371 ldo2 {
372 regulator-name = "vdd_ldo2,vdd_rtc";
373 regulator-min-microvolt = <1200000>;
374 regulator-max-microvolt = <1200000>;
375 };
376
377 ldo3 {
378 regulator-name = "vdd_ldo3,avdd_usb*";
379 regulator-min-microvolt = <3300000>;
380 regulator-max-microvolt = <3300000>;
381 regulator-always-on;
382 };
383
384 ldo4 {
385 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
386 regulator-min-microvolt = <1800000>;
387 regulator-max-microvolt = <1800000>;
388 regulator-always-on;
389 };
390
391 ldo5 {
392 regulator-name = "vdd_ldo5,vcore_mmc";
393 regulator-min-microvolt = <2850000>;
394 regulator-max-microvolt = <2850000>;
395 regulator-always-on;
396 };
397
398 ldo6 {
399 regulator-name = "vdd_ldo6,avdd_vdac";
400 regulator-min-microvolt = <1800000>;
401 regulator-max-microvolt = <1800000>;
402 };
403
404 hdmi_vdd_reg: ldo7 {
405 regulator-name = "vdd_ldo7,avdd_hdmi";
406 regulator-min-microvolt = <3300000>;
407 regulator-max-microvolt = <3300000>;
408 };
409
410 hdmi_pll_reg: ldo8 {
411 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
412 regulator-min-microvolt = <1800000>;
413 regulator-max-microvolt = <1800000>;
414 };
415
416 ldo9 {
417 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
418 regulator-min-microvolt = <2850000>;
419 regulator-max-microvolt = <2850000>;
420 regulator-always-on;
421 };
422
423 ldo_rtc {
424 regulator-name = "vdd_rtc_out,vdd_cell";
425 regulator-min-microvolt = <3300000>;
426 regulator-max-microvolt = <3300000>;
427 regulator-always-on;
428 };
429 };
430 };
431
432 temperature-sensor@4c {
433 compatible = "adi,adt7461";
434 reg = <0x4c>;
435 };
436 };
437
438 kbc@7000e200 {
439 status = "okay";
440 nvidia,debounce-delay-ms = <2>;
441 nvidia,repeat-delay-ms = <160>;
442 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
443 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
444 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
445 MATRIX_KEY(0x00, 0x03, KEY_S)
446 MATRIX_KEY(0x00, 0x04, KEY_A)
447 MATRIX_KEY(0x00, 0x05, KEY_Z)
448 MATRIX_KEY(0x00, 0x07, KEY_FN)
449 MATRIX_KEY(0x01, 0x07, KEY_MENU)
450 MATRIX_KEY(0x02, 0x06, KEY_LEFTALT)
451 MATRIX_KEY(0x02, 0x07, KEY_RIGHTALT)
452 MATRIX_KEY(0x03, 0x00, KEY_5)
453 MATRIX_KEY(0x03, 0x01, KEY_4)
454 MATRIX_KEY(0x03, 0x02, KEY_R)
455 MATRIX_KEY(0x03, 0x03, KEY_E)
456 MATRIX_KEY(0x03, 0x04, KEY_F)
457 MATRIX_KEY(0x03, 0x05, KEY_D)
458 MATRIX_KEY(0x03, 0x06, KEY_X)
459 MATRIX_KEY(0x04, 0x00, KEY_7)
460 MATRIX_KEY(0x04, 0x01, KEY_6)
461 MATRIX_KEY(0x04, 0x02, KEY_T)
462 MATRIX_KEY(0x04, 0x03, KEY_H)
463 MATRIX_KEY(0x04, 0x04, KEY_G)
464 MATRIX_KEY(0x04, 0x05, KEY_V)
465 MATRIX_KEY(0x04, 0x06, KEY_C)
466 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
467 MATRIX_KEY(0x05, 0x00, KEY_9)
468 MATRIX_KEY(0x05, 0x01, KEY_8)
469 MATRIX_KEY(0x05, 0x02, KEY_U)
470 MATRIX_KEY(0x05, 0x03, KEY_Y)
471 MATRIX_KEY(0x05, 0x04, KEY_J)
472 MATRIX_KEY(0x05, 0x05, KEY_N)
473 MATRIX_KEY(0x05, 0x06, KEY_B)
474 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
475 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
476 MATRIX_KEY(0x06, 0x01, KEY_0)
477 MATRIX_KEY(0x06, 0x02, KEY_O)
478 MATRIX_KEY(0x06, 0x03, KEY_I)
479 MATRIX_KEY(0x06, 0x04, KEY_L)
480 MATRIX_KEY(0x06, 0x05, KEY_K)
481 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
482 MATRIX_KEY(0x06, 0x07, KEY_M)
483 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
484 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
485 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
486 MATRIX_KEY(0x07, 0x07, KEY_MENU)
487 MATRIX_KEY(0x08, 0x04, KEY_LEFTSHIFT)
488 MATRIX_KEY(0x08, 0x05, KEY_RIGHTSHIFT)
489 MATRIX_KEY(0x09, 0x05, KEY_LEFTCTRL)
490 MATRIX_KEY(0x09, 0x07, KEY_RIGHTCTRL)
491 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
492 MATRIX_KEY(0x0B, 0x01, KEY_P)
493 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
494 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
495 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
496 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
497 MATRIX_KEY(0x0C, 0x00, KEY_F10)
498 MATRIX_KEY(0x0C, 0x01, KEY_F9)
499 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
500 MATRIX_KEY(0x0C, 0x03, KEY_3)
501 MATRIX_KEY(0x0C, 0x04, KEY_2)
502 MATRIX_KEY(0x0C, 0x05, KEY_UP)
503 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
504 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
505 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
506 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
507 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
508 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
509 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
510 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
511 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
512 MATRIX_KEY(0x0E, 0x00, KEY_F11)
513 MATRIX_KEY(0x0E, 0x01, KEY_F12)
514 MATRIX_KEY(0x0E, 0x02, KEY_F8)
515 MATRIX_KEY(0x0E, 0x03, KEY_Q)
516 MATRIX_KEY(0x0E, 0x04, KEY_F4)
517 MATRIX_KEY(0x0E, 0x05, KEY_F3)
518 MATRIX_KEY(0x0E, 0x06, KEY_1)
519 MATRIX_KEY(0x0E, 0x07, KEY_F7)
520 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
521 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
522 MATRIX_KEY(0x0F, 0x02, KEY_F5)
523 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
524 MATRIX_KEY(0x0F, 0x04, KEY_F1)
525 MATRIX_KEY(0x0F, 0x05, KEY_F2)
526 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
527 MATRIX_KEY(0x0F, 0x07, KEY_F6)
528 MATRIX_KEY(0x14, 0x00, KEY_KP7)
529 MATRIX_KEY(0x15, 0x00, KEY_KP9)
530 MATRIX_KEY(0x15, 0x01, KEY_KP8)
531 MATRIX_KEY(0x15, 0x02, KEY_KP4)
532 MATRIX_KEY(0x15, 0x04, KEY_KP1)
533 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
534 MATRIX_KEY(0x16, 0x02, KEY_KP6)
535 MATRIX_KEY(0x16, 0x03, KEY_KP5)
536 MATRIX_KEY(0x16, 0x04, KEY_KP3)
537 MATRIX_KEY(0x16, 0x05, KEY_KP2)
538 MATRIX_KEY(0x16, 0x07, KEY_KP0)
539 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
540 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
541 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
542 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
543 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
544 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
545 MATRIX_KEY(0x1D, 0x04, KEY_END)
546 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSUP)
547 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
548 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSDOWN)
549 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
550 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
551 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
552 MATRIX_KEY(0x1F, 0x04, KEY_QUESTION)>;
553 };
554
555 pmc@7000e400 {
556 nvidia,invert-interrupt;
557 nvidia,suspend-mode = <1>;
558 nvidia,cpu-pwr-good-time = <5000>;
559 nvidia,cpu-pwr-off-time = <5000>;
560 nvidia,core-pwr-good-time = <3845 3845>;
561 nvidia,core-pwr-off-time = <3875>;
562 nvidia,sys-clock-req-active-high;
563 };
564
565 pcie-controller@80003000 {
566 status = "okay";
567
568 avdd-pex-supply = <&pci_vdd_reg>;
569 vdd-pex-supply = <&pci_vdd_reg>;
570 avdd-pex-pll-supply = <&pci_vdd_reg>;
571 avdd-plle-supply = <&pci_vdd_reg>;
572 vddio-pex-clk-supply = <&pci_clk_reg>;
573
574 pci@1,0 {
575 status = "okay";
576 };
577
578 pci@2,0 {
579 status = "okay";
580 };
581 };
582
583 usb@c5000000 {
584 status = "okay";
585 };
586
587 usb-phy@c5000000 {
588 status = "okay";
589 };
590
591 usb@c5004000 {
592 status = "okay";
593 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
594 GPIO_ACTIVE_LOW>;
595 };
596
597 usb-phy@c5004000 {
598 status = "okay";
599 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
600 GPIO_ACTIVE_LOW>;
601 };
602
603 usb@c5008000 {
604 status = "okay";
605 };
606
607 usb-phy@c5008000 {
608 status = "okay";
609 };
610
611 sdhci@c8000200 {
612 status = "okay";
613 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
614 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
615 power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
616 bus-width = <4>;
617 };
618
619 sdhci@c8000600 {
620 status = "okay";
621 cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
622 wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
623 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
624 bus-width = <8>;
625 };
626
627 backlight: backlight {
628 compatible = "pwm-backlight";
629
630 enable-gpios = <&gpio TEGRA_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
631 power-supply = <&vdd_bl_reg>;
632 pwms = <&pwm 0 5000000>;
633
634 brightness-levels = <0 4 8 16 32 64 128 255>;
635 default-brightness-level = <6>;
636 };
637
638 clocks {
639 compatible = "simple-bus";
640 #address-cells = <1>;
641 #size-cells = <0>;
642
643 clk32k_in: clock@0 {
644 compatible = "fixed-clock";
645 reg=<0>;
646 #clock-cells = <0>;
647 clock-frequency = <32768>;
648 };
649 };
650
651 gpio-keys {
652 compatible = "gpio-keys";
653
654 power {
655 label = "Power";
656 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
657 linux,code = <KEY_POWER>;
658 gpio-key,wakeup;
659 };
660 };
661
662 panel: panel {
663 compatible = "auo,b101aw03", "simple-panel";
664
665 power-supply = <&vdd_pnl_reg>;
666 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
667
668 backlight = <&backlight>;
669 };
670
671 regulators {
672 compatible = "simple-bus";
673 #address-cells = <1>;
674 #size-cells = <0>;
675
676 vdd_5v0_reg: regulator@0 {
677 compatible = "regulator-fixed";
678 reg = <0>;
679 regulator-name = "vdd_5v0";
680 regulator-min-microvolt = <5000000>;
681 regulator-max-microvolt = <5000000>;
682 regulator-always-on;
683 };
684
685 regulator@1 {
686 compatible = "regulator-fixed";
687 reg = <1>;
688 regulator-name = "vdd_1v5";
689 regulator-min-microvolt = <1500000>;
690 regulator-max-microvolt = <1500000>;
691 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
692 };
693
694 regulator@2 {
695 compatible = "regulator-fixed";
696 reg = <2>;
697 regulator-name = "vdd_1v2";
698 regulator-min-microvolt = <1200000>;
699 regulator-max-microvolt = <1200000>;
700 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
701 enable-active-high;
702 };
703
704 pci_vdd_reg: regulator@3 {
705 compatible = "regulator-fixed";
706 reg = <3>;
707 regulator-name = "vdd_1v05";
708 regulator-min-microvolt = <1050000>;
709 regulator-max-microvolt = <1050000>;
710 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
711 enable-active-high;
712 };
713
714 vdd_pnl_reg: regulator@4 {
715 compatible = "regulator-fixed";
716 reg = <4>;
717 regulator-name = "vdd_pnl";
718 regulator-min-microvolt = <2800000>;
719 regulator-max-microvolt = <2800000>;
720 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
721 enable-active-high;
722 };
723
724 vdd_bl_reg: regulator@5 {
725 compatible = "regulator-fixed";
726 reg = <5>;
727 regulator-name = "vdd_bl";
728 regulator-min-microvolt = <2800000>;
729 regulator-max-microvolt = <2800000>;
730 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
731 enable-active-high;
732 };
733
734 vdd_5v0_hdmi: regulator@6 {
735 compatible = "regulator-fixed";
736 reg = <6>;
737 regulator-name = "VDDIO_HDMI";
738 regulator-min-microvolt = <5000000>;
739 regulator-max-microvolt = <5000000>;
740 gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>;
741 enable-active-high;
742 vin-supply = <&vdd_5v0_reg>;
743 };
744 };
745
746 sound {
747 compatible = "nvidia,tegra-audio-wm8903-harmony",
748 "nvidia,tegra-audio-wm8903";
749 nvidia,model = "NVIDIA Tegra Harmony";
750
751 nvidia,audio-routing =
752 "Headphone Jack", "HPOUTR",
753 "Headphone Jack", "HPOUTL",
754 "Int Spk", "ROP",
755 "Int Spk", "RON",
756 "Int Spk", "LOP",
757 "Int Spk", "LON",
758 "Mic Jack", "MICBIAS",
759 "IN1L", "Mic Jack";
760
761 nvidia,i2s-controller = <&tegra_i2s1>;
762 nvidia,audio-codec = <&wm8903>;
763
764 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
765 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
766 GPIO_ACTIVE_HIGH>;
767 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
768 GPIO_ACTIVE_HIGH>;
769 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
770 GPIO_ACTIVE_HIGH>;
771
772 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
773 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
774 <&tegra_car TEGRA20_CLK_CDEV1>;
775 clock-names = "pll_a", "pll_a_out0", "mclk";
776 };
777};