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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
4 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 *
6 * Copyright (C) 2013 Atmel,
7 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 */
9
10#include <dt-bindings/dma/at91.h>
11#include <dt-bindings/pinctrl/at91.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/clock/at91.h>
15#include <dt-bindings/mfd/at91-usart.h>
16
17/ {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 model = "Atmel SAMA5D3 family SoC";
21 compatible = "atmel,sama5d3", "atmel,sama5";
22 interrupt-parent = <&aic>;
23
24 aliases {
25 serial0 = &dbgu;
26 serial1 = &usart0;
27 serial2 = &usart1;
28 serial3 = &usart2;
29 serial4 = &usart3;
30 serial5 = &uart0;
31 gpio0 = &pioA;
32 gpio1 = &pioB;
33 gpio2 = &pioC;
34 gpio3 = &pioD;
35 gpio4 = &pioE;
36 tcb0 = &tcb0;
37 i2c0 = &i2c0;
38 i2c1 = &i2c1;
39 i2c2 = &i2c2;
40 ssc0 = &ssc0;
41 ssc1 = &ssc1;
42 pwm0 = &pwm0;
43 };
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
47 cpu@0 {
48 device_type = "cpu";
49 compatible = "arm,cortex-a5";
50 reg = <0x0>;
51 };
52 };
53
54 pmu {
55 compatible = "arm,cortex-a5-pmu";
56 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
57 };
58
59 memory@20000000 {
60 device_type = "memory";
61 reg = <0x20000000 0x8000000>;
62 };
63
64 clocks {
65 slow_xtal: slow_xtal {
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <0>;
69 };
70
71 main_xtal: main_xtal {
72 compatible = "fixed-clock";
73 #clock-cells = <0>;
74 clock-frequency = <0>;
75 };
76
77 adc_op_clk: adc_op_clk{
78 compatible = "fixed-clock";
79 #clock-cells = <0>;
80 clock-frequency = <1000000>;
81 };
82 };
83
84 sram: sram@300000 {
85 compatible = "mmio-sram";
86 reg = <0x00300000 0x20000>;
87 #address-cells = <1>;
88 #size-cells = <1>;
89 ranges = <0 0x00300000 0x20000>;
90 };
91
92 ahb {
93 compatible = "simple-bus";
94 #address-cells = <1>;
95 #size-cells = <1>;
96 ranges;
97
98 apb {
99 compatible = "simple-bus";
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges;
103
104 mmc0: mmc@f0000000 {
105 compatible = "atmel,hsmci";
106 reg = <0xf0000000 0x600>;
107 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
108 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
109 dma-names = "rxtx";
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
112 status = "disabled";
113 #address-cells = <1>;
114 #size-cells = <0>;
115 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
116 clock-names = "mci_clk";
117 };
118
119 spi0: spi@f0004000 {
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "atmel,at91rm9200-spi";
123 reg = <0xf0004000 0x100>;
124 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
125 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
126 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
127 dma-names = "tx", "rx";
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_spi0>;
130 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
131 clock-names = "spi_clk";
132 status = "disabled";
133 };
134
135 ssc0: ssc@f0008000 {
136 compatible = "atmel,at91sam9g45-ssc";
137 reg = <0xf0008000 0x4000>;
138 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
139 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
140 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
141 dma-names = "tx", "rx";
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
144 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
145 clock-names = "pclk";
146 status = "disabled";
147 };
148
149 tcb0: timer@f0010000 {
150 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
151 #address-cells = <1>;
152 #size-cells = <0>;
153 reg = <0xf0010000 0x100>;
154 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
155 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&clk32k>;
156 clock-names = "t0_clk", "slow_clk";
157 };
158
159 i2c0: i2c@f0014000 {
160 compatible = "atmel,at91sam9x5-i2c";
161 reg = <0xf0014000 0x4000>;
162 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
163 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
164 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
165 dma-names = "tx", "rx";
166 pinctrl-names = "default", "gpio";
167 pinctrl-0 = <&pinctrl_i2c0>;
168 pinctrl-1 = <&pinctrl_i2c0_gpio>;
169 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
170 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
171 #address-cells = <1>;
172 #size-cells = <0>;
173 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
174 status = "disabled";
175 };
176
177 i2c1: i2c@f0018000 {
178 compatible = "atmel,at91sam9x5-i2c";
179 reg = <0xf0018000 0x4000>;
180 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
181 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
182 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
183 dma-names = "tx", "rx";
184 pinctrl-names = "default", "gpio";
185 pinctrl-0 = <&pinctrl_i2c1>;
186 pinctrl-1 = <&pinctrl_i2c1_gpio>;
187 sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>;
188 scl-gpios = <&pioC 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
189 #address-cells = <1>;
190 #size-cells = <0>;
191 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
192 status = "disabled";
193 };
194
195 usart0: serial@f001c000 {
196 compatible = "atmel,at91sam9260-usart";
197 reg = <0xf001c000 0x100>;
198 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
199 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
200 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
201 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
202 dma-names = "tx", "rx";
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_usart0>;
205 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
206 clock-names = "usart";
207 status = "disabled";
208 };
209
210 usart1: serial@f0020000 {
211 compatible = "atmel,at91sam9260-usart";
212 reg = <0xf0020000 0x100>;
213 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
214 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
215 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
216 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
217 dma-names = "tx", "rx";
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_usart1>;
220 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
221 clock-names = "usart";
222 status = "disabled";
223 };
224
225 uart0: serial@f0024000 {
226 compatible = "atmel,at91sam9260-usart";
227 reg = <0xf0024000 0x100>;
228 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
229 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
230 pinctrl-names = "default";
231 pinctrl-0 = <&pinctrl_uart0>;
232 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
233 clock-names = "usart";
234 status = "disabled";
235 };
236
237 pwm0: pwm@f002c000 {
238 compatible = "atmel,sama5d3-pwm";
239 reg = <0xf002c000 0x300>;
240 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
241 #pwm-cells = <3>;
242 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
243 status = "disabled";
244 };
245
246 isi: isi@f0034000 {
247 compatible = "atmel,at91sam9g45-isi";
248 reg = <0xf0034000 0x4000>;
249 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&pinctrl_isi_data_0_7>;
252 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
253 clock-names = "isi_clk";
254 status = "disabled";
255 port {
256 #address-cells = <1>;
257 #size-cells = <0>;
258 };
259 };
260
261 sfr: sfr@f0038000 {
262 compatible = "atmel,sama5d3-sfr", "syscon";
263 reg = <0xf0038000 0x60>;
264 };
265
266 mmc1: mmc@f8000000 {
267 compatible = "atmel,hsmci";
268 reg = <0xf8000000 0x600>;
269 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
270 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
271 dma-names = "rxtx";
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
274 status = "disabled";
275 #address-cells = <1>;
276 #size-cells = <0>;
277 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
278 clock-names = "mci_clk";
279 };
280
281 spi1: spi@f8008000 {
282 #address-cells = <1>;
283 #size-cells = <0>;
284 compatible = "atmel,at91rm9200-spi";
285 reg = <0xf8008000 0x100>;
286 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
287 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
288 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
289 dma-names = "tx", "rx";
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_spi1>;
292 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
293 clock-names = "spi_clk";
294 status = "disabled";
295 };
296
297 ssc1: ssc@f800c000 {
298 compatible = "atmel,at91sam9g45-ssc";
299 reg = <0xf800c000 0x4000>;
300 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
301 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
302 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
303 dma-names = "tx", "rx";
304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
306 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
307 clock-names = "pclk";
308 status = "disabled";
309 };
310
311 adc0: adc@f8018000 {
312 compatible = "atmel,sama5d3-adc";
313 reg = <0xf8018000 0x100>;
314 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
315 pinctrl-names = "default";
316 pinctrl-0 = <
317 &pinctrl_adc0_adtrg
318 &pinctrl_adc0_ad0
319 &pinctrl_adc0_ad1
320 &pinctrl_adc0_ad2
321 &pinctrl_adc0_ad3
322 &pinctrl_adc0_ad4
323 &pinctrl_adc0_ad5
324 &pinctrl_adc0_ad6
325 &pinctrl_adc0_ad7
326 &pinctrl_adc0_ad8
327 &pinctrl_adc0_ad9
328 &pinctrl_adc0_ad10
329 &pinctrl_adc0_ad11
330 >;
331 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>,
332 <&adc_op_clk>;
333 clock-names = "adc_clk", "adc_op_clk";
334 atmel,adc-channels-used = <0xfff>;
335 atmel,adc-startup-time = <40>;
336 atmel,adc-use-external-triggers;
337 atmel,adc-vref = <3000>;
338 atmel,adc-sample-hold-time = <11>;
339 status = "disabled";
340 };
341
342 i2c2: i2c@f801c000 {
343 compatible = "atmel,at91sam9x5-i2c";
344 reg = <0xf801c000 0x4000>;
345 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
346 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
347 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
348 dma-names = "tx", "rx";
349 pinctrl-names = "default", "gpio";
350 pinctrl-0 = <&pinctrl_i2c2>;
351 pinctrl-1 = <&pinctrl_i2c2_gpio>;
352 sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>;
353 scl-gpios = <&pioA 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
354 #address-cells = <1>;
355 #size-cells = <0>;
356 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
357 status = "disabled";
358 };
359
360 usart2: serial@f8020000 {
361 compatible = "atmel,at91sam9260-usart";
362 reg = <0xf8020000 0x100>;
363 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
364 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
365 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
366 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
367 dma-names = "tx", "rx";
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_usart2>;
370 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
371 clock-names = "usart";
372 status = "disabled";
373 };
374
375 usart3: serial@f8024000 {
376 compatible = "atmel,at91sam9260-usart";
377 reg = <0xf8024000 0x100>;
378 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
379 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
380 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
381 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
382 dma-names = "tx", "rx";
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_usart3>;
385 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
386 clock-names = "usart";
387 status = "disabled";
388 };
389
390 sha: crypto@f8034000 {
391 compatible = "atmel,at91sam9g46-sha";
392 reg = <0xf8034000 0x100>;
393 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
394 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
395 dma-names = "tx";
396 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
397 clock-names = "sha_clk";
398 };
399
400 aes: crypto@f8038000 {
401 compatible = "atmel,at91sam9g46-aes";
402 reg = <0xf8038000 0x100>;
403 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
404 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
405 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
406 dma-names = "tx", "rx";
407 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
408 clock-names = "aes_clk";
409 };
410
411 tdes: crypto@f803c000 {
412 compatible = "atmel,at91sam9g46-tdes";
413 reg = <0xf803c000 0x100>;
414 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
415 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
416 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
417 dma-names = "tx", "rx";
418 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
419 clock-names = "tdes_clk";
420 };
421
422 trng@f8040000 {
423 compatible = "atmel,at91sam9g45-trng";
424 reg = <0xf8040000 0x100>;
425 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
426 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
427 };
428
429 hsmc: hsmc@ffffc000 {
430 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
431 reg = <0xffffc000 0x1000>;
432 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
433 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
434 #address-cells = <1>;
435 #size-cells = <1>;
436 ranges;
437
438 pmecc: ecc-engine@ffffc070 {
439 compatible = "atmel,at91sam9g45-pmecc";
440 reg = <0xffffc070 0x490>,
441 <0xffffc500 0x100>;
442 };
443 };
444
445 dma0: dma-controller@ffffe600 {
446 compatible = "atmel,at91sam9g45-dma";
447 reg = <0xffffe600 0x200>;
448 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
449 #dma-cells = <2>;
450 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
451 clock-names = "dma_clk";
452 };
453
454 dma1: dma-controller@ffffe800 {
455 compatible = "atmel,at91sam9g45-dma";
456 reg = <0xffffe800 0x200>;
457 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
458 #dma-cells = <2>;
459 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
460 clock-names = "dma_clk";
461 };
462
463 ramc0: ramc@ffffea00 {
464 compatible = "atmel,sama5d3-ddramc";
465 reg = <0xffffea00 0x200>;
466 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>;
467 clock-names = "ddrck", "mpddr";
468 };
469
470 dbgu: serial@ffffee00 {
471 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
472 reg = <0xffffee00 0x200>;
473 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
474 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
475 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
476 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
477 dma-names = "tx", "rx";
478 pinctrl-names = "default";
479 pinctrl-0 = <&pinctrl_dbgu>;
480 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
481 clock-names = "usart";
482 status = "disabled";
483 };
484
485 aic: interrupt-controller@fffff000 {
486 #interrupt-cells = <3>;
487 compatible = "atmel,sama5d3-aic";
488 interrupt-controller;
489 reg = <0xfffff000 0x200>;
490 atmel,external-irqs = <47>;
491 };
492
493 pinctrl: pinctrl@fffff200 {
494 #address-cells = <1>;
495 #size-cells = <1>;
496 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
497 ranges = <0xfffff200 0xfffff200 0xa00>;
498 atmel,mux-mask = <
499 /* A B C */
500 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
501 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
502 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
503 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
504 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
505 >;
506
507 /* shared pinctrl settings */
508 adc0 {
509 pinctrl_adc0_adtrg: adc0_adtrg {
510 atmel,pins =
511 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
512 };
513 pinctrl_adc0_ad0: adc0_ad0 {
514 atmel,pins =
515 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
516 };
517 pinctrl_adc0_ad1: adc0_ad1 {
518 atmel,pins =
519 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
520 };
521 pinctrl_adc0_ad2: adc0_ad2 {
522 atmel,pins =
523 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
524 };
525 pinctrl_adc0_ad3: adc0_ad3 {
526 atmel,pins =
527 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
528 };
529 pinctrl_adc0_ad4: adc0_ad4 {
530 atmel,pins =
531 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
532 };
533 pinctrl_adc0_ad5: adc0_ad5 {
534 atmel,pins =
535 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
536 };
537 pinctrl_adc0_ad6: adc0_ad6 {
538 atmel,pins =
539 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
540 };
541 pinctrl_adc0_ad7: adc0_ad7 {
542 atmel,pins =
543 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
544 };
545 pinctrl_adc0_ad8: adc0_ad8 {
546 atmel,pins =
547 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
548 };
549 pinctrl_adc0_ad9: adc0_ad9 {
550 atmel,pins =
551 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
552 };
553 pinctrl_adc0_ad10: adc0_ad10 {
554 atmel,pins =
555 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
556 };
557 pinctrl_adc0_ad11: adc0_ad11 {
558 atmel,pins =
559 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
560 };
561 };
562
563 dbgu {
564 pinctrl_dbgu: dbgu-0 {
565 atmel,pins =
566 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
567 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
568 };
569 };
570
571 ebi {
572 pinctrl_ebi_addr: ebi-addr-0 {
573 atmel,pins =
574 <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
575 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
576 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
577 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
578 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
579 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
580 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
581 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
582 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
583 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
584 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
585 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
586 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
587 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
588 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
589 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
590 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
591 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
592 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
593 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
594 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
595 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
596 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
597 };
598
599 pinctrl_ebi_nand_addr: ebi-addr-1 {
600 atmel,pins =
601 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
602 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
603 };
604
605 pinctrl_ebi_cs0: ebi-cs0-0 {
606 atmel,pins =
607 <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
608 };
609
610 pinctrl_ebi_cs1: ebi-cs1-0 {
611 atmel,pins =
612 <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
613 };
614
615 pinctrl_ebi_cs2: ebi-cs2-0 {
616 atmel,pins =
617 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
618 };
619
620 pinctrl_ebi_nwait: ebi-nwait-0 {
621 atmel,pins =
622 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
623 };
624
625 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
626 atmel,pins =
627 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
628 };
629 };
630
631 i2c0 {
632 pinctrl_i2c0: i2c0-0 {
633 atmel,pins =
634 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
635 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
636 };
637
638 pinctrl_i2c0_gpio: i2c0-gpio {
639 atmel,pins =
640 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
641 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
642 };
643 };
644
645 i2c1 {
646 pinctrl_i2c1: i2c1-0 {
647 atmel,pins =
648 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
649 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
650 };
651
652 pinctrl_i2c1_gpio: i2c1-gpio {
653 atmel,pins =
654 <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
655 AT91_PIOC 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
656 };
657 };
658
659 i2c2 {
660 pinctrl_i2c2: i2c2-0 {
661 atmel,pins =
662 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
663 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
664 };
665
666 pinctrl_i2c2_gpio: i2c2-gpio {
667 atmel,pins =
668 <AT91_PIOA 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
669 AT91_PIOA 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
670 };
671 };
672
673 isi {
674 pinctrl_isi_data_0_7: isi-0-data-0-7 {
675 atmel,pins =
676 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
677 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
678 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
679 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
680 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
681 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
682 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
683 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
684 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
685 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
686 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
687 };
688
689 pinctrl_isi_data_8_9: isi-0-data-8-9 {
690 atmel,pins =
691 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
692 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
693 };
694
695 pinctrl_isi_data_10_11: isi-0-data-10-11 {
696 atmel,pins =
697 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
698 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
699 };
700 };
701
702 mmc0 {
703 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
704 atmel,pins =
705 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
706 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
707 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
708 };
709 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
710 atmel,pins =
711 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
712 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
713 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
714 };
715 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
716 atmel,pins =
717 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
718 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
719 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conflicts with TCLK0, PWMH3 */
720 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
721 };
722 };
723
724 mmc1 {
725 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
726 atmel,pins =
727 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
728 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
729 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
730 };
731 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
732 atmel,pins =
733 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
734 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
735 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
736 };
737 };
738
739 nand0 {
740 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
741 atmel,pins =
742 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
743 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
744 };
745 };
746
747 pwm0 {
748 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
749 atmel,pins =
750 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
751 };
752 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
753 atmel,pins =
754 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
755 };
756 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
757 atmel,pins =
758 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
759 };
760 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
761 atmel,pins =
762 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
763 };
764
765 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
766 atmel,pins =
767 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
768 };
769 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
770 atmel,pins =
771 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
772 };
773 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
774 atmel,pins =
775 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
776 };
777 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
778 atmel,pins =
779 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
780 };
781 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
782 atmel,pins =
783 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
784 };
785 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
786 atmel,pins =
787 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
788 };
789
790 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
791 atmel,pins =
792 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
793 };
794 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
795 atmel,pins =
796 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
797 };
798 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
799 atmel,pins =
800 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
801 };
802 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
803 atmel,pins =
804 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
805 };
806
807 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
808 atmel,pins =
809 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
810 };
811 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
812 atmel,pins =
813 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
814 };
815 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
816 atmel,pins =
817 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
818 };
819 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
820 atmel,pins =
821 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
822 };
823 };
824
825 spi0 {
826 pinctrl_spi0: spi0-0 {
827 atmel,pins =
828 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
829 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
830 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
831 };
832 };
833
834 spi1 {
835 pinctrl_spi1: spi1-0 {
836 atmel,pins =
837 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
838 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
839 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
840 };
841 };
842
843 ssc0 {
844 pinctrl_ssc0_tx: ssc0_tx {
845 atmel,pins =
846 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
847 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
848 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
849 };
850
851 pinctrl_ssc0_rx: ssc0_rx {
852 atmel,pins =
853 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
854 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
855 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
856 };
857 };
858
859 ssc1 {
860 pinctrl_ssc1_tx: ssc1_tx {
861 atmel,pins =
862 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
863 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
864 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
865 };
866
867 pinctrl_ssc1_rx: ssc1_rx {
868 atmel,pins =
869 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
870 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
871 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
872 };
873 };
874
875 uart0 {
876 pinctrl_uart0: uart0-0 {
877 atmel,pins =
878 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */
879 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
880 };
881 };
882
883 uart1 {
884 pinctrl_uart1: uart1-0 {
885 atmel,pins =
886 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */
887 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
888 };
889 };
890
891 usart0 {
892 pinctrl_usart0: usart0-0 {
893 atmel,pins =
894 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
895 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
896 };
897
898 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
899 atmel,pins =
900 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
901 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
902 };
903 };
904
905 usart1 {
906 pinctrl_usart1: usart1-0 {
907 atmel,pins =
908 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
909 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
910 };
911
912 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
913 atmel,pins =
914 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
915 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
916 };
917 };
918
919 usart2 {
920 pinctrl_usart2: usart2-0 {
921 atmel,pins =
922 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */
923 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */
924 };
925
926 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
927 atmel,pins =
928 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
929 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
930 };
931 };
932
933 usart3 {
934 pinctrl_usart3: usart3-0 {
935 atmel,pins =
936 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */
937 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */
938 };
939
940 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
941 atmel,pins =
942 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
943 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
944 };
945 };
946
947
948 pioA: gpio@fffff200 {
949 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
950 reg = <0xfffff200 0x100>;
951 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
952 #gpio-cells = <2>;
953 gpio-controller;
954 interrupt-controller;
955 #interrupt-cells = <2>;
956 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
957 };
958
959 pioB: gpio@fffff400 {
960 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
961 reg = <0xfffff400 0x100>;
962 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
963 #gpio-cells = <2>;
964 gpio-controller;
965 interrupt-controller;
966 #interrupt-cells = <2>;
967 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
968 };
969
970 pioC: gpio@fffff600 {
971 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
972 reg = <0xfffff600 0x100>;
973 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
974 #gpio-cells = <2>;
975 gpio-controller;
976 interrupt-controller;
977 #interrupt-cells = <2>;
978 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
979 };
980
981 pioD: gpio@fffff800 {
982 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
983 reg = <0xfffff800 0x100>;
984 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
985 #gpio-cells = <2>;
986 gpio-controller;
987 interrupt-controller;
988 #interrupt-cells = <2>;
989 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
990 };
991
992 pioE: gpio@fffffa00 {
993 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
994 reg = <0xfffffa00 0x100>;
995 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
996 #gpio-cells = <2>;
997 gpio-controller;
998 interrupt-controller;
999 #interrupt-cells = <2>;
1000 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
1001 };
1002 };
1003
1004 pmc: pmc@fffffc00 {
1005 compatible = "atmel,sama5d3-pmc", "syscon";
1006 reg = <0xfffffc00 0x120>;
1007 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1008 #clock-cells = <2>;
1009 clocks = <&clk32k>, <&main_xtal>;
1010 clock-names = "slow_clk", "main_xtal";
1011 };
1012
1013 reset_controller: reset-controller@fffffe00 {
1014 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1015 reg = <0xfffffe00 0x10>;
1016 clocks = <&clk32k>;
1017 };
1018
1019 shutdown_controller: shutdown-controller@fffffe10 {
1020 compatible = "atmel,at91sam9x5-shdwc";
1021 reg = <0xfffffe10 0x10>;
1022 clocks = <&clk32k>;
1023 };
1024
1025 pit: timer@fffffe30 {
1026 compatible = "atmel,at91sam9260-pit";
1027 reg = <0xfffffe30 0xf>;
1028 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1029 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
1030 };
1031
1032 watchdog: watchdog@fffffe40 {
1033 compatible = "atmel,at91sam9260-wdt";
1034 reg = <0xfffffe40 0x10>;
1035 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1036 clocks = <&clk32k>;
1037 atmel,watchdog-type = "hardware";
1038 atmel,reset-type = "all";
1039 atmel,dbg-halt;
1040 status = "disabled";
1041 };
1042
1043 clk32k: sckc@fffffe50 {
1044 compatible = "atmel,sama5d3-sckc";
1045 reg = <0xfffffe50 0x4>;
1046 clocks = <&slow_xtal>;
1047 #clock-cells = <0>;
1048 };
1049
1050 rtc@fffffeb0 {
1051 compatible = "atmel,at91rm9200-rtc";
1052 reg = <0xfffffeb0 0x30>;
1053 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1054 clocks = <&clk32k>;
1055 };
1056 };
1057
1058 nfc_sram: sram@200000 {
1059 compatible = "mmio-sram";
1060 no-memory-wc;
1061 reg = <0x200000 0x2400>;
1062 #address-cells = <1>;
1063 #size-cells = <1>;
1064 ranges = <0 0x200000 0x2400>;
1065 };
1066
1067 usb0: gadget@500000 {
1068 compatible = "atmel,sama5d3-udc";
1069 reg = <0x00500000 0x100000
1070 0xf8030000 0x4000>;
1071 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1072 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
1073 clock-names = "pclk", "hclk";
1074 status = "disabled";
1075 };
1076
1077 usb1: ohci@600000 {
1078 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1079 reg = <0x00600000 0x100000>;
1080 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1081 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_SYSTEM 6>;
1082 clock-names = "ohci_clk", "hclk", "uhpck";
1083 status = "disabled";
1084 };
1085
1086 usb2: ehci@700000 {
1087 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1088 reg = <0x00700000 0x100000>;
1089 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1090 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>;
1091 clock-names = "usb_clk", "ehci_clk";
1092 status = "disabled";
1093 };
1094
1095 ebi: ebi@10000000 {
1096 compatible = "atmel,sama5d3-ebi";
1097 #address-cells = <2>;
1098 #size-cells = <1>;
1099 atmel,smc = <&hsmc>;
1100 reg = <0x10000000 0x10000000
1101 0x40000000 0x30000000>;
1102 ranges = <0x0 0x0 0x10000000 0x10000000
1103 0x1 0x0 0x40000000 0x10000000
1104 0x2 0x0 0x50000000 0x10000000
1105 0x3 0x0 0x60000000 0x10000000>;
1106 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
1107 status = "disabled";
1108
1109 nand_controller: nand-controller {
1110 compatible = "atmel,sama5d3-nand-controller";
1111 atmel,nfc-sram = <&nfc_sram>;
1112 atmel,nfc-io = <&nfc_io>;
1113 ecc-engine = <&pmecc>;
1114 #address-cells = <2>;
1115 #size-cells = <1>;
1116 ranges;
1117 status = "disabled";
1118 };
1119 };
1120
1121 nfc_io: nfc-io@70000000 {
1122 compatible = "atmel,sama5d3-nfc-io", "syscon";
1123 reg = <0x70000000 0x8000000>;
1124 };
1125 };
1126};
1/*
2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
4 *
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11#include "skeleton.dtsi"
12#include <dt-bindings/dma/at91.h>
13#include <dt-bindings/pinctrl/at91.h>
14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/gpio/gpio.h>
16#include <dt-bindings/clock/at91.h>
17
18/ {
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 serial4 = &usart3;
29 serial5 = &uart0;
30 gpio0 = &pioA;
31 gpio1 = &pioB;
32 gpio2 = &pioC;
33 gpio3 = &pioD;
34 gpio4 = &pioE;
35 tcb0 = &tcb0;
36 i2c0 = &i2c0;
37 i2c1 = &i2c1;
38 i2c2 = &i2c2;
39 ssc0 = &ssc0;
40 ssc1 = &ssc1;
41 pwm0 = &pwm0;
42 };
43 cpus {
44 #address-cells = <1>;
45 #size-cells = <0>;
46 cpu@0 {
47 device_type = "cpu";
48 compatible = "arm,cortex-a5";
49 reg = <0x0>;
50 };
51 };
52
53 pmu {
54 compatible = "arm,cortex-a5-pmu";
55 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
56 };
57
58 memory {
59 reg = <0x20000000 0x8000000>;
60 };
61
62 clocks {
63 slow_xtal: slow_xtal {
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
66 clock-frequency = <0>;
67 };
68
69 main_xtal: main_xtal {
70 compatible = "fixed-clock";
71 #clock-cells = <0>;
72 clock-frequency = <0>;
73 };
74
75 adc_op_clk: adc_op_clk{
76 compatible = "fixed-clock";
77 #clock-cells = <0>;
78 clock-frequency = <1000000>;
79 };
80 };
81
82 sram: sram@00300000 {
83 compatible = "mmio-sram";
84 reg = <0x00300000 0x20000>;
85 };
86
87 ahb {
88 compatible = "simple-bus";
89 #address-cells = <1>;
90 #size-cells = <1>;
91 ranges;
92
93 apb {
94 compatible = "simple-bus";
95 #address-cells = <1>;
96 #size-cells = <1>;
97 ranges;
98
99 mmc0: mmc@f0000000 {
100 compatible = "atmel,hsmci";
101 reg = <0xf0000000 0x600>;
102 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
103 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
104 dma-names = "rxtx";
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
107 status = "disabled";
108 #address-cells = <1>;
109 #size-cells = <0>;
110 clocks = <&mci0_clk>;
111 clock-names = "mci_clk";
112 };
113
114 spi0: spi@f0004000 {
115 #address-cells = <1>;
116 #size-cells = <0>;
117 compatible = "atmel,at91rm9200-spi";
118 reg = <0xf0004000 0x100>;
119 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
120 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
121 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
122 dma-names = "tx", "rx";
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_spi0>;
125 clocks = <&spi0_clk>;
126 clock-names = "spi_clk";
127 status = "disabled";
128 };
129
130 ssc0: ssc@f0008000 {
131 compatible = "atmel,at91sam9g45-ssc";
132 reg = <0xf0008000 0x4000>;
133 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
134 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
135 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
136 dma-names = "tx", "rx";
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
139 clocks = <&ssc0_clk>;
140 clock-names = "pclk";
141 status = "disabled";
142 };
143
144 tcb0: timer@f0010000 {
145 compatible = "atmel,at91sam9x5-tcb";
146 reg = <0xf0010000 0x100>;
147 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
148 clocks = <&tcb0_clk>, <&clk32k>;
149 clock-names = "t0_clk", "slow_clk";
150 };
151
152 i2c0: i2c@f0014000 {
153 compatible = "atmel,at91sam9x5-i2c";
154 reg = <0xf0014000 0x4000>;
155 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
156 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
157 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
158 dma-names = "tx", "rx";
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_i2c0>;
161 #address-cells = <1>;
162 #size-cells = <0>;
163 clocks = <&twi0_clk>;
164 status = "disabled";
165 };
166
167 i2c1: i2c@f0018000 {
168 compatible = "atmel,at91sam9x5-i2c";
169 reg = <0xf0018000 0x4000>;
170 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
171 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
172 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
173 dma-names = "tx", "rx";
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_i2c1>;
176 #address-cells = <1>;
177 #size-cells = <0>;
178 clocks = <&twi1_clk>;
179 status = "disabled";
180 };
181
182 usart0: serial@f001c000 {
183 compatible = "atmel,at91sam9260-usart";
184 reg = <0xf001c000 0x100>;
185 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
186 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
187 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
188 dma-names = "tx", "rx";
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_usart0>;
191 clocks = <&usart0_clk>;
192 clock-names = "usart";
193 status = "disabled";
194 };
195
196 usart1: serial@f0020000 {
197 compatible = "atmel,at91sam9260-usart";
198 reg = <0xf0020000 0x100>;
199 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
200 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
201 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
202 dma-names = "tx", "rx";
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_usart1>;
205 clocks = <&usart1_clk>;
206 clock-names = "usart";
207 status = "disabled";
208 };
209
210 uart0: serial@f0024000 {
211 compatible = "atmel,at91sam9260-usart";
212 reg = <0xf0024000 0x100>;
213 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_uart0>;
216 clocks = <&uart0_clk>;
217 clock-names = "usart";
218 status = "disabled";
219 };
220
221 pwm0: pwm@f002c000 {
222 compatible = "atmel,sama5d3-pwm";
223 reg = <0xf002c000 0x300>;
224 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
225 #pwm-cells = <3>;
226 clocks = <&pwm_clk>;
227 status = "disabled";
228 };
229
230 isi: isi@f0034000 {
231 compatible = "atmel,at91sam9g45-isi";
232 reg = <0xf0034000 0x4000>;
233 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_isi_data_0_7>;
236 clocks = <&isi_clk>;
237 clock-names = "isi_clk";
238 status = "disabled";
239 port {
240 #address-cells = <1>;
241 #size-cells = <0>;
242 };
243 };
244
245 sfr: sfr@f0038000 {
246 compatible = "atmel,sama5d3-sfr", "syscon";
247 reg = <0xf0038000 0x60>;
248 };
249
250 mmc1: mmc@f8000000 {
251 compatible = "atmel,hsmci";
252 reg = <0xf8000000 0x600>;
253 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
254 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
255 dma-names = "rxtx";
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
258 status = "disabled";
259 #address-cells = <1>;
260 #size-cells = <0>;
261 clocks = <&mci1_clk>;
262 clock-names = "mci_clk";
263 };
264
265 spi1: spi@f8008000 {
266 #address-cells = <1>;
267 #size-cells = <0>;
268 compatible = "atmel,at91rm9200-spi";
269 reg = <0xf8008000 0x100>;
270 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
271 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
272 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
273 dma-names = "tx", "rx";
274 pinctrl-names = "default";
275 pinctrl-0 = <&pinctrl_spi1>;
276 clocks = <&spi1_clk>;
277 clock-names = "spi_clk";
278 status = "disabled";
279 };
280
281 ssc1: ssc@f800c000 {
282 compatible = "atmel,at91sam9g45-ssc";
283 reg = <0xf800c000 0x4000>;
284 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
285 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
286 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
287 dma-names = "tx", "rx";
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
290 clocks = <&ssc1_clk>;
291 clock-names = "pclk";
292 status = "disabled";
293 };
294
295 adc0: adc@f8018000 {
296 #address-cells = <1>;
297 #size-cells = <0>;
298 compatible = "atmel,at91sam9x5-adc";
299 reg = <0xf8018000 0x100>;
300 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
301 pinctrl-names = "default";
302 pinctrl-0 = <
303 &pinctrl_adc0_adtrg
304 &pinctrl_adc0_ad0
305 &pinctrl_adc0_ad1
306 &pinctrl_adc0_ad2
307 &pinctrl_adc0_ad3
308 &pinctrl_adc0_ad4
309 &pinctrl_adc0_ad5
310 &pinctrl_adc0_ad6
311 &pinctrl_adc0_ad7
312 &pinctrl_adc0_ad8
313 &pinctrl_adc0_ad9
314 &pinctrl_adc0_ad10
315 &pinctrl_adc0_ad11
316 >;
317 clocks = <&adc_clk>,
318 <&adc_op_clk>;
319 clock-names = "adc_clk", "adc_op_clk";
320 atmel,adc-channels-used = <0xfff>;
321 atmel,adc-startup-time = <40>;
322 atmel,adc-use-external-triggers;
323 atmel,adc-vref = <3000>;
324 atmel,adc-res = <10 12>;
325 atmel,adc-sample-hold-time = <11>;
326 atmel,adc-res-names = "lowres", "highres";
327 status = "disabled";
328
329 trigger@0 {
330 reg = <0>;
331 trigger-name = "external-rising";
332 trigger-value = <0x1>;
333 trigger-external;
334 };
335 trigger@1 {
336 reg = <1>;
337 trigger-name = "external-falling";
338 trigger-value = <0x2>;
339 trigger-external;
340 };
341 trigger@2 {
342 reg = <2>;
343 trigger-name = "external-any";
344 trigger-value = <0x3>;
345 trigger-external;
346 };
347 trigger@3 {
348 reg = <3>;
349 trigger-name = "continuous";
350 trigger-value = <0x6>;
351 };
352 };
353
354 i2c2: i2c@f801c000 {
355 compatible = "atmel,at91sam9x5-i2c";
356 reg = <0xf801c000 0x4000>;
357 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
358 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
359 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
360 dma-names = "tx", "rx";
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_i2c2>;
363 #address-cells = <1>;
364 #size-cells = <0>;
365 clocks = <&twi2_clk>;
366 status = "disabled";
367 };
368
369 usart2: serial@f8020000 {
370 compatible = "atmel,at91sam9260-usart";
371 reg = <0xf8020000 0x100>;
372 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
373 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
374 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
375 dma-names = "tx", "rx";
376 pinctrl-names = "default";
377 pinctrl-0 = <&pinctrl_usart2>;
378 clocks = <&usart2_clk>;
379 clock-names = "usart";
380 status = "disabled";
381 };
382
383 usart3: serial@f8024000 {
384 compatible = "atmel,at91sam9260-usart";
385 reg = <0xf8024000 0x100>;
386 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
387 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
388 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
389 dma-names = "tx", "rx";
390 pinctrl-names = "default";
391 pinctrl-0 = <&pinctrl_usart3>;
392 clocks = <&usart3_clk>;
393 clock-names = "usart";
394 status = "disabled";
395 };
396
397 sha@f8034000 {
398 compatible = "atmel,at91sam9g46-sha";
399 reg = <0xf8034000 0x100>;
400 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
401 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
402 dma-names = "tx";
403 clocks = <&sha_clk>;
404 clock-names = "sha_clk";
405 };
406
407 aes@f8038000 {
408 compatible = "atmel,at91sam9g46-aes";
409 reg = <0xf8038000 0x100>;
410 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
411 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
412 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
413 dma-names = "tx", "rx";
414 clocks = <&aes_clk>;
415 clock-names = "aes_clk";
416 };
417
418 tdes@f803c000 {
419 compatible = "atmel,at91sam9g46-tdes";
420 reg = <0xf803c000 0x100>;
421 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
422 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
423 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
424 dma-names = "tx", "rx";
425 clocks = <&tdes_clk>;
426 clock-names = "tdes_clk";
427 };
428
429 dma0: dma-controller@ffffe600 {
430 compatible = "atmel,at91sam9g45-dma";
431 reg = <0xffffe600 0x200>;
432 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
433 #dma-cells = <2>;
434 clocks = <&dma0_clk>;
435 clock-names = "dma_clk";
436 };
437
438 dma1: dma-controller@ffffe800 {
439 compatible = "atmel,at91sam9g45-dma";
440 reg = <0xffffe800 0x200>;
441 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
442 #dma-cells = <2>;
443 clocks = <&dma1_clk>;
444 clock-names = "dma_clk";
445 };
446
447 ramc0: ramc@ffffea00 {
448 compatible = "atmel,sama5d3-ddramc";
449 reg = <0xffffea00 0x200>;
450 clocks = <&ddrck>, <&mpddr_clk>;
451 clock-names = "ddrck", "mpddr";
452 };
453
454 dbgu: serial@ffffee00 {
455 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
456 reg = <0xffffee00 0x200>;
457 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
458 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
459 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
460 dma-names = "tx", "rx";
461 pinctrl-names = "default";
462 pinctrl-0 = <&pinctrl_dbgu>;
463 clocks = <&dbgu_clk>;
464 clock-names = "usart";
465 status = "disabled";
466 };
467
468 aic: interrupt-controller@fffff000 {
469 #interrupt-cells = <3>;
470 compatible = "atmel,sama5d3-aic";
471 interrupt-controller;
472 reg = <0xfffff000 0x200>;
473 atmel,external-irqs = <47>;
474 };
475
476 pinctrl@fffff200 {
477 #address-cells = <1>;
478 #size-cells = <1>;
479 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
480 ranges = <0xfffff200 0xfffff200 0xa00>;
481 atmel,mux-mask = <
482 /* A B C */
483 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
484 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
485 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
486 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
487 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
488 >;
489
490 /* shared pinctrl settings */
491 adc0 {
492 pinctrl_adc0_adtrg: adc0_adtrg {
493 atmel,pins =
494 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
495 };
496 pinctrl_adc0_ad0: adc0_ad0 {
497 atmel,pins =
498 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
499 };
500 pinctrl_adc0_ad1: adc0_ad1 {
501 atmel,pins =
502 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
503 };
504 pinctrl_adc0_ad2: adc0_ad2 {
505 atmel,pins =
506 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
507 };
508 pinctrl_adc0_ad3: adc0_ad3 {
509 atmel,pins =
510 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
511 };
512 pinctrl_adc0_ad4: adc0_ad4 {
513 atmel,pins =
514 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
515 };
516 pinctrl_adc0_ad5: adc0_ad5 {
517 atmel,pins =
518 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
519 };
520 pinctrl_adc0_ad6: adc0_ad6 {
521 atmel,pins =
522 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
523 };
524 pinctrl_adc0_ad7: adc0_ad7 {
525 atmel,pins =
526 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
527 };
528 pinctrl_adc0_ad8: adc0_ad8 {
529 atmel,pins =
530 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
531 };
532 pinctrl_adc0_ad9: adc0_ad9 {
533 atmel,pins =
534 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
535 };
536 pinctrl_adc0_ad10: adc0_ad10 {
537 atmel,pins =
538 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
539 };
540 pinctrl_adc0_ad11: adc0_ad11 {
541 atmel,pins =
542 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
543 };
544 };
545
546 dbgu {
547 pinctrl_dbgu: dbgu-0 {
548 atmel,pins =
549 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
550 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
551 };
552 };
553
554 i2c0 {
555 pinctrl_i2c0: i2c0-0 {
556 atmel,pins =
557 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
558 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
559 };
560 };
561
562 i2c1 {
563 pinctrl_i2c1: i2c1-0 {
564 atmel,pins =
565 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
566 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
567 };
568 };
569
570 i2c2 {
571 pinctrl_i2c2: i2c2-0 {
572 atmel,pins =
573 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
574 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
575 };
576 };
577
578 isi {
579 pinctrl_isi_data_0_7: isi-0-data-0-7 {
580 atmel,pins =
581 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
582 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
583 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
584 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
585 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
586 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
587 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
588 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
589 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
590 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
591 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
592 };
593
594 pinctrl_isi_data_8_9: isi-0-data-8-9 {
595 atmel,pins =
596 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
597 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
598 };
599
600 pinctrl_isi_data_10_11: isi-0-data-10-11 {
601 atmel,pins =
602 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
603 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
604 };
605 };
606
607 mmc0 {
608 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
609 atmel,pins =
610 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
611 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
612 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
613 };
614 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
615 atmel,pins =
616 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
617 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
618 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
619 };
620 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
621 atmel,pins =
622 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
623 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
624 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
625 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
626 };
627 };
628
629 mmc1 {
630 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
631 atmel,pins =
632 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
633 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
634 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
635 };
636 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
637 atmel,pins =
638 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
639 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
640 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
641 };
642 };
643
644 nand0 {
645 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
646 atmel,pins =
647 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
648 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
649 };
650 };
651
652 pwm0 {
653 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
654 atmel,pins =
655 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
656 };
657 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
658 atmel,pins =
659 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
660 };
661 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
662 atmel,pins =
663 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
664 };
665 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
666 atmel,pins =
667 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
668 };
669
670 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
671 atmel,pins =
672 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
673 };
674 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
675 atmel,pins =
676 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
677 };
678 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
679 atmel,pins =
680 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
681 };
682 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
683 atmel,pins =
684 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
685 };
686 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
687 atmel,pins =
688 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
689 };
690 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
691 atmel,pins =
692 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
693 };
694
695 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
696 atmel,pins =
697 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
698 };
699 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
700 atmel,pins =
701 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
702 };
703 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
704 atmel,pins =
705 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
706 };
707 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
708 atmel,pins =
709 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
710 };
711
712 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
713 atmel,pins =
714 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
715 };
716 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
717 atmel,pins =
718 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
719 };
720 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
721 atmel,pins =
722 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
723 };
724 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
725 atmel,pins =
726 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
727 };
728 };
729
730 spi0 {
731 pinctrl_spi0: spi0-0 {
732 atmel,pins =
733 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
734 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
735 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
736 };
737 };
738
739 spi1 {
740 pinctrl_spi1: spi1-0 {
741 atmel,pins =
742 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
743 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
744 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
745 };
746 };
747
748 ssc0 {
749 pinctrl_ssc0_tx: ssc0_tx {
750 atmel,pins =
751 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
752 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
753 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
754 };
755
756 pinctrl_ssc0_rx: ssc0_rx {
757 atmel,pins =
758 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
759 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
760 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
761 };
762 };
763
764 ssc1 {
765 pinctrl_ssc1_tx: ssc1_tx {
766 atmel,pins =
767 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
768 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
769 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
770 };
771
772 pinctrl_ssc1_rx: ssc1_rx {
773 atmel,pins =
774 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
775 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
776 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
777 };
778 };
779
780 uart0 {
781 pinctrl_uart0: uart0-0 {
782 atmel,pins =
783 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* conflicts with PWMFI2, ISI_D8 */
784 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* conflicts with ISI_PCK */
785 };
786 };
787
788 uart1 {
789 pinctrl_uart1: uart1-0 {
790 atmel,pins =
791 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* conflicts with TWD0, ISI_VSYNC */
792 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* conflicts with TWCK0, ISI_HSYNC */
793 };
794 };
795
796 usart0 {
797 pinctrl_usart0: usart0-0 {
798 atmel,pins =
799 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
800 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
801 };
802
803 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
804 atmel,pins =
805 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
806 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
807 };
808 };
809
810 usart1 {
811 pinctrl_usart1: usart1-0 {
812 atmel,pins =
813 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
814 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
815 };
816
817 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
818 atmel,pins =
819 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
820 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
821 };
822 };
823
824 usart2 {
825 pinctrl_usart2: usart2-0 {
826 atmel,pins =
827 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
828 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
829 };
830
831 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
832 atmel,pins =
833 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
834 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
835 };
836 };
837
838 usart3 {
839 pinctrl_usart3: usart3-0 {
840 atmel,pins =
841 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
842 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
843 };
844
845 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
846 atmel,pins =
847 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
848 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
849 };
850 };
851
852
853 pioA: gpio@fffff200 {
854 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
855 reg = <0xfffff200 0x100>;
856 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
857 #gpio-cells = <2>;
858 gpio-controller;
859 interrupt-controller;
860 #interrupt-cells = <2>;
861 clocks = <&pioA_clk>;
862 };
863
864 pioB: gpio@fffff400 {
865 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
866 reg = <0xfffff400 0x100>;
867 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
868 #gpio-cells = <2>;
869 gpio-controller;
870 interrupt-controller;
871 #interrupt-cells = <2>;
872 clocks = <&pioB_clk>;
873 };
874
875 pioC: gpio@fffff600 {
876 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
877 reg = <0xfffff600 0x100>;
878 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
879 #gpio-cells = <2>;
880 gpio-controller;
881 interrupt-controller;
882 #interrupt-cells = <2>;
883 clocks = <&pioC_clk>;
884 };
885
886 pioD: gpio@fffff800 {
887 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
888 reg = <0xfffff800 0x100>;
889 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
890 #gpio-cells = <2>;
891 gpio-controller;
892 interrupt-controller;
893 #interrupt-cells = <2>;
894 clocks = <&pioD_clk>;
895 };
896
897 pioE: gpio@fffffa00 {
898 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
899 reg = <0xfffffa00 0x100>;
900 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
901 #gpio-cells = <2>;
902 gpio-controller;
903 interrupt-controller;
904 #interrupt-cells = <2>;
905 clocks = <&pioE_clk>;
906 };
907 };
908
909 pmc: pmc@fffffc00 {
910 compatible = "atmel,sama5d3-pmc", "syscon";
911 reg = <0xfffffc00 0x120>;
912 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
913 interrupt-controller;
914 #address-cells = <1>;
915 #size-cells = <0>;
916 #interrupt-cells = <1>;
917
918 main_rc_osc: main_rc_osc {
919 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
920 #clock-cells = <0>;
921 interrupt-parent = <&pmc>;
922 interrupts = <AT91_PMC_MOSCRCS>;
923 clock-frequency = <12000000>;
924 clock-accuracy = <50000000>;
925 };
926
927 main_osc: main_osc {
928 compatible = "atmel,at91rm9200-clk-main-osc";
929 #clock-cells = <0>;
930 interrupt-parent = <&pmc>;
931 interrupts = <AT91_PMC_MOSCS>;
932 clocks = <&main_xtal>;
933 };
934
935 main: mainck {
936 compatible = "atmel,at91sam9x5-clk-main";
937 #clock-cells = <0>;
938 interrupt-parent = <&pmc>;
939 interrupts = <AT91_PMC_MOSCSELS>;
940 clocks = <&main_rc_osc &main_osc>;
941 };
942
943 plla: pllack {
944 compatible = "atmel,sama5d3-clk-pll";
945 #clock-cells = <0>;
946 interrupt-parent = <&pmc>;
947 interrupts = <AT91_PMC_LOCKA>;
948 clocks = <&main>;
949 reg = <0>;
950 atmel,clk-input-range = <8000000 50000000>;
951 #atmel,pll-clk-output-range-cells = <4>;
952 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
953 };
954
955 plladiv: plladivck {
956 compatible = "atmel,at91sam9x5-clk-plldiv";
957 #clock-cells = <0>;
958 clocks = <&plla>;
959 };
960
961 utmi: utmick {
962 compatible = "atmel,at91sam9x5-clk-utmi";
963 #clock-cells = <0>;
964 interrupt-parent = <&pmc>;
965 interrupts = <AT91_PMC_LOCKU>;
966 clocks = <&main>;
967 };
968
969 mck: masterck {
970 compatible = "atmel,at91sam9x5-clk-master";
971 #clock-cells = <0>;
972 interrupt-parent = <&pmc>;
973 interrupts = <AT91_PMC_MCKRDY>;
974 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
975 atmel,clk-output-range = <0 166000000>;
976 atmel,clk-divisors = <1 2 4 3>;
977 };
978
979 usb: usbck {
980 compatible = "atmel,at91sam9x5-clk-usb";
981 #clock-cells = <0>;
982 clocks = <&plladiv>, <&utmi>;
983 };
984
985 prog: progck {
986 compatible = "atmel,at91sam9x5-clk-programmable";
987 #address-cells = <1>;
988 #size-cells = <0>;
989 interrupt-parent = <&pmc>;
990 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
991
992 prog0: prog0 {
993 #clock-cells = <0>;
994 reg = <0>;
995 interrupts = <AT91_PMC_PCKRDY(0)>;
996 };
997
998 prog1: prog1 {
999 #clock-cells = <0>;
1000 reg = <1>;
1001 interrupts = <AT91_PMC_PCKRDY(1)>;
1002 };
1003
1004 prog2: prog2 {
1005 #clock-cells = <0>;
1006 reg = <2>;
1007 interrupts = <AT91_PMC_PCKRDY(2)>;
1008 };
1009 };
1010
1011 smd: smdclk {
1012 compatible = "atmel,at91sam9x5-clk-smd";
1013 #clock-cells = <0>;
1014 clocks = <&plladiv>, <&utmi>;
1015 };
1016
1017 systemck {
1018 compatible = "atmel,at91rm9200-clk-system";
1019 #address-cells = <1>;
1020 #size-cells = <0>;
1021
1022 ddrck: ddrck {
1023 #clock-cells = <0>;
1024 reg = <2>;
1025 clocks = <&mck>;
1026 };
1027
1028 smdck: smdck {
1029 #clock-cells = <0>;
1030 reg = <4>;
1031 clocks = <&smd>;
1032 };
1033
1034 uhpck: uhpck {
1035 #clock-cells = <0>;
1036 reg = <6>;
1037 clocks = <&usb>;
1038 };
1039
1040 udpck: udpck {
1041 #clock-cells = <0>;
1042 reg = <7>;
1043 clocks = <&usb>;
1044 };
1045
1046 pck0: pck0 {
1047 #clock-cells = <0>;
1048 reg = <8>;
1049 clocks = <&prog0>;
1050 };
1051
1052 pck1: pck1 {
1053 #clock-cells = <0>;
1054 reg = <9>;
1055 clocks = <&prog1>;
1056 };
1057
1058 pck2: pck2 {
1059 #clock-cells = <0>;
1060 reg = <10>;
1061 clocks = <&prog2>;
1062 };
1063 };
1064
1065 periphck {
1066 compatible = "atmel,at91sam9x5-clk-peripheral";
1067 #address-cells = <1>;
1068 #size-cells = <0>;
1069 clocks = <&mck>;
1070
1071 dbgu_clk: dbgu_clk {
1072 #clock-cells = <0>;
1073 reg = <2>;
1074 };
1075
1076 hsmc_clk: hsmc_clk {
1077 #clock-cells = <0>;
1078 reg = <5>;
1079 };
1080
1081 pioA_clk: pioA_clk {
1082 #clock-cells = <0>;
1083 reg = <6>;
1084 };
1085
1086 pioB_clk: pioB_clk {
1087 #clock-cells = <0>;
1088 reg = <7>;
1089 };
1090
1091 pioC_clk: pioC_clk {
1092 #clock-cells = <0>;
1093 reg = <8>;
1094 };
1095
1096 pioD_clk: pioD_clk {
1097 #clock-cells = <0>;
1098 reg = <9>;
1099 };
1100
1101 pioE_clk: pioE_clk {
1102 #clock-cells = <0>;
1103 reg = <10>;
1104 };
1105
1106 usart0_clk: usart0_clk {
1107 #clock-cells = <0>;
1108 reg = <12>;
1109 atmel,clk-output-range = <0 66000000>;
1110 };
1111
1112 usart1_clk: usart1_clk {
1113 #clock-cells = <0>;
1114 reg = <13>;
1115 atmel,clk-output-range = <0 66000000>;
1116 };
1117
1118 usart2_clk: usart2_clk {
1119 #clock-cells = <0>;
1120 reg = <14>;
1121 atmel,clk-output-range = <0 66000000>;
1122 };
1123
1124 usart3_clk: usart3_clk {
1125 #clock-cells = <0>;
1126 reg = <15>;
1127 atmel,clk-output-range = <0 66000000>;
1128 };
1129
1130 uart0_clk: uart0_clk {
1131 #clock-cells = <0>;
1132 reg = <16>;
1133 atmel,clk-output-range = <0 66000000>;
1134 };
1135
1136 twi0_clk: twi0_clk {
1137 reg = <18>;
1138 #clock-cells = <0>;
1139 atmel,clk-output-range = <0 16625000>;
1140 };
1141
1142 twi1_clk: twi1_clk {
1143 #clock-cells = <0>;
1144 reg = <19>;
1145 atmel,clk-output-range = <0 16625000>;
1146 };
1147
1148 twi2_clk: twi2_clk {
1149 #clock-cells = <0>;
1150 reg = <20>;
1151 atmel,clk-output-range = <0 16625000>;
1152 };
1153
1154 mci0_clk: mci0_clk {
1155 #clock-cells = <0>;
1156 reg = <21>;
1157 };
1158
1159 mci1_clk: mci1_clk {
1160 #clock-cells = <0>;
1161 reg = <22>;
1162 };
1163
1164 spi0_clk: spi0_clk {
1165 #clock-cells = <0>;
1166 reg = <24>;
1167 atmel,clk-output-range = <0 133000000>;
1168 };
1169
1170 spi1_clk: spi1_clk {
1171 #clock-cells = <0>;
1172 reg = <25>;
1173 atmel,clk-output-range = <0 133000000>;
1174 };
1175
1176 tcb0_clk: tcb0_clk {
1177 #clock-cells = <0>;
1178 reg = <26>;
1179 atmel,clk-output-range = <0 133000000>;
1180 };
1181
1182 pwm_clk: pwm_clk {
1183 #clock-cells = <0>;
1184 reg = <28>;
1185 };
1186
1187 adc_clk: adc_clk {
1188 #clock-cells = <0>;
1189 reg = <29>;
1190 atmel,clk-output-range = <0 66000000>;
1191 };
1192
1193 dma0_clk: dma0_clk {
1194 #clock-cells = <0>;
1195 reg = <30>;
1196 };
1197
1198 dma1_clk: dma1_clk {
1199 #clock-cells = <0>;
1200 reg = <31>;
1201 };
1202
1203 uhphs_clk: uhphs_clk {
1204 #clock-cells = <0>;
1205 reg = <32>;
1206 };
1207
1208 udphs_clk: udphs_clk {
1209 #clock-cells = <0>;
1210 reg = <33>;
1211 };
1212
1213 isi_clk: isi_clk {
1214 #clock-cells = <0>;
1215 reg = <37>;
1216 };
1217
1218 ssc0_clk: ssc0_clk {
1219 #clock-cells = <0>;
1220 reg = <38>;
1221 atmel,clk-output-range = <0 66000000>;
1222 };
1223
1224 ssc1_clk: ssc1_clk {
1225 #clock-cells = <0>;
1226 reg = <39>;
1227 atmel,clk-output-range = <0 66000000>;
1228 };
1229
1230 sha_clk: sha_clk {
1231 #clock-cells = <0>;
1232 reg = <42>;
1233 };
1234
1235 aes_clk: aes_clk {
1236 #clock-cells = <0>;
1237 reg = <43>;
1238 };
1239
1240 tdes_clk: tdes_clk {
1241 #clock-cells = <0>;
1242 reg = <44>;
1243 };
1244
1245 trng_clk: trng_clk {
1246 #clock-cells = <0>;
1247 reg = <45>;
1248 };
1249
1250 fuse_clk: fuse_clk {
1251 #clock-cells = <0>;
1252 reg = <48>;
1253 };
1254
1255 mpddr_clk: mpddr_clk {
1256 #clock-cells = <0>;
1257 reg = <49>;
1258 };
1259 };
1260 };
1261
1262 rstc@fffffe00 {
1263 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1264 reg = <0xfffffe00 0x10>;
1265 clocks = <&clk32k>;
1266 };
1267
1268 shutdown-controller@fffffe10 {
1269 compatible = "atmel,at91sam9x5-shdwc";
1270 reg = <0xfffffe10 0x10>;
1271 clocks = <&clk32k>;
1272 };
1273
1274 pit: timer@fffffe30 {
1275 compatible = "atmel,at91sam9260-pit";
1276 reg = <0xfffffe30 0xf>;
1277 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1278 clocks = <&mck>;
1279 };
1280
1281 watchdog@fffffe40 {
1282 compatible = "atmel,at91sam9260-wdt";
1283 reg = <0xfffffe40 0x10>;
1284 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1285 clocks = <&clk32k>;
1286 atmel,watchdog-type = "hardware";
1287 atmel,reset-type = "all";
1288 atmel,dbg-halt;
1289 status = "disabled";
1290 };
1291
1292 sckc@fffffe50 {
1293 compatible = "atmel,at91sam9x5-sckc";
1294 reg = <0xfffffe50 0x4>;
1295
1296 slow_rc_osc: slow_rc_osc {
1297 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1298 #clock-cells = <0>;
1299 clock-frequency = <32768>;
1300 clock-accuracy = <50000000>;
1301 atmel,startup-time-usec = <75>;
1302 };
1303
1304 slow_osc: slow_osc {
1305 compatible = "atmel,at91sam9x5-clk-slow-osc";
1306 #clock-cells = <0>;
1307 clocks = <&slow_xtal>;
1308 atmel,startup-time-usec = <1200000>;
1309 };
1310
1311 clk32k: slowck {
1312 compatible = "atmel,at91sam9x5-clk-slow";
1313 #clock-cells = <0>;
1314 clocks = <&slow_rc_osc &slow_osc>;
1315 };
1316 };
1317
1318 rtc@fffffeb0 {
1319 compatible = "atmel,at91rm9200-rtc";
1320 reg = <0xfffffeb0 0x30>;
1321 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1322 clocks = <&clk32k>;
1323 };
1324 };
1325
1326 usb0: gadget@00500000 {
1327 #address-cells = <1>;
1328 #size-cells = <0>;
1329 compatible = "atmel,sama5d3-udc";
1330 reg = <0x00500000 0x100000
1331 0xf8030000 0x4000>;
1332 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1333 clocks = <&udphs_clk>, <&utmi>;
1334 clock-names = "pclk", "hclk";
1335 status = "disabled";
1336
1337 ep0 {
1338 reg = <0>;
1339 atmel,fifo-size = <64>;
1340 atmel,nb-banks = <1>;
1341 };
1342
1343 ep1 {
1344 reg = <1>;
1345 atmel,fifo-size = <1024>;
1346 atmel,nb-banks = <3>;
1347 atmel,can-dma;
1348 atmel,can-isoc;
1349 };
1350
1351 ep2 {
1352 reg = <2>;
1353 atmel,fifo-size = <1024>;
1354 atmel,nb-banks = <3>;
1355 atmel,can-dma;
1356 atmel,can-isoc;
1357 };
1358
1359 ep3 {
1360 reg = <3>;
1361 atmel,fifo-size = <1024>;
1362 atmel,nb-banks = <2>;
1363 atmel,can-dma;
1364 };
1365
1366 ep4 {
1367 reg = <4>;
1368 atmel,fifo-size = <1024>;
1369 atmel,nb-banks = <2>;
1370 atmel,can-dma;
1371 };
1372
1373 ep5 {
1374 reg = <5>;
1375 atmel,fifo-size = <1024>;
1376 atmel,nb-banks = <2>;
1377 atmel,can-dma;
1378 };
1379
1380 ep6 {
1381 reg = <6>;
1382 atmel,fifo-size = <1024>;
1383 atmel,nb-banks = <2>;
1384 atmel,can-dma;
1385 };
1386
1387 ep7 {
1388 reg = <7>;
1389 atmel,fifo-size = <1024>;
1390 atmel,nb-banks = <2>;
1391 atmel,can-dma;
1392 };
1393
1394 ep8 {
1395 reg = <8>;
1396 atmel,fifo-size = <1024>;
1397 atmel,nb-banks = <2>;
1398 };
1399
1400 ep9 {
1401 reg = <9>;
1402 atmel,fifo-size = <1024>;
1403 atmel,nb-banks = <2>;
1404 };
1405
1406 ep10 {
1407 reg = <10>;
1408 atmel,fifo-size = <1024>;
1409 atmel,nb-banks = <2>;
1410 };
1411
1412 ep11 {
1413 reg = <11>;
1414 atmel,fifo-size = <1024>;
1415 atmel,nb-banks = <2>;
1416 };
1417
1418 ep12 {
1419 reg = <12>;
1420 atmel,fifo-size = <1024>;
1421 atmel,nb-banks = <2>;
1422 };
1423
1424 ep13 {
1425 reg = <13>;
1426 atmel,fifo-size = <1024>;
1427 atmel,nb-banks = <2>;
1428 };
1429
1430 ep14 {
1431 reg = <14>;
1432 atmel,fifo-size = <1024>;
1433 atmel,nb-banks = <2>;
1434 };
1435
1436 ep15 {
1437 reg = <15>;
1438 atmel,fifo-size = <1024>;
1439 atmel,nb-banks = <2>;
1440 };
1441 };
1442
1443 usb1: ohci@00600000 {
1444 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1445 reg = <0x00600000 0x100000>;
1446 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1447 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1448 clock-names = "ohci_clk", "hclk", "uhpck";
1449 status = "disabled";
1450 };
1451
1452 usb2: ehci@00700000 {
1453 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1454 reg = <0x00700000 0x100000>;
1455 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1456 clocks = <&utmi>, <&uhphs_clk>;
1457 clock-names = "usb_clk", "ehci_clk";
1458 status = "disabled";
1459 };
1460
1461 nand0: nand@60000000 {
1462 compatible = "atmel,at91rm9200-nand";
1463 #address-cells = <1>;
1464 #size-cells = <1>;
1465 ranges;
1466 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1467 0xffffc070 0x00000490 /* SMC PMECC regs */
1468 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1469 0x00110000 0x00018000 /* ROM code */
1470 >;
1471 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1472 atmel,nand-addr-offset = <21>;
1473 atmel,nand-cmd-offset = <22>;
1474 atmel,nand-has-dma;
1475 pinctrl-names = "default";
1476 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1477 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1478 status = "disabled";
1479
1480 nfc@70000000 {
1481 compatible = "atmel,sama5d3-nfc";
1482 #address-cells = <1>;
1483 #size-cells = <1>;
1484 reg = <
1485 0x70000000 0x08000000 /* NFC Command Registers */
1486 0xffffc000 0x00000070 /* NFC HSMC regs */
1487 0x00200000 0x00100000 /* NFC SRAM banks */
1488 >;
1489 clocks = <&hsmc_clk>;
1490 };
1491 };
1492 };
1493};